SAMI 2012 10th IEEE Jubilee International Symposium on Applied Machine Intelligence and Informatics January 26-28, 2012

12 Herlany, Slovakia

BPSK System on Spartan 3E FPGA

S.O. Popescu*, A.S.Gontean* and G.Budura**
*

Applied Electronics Departament, Faculty of Electronics and Telecommunications, Politehnica University of Timisoara, Romania ** Telecommunications Department, Faculty of Electronics and Telecomunications, Politehnica University of Timisoara, Romania silvana.popescu@etc.upt.ro, aurel.gontean@etc.upt.ro, georgeta.budura@etc.upt.ro boards. The results are discussed in section 5. The final section, 6, presents the conclusions. II. THEORETICAL BACKGROUNDS

Abstract The paper presents a theoretical background overview of the digital communication systems and the BPSK modulation and demodulation. The purposed design is the BPSK system. The BPSK modulation and demodulation represents an important modulation technique in terms of signal power. The BPSK system is simulated using Matlab/ Simulink environment and System Generator, a tool from Xilinx used for FPGA design as well as implemented on two Spartan 3E Starter Kit boards. The first board behaves as a modulator and the second as a demodulator. The modulator and demodulator algorithms have been implemented on FPGA using the VHDL language on Xilinx ISE 12.3. The local clock oscillator of the board is 50Mhz which corresponds with a period of 20ns. The frequency of the BPSK carrier is 31,250 kHz. Both, the modulator and demodulator, have been designed and simulated and theirs performances were evaluated by measurements.

A. Digital Communication System A typically digital communication system is presented in Fig.1.

I. INTRODUCTION In the last years, a major transition from analog to digital modulation techniques has occurred and it can be seen in all areas of satellite communications systems, cellular and wireless. A digital communication system is more reliable than an analog one thanks to the advanced signal processing algorithms used at the transmitter and the receiver ends. The aim of the paper is to create a BPSK (Binary Phase Shift Keying) system made of a modulator, a channel and a demodulator. The modulated signal was achieved in the first Spartan 3E board, passed through a channel and transmitted to the second board, which behaves as a demodulator. At the end of the demodulator, the modulating signal was obtained. The main difference is the System Generator block which makes possible the administration of the Xilinx components. Important studies were made in this field and were cited in this paper [1], [2], [3], [4], [5], [6], [7]. The resources used in generating the BPSK modulation and demodulation were a computer with the Xilinx WebPack ISE on it, two Spartan 3E Starter Kit boards and a LeCroy WaveSurfer Xs Series Oscilloscope, a high performance digital oscilloscope. The paper is organized into 6 sections. The paper begins with an introduction in section 1. Section 2 presents the theoretical backgrounds about the digital communication system and about the BPSK modulation and demodulation. After discussing in theory, implementation of the BPSK system in Matlab/ Simulink and System Generator are presented in section 3. Section 4 is dedicated to the implementation of the system: modulator and demodulator on the Spartan 3E Starter Kit

Figure 1. A Digital Communication System.

The components of the digital communication system are both digital and analog parts. The digital part consists of digital source/user, source encoder/ decoder, channel encoder/ decoder and the digital modulator/ demodulator. The analog part is made of the transmitter, receiver, the channel models and noise models [8]. The message to be sent is from a digital source, in our case, from a computer. The source encoder accepts the digital data and prepares the source messages. The role of the channel encoder is to map the input symbol sequence into an output symbol sequence. The binary information obtained at the output of the channel encoder is than passed to a digital modulator which serves as interface with the communication channel. The main purpose of the modulator is to translate the discrete symbols into an analog waveform that can be transmitted over the channel [9], [10]. In the receiver, the reverse signal processing happens. A channel is the physical medium that carries a signal between the transmitter and the receiver. The signal is corrupted with noise whatever the medium used for transmission. The role of a digital communication system is to transport digital data between the transmitter and receiver. As the signals propagate between the two nodes, they may be submitted to distortion due the channel imperfection. The digital data is transmitted between the

978-1-4577-0197-9/11/$26.00 2011 IEEE

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transmitter and the receiver by varying a physical characteristic of a sinusoidal carrier, either the frequency or the phase or the amplitude. This operation is performed with a modulator at the transmitting end to impose the physical change to the carrier and a demodulator at the receiving end to detect the resultant modulation on reception [11]. B. BPSK Modulation and Demodulation Digital modulation is the process by which digital symbols are transmitted into waveforms that are compatible with the characteristics of the channel [8]. The modulation process converts the signal in order to be compatible with available transmission facilities. At the receiver end, demodulation must be accomplished by recognizing the signals [11]. The modulation technique used in this paper is BPSK (Binary Phase Shift Keying) and it is widely used in digital transmission [12]. BPSK modulation is the simplest form and most robust of all the PSK modulation techniques. It is able to modulate at only 1bps and it is not suitable for high data-rate applications. The BPSK modulator is quite simple and is illustrated in fig.2. The binary sequence m(t) or modulating signal is multiplied with a sinusoidal carrier and the BPSK modulated signal s(t) is obtained. The waveforms of the BPSK signal generated by the modulator are shown in fig.3.

III.

BPSK SYSTEM

A. BPSK System in Simulink In [4], a BPSK modulator and demodulator is implemented in the Simulink environment for a practical teaching course. Fig. 5 represents a communication system implemented in the Matlab/ Simulink environment that uses the BPSK modulation technique. The system is composed of the binary data source, a modulator, a channel and a demodulator. The binary data source is made of a random data source and a rounding function (fig.6). The corresponding signal is illustrated in fig.7c.

Figure 5. BPSK System.

The BPSK modulator (fig.6) is made of two sine carriers, the second one delayed with 180 and a switch which will choose between the first or third output depending on the value of the second input. If the second input is 1, the output value will be sine (fig.7a), but if the second input is 0, the output will be sine (fig.7b).

Figure 2. BPSK Modulator [13].

Figure 6. Binary data source and BPSK Modulator [15].

Figure 3. BPSK waveforms [14].

To demodulate the signal, it is necessary to reconstitute the carrier. This process is made in the Carrier Recovery Circuit. Next, the BPSK modulated signal is multiplied with the carrier, pass through an integrator and a decision circuit to obtain in the end the modulating signal.
Figure 7. The waveforms on the scope [9] (a) Sine (b) Sine (c) Modulating signal (d) Modulated signal.

Figure 4. BPSK Demodulator [13].

The modulated signal is then pass through a channel where noise is added. The channel also has a limited frequency bandwidth so that it can be viewed as a filter (fig.8). The corresponding signals are shown in fig.9.

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SAMI 2012 10th IEEE Jubilee International Symposium on Applied Machine Intelligence and Informatics January 26-28, 2012 Herlany, Slovakia

The obtained signal enters the pulse shaper block and at its output the demodulated signal is found (fig.13).

Figure 8. Band Limited Noisy Channel.

Figure 13. (a) The modulating signal (b) The demodulated signal.

Figure 9. The waveforms shown on the scope (a) the modulated signal (b) the noise (c) the noise added to the modulated signal.

The modulated signal added with noise arrives at the input of the demodulator. The first block in the demodulator is saturation (fig.10).

Figure 10. BPSK demodulator.

The saturation block [16] establishes upper and lower bounds for an input signal. If the input signal is within the limits of upper and lower bounds, the input signal passes through unchanged, otherwise the signal is clipped to the upper and/ or lower bounds (fig.11).

B. BPSK System in System Generator System Generator is a digital signal processing design tool from Xilinx. Designs are made in the Simulink environment using a Xilinx specific blockset. All implementation steps, including synthesis, place and route are automatically performed to generate an FPGA programming file [17]. In [6] and [7] implementations of a BPSK system are presented. In [7], a hybrid DSP/FPGA architecture of a BPSK transceiver is discussed with implementation is System Generator. In [6], a method of designing BPSK modulator and demodulator is presented. The method uses a DDS (Direct Digital Synthesis), same as we used in our model implemented in System Generator. Our BPSK system implemented in System Generator has the same block as in fig.5: data source, a modulator [15], a channel and a demodulator. The main difference is the System Generator block which makes possible the administration of the Xilinx components. The modulating signal (fig.15c) is generated internal by a LFSR (Linear Feedback Shift Register) (fig.14). The carrier is generated internal by DDS blocks from System Generator (fig.14). The DDS Compiler Block is a direct digital synthesizer and it uses a lookup table scheme to generate sinusoids. A digital integrator generates a phase that is mapped by the lookup table into the output waveform [17]. The sine waveforms can be seen in fig.15 (a) and (b). The mux block implements a multiplexer. It has one select input and a configurable number of data inputs that can be defined by the user. The d0 and d1 inputs of mux represent the sine waves. The sel input of mux represents the modulating signal and selects between the d0 and d1 inputs. If LFSR is 1, the modulated signal remained same as the carrier, but if 0 was transmitted, the yielded carrier is transmitted.

Figure 11. The signal at the output of the saturation block.

After limiting the signal to the upper and lower bounds, it is multiply by a sine waveform, which is the carrier obtained in theory from the carrier recovery circuit and then passed through the transfer function block which implements a transfer function between the input and the output. The signal obtained is illustrated in fig.12.

Figure 14. BPSK Modulator in System Generator. Figure 12. The signal at the output of the transfer block.

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With the System Generator WaveScope (fig.15), the user can view the waveforms generated in the design. It is well suited for analyzing and debugging System Generator designs [17].

IV. BPSK SYSTEM ON THE SPARTAN 3E BOARD The BPSK System (fig.19) = Modulator (fig.20) and Demodulator (fig.22) that we implemented on the Spartan 3E Starter Kit board [18] is, exactly, the implementation in System Generator. The carrier is generated internal, in a ROM. The BPSK system (fig.18) consists of two Spartan 3E boards, first behaves as a modulator and the second one, as a demodulator. The connections between the two boards are made of three wires: first comports as a communication channel, the second as an asynchronous reset signal and the last one for the synchronization of the two boards.

(a)Sine (b) --Sine

Figure 15. The waveforms: (c) The modulating signal (d) The modulated signal.

The modulated signal is then pass through the same channel where noise is added and arrives at the input of the demodulator (fig.16). The carrier is recovered due to the DDS compiler and then multiplied with the modulated signal affected by noise. The obtained signal is then added with all the samples, multiplied, from a period. This operation takes place in the accumulator. Once we have a result, it is compared with a threshold. If the compared signal is positive, the demodulator take the decision that 1 was transmitted, otherwise, 0.

Figure 18. BPSK System.

The yellow cable represents the communication channel, the red one is the reset and the green one makes possible the synchronization between the two boards.

Figure 19. BPSK System experimental setup.

Figure 16. BPSK Demodulator in System Generator.

Fig.17 illustrates the modulating signal generated in the modulator and the demodulated signal obtained after the demodulation operation.

Figure 20. BPSK Modulator experimental setup.

Figure 17. (a) The modulating signal (b) The demodulated signal

The modulating signal is generated internal, in the modulator, by a LFSR. The carrier is also generated internal, and is made of 16 different values kept in a ROM memory [1]. The yielded carrier with 180 phase shift is obtained by reading the ROM memory later with 8 samples. If LFSR was 1, the modulated signal remained same as the carrier, but if 0 was transmitted, the modulated signal became the yielded carrier. The modulated signal is then sent to the DAC (Digital-toAnalog Converter) on the board in order to be sent through the channel. A design of a BPSK transmitter using FPGA with DAC is presented in [3].

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SAMI 2012 10th IEEE Jubilee International Symposium on Applied Machine Intelligence and Informatics January 26-28, 2012 Herlany, Slovakia

The principle of the BPSK modulator implemented on the FPGA is illustrated in fig.21.

Figure 24. The waveforms: (a) The modulating signal (b) Sine (c) The modulated signal. Figure 21. The principle of the BPSK modulator on the FPGA

Figure 25. The waveforms: (a) The modulated signal (b) The modulating signal (c) The demodulated signal. Figure 22. BPSK Demodulator experimental setup.

The modulated signal affected with noise arrives at the second board which behaves as a demodulator. The signal enters the demodulator with the help of a pmod AD1 which transforms the analog signal into a digital one. This digital signal is then multiply with the recovered carrier, generated internal in a ROM memory, practically an integration was achieved. The result is kept in an accumulator and compared with a decision threshold and so, the demodulated signal is obtained. The principle of the BPSK demodulator implemented on the FPGA is illustrated in fig.23.

Fig. 26 and 27 illustrate the design summary of the modulator and demodulator board. The design summary shows the various synthesizer options that were enabled and some device utilization and timing statistics for the synthesized design.

Figure 26. Design Summary of the BPSK Modulator.

Figure 23. The principle of the BPSK demodulator on the FPGA

V. RESULTS After implementing the BPSK System made of a modulator and demodulator on the two Spartan 3E Starter Kit boards, the signals were routed to the LeCroy WaveSurfer Xs Series Oscilloscope, a high performance digital oscilloscope. Fig.24 illustrates the signal in the modulator. The first one represents the modulating signal generated by the LFSR, the second one, the carrier and the third, the modulated signal. In fig.25, the modulated, the modulating and the demodulated signals are shown.

Figure 27. Design Summary of the BPSK Demodulator

Figure 28 and 29 show the schematic representation of the two boards.

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board was lower in terms of the slice flip-flops and LUTs used. All of these make the design suitable in terms of propagation, implementation and logic utilization of the Spartan 3E boards used in this work. REFERENCES
[1] F.Ahamed, A.Scorpino, An educational digital communications project using FPGAs to implement a BPSK Detector, IEEE Transactions on Education, Vol.48, No.1, 2005, pp.191-197. O.Azarmanesh, S.Bilen, Developing a rapid prototyping method using a Matlab/ Simulink/ FPGA development to enable importing legacy code, Proceedings of the SDR 08 Technical Conference and product Exposition, USA, 2008. Y.H.Chye, M.F.Ain, N.M.Zawawi, Design of BPSK Transmitter Using FPGA with DAC, in Proceedings of the 2009 IEEE 9th Malaysia Conference on Communications, Malaysia, 2009, pp.451-456. P.Dondon, J.M.Micouleau, J.Legall, .K.Kadionik, Design of a low cost BPSK modulator/demodulator for a practical teaching of digital modulation techniques, in the 4th WSEAS/IASME International Conference on Engineering Education, Greece, 2007, pp.61-66. P.Krivi, G.timac, FPGA Implementation of BPSK Modem for Telemetry Systems Operating in Noisy Environments, Proceedings of the 33rd International Convention on Information and Communication Technology, Electronics and Microelectronics, Croatia, 2010, pp.1727-1731. W.Song, J.Zhang, Q.Yao, Design and Implementation of BPSK Modulator and Demodulator on Modern DSP Technology, 3rd IEEE International Symposium on Microwave, Antenna, Propagation and EMC Technologies for Wireless Communications, China, 2009, pp.1135-1137. Y.Tachwali, H.Refai, Implementation of a BPSK Transceiver on Hybrid Software Defined Radio Platforms, 3rd International Conference on Information and Communication Technologies: From Theory to Applications, Syria, 2008, pp. 1-5. A.Grgr, F.Arikan, O.Arikan, Simulation of a digital communication system, in Proceedings of the 13th European Signal Processing Conference EUSIPCO, 2005, Turkey, http://www.eurasip.org/Proceedings/Eusipco/Eusipco2005/defeve nt/papers/cr1142.pdf H.Nguyen, E.Shwedyk, A first Course in Digital Communications, Cambridge University Press, New York, 2009. J.G. Proakis, Digital Communications, 4th edition, McGraw Hill, New York, 2001. G. Smithson, Introduction to Digital Modulation Schemes, in IEE Colloquium on The Design of Digital Cellular Handsets, 1998, United Kingdom, pp. 2/1 - 2/9 S.O.Popescu, G.Budura, A.S.Gontean, Review of PSK and QAM Digital Modulation Techniques on FPGA, International Joint Conference on Computational Cybernatics and Technical Informatics (ICCC-CONTI), Romania, 2010, pp.327-332. F.Xiong, Digital Modulation Techniques, Artech House, UK, 2000. S.O.Popescu, A.S.Gontean, F.Alexa, Improved FPGA-Detector, in Proceedings of the 6th IEEE International Symposium on Applied Computational Intelligence and Informatics (SACI 2011), Romania, 2011, pp.455-458. S.O.Popescu, A.S.Gontean, G.Budura, Simulation and Implementation of a BPSK Modulator on FPGA, in Proceedings of the 6th IEEE International Symposium on Applied Computational Intelligence and Informatics (SACI 2011), Romania, 2011, pp.459-463. S.T.Karris, Introduction to Simulink with Engineering Applications, Orchard Publications, USA, 2006. System Generator for DSP. Getting Started Guide. Xilinx. 2008 Spartan 3E FPGA Starter Kit board. User guide. Xilinx. 2011. ISE 10.1 Quick Start Tutorial, Xilinx, 2008.

[2]

Figure 28. The route paths of the BPSK modulator on the Spartan 3E Board.

[3]

[4]

[5]

[6] Figure 29. The route paths of the BPSK demodulator on the Spartan 3E Board.

VI.

CONCLUSION

[7]

We proposed a implementation of the BPSK System (Modulator and Demodulator) in the Matlab/Simulink environment. Then, we made a proposal of a BPSK System in System Generator. Both, the modulating signal and the carrier are generated internal, the modulating signal by a LFSR and the carrier by a DDS Compiler. The modulated signal is obtained at the output of a mux block and, then, passed through a communication channel where noise is added. In the demodulator, the carrier is recovered due to another DDS compiler and then multiplied with the modulated signal affected by noise. The obtained signal is then added with all the multiplied samples from the carrier in a period. The operation takes place in the accumulator. Once we have a result, it is compared with a decision threshold. If the compared signal is positive, the demodulator take the decision that 1 was transmitted, otherwise, 0. The BPSK System implemented on the Spartan 3E Starter Kit board has the same principle as the implementation in System Generator. Although System Generator has an option to generate the VHDL code, for this design the code was made from the beginning because the generated code was hard to read. The only difference was that of the carrier which was indeed generated internal, in a ROM memory, but made of 16 different values. The yielded carrier with 180 phase shift was obtained by reading the ROM memory later with 8 samples. Comparing the design summary obtained with other works in this field [1] - [8], the logic utilization of the

[8]

[9] [10] [11]

[12]

[13] [14]

[15]

[16] [17] [18] [19]

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