Proceedings of the 2012 24th International Symposium on Power Semiconductor Devices and ICs 3-7 June 2012 - Bruges,

Belgium

Making a bridge from SJ-MOSFET to IGBT via RC-IGBT structure

Concept for 600V class SJ-RC-IGBT in a single chip solution
Tadaharu Minato, Shinji Aono
Mitsubishi Electric Corporation, Power Device Works, Power Semiconductor Development Department Fukuoka, Japan Minato.Tadaharu@bk.MitsubishiElectric.co.jp
Abstract Through the simulation, a concept for the next generation MOSFET or IGBT as a single chip solution by combining Super Junction MOSFET (SJ-MOSFET) with Reverse Conducting IGBT (RC-IGBT) is presented. Since the MOSFETs fundamental trade-off relationship between Ron,sp and turn-off loss Eoff is much better than IGBTs, we focus how to push up a connection collector current density Jconnect where SJ MOSFETs output I-V curve touches the IGBTs one and

Katsumi Uryu, Takashi Yamaguchi

Mitsubishi Electric Information Network Corporation Plant System Department 1 Fukuoka, Japan

found out the good combination for an N-drift and an N-buffer. This proposed device has an enough Unclamped Inductive Switching (UIS) capability as the SJ-MOSFETs SOA and acceptable dynamic characteristics as the IGBT or the FWD. Keywords; Super Junction, MOSFET, STM, RC-IGBT, FWD, CSTBT, SOA, UIS, Reverse Recovery.

I.

BACKGROUND

Operation physics of Super Junction [1] based upon the multi-RESURF effect and its structure consists of the charge compensation of twin n and p type columns [2]. Both well known SJ-MOSFET [2] and our medium voltage class device named Super Trench MOSFET (STM) with very tight cell pitch (Fig.2) [3-4] seems to be a little behind from IGBT in the high Jc region more than 200A/cm2 (Fig. 1) [5], but IGBTs Ron,sp are worse in the low current density Jc region because of the built-in potential of a pn junction. Taking account UIS capability, SJ-MOSFET requires an n-buffer layer of the conventional low doping concentration under the n/p column structure above the high concentration N+ drain region [6].
Source Al
Barrier metal layer Gate oxide layer Polysilicon gate P+ diffusion layer Emitter electrode

it is worse than IGBTs, as mentioned above in the high Jc. As long as simply operated as the bipolar device, the conventional RC-IGBT (Fig.3) [7] should be carefully optimized in its backside structure to avoid a snap-back phenomenon in the output I-V characteristic. A VCE(sat)Eoff tradeoff relationship of the recent SJ-RC-IGBT [8] is reported to be quite good.
100
Ron,sp [m cm2]

Si limit SJ MOS FET

STM 2000

10 STM 2001 IGBT @200A/cm2

Pbody

Emitter layer P base layer Carrier stored N layer

eSiO P N P N
2
N - layer

1 100
BV [V]

1000

N+Sub

Figure 3 Across the Si limit

Drain
N +

Collector electrode

P + layer

Figure 1. STM

Figure 2. RC-IGBT

We found out how to establish the high current density point at which the SJ-MOSFETs output I-V curve could joint the RC-IGBTs one while maintaining both a high saturation current characteristic as IGBT operation and a large SOA especially a UIS as MOSFET. And a body diodes recovery loss Erec is also a large issue. In the Fig. 3, Ron,sp for both the well known SJMOSFETs and our STM2001 [5], indicated as the square and triangle symbol respectively, are about 30% of the Si limit, but
Fig. 4 SJ-RC-IGBT structure in this simulation

978-1-4577-1597-6/12/$26.00 2012 IEEE

la ye r

137

II.

STRUCTURE

III.

CHARACTERISTICS

The simulation device width is 90m with 6m cell pitch, and n or p column width is 3m. The 12 of 15 columns are assigned to Light Punch Through (LPT) type IGBT with thin pcollector, and the anthers are to MOSFET with thin and low concentration drain region. The referred conventional IGBT and MOSFET are not shown, but simply without p-column. Based upon the SJ physics, the higher the n-column concentration is, the better Ron,sp of MOSFET is. But the p/n columns should be very thin to maintain the fully depleted condition. We estimated 3m width is realistic for the ncolumn as the N-drift width using our deep trench technology more than 90m [9].
Table 1 Summary of Structural Parameters
Cell Pitch N-Drift thickness Wcell [m] tND [m] Aa Ab Ac Ad Bc Bd Db Bc2 Bd2 30 6 N-Drift conc. N-Buffer thickness N-Buffer conc. -3 -3 tNB [m] cNB [cm ] cND [cm ] 1.4E+15 4.2E+15 8.3E+15 4.9E+15 1.0E+16 5 8.3E+15 1.0E+16 4.2E+15 8.3E+15 1.0E+16 1.0E+16

All the structural parameters are listed in table. 1, and fundamental reference values for the concentration and thickness were estimated from the well-known analytical equations. We carefully choose this n-buffer concentration as 4.9e15 and 1e16cm-3 to be relatively high for the 600V class IGBT. This n-buffer could maintain only a 90V or 53V in the non-SJ operation, but enough value for UIS capability as the SJ-MOSFET operation. And these values never cause the snapback phenomena in the first quadrant of the output I-V characteristic. Fundamental electrical characteristics are listed in table 2. As the structural notation, capital A, B and D stand for ncolumn length tND 30, 35 and 45m, small letters a, b, c and d stand for n-column concentration 1.4, 4.2, 8.3e15 and 1e16cm-3 and Arabian number 2 and 4 stand for N-buffer concentration 4.9e15 and 1.0e16 cm-3, respectively. For all the structures, the higher the n-column concentration is, the higher the Jconnect. On the hands, decrease of Breakdown Voltage BV is moderate, and the longer the n-column is the slower the decreasing ratio of BV. Focusing on the Jconnect characteristics, effects of ncolumn length and n-buffer concentration is large in the low ncolumn concentration region. The n-column concentration approaching 1e16cm-3, the Jconnect reached almost 70A/cm2. This Jconnect value might be the limit of this 600V class device. This is because n-column doping concentration 1e16cm-3 is very close to the excess carrier concentration in this current density operation.

35 45 35

Table 2 Summary of Electrical Characteristics

BV Eave [V] [V/m] Aa Ab Ac Ad Bc Bd Db Bc2 Bd2 616 616 580 552 661 648 867 659 636 19.0 19.0 17.8 17.0 17.6 17.3 18.3 17.6 17.0 MOS-IGBT MOS-IGBT Analytical Ron,sp Isat connection connection Von [V] Von [V] BV [V] MOS region 2 2 2 Jconnect Vconnect for cND [m cm2] 20A/cm 200A/cm [A/cm ] 2 [V] [A/cm ] 235 45.3 0.78 1.07 4,850 15 0.77 103 24.3 0.49 1.04 3,650 40 0.76 61 16.4 0.33 1.01 3,200 53 0.71 53 14.4 0.29 1.00 3,004 60 0.71 61 17.6 0.35 1.06 3,149 49 0.74 53 15.9 0.32 1.04 3,039 58 0.77 103 31.1 0.62 1.16 3,350 31 0.78 61 14.1 0.28 1.06 3,125 61 0.82 53 12.7 0.25 1.05 3,039 68 0.84

200
Aa 30-5-1.39e15 Ab 30-5-4.17e15 Ac 30-5-8.34e15

100

1st Q.

35m1e16cm 35m 30m

-3

MOS-IGBT connection

900 BV [V]

m

250 200 150 100 50 0

current density Jconect [A/cm ]

BV
tND=30m tNB=5m cNB=4.88e15 & 1e16cm
-3

-8 3rd Q.

-6

-4

-2
-100

600

Vg=10V -200 Vc [V]

Vg=0V

300

Jconnect
30m

35m1e16cm
-3

Fig. 6 Output I-V charactersitics for both the 1st & 3rd

35m

 m

0.0E+00

N-Drift conc. cND [cm-3]

Fig. 5 N-drift conc. vs. BV & Jconnect

5.0E+15

1.0E+16

Both the forward and backward output I-V characteristics are shown in Fig.6, parts of magnifications are listed in Fig. 7-a, b and c. I-V characteristics as the diode in the third quadrant (Fig. 6) have snap-back phenomena in case of the gate positive bias to create n-channel, which makes an anode-shorted type diode. But the forward bias operation shows extremely good agreement for both MOSFET mode and IGBT mode. In Fig. 7a, the Jconnect reached 50A/cm2, and this BV could be improved by elongated n/p column with the minimum sacrifice of Jconnect as shown in Fig. 5.

138

200 Collector current density Jc [A/cm2

Line makers are list in the descending order in the lower Jc region. Top "Bd2" has the largest current density. Non-SJ M OSFET's I-V is too low to be indicated in this figure.

150

100

Bd2 35-5-1.0e16 Ac 30-5-8.34e15 Ab 30-5-4.17e15 Db 45-5-4.17e15 Aa 30-5-1.39e15 IGBT MOSFET

50

0 0.0 0.5 1.0 Collector Voltage Vc [V]

In Fig. 7a 7c, the forward output I-V characteristics for the low, medium and high current density regions of SJ-RCIGBT are shown in detail. The higher the n-column concentration is, the lower the VCE(sat) is and the higher the Jcc is(7-a). But this tendency comes to a up-side-down, because the conductivity modulation is affected by the back ground doping and the lower doping is suitable for maintaining the charge neutrality in the higher current density. Further optimization results for n-buffer and the n-drirft are list in table 2 as mentioned above. In Fig. 7a, line makers are list in the descending order in the lower Jc region. Top "Bd2" has the largest current density. Non-SJ MOSFET's I-V is too low to be indicated in this figure. Fig. 7b and 7c are discribed as the same manner like Fig. 7a.

250 200
Jc [A/cm2]

UIS Waveform

Structure "Aa"
Aa : 30-5-1.4e15

Figure 7a low current density region

800 Collector current density Jc [A/cm2 700 600 500 400 300 200 1.0 1.2 1.4 Collector Voltage Vc [V] 1.6
Line makers are list in the descending order, and Top is "Aa".

750 VCE 600 450 300 150 0

VCE

Aa 30-5-1.39e15 Ab 30-5-4.17e15 Ac 30-5-8.34e15 IGBT Bd2 35-5-1.0e16 Db 45-5-4.17e15

150 100 50 0

Jc

Non-SJ MOSFET's I-V is too low to be indicated in this figure.

0.0E+00

5.0E-05 Time [s]

1.0E-04

Figure 8a UIS waveform for Aa structure

Figure 7b medium current density region

4000 Collector current density Jc [A/cm2 3500 3000 2500 2000 1500 1000 500 0 0 2
Line makers are list in the descending order in the high current region.

3000 Jc 2500 2000 1500 1000 500 0

Jc

UIS Waveform

Structure "Aa"
Aa : 30-5-1.4e15

750 VCE 600 450

VCE

300 150 0

IGBT Aa 30-5-1.39e15 Ab 30-5-4.17e15 Db 45-5-4.17e15 Ac 30-5-8.34e15 Bd2 35-5-1.0e16 MOSFET 4 6 8 CollectorVoltage Vc [V] 10

0.0E+00

1.0E-03 Time [s]

2.0E-03

Figure 8b UIS waveform for Aa structure

Figure 7c high current

UIS SOA (Fig.8) is large enough up to 3000A/cm2, where is very close to the saturation current density as listed in table 2,

139

Jc [A/cm2]

in the isothermal condition of the room temperature in which it is more tough condition for device to turn off a large current density than hot temperature because of the higher impact ionization rate. Reploting UIS waveform into the static V-I locus with the conventional forward blocking I-V curve (Fig. 9), this very high UIS turn-off capability could be understood from the secondary breakdown point of view [10], where we found out two kinds of the secondary breakdown were observerd. As the IGBT operation, an inductive load turn-off characteristic is confirmed as shown in Fig. 10.
1.E+04 1.E+03 1.E+02 1.E+01 UIS locus + BV curve Bipolar (pnp Tr.) operation

recovery dJc/dt is kept the relatively low value on behalf of the relatively high doping concentration in the p/n column region of the main part of drift layer. Summing up the switching characteristics for both forward and backward, both large Eoff and Irr-trr-Err are the characteristics to be reduced in the next stage by optimizing carrier lifetime control method.
500 400 300 200 100 0 -100 -200 -300 -400

VCE Reverse Recovery as the FWD operation mode

300 200 100 0 -100 -200 -300 -400 -500 -600

UIS Locus
SJ operation MOSFET operation

Jc

Jc [A/cm2]

1.E+00 1.E-01 1.E-02 1.E-03 1.E-04 1.E-05 1.E-06 0 300 Structure "Aa"
Aa : 30-5-1.4e15

Structure "Aa"
Aa : 30-5-1.4e15

BV curve from static characteristic

600

-500 -700 3.01E-05 3.02E-05 3.02E-05 3.03E-05 3.03E-05

time [s]

Figure 11 Recovery waveform in FWD mode of structure Aa

Vc [V]

IV.

CONCLUSION

Figure 9 UIS V-I locus with a static blocking characteristic

400

Jc [A/cm2]

VCE

300

Inductive load turn-off waveform Jc

Structure "Aa" Aa : 30-5-1.4e15

200 100 0 -100 -200 -300 -400 -500 -600

VCE [V]

100

Not a standard IGBT but an RC-IGBT reason of a SJMOSFET with the well-tempered n-buffer is a good approach to improve the forward I-V characteristics in the low Jc region. In the 600V class, this SJ-RC combination device acts as the unipolar MOSFET in the Jc range of 50 A/cm2, where is a quarter or a half of the rated current density for this voltage class device, without any sacrifice concerning about SOA. Assuming inverter operation, the third quadrant current conduction and reverse recovery characteristics might be improved in the next stage of development through the carrier lifetime control process. ACKNOWLEDGMENT Wed like to thank Dr. K. Sato for his encouragement, and also thank Miss C. Yokoyama for giving us an unlimited opportunity to continue our research. REFERENCES
[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] T. Fujihira, pp.423-426, ISPSD98 G. Deboy, pp.683-685, IEDM98 T. Minato, pp.73-76, ISPSD2000 T. Nitta, pp.77-80, ISPSD2000 T. Minato, Mitsubishi Electric ADVANCE, 105, pp.24-27, 2004 M. Rub, PS1P3, ISPSD03 H. Takahashi, pp. 133-136, ISPSD04 M. Antoniou, HV-P8, ISPSD10 N. Tokuda, pp.129-132, ISPSD04 T. Minato, pp. 89-92, ISPSD97

2.045E-05

2.050E-05

time [s]

2.055E-05

2.060E-05

2.065E-05

Figure 10 Inductive load turn-off of structure Aa

As the high injection rate of holes from the entire p-column sidewall in the N-drift region, a reverse recovery current Irr of FWD operation is four times larger than the forward current (Fig. 11). But a turn-off failure could not be observed at least up to 100A/cm2 of forward conduction current density Jc, and a

140

VCE [V]