U.S.T.H.

B Lab Report 2
4
me
Anne Ingnieur Instrumentation TEC 588 TP2
JHRMTEC588TP2D5-EN-II-2012

The Operational Amplifier In Commutation
Jugurtha Hadjar & Raouf Moualdi

I-Objective
The objective of this experiment is to study
different circuits based on the operational
amplifier in commutation mode.
A Astable Configuration
Schematic:

A-1] Expressions of V
+
and V
-

Applying Millmans theorem on e
+
with
reference to ground, we find :
e
+
=
(
v
s
R
2
+
v
rcI
R
1
)
(
1
R
2
+
1
R
1
)

Which can be simplified to:
e
+
=
R
1
R
1
+R
2
v
s
+
R
2
R
1
+R
2
v
rcI
(1)
The op-amp working in commutation mode, its
output will be either of two values, v
SAT
+
or
v
SAT
-
.


The voltage in e
+
will thus have two possible
values, whether v
s
equals v
SAT
+
or v
SAT
-
, hence
the existence of two voltage thresholds v
+
and
v
-
.
v
+
is in effect when v
s
= v
SAT
+
.
v
-
is in effect when v
s
= v
SAT
-
.
Lets write :
B =
1
R
1
+ R
2

We write again the equations:
v
+
= B. R
1
. v
SAT
+
+B. R
2
. v
rcI
(2)
v
-
= B. R
1
. v
SAT
-
+B. R
2
. v
rcI
(3)
These are the tension thersholds. (For more
details on this, you can read the Lab Report 1
Schmitt Trigger With Op-Amp which can be
found at http://docs.com/@jhadjar or in the
Theory section in the ETO forum)
A-2-a] Expression of V
C
, the voltage across
the capacitor
e
-
= v
C
(t) (4)
Initially, the capacitor is completely discharged
and the op-amp is positively saturated.
v
s
= v
SAT
+
.The v
+
is in effect. C (capacitor)
charges though R from 0 v
SAT
+
according to
the equation:
v
C
(t) = v
SAT
+
(1 - e
-
t
i
) (5)
Once v
C
(that is e
-
) reaches the threshold v
+
,
the op-amp toggles and saturates negatively.
Now, v
s
= v
SAT
-
and v
-
is in effect. C discharges
through R to v
SAT
-
(initial voltage of v
+
):
v
C
(t) = (v
SAT
-
- v
+
)(1 - e
-
t
i
) + v
+
(6)
Once v
C
reaches v
-
, the op-amp toggles and
saturates positively. v
s
= v
SAT
+
. v
+
is in effect.
C charges through R to v
SAT
+
with an initial
voltage of v
-
:
v
C
(t) = (v
SAT
+
- v
-
)(1 - e
-
t
i
) + v
-
(7)
Here is an example trace

The black trace is the capacitor voltage (the
inverting terminal)
The blue trace is the non-inverting terminal.
The red trace is the op-amp output.
You can see how the output swings to negative
and positive saturation when the voltage at the
inverting terminal becomes greater or less
than the voltage at the non-inverting
terminal.

A-2-b] Expression of the output signal
period
Equation (5) represents the transient part.
We will study the equations (6) and (7) which
describe the systems behavior once steady.
When the capacitor discharges according to (6),
its voltage reaches v
-
at t
1
:
v
C
(t
1
) = (v
SAT
-
- v
+
)(1 - e
-
t
1
i
) + v
+
= v
-

t
1
= . Ln
(V
5AT
-
-V
+
)
(V
5AT
-
-V
-
)

When the capacitor charges according to (7), its
voltage reaches v
+
at t
2
:

v
C
(t
2
) = (v
SAT
+
- v
-
)(1 - e
-
t
2
i
) + v
-
= v
+


t
2
= . Ln
(v
SAT
+
- v
-
)
(v
SAT
+
- v
+
)

The period T being the sum of t
2
and t
1
:
T = x. _Ln
(V
SAT
-
- V
+
)
(V
SAT
-
- V
-
)
+ Ln
(V
SAT
+
- V
-
)
(V
SAT
+
- V
+
)
_
If I
c]
= u
v
+
= B. R
1
. v
SAT
+
= -v
-
= -B. R
1
. v
SAT
-

T = 2. Ln_
v
SAT
+
+ v
+
v
SAT
+
- v
+
_
T = 2. R. C. Ln_1 +2
R
1
R
2
]

B - Monostable Configuration
A monostable is a circuit that has one stable state at
which it is by default, and an unstable state it gets in
when triggered by a certain event.
A good monostable example is lighting you find in
buildings, you push the button and theres light for a
time long enough for you to get to an appartment for
example, and then it shuts itself off.
The stable state is when the light was off. The
unstable state is when the light is on. The system
gets unstable when it is triggered by an event (a
switch), and then returns to its stable state.
Schematic

B-1] Form of e
-
(t)
For a square wave signal input Ve, of which the
width is larger than the time constant and
attacking that circuit.
The voltage at the non-inverting terminal is 5V.
(The capacitor C in the positive feedback loop is
fully charged, no current is flowing, no voltage
drop across R1).
C1
0.1F
R2
33k
R1
33k
Vref
5 V
C
0.1F
D1
150
R1
It is greater than the voltage at the inverting
terminal, so the op-amp stays at positive
saturation.
To shake that circuit, to drive the op-amp
to negative saturation, we need to apply a
voltage at least greater than 5V, so that the
voltage at the inverting terminal is greater than
the one at the non-inverting terminal.
Thats where C1, R1, D1 come in handy. We
want to trigger the monostable with an impulse.
The voltage across the 150 ohms resistor is the
derivative of the voltage across the capacitor :
v
C
=
1
C
_i. ut
i = C
uv
c
ut

v
R
= R. i = RC
uv
c
ut

Which means that if the signal attacking the
capacitor is a ramp, the signal at the resistor
will be a constant (positive if it is a increasing
ramp, negative if it is a decreasing ramp).
If the signal is triangular, the signal through the
resistor will be squared.
If the signal is squared, the signal through the
resistor will be pulses. Positive and negative.
However, we only need a pulse to be greater
than 5V, hence we use the diode.
Here is a graph of a signal attacking the
capacitor, and the voltage that would be across
the resistor without a diode

Here is the same thing, but with a diode

See how we have only nice positive pulses left.
Notice the -12V. I got that square wave from an
op-amp wired in Astable mode. I couldnt get a
square wave quickly with LT Spice.
(Dont look at the amplitudes, simulation
environments tend to be tricky, also I replaced
the 150ohms with a 10kohms for a clearer
illustration)
Here is how it goes :
Ve gets from 0 to E : v
c
= E = v
C
(t) +v
R
1
(t)
v
C
(t) = E. (1 - e
-
t
1
)
v
R
1
(t) = E. e
-
t
1

= R
1
. C
When Ve gets from E back to 0 :
v
C
(t) = E. e
-
t
1

v
R
1
(t) = -v
C
(t) = -E. e
-
t
1

The D1 diode is in anti-parallel with the
resistor R1. The very moment Ve falls from E to
0 and for a very brief time:
v
R
1
(t) = -E. e
-
0
i
= -E
The consequence of this is biasing the diode D1
directly. It conducts and has a very small
resistance, assimilated to a wire (short-circuit).
i.e : The diode D1 shorts R1 (more precisely,
provides a path with very small resistance
(smaller than R1) for the capacitor to
discharge).
= u, which means
v
C
(t) = E. e
-
t
0
= E. e
-
= u
v
C
(t) falls from E to 0 almost instantanously and
v
R
1
is firmly held to 0.
What all this does is keeping the positive
impulse due to the rising edge of Ve, and
blocking the negative impulse due the the
falling edge of Ve, by shorting R1 and making
the transition very quick.
B-2] Vs in the absence of impulses
A monostable is, by definition, a circuit with
only one stable state.
In the absence of a command impulse,e
-
= u ,
and e
+
= I
c]
, which means e
+
> e
-
.
I
S
= I
SA1
+

B-3] Response to an impulse
Now that we have our impulse on the inverting
terminal that is greater than 5V on the non-
inverting terminal, lets se the behaviour of the
monostable to an impulse. Blue is the op-amps
output, black is the inverting terminal.

A] Before the impulse,(left side) when we
power on the circuit, the capacitor C charges
according to the following equation :
v
C
(t) = (v
SAT
+
- I
c]
)(1 - e
-
t
1
)
= (R
1
+ R
2
)C = 6.6 ms
The voltage across C will eventually reach the
final value (v
SAT
+
- I
c]
)
e
+
= I
c]
+R
1
i(t)
i(t) = C
JI
C
Jt
=
(v
SAT
+
- I
c]
)
(R
1
+ R
2
)
e
-
t
1

e
+
= I
c]
+ R1.
(v
SAT
+
- I
c]
)
(R
1
+ R
2
)
e
-
t
1

So, for t=0, the moment of turning the power
on, the voltage at the non inverting terminal
is :
e
+
=
R
1
. v
SAT
+
+ R
2
. v
rcI
R
1
+ R
2

C charges and the voltage across it will be, as
we previously mentioned, (v
SAT
+
- I
c]
), which
also means that the voltage at the non
inverting terminal will finally be e
+
= v
rcI
. Which,
in our case, is 5V. And since it is greater than
the voltage applied on the inverting terminal,
the op-amp is in positive saturation.
This is the stable state.
A] After the impulse
The impulse on e
-
must be greater than e
+
= v
rcI

to be able to make the system swing.
Supposing it is, once it presents itself, e
-

becomes greater than e
+
which provokes the
negative saturation of the op-amp:
v
S
= v
SAT
-
= -v
SAT
+

(Look at the figure above, this is the unstable
state, the short one)
The capacitor in the feedback loop charges
according to :
v
C
(t) = ((v
SAT
-
- I
c]
) -(v
SAT
+
- I
c]
))(1 -e
-
t
1
) +(v
SAT
+
-I
c]
)
v
C
(t) = (v
SAT
-
- v
SAT
+
)(1 -e
-
t
1
) +(v
SAT
+
- I
c]
)
v
C
(t) = (2v
SAT
-
)(1 - e
-
t
1
) + (v
SAT
+
-I
c]
)

We go by the same reasoning as for the stable
state to find that (See e
+
in red)
e
+
= I
rc
- 2
R
1
R
1
+ R
2
v
SAT
+
. e
-
t

At the moment of the swing/toggle :
e
+
= I
rc
-2
R
1
R
1
+ R
2
v
SAT
+

The exponential in e
+
decreases, so e
+
increases
to I
c]
, but once it reaches 0 and slightly exceeds it,
we will have a positive saturation (see figure above,
e
+
), the op-amp toggles again, F
S
= I
SA1
+
. Keep in
mind that e
-
gets back to 0 after the impulse,
when e
+
slightly exceeds it, the op-amp
saturates positively.
Finding the voltage across the capacitor C
At the moment of the toggle/swing e
+
= u
e
+
(t
s
) = I
rc
+ 2
R
1
R
1
+ R
2
v
SAT
-
. e
-
t
s

= u
e
-
t
s
1
=
R
1
+R
2
2R
1
.
I
c]
v
SAT
+

v
C
(t
s
) = (2v
SAT
-
)(1 - e
-
t
b
1
) + (v
SAT
+
-I
c]
)
v
C
(t
s
) = (-2v
SAT
+
)(1 -
R
1
+ R
2
2R
1
.
I
c]
v
SAT
+
) +(v
SAT
+
-I
c]
)
v
C
(t
s
) = - v
SAT
+
+
R
2
R
1
I
c]

The capacitor C charges to v
SAT
+
-I
c]
with an initial
value of v
C
(t
b
)
v
C
(t) = ((v
SAT
+
- I
c]
) -v
C
(t
s
))(1 - e
-
t
1
) + v
C
(t
s
)
i(t) = C
JI
C
Jt
=
1
R
1
+ R
2
((v
SAT
+
- I
rc
) - v
C
(t
s
))e
-
t

e
+
= I
c]
+R
1
i
e
+
= I
c]
+
R
1
R
1
+ R
2
((v
SAT
+
- I
rc
) - v
C
(t
s
))e
-
t

e
+
= I
c]
+
R
1
R
1
+ R
2
(v
SAT
+
- I
rc
+ v
SAT
+
-
R
2
R
1
I
rc
)e
-
t

e
+
= F
reJ
+ (2
R
1
R
1
+ R
2
V
SAT
+
- F
reJ
)e
-
t
x

e
+
has jumped so to speak from 0 to
2
R
1
R
1
+R
2
v
SAT
+
(see previous graph). The exponential
decays to reach eventually 0, and e
+
reaching I
c]
,
returning to the stable state.
B-4] Trace e
+
and F
S
(t)
Previous graph.
B-5] Duration of the unstable state (the
monostable period) and recovery time
The unstable state is when the op-amp is in
negative saturation (it could be otherwise, if
wed like to, we could chose I
c]
to be negative,
so that the 0 volts at the inverting terminal
would be greater and the op-amp is in negative
saturation as a stable state).
The period of the monostable is the period of
time in which it is in the unstable state
(negative saturation, in our case). See previous
graph. It starts with the blue impulse)
B-5-a] Period
e
+
(T) = u = I
rc
- 2
R
1
R
1
+ R
2
v
SAT
+
. e
-
T

T = Ln(2
v
SAT
+
I
rc
R
1
R
1
+ R
2
)
T = (R
1
+ R
2
). C. Ln(
v
SAT
+
I
rc
)
T = (6.6). Ln _
12
S
] ms
T = S.778u9S666SS77 ms

B-5-b] Recovery Time
The recovery time is gotten by calculating the
time it takes to the exponential in e
+
reach 0 :
e
-
T
R
x
=
By convention, T
R
= S to S
=
T
R
=
B-6] How can we reduce the recovery time
Recovery time can easily be reduced by using a
diode in parallel to R
1
as is shown in the following
schematic :

Notice the difference between the trace using a diode

And the previous one without a diode
C1
0.1F
R2
33k
R1
33k
Vref
5 V
C
0.1F
D1
150
R1
D2


Notice how e
+
the red trace reaches I
c]
very
quickly, instead of a slowly decaying exponential.
In the stable state (positive saturation), the current
flowing through R
1
is null, the voltage across it
(e
+
- I
rc
) is null, and the diode D2 does in no way
influence the system.
In the unstable state, the voltage across R1 (e
+
-
I
rc
) is negative. D2 being in parallel to R1, the
voltage across it is the same, and D2 is reverse
biased. It is similar to an open circuit and does in no
way influence on the process of the capacitor.
However, in the recovery lapse, the voltage across
R1 becomes positive which biases D2 directly, which
in turn shorts R1.
e
+
= I
c]
+R
1
i
The result is that e
+
reaches I
c]
very quickly
because R1 is shorted . The recovery time
tends to 0.
Here is the monostable attacked by several pulses.


Lets make the unstable state (negative saturation)
last longer.
Lets make C = 1F instead of u.1F, and
R1=R2=10kohms. Heres the result :

Notice how the unstable state is longer (almost equal
to the stable one).
Another thing What happens if an impulse presents
itself while the system is in the unstable state ?
Lets get back to the building lighting analogy. When
you push the button and theres light, what would
happen if you push it again ?
Nothing should happen. It should still wait the
duration and then switch itself off, and only then,
you can push the button to light it again.
Heres how it goes :


When the system is in the negative saturation
(unstable state), the voltage e
+
on the non inverting
terminal (red trace) is negative and increasing. If
an impulse presents itself on the inverting terminal
(blue trace) , the impulse is positive and is greater
than the e
+
which keeps the op-amp at negative
saturation