Architecture Software and 8086 of rhe B0BB Microprocessors

._RODUCTION
andthejrassembly our studyofthe 8088rnd 8086micfoprocessors Thischapter begins we l3nguage, program or 8086 using assembly To either rhe8088 :iguage programming'nustunderstand subsystems mcrnory and input/output and ir! how the microprocessor in this chapter. we will eramine point of view.For this reason. rDerate from a sofiware '.1:loltwarcdrchitecture thatfollou's The material ofthe 8088ind 8086microprocesso.s for lhe thal is described but evefything only to the 8088microprocessor, :=quentlyrefers the 8086 is architecture of the softwarc to lhe 8086.This is because :,188alsoapplies here: :1.'iical lo thatof the 8088.Thefollowingtopicslre covered Microprocessor of the 8088/8086 2-1 Microarchitecture Miffoproceslor Modelofthe 8088/8086 2.2 Software Space andDataOrganization 2.3 Memory Addrcss 2.4 DataTypes ' 1.5 \egnenrRe-i..e-JrJ \4eno^ Sermen':'r' and GeneralUse Memory 2.6 Dedicated,Reserved, 2.7 InstructionPointer 2.8 Drta Regislels andIndexRegisters 2.9 Poinrer Registcr 2.10 Status

27

2.ll Generating a Menory Address 2.12 The Stack 2.13 lnput/Output Address Space

OF THE 2.I MICROARCHITECTURE 8088/8086 MICROPROCE5S0R

of a Focessoris its intemal architecture-ihat is, dle circuit buildThe microarchitecture ing blocks that implement the softwlre and hardware archiiecturesof ihe 8088/8086 Due to the need for additional fbaturesand higher perfbrmance,the microprocessor's. microarchitecture of a microprocessor family evolvesover time, In facl, a new microarchitecnrre is introducedfor Intel's 8086fanily everyfew yea$. Eachnew genemtion of (rhe 8088/8086, processo$ processors) represenrs 80286,80386,80846,and Penrium signi6cant changes in the microarchilecture of the u086. The microarchitectures of the 8088 and 8086 icroprocessors arc simildr.They parallel tmcerrirg-that is, theyrre iDrple e ted with several simullaeboth el|.ploy processing ouslyoperaling units.Figure2-l(a) illustrates lhe iDtemal architecture of the 8088and 8086mjcroprocssors. They containtwo pro.essing]ux,ils: the bus interlaceunh uril (EU).Eachunit hasdedicated funclions andbothoperate at \BIU) andlhe execution the same time,ln essence, thispalallelprocessing elTeclively makgs thefetchandexeculion of instruclions indepeodenl operations, Thisresults in efficient useofthe system bus performance for 8088/8086 microcomputer systems. andhigher The businterface unit is ihe 8088/8086's connection to theoutside world.By interto external The BIU is responsibl devices. face,we meanthe pathby whiohh connects fetching, reading for performing all external busoperations, suchas instruction andw,itpeiing of dataoperands for memoryandinputting or outputtlng datafor input/output pberals, These inlbrmadon translers lakeplaceovertbesystem bus,This busincludes an 8-bit bidirectional databuslor the 8088(16 bitsfor the 8086),a 20-bitaddress bus,and lhe signals needed to contloltansfersoverthe bus.The BIU is not only responsible for perlbrmingbus operations, it alsoperformsofier lunctions relatedto instructionand data queuing gederaiion, acquisidon, For instance, it is responsible for instruction andaddress To implemenrthesefirnctions. the BIU containsthe segment registers,fie instrucgeneration queue. tion pointer, the address adder, buscontroilogic,and an instruction Figwe2 l(b) shows thebusinterface unit ofthe 8088/8086 in moredetail. TheBIU uses knownas an inttruction que e ta lmplement a pipelined architecture. This a mechanism queuepermits the 8088 to prefetch up to 4 bytes (6 bytes for the 8086) of instmction code.Whenever the queue is not firl-that is, it hasroomfor at least2 morebytes, and. ai the sametime, the executionunit is not askingit to reador write datafrom memorythe BIU is free to iook aheadin the programby Fefbtching the next sequential instrucwhenever tions.Prefetched instructions are heldin the first-infirst out (FIFO)queue. a byte is loadedat the input end of the queue.it is autonaticdily shifted up through the FIFO to the empty location nearestthe output. Here the code is held until dre execution unit is ready to acceptit. Sinceinstructionsare nomally waiting in the queue,the time neededto felch n1snyinstructionsof the microcompuier'sprogam is etiminated.If the queue is full andthe EU is not requesting access to datain memory, the BIU doesnot

28

Software Architectureof the 8088 and 8086 MicroDrocessors Chao. 2

INSTRUCTION PIPELIIIE

AUS SYSTEM (a)

uxrrlrru) lus ||{iEaFlcc

{bt Figurc 2-1 (a) Pipelined echitecture of the 8088/8086microlrocessors (RePrtuted wiih pemi$ion of l;tel Corloration. Copltisht/Intel Corp 1981)(b) E\ecution dd bus interlaceuits. (Reprintedwith permissionof Intl Corp . ColyriShvlntel Corp l98t)

2l)

rcd 10 prform atry bus opflations. These intervals of no bus activity, which occur btwenbus opemtions,are k'rc.itn as idle states. The executionunit is responsible fo. decodingandexecutinginstructions.Notice in Fig. 2-1(b) that it consistsof ile arithmetic loqic unit (ALID, statusand control flags, general-purpose registers,andtemporary-operand registers. The EU accesses instuctions ftom the output end of the instuction queueand datafrom the general-purpose registers or memory.lt reads one instuction byte after the other liom the output of the queue, decodes them,generales passes dataaddresses if necessary, ihem to ihe BIU andrequests it to perform the reador write operations to memory or I/O, and pefolms the operation specifiedby the instruction-The AIU perfoms the arithmetic,logic, and shift opemrions requircd by an instruction.During executionof the instruction,ihe EU may test the sta tus andcontlol flags,md updates theseflagsbasedon the resultsof exe.uting ihe instruc tion. If the queueis emptt the EU wairs for ihe nexr instrucrionbyte to be fetchedand shifted to the toDof the oueue.

l' 2,2 SOFTWARE MODEL OF THE 8088/808 6 MTCROPROCESSOR

The pwpose of developinga soltuate model is to aid the Fograrnmer in understanding the operationof the mioocomputer systemfrom a softwarepoint of view To be able to Fogram a microprocesso!one does not need to krow all of its hardwarearchitectural features.For instance,we do not necessarily needto know the functjon of the signalsat its vrrio s pjns, their electrical connections, or their electrical switching characterisrics. The function. interconnection, andopemtionof the intemal circuits of the microFocessor also may not nedto be considered. Wlat is importantto the progammer is to know the variousregisterswithin rhe device and to undefitand their purpose,functions, operating capabiiiries,and linitations. Fudhemore, it is essential that the Fogrammer knows how extemalmemoryand input/outpurperipheralsareorganized, how info.mation is ananged in registers, memory andinput/ouFul andhow mernoryand I/O are addressed to obram instuctions and data.This informationrepresents the softwarearchilectureof the proces sor. UDlike the miffoarchitecture, the softwarearchitectdrechangesonly sllghtly liom generation to generaiionof processor The softwarenodel in Fig. 2 2 illusaa&s the software archiiecrureof rhe 8088 microprccessorLooking at this diagam, we seerhat it includes 13 16-bit intemal reg1ste'the instruction pointer(lP), fow tta fgisten (AX, BX. CX, andDX), twopdl"re. r'sirt?r'r(BP and SP), two inder leqistets (SI nd DD, and four r"grnt resisreff (CS. DS, SS,andES). In addition,thereis anotherregistercalledthe rtdrrr /e8trt / (SR), with nine of its bits implemented as statusand control flags. Figure 2-2 showsthat the 8088 architect$e implemenfsindependent memory and inpui/ouQut addressspaces. Notice that the memory addrcssspaceis 1,048,576bytes (lMbyte) in length and the I/O address spaceis 65,536byres(64Kbyret in length. Our concemhereis what canbe donewith this softwarearchitecture and how to do it duough sofrware.For this purpose,we wil now begin a derailedsrudy of the elementsof rhe model andtheir relationshipto software.

30

Software Architectureor the 8088 and 8086 Microorocessors Chao. 2

------__-lrp

D5

_l

ss

SI OI

Figurc 2-2

microprocesor Sotrde model of the 8088/8086

:rtl]

I.'EMORY ADDRESS SPACE ]ATA ORGANIZATION

lar; ':harwe have inhoducedthe idea of a softwa ioftware nodel. let us look at how infoma:,:. iu.h as numbers, characters, and instrucnon nctionsis storedin mernoryAs shownin -j: l-j. fie 8088microcomputer suppodslMb) lMbyte of extemal memory.This memory ra: rr orgrnizedfrom a softwarepoint of view iew as individual byies of datastoredat con<--:r. addresses 00016to FFFFFL,j. Therefore,memory in an overthe address range 0000016 lltlrared nicrocomputer izedal as 8-bitbyies, not as 16-bitwords. is actually orsanized jve bytes T.e 8088 can access any two consecutive by as a i,o.d of data.ln this case,ihe ,--.: ,lJr(..edb)re . rhelea.r-gnih.!1r byte bJIeof , the word, andthe higheraddressed ,.:-: r! ::! mosl significmt byle. Figure2 4(a) showshow a word of datais storedin mem ) show r-, \.ace that &e storagelocation at the lower address. 0072,16. conrainsdre value , ' r0- : 0216The contents -higher-ad&essed :.1r.' of the next-highe srorage locatiqn. 0072516. = 5516 = 550216. : iLl101r These rentth theword0101010100000010, two bytes represent
: : MemoryAddressSpaceand Data

3l

Figure 2-3 Menory addrss space of ure 8088/8086nimprocsor

To permit efncient useof memory words of alatacan be sroredar what are caleal even-or odd-adalressed wod boundaries. The leastsignificanrbit of the address derermines the type of word boundary. ff this bit is 0, the wod is at an eyen-addrcss boundary_thar is. a word at an evenaddles bounddry corresponds ro r\ o con5ecurjve tye.. wifi rte leastsignificantblte locatedar an evenaddress. For example,the word in Fig. 2 4(a) has its least signilicanr byte ar addrcss0072416. Therefore,ir is srorcd ar an even_adalrcss A word of data stored ar an even-address boundary,such as 0000016, 0000216, 0000416, and so on, is said tobe an atigned word-aat is. af aigned woras are locatJ at an address that is a multiple of 2. On the other hand,a woralof datastoredar an odd_ address bourdary, suchas0000116, 0000316, or 0000516 and so on, is caled a rrtrati{rral wrfd. figure 2-5 shoqs somealigned dndmisaligned wordq of dara. Hereword. 0. 2. 4. and 6 ate examplesof aligned-dara words, while words I and 5 are misaliqnedworts. \oaice fiar misaligned word i consisr. of blle I lrom atigned uord 0 andblre 2 from alignedword 2. wllen expressing addresses and datain hexadecimal form, it is cofiunon ro usethe letter H io specify the base.For insrance,the nunber 00A816 can atso be writien as OOABH-

00725i6

I *" .ool

F--o1o'1

r;;-]
ll

T--_:-=-1

ll
l|r1r10r I oor2B,6l 1 0 r o 1 o 1 Io
0072c8 |
{bJ

Fkure 2-4

(a) Sto.ins a word of darain memory.(b) A! eiarnple. Chap. 2

32

SoilwareArchitectureor the 8088 and g086 Mjcropfocessors

00008H 00007H 00006H 00005H 00004H 00003H 00002H

Byre I
B!1e7

;.
6

_l I
5

Byre 6
Byls 5

;.

4 Byre 3 Byre
Blt 2 Bis 1 By,le 0 ;,.

il. -l
2 1

oooolH
00000H

_l
t\4isaligned Figure 2-5 Examplesof alignedand wods misaligneddatawords

2.I EXAMPLE
form ls Wlat is the dataword shownin FiS 2 4(b)? ExFess the result in hexadecimal Is it an alignedor misalignedword word boundary? it storedat an even-or odd-addressed of data?

Solution
0072Cr6and equals The most significantbyte of the word is storedat address 111r1101,=FDr6=FDH and is 0072816 Its least signifiantbyte is storedat address 10101010r=AA16=AAH Togetherthe two b''tes give the word : FDAAH = FDAAT6 1111110110101010, of the least signiicant byte in binary form gives Expressingthe address 0072BH: 00728t6= 0000000001110010101l'z boundthe dghtmost bjt (lJB) is logic I' the word is storcdat an odd-address Because of data' word it is a misaligned ary in memory;therefore,

5ec.2.3

and DataOrganization Space Address Memory

33

Aigned

00008H 00007H 00006H 00005H 00004H 00003H 00002H 00001H 00000H

Byte8

-l

l
Doubl

Byre 7
Byts6
Byle 5

Doubl"g'd

--l
| Ddbre

i-|

Byle 4

I oo,ur"s
Doubie 2

Byre 3
Byle2 By,le1 By,te 0 0

I __l
l
Figure 2-6 Examplesof atgned md missligneddoublewords of daia.

T\e double wod is af'ofier data form that can be Focessedby the 8088 miclobytes of data storedin memto four consecutrve A doubleword conesponds computer. element ory; an exampleof double-worddatais a /oint,: A pointeris a two-wordaddress dataor code in rnemory The word of this pointer that is sroredat that is usedto access is cale.d the se7ment baseaddres8 and the word at the lower address the higher address is called the o.frt Justlile for words,a doubleword of datacanbe alignedor misaligted. An aligned and 0000016, 0000416, thatis a multipleof4 (e.g., doubleword is located at an address words of data are shown in and misaligned double A number of aligned 0000816). double words. words 0 and 4 aligned tbese six examples, only double are Fig. 2 6. Of An exampleshowingthe storageof a pointer in memory is given in Fig. 2-7(a). is stored the segmentbase adalress, wo.d. which represents Here the higher-addressed

38

t-. fi-

"--l 5_l

oooor,. frr- ool oooos,"l---il ooooe,"f--;_l

0 0 0 0 8 ,|6

ao

Figure 2-7

(a) Storilg a 32-bit pointei in nenory. (b) An examlle.

34

software Architecture of the 8088 and 8086 Microprocessors

Chap. 2

The most significant byte of tbis word is at boundry 0000616. :iaiing at even-ad&ess : byte is at address and equals 00111011, 38!6. lis leastsig.iGcanl :ddress 0000716 = 4C16. we getlhe segment r]10616 ihese two valucs, Combining andequals 01001100, - 3B4Cr6 rlrle addrcss. whjchcqmls0011101101001100, word. Its leasl significant The o$set paft of the pointer is the lower addressed 01100i01,= 6516The nost 0000416; ihis locationconiains r\re is storedat address : 0016. The resulting 00000000' 000056, which contains !:gnificanr byteis at address = doubleword is 384C006516. The complete is 0000000001100101, 006516. rr'-ser double of an aligned 0000.116, it is an example this double word stadsar address S:nce

.XAMPLE2.2
ir{ should the pointer with segmentbaseaddressequal to A00016and o11ietaddrcss Is the double wod ::FFr6 be siored at an even-ad&essbounday starling at 0000816? r::ned or nisalisned?

:Jlution in memory, sta( bytelocations requires fourconsecutive ::.ageof fie two wordpointer
:: al address0000816.The ler.st signilicant byte of the offset is stored at address0tl008r,j r: ii shownas FF16 in Fig. 2 7(b). The most significantbyle ofiheoffset,5516, is stored =idress 0000916. These two bytes ffe folowed by the lcast significantbyte of lie seg. address, 0016. at address0000A16,and its most signilicant byte, A016, qt -.:ri base 0000816, lhe double word is slored in memory startingai address :i-3,s 0000816. Since : r- Jrgned.

-=ATA ryPES
::E ti..eding section identified the fundanental data fonnats of the 8088 as the byte I :'j,. $ord (16 bits). a.d double word (32 bits). lt also showedhow eachof theseele-i.-i ii llored in memory. The next step is to examile the rypes of dalr ihat can be coded
n r?rP f^m 'R lnr nrn.Pccino

in a number of differdata exprcssed The 8088 rnicroFocessordirdtly processes The 8088 can processdaia as riprs. Let us begin with the inteser ttuta tlpe. :E :r -::::c:. ahsigned ot signed trtg?r' numbeN; each type of integcr can be either byte'wide :' :::i-\\ide. Figure 2 8(a) reFesents an unsignedb$e irteger; this data type can be r-: :'represent decimal numbersin the range 0 tkough 255 The unsignedword inie decinlal numbersin the range 0 E r: .ir)$ n in Fig. 2 8(b); il cm be used to represent 6:.535. F:!=

Dat Types

35

MSe Figure 2-8 (a) Ursisnod byte wordiDtcgi integer(b) Unsigned

EMMPLE2.3
regesent? wordinteger100016 Whatvaluedoesthe unsigned

Solution
integeris convcrtedio binary fom: Fint, the hexadecimal = 0001000000000000, 100016 Nex1.we tind the valuelor the binary number:

: 2''z: 4096 000r000oooooo0001

in Fiss.2-9(a)and(b) aresimilar andsigned word inteser byteinteger The signed bit integer dataiypesjust intoducedihoweverhererhe mostsignilicant to the unsigned fie numberFor this reason, identifies a positive is a signbit. A zeroin this bit position signedintegerbyte can reFesent decimal nunbers in the range + 127 to 128.and ihe For respe.tively. numbers in tbe range+32,767to 32,768, inleger wordpcrmits signed (0316). On ihe byte is 0000001l, +3 as a signed integcr the nnmber exprcssed example. notation in 2's-complemenl negaiive numbers always expresses otherhand,the 8088 as 11lll10l, (FDLJ. Theretbe. 3 is coded

I'igure 2-9 (a) Siged byrei.teger (b) Signedword integer

36

softwareArchitectureof the 8088 and 8086 Mjcroprccessors chap. 2

qAMPLE 2.4
-{ ngned word integerequalsFEFFT6 . W}at decimalnumberdoesit represent?

Solution
E\pre-mg fie he(adecimal numbe'in binaryfonn gives =6 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 l ' ? FEFFT Sincethe most significantbit is 1, the numberis negativeand is in 2.s complemenr form. Convertingto its binary equivalentby subracting 1 ftom rhe leastsignificantbit andrhen complementing all bits gives = - 0000000100000001'z FEFFT6

The 8088can also processdatalhat is codedas ,l ary-codeddecinal (BCD) num,"ru. Figure 2-10(a) lists the BCD valuesfor decimal numbers0 thmush 9. BCD data
BCO 1 2 3

00{x) 0001 0010 0011 0100 0101 0111 r000 100!

6 I 3

MSB

BCO Oigh

D, 1 BcDDisit (c) BcDDieiro FiguE 2-I0 (a)BCDnubers. (b)An Unpacked BCD digit. (c) PactedBCD digirs.

Sec.2.4

Data Types

37

can be storedin eithrunpacked or packedform. For instance, the unpacked BCD bvie in Fig 2. r0{brihowi lhara ,ingle BCD digir \ jroredin rhefour teasr significanr bir:. and the upperfoul bits are setro 0. Figure2-t0(c) showsa byte wirh pa"LeanCl atgitr. H-retwo BCD numbersare sroredin a byre. The upper four bits repiesentthe mostiig_ nificantdigjt of a rwo-digir BCD number.

EMMPLE 2.5
The packed BCD datastored at byreaddress 0100016 equal10010001r. Whatis the rwo_ digit decirnalnumber?

Solution
Wdting thevalue 10010001, assepamte BCDdigits gives
= 100lBcD000lBcD 10010001, = glro

Information expressed in ASC (Ane can StandadCode InterJbr Inlothlation . c/r.up?) canalsobe direcrly phcessed b) fie 80ggmicroprocessor. ihe cbanin Fig. z-rla) snoushownumbers. letters. andcontrol characters arecoded in AscI. For inslance, thenumber 5 is coded as = 0 1 1 0 1 0= HrHo 13 , 5H where H denotes thattheAscll-coded number is in hexadecimal form. As shown in Fig. 2-ll(b), ASCIId6ta arestored asonecharactef Der Dvre.

EXAMPLE 2,6
Byreaddresses 0110016 through 0110416 contain theASCIIdata 0tOOO001, Ol010Oll, 01000011. 01001001, rnd 01001001, rspecrively, Wha!dothedata stand for?

Solution
Usingthecharrin Fig. 2-11(a),the dataareconverted to ASCII asfollowsl (01100H): 01000001Asc! : A - 0101001l^scll (01101H) = s : 0100001lAscl (01102H) : c - 01001001Ascr (01103H) - I (01r04H)= 0100100lAsctr = I

3A

software Architecture of the 8088 and 8096 Microprocessors Chao. Z

1 0

0000
0001

N
2 3

0
DLE

s o N DCT
STX a c 2 ETX EOT 2 B

0011
0101 0t 10

s
T E

ENO

BEL

r 0oo
HT

E]VI SUB
ESC

1ol0

z
L

1101 1110 1111 E SI

GS

OEL

MSB

ASCII0 s r {b) Figue 2-11 (a) ASCI lable. (b) ASCII digir.

: 5 SEGMENT REGISTERS AND ..,iMORY SEGMENTATION

Eventhough the 8088hasa lMbyre addrels space, not alt this memory is activear one une. Actually. the lMbytes of memory are paririoned into 64Kbyte (65,536)segnents. { segment represenls an independently addressable unit of memoryconsisring ot 64K .onsecutrvebyte wide storagelocarions.Each segrnentis assigned a l7ardddr,rrthar identifies its st:rtingpoint-rhal is, ih lowest address byte-storage tocation.
Sec 2.c <,egmenr RFg\ er. <,ndVFmor) leg-err.r'on

t9

stack are active at a tinet the codesegmenL Only four of these64Kbyte segments of memory that are active, as segmenL d1ta segment,and ertu segmen' The segments showninFig.212,areidentifiedbythevaluesofadalressesheldinthe80S8'sfo rS (dala segment), andEJ SS(stacksegment), nal segment registers:CS (codesegment). that points to the (extra segment). Each of theseregisterscontainsa 16-bit baseaddress give a ma-\imum of byte of the segmentin memory Four segments lowest addressed 256Kbytesof activememory Of this, 64Kbytesarefor p tognn storuqe(code),64KBres are fo{ a rtarl, and l28Kbytes arc for data storage. regktet wl' held in theseregistersarereferredto asthe carrcnt-segment The values ,l$ for example,the valuein CS points to the fust word-widestoBgelocationin the curCodeis alwaysfelched from memory as words, not as bytes. rcnt code segment. of memory In this diagram,the 64Kbyte Figure 2 13 iluslJates the se?mentation are identified with letters suchas A, B. and C. The datasegment(DS) register segments containsthe value B. Therefofe,the second64Kbyte segmentof memory liom the top, in which This is one of the segments segment. labeledB, actsas ille curcnt data-storage by the miqocomputer are stored.For this rcason,this part daaa that are to be pmcessed

cs ss
DS

__r J-L-

Slack

8088/8086

Enra

00000H
of memory Figurc 2-12 Active segments

40

2 softwareArchitectureof the 8088 and 8oa6 Microprocessors ChaD.

-^-E1---* *l--}-r

"^'" "EF*- "Eh

L-

-n E -E

-E H -E F Fl"
adjeent, Figure 2-13 ContiSuous. disjoirted, and overlappingsegnells. (Reprintedby permissionof Intel Corp., Copyright/hiel Corp. 1979)

spacemusr containread/writestoragelocations of the midocomputer's memory address as storage locations for sou.ce and destination accessed by instructions dat can be of memoryfrom the code segmentlt is lhis segment segment E as operands. CS selects qhich instuctions of ihe programare currently being fetched for execution.The stack labeled,s H for iegnlent (SS)registercontainsH, therebyselectingthe 64Kbvtesegment value J such that (ES) is loaded with register the extra segment llr as a stack.Finally, .egmentJ of memory functionsas a second64Kblae datastonge segment. This meanstbal the programto be useraccessible. registersare sedd The segment for a programto gzrn access software. Tberefore. rer can changetheir contentsthrough _ro value of the apFopriateregister has to change the anotherpart of memory one simply is broughtin simply with up to l28Kbytes, .r rcgisters.For instance.a new data space, i'! changingthe valuesin DS and ES. it must as a baseaddrcss: to a segment Thereis onereslrictionon tl alue assigned v,lue in a segthe 16-bit ircreasing This is because boundary. 6ide on a l6-blte address of by 16i examples address memory the conesponding by I actuallyincreases r.rr register segments than this restriction. other ru.lidbase 000101 addresses are0000016, 6,and00020i6. for example'm disjointed,or ever overlapping; adjacent, :a be sel up to be contiSuous. are overlappitrg' B andC whereas segments A andB are contiguous, FS. 2 13, segnents

RESERVED, I Z6 DEDICATED, MET,4ORY I'{D GENEML-USE

space can be implenentedlbr the rnl p3rt of the 8088miclocomputer'slMbl'te address locationshave dedicated howeve( someaddress r's access: f ctions utd sharld not !E u-ed as generalmemory for storageof dataor instmclions of a progam. Let us now parts of memory. use, and general-use dedicated il\.t ar thesereserved,
:t 26 and Genfafuse Memory Dedicated,Reserved,

4l

rigue 2-14 Dedicateduse, eseredi and general-use memory (Repdntedby lermission of Intel Corp., Copyrightl el Corp.1979)

Figure 2-14 shows the ,'ererye4 dedicated-use,afi seneruI-useparts of the 8088/8086\ dddrff space. Norice rhat storage locationsliom address 0000016 to 0001316 arededicated, andthoseftom address 0001416 io 0007Fr6 arereserved. These128bytes of memory are usedfor siorageof pointersto inielrupt sgrviceroutines.The dedicared pait is usedto storethe pointersfor the 8088'sintemal intenupts and exceptions. On the oiher hand, the reservedlocations are savedto srorepointers rhat are used by the userdefined interruprs.As indicated earlier, a pointer is a rwo-word addresselemqnt and requires4 byies of memory.The word of this pointer at rhe higher address is caled the segment baseadahess and the word ar rhe lower ad&essis rhe otrset.Therefore.rhis seu tion of memorycontainsup ro 32 pointers. The part of the address spacelabeleddp?,? in Fig. 2 11 is general- :e memoryr ar:d is where dataor instructionsof the programare srored.Notice that ihe genefal usearea of memoryis the rangehom addresses 8016 lhroughFFFEFT6. At thehigh endof the nemory address space is anorher reserved pointerarea,tocated fromaddrcss FFFFCr6 through FFFFFT6. These fourmemory locations arerese edforuse widr tuture productsard shouldnor be used.Inrel Corporarion, rhe original manufacturer of the 8088,hasidentifiedthe 12 storage locationsfrom address FFFF0 r6throughFFFFB,., as dedicatedfor functions such as storageof the hardwareresetjump instruction. For instance, addrcss FFFF0I6is $here the 8088/8086 beginsexecurion aJterreceivinga reser.

2.7 INSTRUCTION POINTER

The rcgisterthat we will considernext in the 8088'ssoftwa.re model shownin Fie. 2-2 is theinntu.t;un rhe ocario; rviatertlPr.LP\ rr*, lb oitsIn lelgrh,nd idenrjhe5 o, Lhe nextword of instfuctioncodeto be fetchedfrom rhecunentcodesegment of memory.The IP is similar to a progran counter: however,it containsaheoffset of the nexr word of instructioncodeinsteadofits actualaddress. This is because tp andCS are both 16 birs in length,but a 20-bit address is needed to access memory.Inremal to the 8088.the offset jn IP is conbined with the currenrvaiuein CS to generate ihe address of the insrrucrioncode. Therefore,the valueof the address for the next codeaccess is ofte, deDoted as CS:I?_

42

softwareA/chitecturcof the 8088 and 8086 MicroDrocessors ChaD.2

During nom1aloperation,the 8088 fetchesinstructionsfiom the code sesmenr of memor). nore. rhemIn iL5 instuclior qL,eue. ande\ecuLe\ Inemonealler theolh;r Eve^ rjnred $ord ol codei\ lelchedtrom memo,).rtre8088upddres r}lelalue i" Ip.,.h r;; it points to the firsr byte of the nexr sequenriat word of c;de_that is, Ip is incrememed by 2. Actilally, Lhe8088 preferches up to four b],tesof insrruction code into its intemal codequeueandholds them therewaiting for execution. A1teran instrucrionis readirom ihe outpurof the ins!.udion queue,it is decoded: if necessaq. operand. arereadrom eithefL}edfla.egn.n, or..rno.1 or i emalregisrers. Next,the operationspeciliedin the instrucrionis performedon f]le operands and thirasult ls written back b either an intemal regisreror a srorage tocatiodin memory The 808g is now readyto execute the nexi instructionin the codequeue. fxecurin8an in,rrl,crior$ar toad"a neu ratui inro rhe CS regisler chatrges rhe active code segmenLrhus, any 64Kb],,resegmenrof memory can Ulsea to stire rne msruc[on code,

. 8 DATAREGISTERS
As Fig. 2-2 shows,the 8088 has fow generat_purpose data registers. During plogram irecution. they hold temporaryvaluesof frequently usedintermediate results. joftivare .an read..load,or modii, rheir conrents. Any of the general-purpose dataregisre$ can be usdas rhe souce or destinationof an opemndduring an arithmeti; operarion such as {DD or a logic operarionsuch as AND. For instance,the valuesof tw; piecesof data, a and B. could be movedtron memory into separate dataregistersand operationssuch asaddition, subtraction, and muttiplicationperformedon them.The advaniage of storing iiese data in internal regisrersinsreadof memory during processing is that they can b! accessed much fasrer The four rcgisterc,known as the data rcgiste$, are shown in more detail in Fig. l-15(a). Notice lhat they are rcfenedto as theaccumulatorre|ister (A). the base regis;;r B),thecountregister (C),^\dtt)e datarcgister (D).These names imply speciat firnJriors

t5
Word nultipl,, *ord divid.,

ax
BH
CHiCL

BI BX
DX

Byt. oulriplr, bytgdivjd.,byt. I/O, translate, d.cj al uirhmcric Byt. muhiply. byredivid.

ct DX DI

Word hujtiply,yo.d dirid.,

DH

Figum^2-15 oora.egr.LeF ,Repinredb) prmNjo) ^l _ra, Ceremt-purpo\e Inf, (orp. C op)righ./tnrc eo t r p t a - o r , b , D e J i ; a r er de g i , L r r : m r o n . r <eor n e db ) p e m r . ( o o y r S h r / tr,e ta o r p t a - o l r o r o , I n l e tc o r p . . :?_ 28 Data Regisrers

43

these Figure 2 15O) summarizes they aremeantto perform for the 8088rnicropmcessor the vatue usethe C register. For example, Notice tbal slring andloop operations operations. This is thereain a stringoperation. in the C registeris the numberof bytesto be processed useof dataregissonit is giventhe nane co&nr.e3drrerAnotherexampleof the dedicated registerAL or AX lbr dala. must useaccumulalor tersis drat all input/outputoperations canbe accessed eitherasa whole ( 16bits) fot word dalaoperEachof theseregisters An X alter the registerletter ationsor astwo 8-bit registersfor byte-widedataopemtions. is refol a registeras a word; for inslance,the l6-bit accumulator identifiesthe reference BX, CX, andDX. erenced asAX. Similady,the otherthreword registen arereferredto a-s On the other hand, when referencingone of theseregisterson a byte wide basis, identifies the high byte following the registernamewith ihe letter H or L. respectively. is refered to as AH and the register the most significant byte byte. For the A and low pairs BH and BL, CH and register are byte as AL: the otber byte-wide least significant places a new value in one byte of a register,lbr DL. When software CL, and DH and (AH) not change. This ability to process in the other byte does instanceAL. rhe vatue permits use of the limited register location more efficient information in either byte of the 8088 microprocessor rcsources Actually, someof the dataregistersmay also store addressinformanon such as a BX could hold a 16-bitbaseaddress. or an input/outputaddress;forexample, baseaddress

AND INDEXREGISTERS 2.9 POINTER

two/o,r?ter'l8 The softwarenodel in Fig. 2-2 hasfour othergenemlpurposeregisters: dddrei.!?r. An offset irte6 and two index resisters.They siore what are called olfiz meruory hom ihe segment of a sioragelocation in represents the displacement address pointer index to select a speo. in a segment register that is, it is usedas a baseaddress value held of memory.Softwareusesthe ci{ic storage locatronwithin a 64Kbytesegment datain memoryrelativeto the datasegmeft or extra segin an index registerto reference memorylocationsrelative to the siack segmert registet and a pointer registerto access ment register.Just as for the dataregisters,ihe valuesheld in theseregisterscan be read, This is doneprior to executingthe instructioDihat loaded,or nodilied ttuough softwaredata regisie|s,ihe references the reglsterfor addressoffset. Unlike the general-pui?ose in a reg pointer andindex rcgistersare only accessed as words.To usethe offset address istet the instruclion simply specifiesthe rcgister that containsthe v21ue. Figure216showsthatthetwopointerregistersarethestoxkpointer(SP)N poirter (BP). The valuesin SP and BP are d as offsets from the currenrvalue of SS of memory andpermit during the executior of instructionsthat involve lhe stacksegment to storage locationsin the stackpart of memory.The valuein SP alwaysrcpeasyaccess That is, combiningSP resentsthe offset of the next stacklocation that is lo be accessed. resultsin an address that pointsto the top ,/tftc rtdct (TOS). with the valuein SS(SS:SP) datawithin anoffsetrelativeto theSS;howevetit is usedto access BP alsorepresenls mode asthe offsetin an addressing the siacksegment of memory To do this, it is employed parametenthat Onecommonuseof BP is to reference calledthe b6ed aAiressinq,?,ode. to a subroutine by way of the stack.ln ihis case,instructionsareincludedin the arepassed from the stack. to access the valuesof parameters that usebased addressing subroutine

44

Software Architectureof the 8088 and 8086 Microprocessors chap. 2

BP
SI

DI

D4tinarion indlr

Figur 116 Poinler and index regjs, re^. (Rcpdnred by pemi$ion ofhrel Corp.,Copyright/ tntelCorp.r979,

Tle indexregisren areused to holdoffsetaddresses for insructions rharaccess data i-..d in thedatasegment of memory andareautomatically combined with the vatuein - DS or ES register duringaddress calculation. In instrucrions thalinvolvethe rxrlaed rJ;ressing, the sauft:e index(Sl) register holdsan offsraddress rhatidentifies the toca_ r:. oi a source operand, andthedertination index(DI) register holdsan offsetfor a des:::!on operand, Earlierw poinledoul thal dny of the dataregisters can be usdas th source or .r..inarionof an operand du ng an aritbmetic operation suchasADD, or a locic oDera, r:o rucha. AND. However. tbr someoperuuon.. dn operand thari5 Lobe pruc;sed ma) :e:trared in memory instead ofthe inlernal register In thlscase, anindexaddress is used i: :.i.nlify thelocdtion ofthe operand in memory; fol example, stringinstructions usethe r:1r\ regtsters to access operands in memory. SI andDI. fespeclively, 4rethepointers to e .ou.ceanddestination locations in memorv. Theindxregisters canalsobe source or destination regis;rs in arithmetic andlogr:a opralions. For example, an instructjon may add2 10the o1L\ct valuein Sl to incre_ rc.r iN valuelo pointto the nextword-wide storage location in memory.

E :' 'IATUS REGISTER

js another ::e ,rdrrlr reSirle4 alsocalledrhe i6-bit rcsister fa1s rcgister, withinthe8088. =.i-t :- l7 .ho$srheorgrnrauon oflh15 regi\rer in morc derajl. Iiorice thatru,rnine oi r. irl. are .mplemenled. Sir oi lhesebir, repre.enr r,arrAy'r(J: the .ttry fo| tCF,. :c-:, .flas GF), autiliary &ftr fas (AF). zen fas (ZF). sisnfaT (SF), nJ ove tfow fa| -1a The logic srat oI thesestatus flagsindioate conditlons that a.e produced as th;

t-l
Figure 2-U Slatusand controt iiags. (Reprintcd by pemissioD of InLel Corp., Copyright/Intel Cory.1979)

:e: 2 l0

Sraars Register

4S

resuli of executingan instruction-that is. after executingan instruction, such as ADD, specificflag bits are resel (logic 0) or ser(logic 1) basedon the result that is produced. the operationof theseflags: l,et us fifft summarize l. Thecarry fa| GF): CF is setif thereis a carry-ouror a bonow-in for the most sig' CF is reset of aninstruction.Otherwise. nificantbit of the resultduring theexecution 2. Thepaity fag (PF): PF is set il the result Foduced by ihe instruction has even pariry-that is, if it containsan evennumberof bils at dre I logic level If pariry is odd.PF is reset. 3. TheauaiLia,Jca a frag (AF)r AF is set if thereis a cany-out from the low nibble iDto the high nibble or a bolrow-in ftom the high nibble into the iow nibble of dre AF is resel. lower byte in a l6-bit word. Otherwise, producedbv an instructionis zero Other(ZF): if the resulr ZF is set 4, Thezerofag ZF is reset. wise. 5. The sign ltag 6F): The MSB of the result is copiedinto SF Thus, SF is set if the resuh is a negativenumberor rcset jf it is positrve 6, The owdow fag (OF): When OF is set.it indicatesthat the signedresult is out of rcset range.If the result is not out of range,OF rernains instruction,rhe carry For example,at the completionof executionof a b)'te_additlon a carry out condition operurds caused sum of the (CF) indicate that lhe flag could be setto the instruction This execution of (AF) due to the could also set The auxiliary crry flag nibble to the most least significant from the occuned on whetheror not a carry-out depends (SD'is and also affected' flag added. The sign operards are significantnibblewhenthe byte (OF) is is ser if there flag The oYerflow MSB of the result of the it reflectsthe logic 1evel (an of overltow). bii indication into the si8:n a carry-ourof the sign bit, but no carry The 8088 providesinstructionswlthin its instruclion sei ihat are able to nse these in which the program is executedifor inslance. a jump to flags to alter lhe sequence anothei palt of lhe programcould be conditionally initiated bv testing for ZF equal to pnp aa .cto i' ca\led logic.Thi. operarion flag bits-the diz.rion fraB (DF), ttje intempt enabte The otherthreeimplemented 'I'nesethrce flagsprovide contol funcf"tLs 0F), ad thetrapfias GFFarc untrol fags tionsof the 8088asfollows: l. The trap fag (TF): If TF is set,the 8088 goesinto the rinSl r/ep ,rod? of operaan instruction and thenjumps to a mode,it executes tion. When in the single-step specjalseflice routine that may deter rine the effect of executingthe instruction This type of operationis very useful ror debugging Fograms Forrhe8088rorecogni/ena\\ablc,nrcr'uPt'c,|uc\t\atit' tl 2. Th?intetru!f"B at INT are interrupl (INT) input, the IF flag must be set.When IF is reset,requests is disabled intedace interupi ignoredand the maskable 3. The dircctinnfag @F)r The logic level of DF detemines the direction in which srring operaiionswill occur When set, the slring instruction automaticallydecrementsthe address;therefore,the string data transfersFoced from high address to low address.On the other hand, resetting DF causesthe string addressto be to high ad&ess incremented thal is. daia transfersproceedfrom low address

46

Soft\rareArchitectureof the 8088 and 8086 [4icroprocessoG Chap. 2

The instruction set of the 8088 includeslnstruclionsfor saving,loading, or manipspecialinstuctions areprovidedto pemit usersoftwareto ulating the flags;for instance, of setor rcset CF,DF, aDdIF at anypoint in the program(e.g.,just pdor to the beginnin-q automaticallyinffements). a slring operation,DF is resetso that the string address

ADDRESS A IV]EMORY 2,iI GENEMTING

sysbaseand an offset descibe a logicaLaddlessin the 8088 microcomputer A segment baseand offset are 16-bit quantities,sinceall tem.As Fig. 2-18 shows,both the segment registersand memory locationsused in addresscalculationsare 16 bits long. However, of memory is 20 bils in length.The generation rhepbsical a&lrcss that is usedto access involvescombininga 16-bit offset valuethat is locatedin the instructhe physicaladdress iion pointet a baseregister,an index register,or a pointer registerand a 16-bit segment registers. basevaluethat is Iocatedin one of the segment on which type of memoryreferenceis tal_ The sourceof ihe offset valuedepends ing p1ace. It can be the basepointer (BP) rcgisier, stackpointer (SP) register,base(BX) regisrer,sourceindex (SI) register,destinationindex (DI) regjster,or instructionpoinrer (IP). An offset can evenbe fonned from the contentsof severalof theseregisren On the basevaluealwaysresidesin oneof the segnentregisten: CS,DS, oiherhand,the segment SS.or ES. For instance. when an instruciion acquisitiontsLesplace,ihe sourceof the segment (CS) register and tbe sourceof the offset value is basevalue is alwaysthe code segment

15

f@orrser

SEGMENT ADOEESS

a lhysical FigE 2-18 Generatine addres.(Repnnbd by pemissionof Intel Cory.,Copyrighl/Iltel Corp. 1981)

37

Address ceneratjng a Memory

47

alwaysthe instructionpointer (IP). This physicaladdrcss canbe denotedas CS:IP.On the hand, il the value of a variable is written to memory durirg executior of an insirucother typicaly the segment base value is specified by the data segnent (DS) registerand tion, (DI) value by the destination index register-that is. the physical addressis the offset given as DS:DI. A provision c^lled the seqment-o)e//ide plerr is usedto changethe segfor example,a prefix could be usedto make a ment ftom which ihe variableis accessed; occm in which the segment drra access baseis in the ES rcgister. Another exampleis the stackad&essthat is neededwhenpushingparameters onto the srack.This physicaladdress is lbrned fton dle valuesof the segment basein the stack (SS)registerandoffsetin dre stackpointer(SP)rcgisterandis described sgment asSS:SP. Rememberthat the segmenibase addressreFesents the starting location of the in menory-that is, the lowestaddress Figure2 19 64Kb''te segrnent byte in the segment. showsthat the offset identifies dre distancein b)1esthat the storagelocation of interest rcsidesftoln dis startingaddress. Therefore,the lowest add.ess bl4e in a segment hasan byte hasan offset of FFFFI6. offset of000016,and the highestaddrcss Figure 2-20 showshow a segmentbasevalue in a segment registerand an offset The valuein the segment registeris shifted valuearecombinedto form a physicaladdress. left by four bit positions,with its LSBSfilled with zeros.This givesa regnrt dddrrr the location where the segmentstarts.The offset value is then added.o the 16 LSBS of the sbifte.d segment value.The result of this addition is the 20-bit physicaladdress. TIIe examplein Fis. 2-20 rcpresents a sesmetrt basevalue of 123416 and an offset value of 002216. First, let us exFess the segment basevalue in binary folm. This gives - 0001001000110100, 123416

Highgsr addressed byle 8088/8086

Bx-

DS:BX

Data

;c

lDSr0000H Lowstaddrssd byl

Figure 2-19

Boundariei of a sgnent. Chap. 2

48

Afchitecture of rhe 8088 and 8086 l',4icroprocessors Soih,fr'are

i t33i",i,
Figure 2-20 Physicaiaddress calcu rauon exam!ie. (Reprinred br pemrs $on oftntet Corp.. Copyngbrtnlel

Sbifting lefr four positionsand fiiling wirh zerosresuttsln rhe segment address 00010010001 = 12340i6 101000000, The offser in binary form is : 0000000000100010, 002216 \dditrg the segmenr address and the offset gives

0o010010001 101000000, + 00000000001000102 = 00010010001101100010, - 1236216 : 12362H

11i. addrcss calcularionis doneautomaricallywithin the 8088microprocesso. eachtine : :.Fmory access is initiared.

axA IPLE2.7
*::,,equired {o mapto physicat address locarion 002c3r6 .I:,-:"-:lo !" ". _' if rhecon_ =:'j oi .hecorrespo.ding segment register are002A,"?
-- nrT.t talue cdnbe oblajned b) .hrlriogrheconlerr\ot rhesegment registerlefr by '.'- Ffl po\ '^n\ andthensubLracring frumlhe phy,icaiaddre*. Shifting left gives 002A0,6 \:-- i{5racdng. we ger the valueof rhe offset: 002c3r6- 02A016 = 002316 ,\.ruly, many dilTerentlogical addresses map rc me sameplysical address loca_ :.:!: - m.nory. Simply changingthe segment base*1"" i, Ar" ,.g-*t *gi"r", _; il
zi :. 1 Generating a Memory Addfess

49

corresponding offset doesthis. The diagramin Fig. 2-21 demonsrrares this idea. Norice that segment base002B16 with otrset 001316 mapsto physical address 002C3r6in memory. However if rhe segment baseis changedro 0O2Cr6 wirh a new offset of 000316, rhe physicaladdress is stin 002C316. We seerharrle physical address 002BH:0013His equal to the physicaladdress 002CH:0003H.

A 2, 12 THE SIACK
As indicaiedearlier,the rrac* is implenented in the memory of the 8088 micfoprocessor. and it is used for temporary storageof information such as dara or adajresses. For instance,when a call njfd.r'oa is execured, rhe 8088 automaricallypusbesthe currenr valuesin CS and IP onto the stack.Ar pan of rhe subrourirc,rhe contentsof oiher regis, ters may alsobe saved otr the stackby execuritrg p6ft insfucrrorr (e.g.,when the inst uction PUSH SI is executed, it causes the conGntsof SI to be pushedonto the stack).Near the end of the subroutine, pop i'Ltttucnonsarcircftded.o pop vatues{iom the stackback into then conesponding intemal registers(e-g.,POPSI causes the value at the rop of the stackto b poppedback into SI). At rheendof the subrouine, a retum instructio catfses the valuesof CS and IP to be poppedoff $e srackandput back into ihe intemal register where they ofiginaly resided.

i I

____l
Figurc 2-21 Reladonship betw@D logical dd phyrical addresses(Repriniedby pmisior of Imel Corp., Copldeht/Inrel Corp. t9?9)

50

Software Architecture of the 8088 and 80a6 Microprocessors

Chap. 2

The stackis 64Kbyteslong and is organizedfrom a softwarepoint of view as 32K words. Figure 2-22 showsthat the segmentbasevalue in the SS registerpoints to rhe lowest address word in the cunent stack.The contentsof rhe Sp and Bp registerofiser into the stacksegment of memory. Looking at Fig. 2 22, we seethat SP containsan offset vatueihar points ro a sroragelocation ir the cunent siack segmenr. The address obtaindfrom the contenrsof SS and SP (SSTSP) is the physical adihessof the last stonge location in the stack ro which datawere pushed.This memory address is known as the top d the stoxk.At 6e ricrocomputer'sstartup,the valuein SPis initialized to FFFq6. Conbining this valuewith the currentvaluein SSgivesthe highest-addressed word locarionin the srack(SS:FFFEHF l]:.atis.6e bottomof the stack. The 8088 can push data and addressinfomation onto rhe srackfrom its inremal registersor a storage locationin memory Datatransferred to and{iom the srackare wordwide, not byte-wide.Eachtime a word is to be pushedonrothe top of rhe stack,rhe value itr SP is first automaticallydecremented by two, and then the contentsof the registerare written into the stackpart of memory.Therefore,rhe srackgrows down in memory fiom the bottom of the stack,which conesponds to the physicaladdress SS:FFFEH, rowardthe end of the stack,which corresponGto the physical address obtainedfrom SS and offser fiXjor6(SS:0000H). When a value is poppedfiom the rop of rhe stack. the revene of this sequence occuls.The physicaladdress definedby SS andSP points ro the locarionof the last value pushedonto the stack.Its contentsare first poppedoff rhe stackand put inro ihe specific registerwithin the 8088; then SP is automaticallyindemented by two. The top of the nack then corresponds to the address of the previousvaluepushedonro ihe stack.

SS:FFFEH 4088/8046 T_ ^: --_l SS:SP

^-----SS:0000H

Figu.e 2-22

StacksegEentofmemory.

-*.

Z.l2

ihe stack

5l

^'trE-r
,l I

tF! | ;-e ) 23

Pnorto Figure L23 (r) SLacklust (Reprintod bv t)erms' operation. Dush ;ion oilnlel corp . CoPYright/lnrel Corp. 1979)(b) Stacl aftei executioD .r thePUSHAX instiuction (RepnnreLl b |ermsr.n !f Jnrel CorI1lqT{)J CuP)lrght/Iokl Corf.

of a registerarc pusnedonlo The examplein Fig 2 23(a) showshow the contents of the PUSHAX instruc*. sract. He,e we tind *re stateof the stackpriof to execurion As indicated.the bottomot tne registerconrains10516. iion. Norice tt at ttre stacl segment and c'ffseiFFFET6ThiF gjves the *.t .".id"'-"i*" ilt"rcaiaddress derivedfrom SS ABos'as stackaddrcss. bottom-of Anos:105014+FFFEro I t04t . the offset from the beginningof ihe stack the stackpointct which rcpresenls Fudhermore, the cur rherefore' eq als0008L6 ss to thetop of $e stack' -*;' ;;;;;;t;" Arcs' whichequals address phvsical is at"f renrtop otitre srack Aros=105016+000816 : r 05816

Addresseswithhighervaluesfiantha!ofthetopofthestack'105816'containv Uonot yet containvalid stick data Notice that the la'st data.Thosewith lower addresses BBAAT6 to the stackin Fig-2 23(a).is valuepushed rs exe whenthe PUSHAX instruct'on whathtppens iisure 2 23(b)demonstates of execution that Nolice 1234 tr" number L6 i"itiulv .*u.'.i"]. *" i"JiiJi "ontuln" not aftbct does but by two **"s lhe siackpoinier to be decremented *. *J i"u-".. is to the loca,egrnentregister Therefore'the next stackaccess tr," i""-"rts is pushed in Ax value "r:,r'. "i*t the t0se,6 rnis tocationis where ," .,i"i ii""-."".'o""ii"g in nemory rcsides "uorJss now 216' *" -i" 'ie"ificant bvre of Ax which equals I N"i;i" in memorv held is is 34r'J' bvte ofAX' which and th; leastsignificant ,aJ..' iosi ", 10s6,6. address 52 or the 8088 'nd 8086 Microprocessors Chap 2 Architecture software

Figure 2-24(b) showswhat happenswhen thelnsmction; pop AX and pop Bx are executed in that order Executionof the first instrucrioncausesdre 80g8 to read the yaluefrom rhe top of the stackandput ir into theAX ..gir,", * f Z:+,". r.l"rr, Sp i, ln"*menred ro gi\e0008 6 anddnolber readoperar;on i\ in;riarea rromLteyact. fn. reao con^espond, lo lhe pop BX in5rucrioo. andir causes rhe!alueBB{A-6 ro be"efoni loaded tnto the BX regisrer. Sp is incremented oncemoreandlr"* eqr"ts 00OA,r.ih";f;;; new rop of stackis at address105A,.. In Fig.2-24rbrwe.ee rhartre latues rerdour ot addre.ses lO5o,.and 1058," Rmainat rhese tocalions, burosy, 1s";6.u, locdlionc rhalaredbove !h. iq;""il. ;;i: derefore, they no longer representvatid stackdara.tf new infonnation is^pusteaioG siack.thesevaiuesare written over,

ff"T il.ch !he]r ere pushed. Figr,.:_z+it,ioa|* *,. .p.,"i,""--r" I: l..l:cl:'. r r g .l - 1 4 t , ) . L n e ( l aIc k i ' c b o q n r o b e i a r h e , t l e L l a r r e . u t r e d o u e r o o u r p r i o i p t S H '' .q,n. 0006,". ss equal, t0s fie lddre$ar,hei,p or,r,..".r llTlli:].h" and l" ". equals_ru)6rbthe wordat the lop ol Ue suck equaL l2J4r6.

.kt

us next look ar an examplein which srackdataare poppedIiom

the stackback

axfi-fi]..--.
exl-iT3.l-1
1062

s'f;T;l-r -ii
r062
?060 l05E

i
I I I I I I

00

r060 i 0 5 c 66 105A a8 105l

99

106C

12
89

AB

c0

Figure2-X .., Srd.t iJstpnor!o popopetulion. IReDrinred b) pemi$ion or InrelCorp-Coplriehutnr, Corp tets;ft)Srskafte, rheercu;i;norlllepop

m,?'.ffi"3i
:E 2 t2 fte Stack

^*"*^

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l:qol Figure 2-2s Ioaodre"""pee

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Any numberof stacksmay exist in an 8088 nicrocomputer.Simply changingthe value in the SS registerbrings in a new stack. For instance,executingthe instruction manystacks MOV SS,DX loadsa newvaluefiom DX into SS.Although canexist,only one can be activeat a time.

A 2.I3 INPUT/OUTPUT ADDRESS SPACE

The 8088 has separate memory and inpuroutput (UO) ad&essspaces. The 1/o adl"Jj rydce it the place where I/O interfaces,such as pdnter and nonitor ports, are implementd. Figure 2-25 shows a map of dle 8088's I/O ad&ess space.Notice that ihis just 64Kbyte addresses; address range is from 000016 to FFFFI6.This represents therefore, unlike memory,I/O addresses are only 16 bits long. Eachof theseaddresses correspondsto one byte wide I/O port. The part of the map from address 000016 through 00FFr6is referredto aspdSe0. Ce.tain of the 8088's I/O instructioDscan perform only input or outpul data-tansfer operations to l/O deviceslocatedin this part of rhe I/O ad&essspace. Other I/O instructions caninput or outpul datafor deviceslocatedanywherein the I/O address I/O space. data transfers can be byte-wide or $,ord wide. Notice that the eight locations from address 00F816 through00FFr6are specifiedasreservedby lntel Corporationand should

REVIEW PROBLEMS Section 2.I

1. 2. 3. 4, 5. Namethe two intemal Focessingunits of the 8088. Wlich processing unit of the 8088 is the interfaceto the outsideworld? wllat arc ihe length of the 8086'saddress bus and databus? How large is the instructionqueueof the 8088?The 8086? List the elements of the executionunit.

2.2 Section
6, Wlat is the pur?oseof a softwaremodel for a microprocessor? 7. Wllat must an assembly-language Fograr ner know aboui the rcgisren within the 8088miffoprocessor?

54

SoftwarcArchitecture of the 8088 and 4086 MicroDfocessors Chao. 2

8. How rnanyregistersare locatedwidrin the 8088? 9. How largeis the 8088's memory address space? 10. How largeis the 8086's I/O address space?

Section 2.3
11. What is the highestaddress in rhe 8088'smemoryaddress space? The lowesraddress? D. fs memoryin the 8088 microprocessor organizedasbyts,words. or doublewords? 13, The contenls of memory locarion 8000016 areFFr6,andrhosear 8000116 are0016. wllat is .he dataword storeda1address 8000016? Is the word ali$ed or misaligned? 11. Wlat is the value ol the doubleword sroredin nemory starting at address 8000316 if the contents of mernory ioca.ions B0003r5, 8000416, 80005 6, and 8000616 are 1116, 2216, 3316, and4416, respectively? Is thisan exampie of an aligned double lvord or a misaligneddoubleword? 15. Showhow thewordABCD16 is srored in memory starring at address 0A00216. Is the wordaligned or misaljgned'i 16. Showhow the doubleword 123,1567816 is sroredin memorystarring at address A00l16. Is thedoublewordaligned or misaligned? i:ction 2.4 :-. Lisi fivedatatypesFocessed directlyby rhe 8088. :( E\press each of the signed decimal integersthat fo1low as eirher a blre- or word le\adecimal number(use2\-complemenrnotationfor negativenurnbers). ,at + 121 ,br 10 'c) -128 'dr +500 :r. io\. would the integerin problem18(d)be sioredin memorystarring ar address \r:llor6? L :rn soutd the decimal number 1000 be expressed for processing by the 8088? ::, :!:rejs the decimalnurnbers that follow as unpacked and packedBCD bytes. a, t9 b. !s : i-; liould the BCD numberin problen 21(a)be sroredin memorysrarring al (Assune that the leasi significant .i-..-, 0800016? digir is storeda1 rhe lower = :-::i srarement is coded inASClI by thefollowingbinarysrrings? t00l1l0 1000101 1011000 1010100 0100000 i00t001

t5

24. How would the decirnalnumber1234be codedin ASCII andstoredin memorystart_ (Assumethat the leastsignificantdigit is storcdat the lower 0C00016? ing at address memory location.) addressed

2.5 Section
in the 8088 midoprocessor? How large is a memorysegment W}ich of the 8088'sintemal registe$ are usedfor memory segmentation? in memory? Whar registerdefinesthe beginningof the cunent code segment active at a given trme in the memory that can be Wtat is the ma-dmumamountof 8088 microprocessor? data storage 29. How much of the 8088'sactivememoryis availableas general-purpose 25. 26. 27. 28.

2.6 Section
30. Wlut is the dedicateduse of the part of the 8088's addressspacefton 0000016 though 0007F16? part of the memory adahess space? rangeof the general-use 31. What is the address space can be usedto siore the instruciions 32. Which part of the 8088'smemory address of a Plogram? F!FF0r6? 33. what is storedat address

2.7 Section
34. What is the function of the instructionpointer register? 35. Providean ovefliew of the fetch and the executionof an instructionby the 8088. to the value in IP eachtime the 8088 completesan insruction fetch? 36. What happens

2.8 Section
dataregistersof the 8088. 37. Make a list of the general-pur?ose labeled: Ho\ ie $e word valueof a dataresister Al8. - dnoledl byres of a dala register andlower 39. Hou ire the upper assigned to the CX register. operations 40. Nametwo dedicated

2.9 Section
41. 42. 43. ,l4. Wlat kind of inforrnationis sloredin the pointer and index registers? Nameihe two pointerregisters. of the pointerregisten usedas an offset? registerare the contents For which segment registerare the contentsof fhe index registen usedas an offset? For which segment 45, what do Sl andDI standfor? 46. Wlat is the differencebetweenSI and Dl?

S e c t i o2 n. 1 0
eachflag bit of the 8088 aseither a contol flag or a flag that monitorsthe 47. Categorize statusdue to executionof an insiluctlon. 48. Describethe function of eachstatusflag.

s6

Architecture of the 8088 and 8086 Microprocessors chap. Z Software

49. How doessoftwareuse a statusflag? 50. W}lat doesTF standfor? 51. Which flag determines whetherthe adairess for a srring operationis incremented or 52. Can the stateof the flags be modified rhroughso{tware?

Section 2. I I
53, Whatis the wordlengthofthe 8088's physical address? 54. Wlat rwo adalrcss elements are combinedio form a physicatadahess? 55. Calculatethe value of eachof the physicataddresses thar fo ows. Assumealt num, bersare hexadecimal numbe$. (a) 1000:i234 (b) 01oo:ABCD (c) A200|12CF (d) B2C0:FAI2 56. Find the unknown value for each of the following physical addresses. Assume all numbersare hexadecimal numben. (a) A000:?: A0123 (b) ?:r4DA = 23sDA (c) D765:?= DABCo (d) ?tCD2l : 32D21 5t. If ihe current values in the code segmentregister and rhe instrucrion pointer are 0200i6and0lAC16.respectively, wharphysicalad&essis usedin the next instrucrion fetch? 3 A datasegmenr is ro be locatedftom address A000016 to AFFFFT6. Wh;i vatuemust b loadedinto DS? 3). If the datasegment registercontainsthe valuefound in problem 58, what valuemust be toadedinto DI if it is to point ro a destinarion operand storedin memoryat address r.12346'l

Section 2. I 2
aa- What is the function oi the stack? aL lf the curent vatuesin the stack segmenr registerand srackpointer are C000r6and FF00r6,respectively, what is the address of the currenttoDof the srack? C1 For the baseand offser addresses in p.oblem 61, how many words of data are cur, Eotly held in the s.ack? af. Show how the value EEl I r6 ftom registerAX would be pushedonto the rop of rhe sack as it exists in Foblem 61.

Section2.13
al kr fte 8088 microprocessorare the inpu/ourput and memory addrcssspaces com, ffi or sepamte? G- Haa lnge is the 8088'syO address space? 5, E tE n3meis given ro rhepan of ihe I/O add.ess space ftom 000016 tbrough00IrF16?

57