VND 7 N 04

VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1
OMNIFET II: FULLY AUTOPROTECTED POWER MOSFET
TYPE VNN7NV04 VNS7NV04 VND7NV04 VND7NV04-1
RDS(on) 60 m
Ilim
Vclamp
6A
40 V
SOT-223
SO-8
n LINEAR CURRENT LIMITATION n THERMAL SHUT DOWN n SHORT CIRCUIT PROTECTION n INTEGRATED CLAMP n LOW CURRENT DRAWN FROM INPUT PIN n DIAGNOSTIC FEEDBACK THROUGH INPUT
3 1
1
3 2
TO252 (DPAK) TUBE VNN7NV04 SO-8 VNS7NV04 TO-252 (DPAK) VND7NV04 TO-251 (IPAK) VND7NV04-1 PACKAGE SOT-223
TO251 (IPAK) T&R VNN7NV0413TR VNS7NV0413TR VND7NV0413TR
ORDER CODES
PIN
n ESD PROTECTION n DIRECT ACCESS TO THE GATE OF THE
POWER MOSFET (ANALOG DRIVING) n COMPATIBLE WITH STANDARD POWER MOSFET DESCRIPTION The VNN7NV04, VNS7NV04, VND7NV04 VND7NV04-1, are monolithic devices designed in STMicroelectronics VIPower M0-3 Technology, intended for replacement of standard Power BLOCK DIAGRAM
MOSFETS from DC up to 50KHz applications. Built in thermal shutdown, linear current limitation and overvoltage clamp protects the chip in harsh environments. Fault feedback can be detected by monitoring the voltage at the input pin.
DRAIN
2 Overvoltage Clamp
INPUT
Gate Control
Over Temperature
Linear Current Limiter
3
SOURCE
FC01000
February 2003
1/29

ABSOLUTE MAXIMUM RATING
Symbol VDS VIN IIN RIN MIN ID IR VESD1 VESD2 Ptot EMAX EMAX Tj Tc Tstg Parameter Drain-source Voltage (VIN=0V) Input Voltage Input Current Minimum Input Series Impedance Drain Current Reverse DC Output Current Electrostatic Discharge (R=1.5K, C=100pF) Electrostatic Discharge on output pin only (R=330, C=150pF) Total Dissipation at Tc=25C Maximum Switching Energy (L=0.7mH; RL=0; Vbat=13.5V; Tjstart=150C; IL=9A) Maximum Switching Energy (L=0.6mH; RL=0; Vbat=13.5V; Tjstart=150C; IL=9A) Operating Junction Temperature Case Operating Temperature Storage Temperature SOT-223 Value SO-8 DPAK/IPAK Internally Clamped Internally Clamped +/-20 150 Internally Limited -10.5 4000 16500 7 40 37 Internally limited Internally limited -55 to 150 4.6 60 40 Unit V V mA A A V V W mJ mJ C C C
CONNECTION DIAGRAM (TOP VIEW)
SOURCE SOURCE SOURCE INPUT
DRAIN DRAIN DRAIN
DRAIN
SO-8 Package (*)
(*) For the pins configuration related to SOT-223, DPAK, IPAK see outlines at page 1.
CURRENT AND VOLTAGE CONVENTIONS
ID VDS
DRAIN IIN RIN INPUT SOURCE
VIN
2/29

THERMAL DATA
Symbol Rthj-case Rthj-lead Rthj-amb
(*) When
SOT-223 Thermal Resistance Junction-case}}} MAX 18 Thermal Resistance Junction-lead MAX Thermal Resistance Junction-ambient MAX 96 (*)
Parameter
Value SO-8 27 90 (*) DPAK 2.1 65 (*) IPAK 2.1 102
Unit C/W C/W C/W
mounted on a standard single-sided FR4 board with 0.5cm2 of Cu (at least 35 m thick) connected to all DRAIN pins.
ELECTRICAL CHARACTERISTICS (-40C < Tj < 150C, unless otherwise specified) OFF
Symbol VCLAMP VCLTH VINTH IISS VINCL IDSS Parameter Drain-source Clamp Voltage Drain-source Clamp Threshold Voltage Input Threshold Voltage Supply Current from Input Pin Input-Source Clamp Voltage Zero Input Voltage Drain Current (VIN=0V) Test Conditions VIN=0V; ID=3.5A VIN=0V; ID=2mA VDS=VIN; ID=1mA VDS=0V; VIN=5V IIN=1mA IIN=-1mA VDS=13V; VIN=0V; Tj=25C VDS=25V; VIN=0V 6 -1.0 Min 40 36 0.5 100 6.8 2.5 150 8 -0.3 30 75 Typ 45 Max 55 Unit V V V A V A
ON
Symbol RDS(on) Parameter Static Drain-source On Resistance Test Conditions VIN=5V; ID=3.5A; Tj=25C VIN=5V; ID=3.5A Min Typ Max 60 120 Unit m
3/29

ELECTRICAL CHARACTERISTICS (continued) (Tj=25C, unless otherwise specified) DYNAMIC
Symbol gfs (*) COSS Parameter Forward Transconductance Output Capacitance Test Conditions VDD=13V; ID=3.5A VDS=13V; f=1MHz; VIN=0V Min Typ 9 220 Max Unit S pF
SWITCHING
Symbol td(on) tr td(off) tf td(on) tr td(off) tf (dI/dt)on Qi Parameter Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Turn-on Current Slope Total Input Charge Test Conditions VDD=15V; ID=3.5A Vgen=5V; Rgen=RIN MIN=150 (see figure 1) VDD=15V; ID=3.5A Vgen=5V; Rgen=2.2K (see figure 1) VDD=15V; ID=3.5A Vgen=5V; Rgen=RIN MIN=150 VDD=12V; ID=3.5A; VIN=5V Igen=2.13mA (see figure 5) Min Typ 100 470 500 350 0.75 4.6 5.4 3.6 6.5 18 Max 300 1500 1500 1000 2.3 14.0 16.0 11.0 Unit ns ns ns ns s s s s A/s nC
SOURCE DRAIN DIODE

Symbol VSD (*) trr Qrr IRRM Parameter Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Test Conditions ISD=3.5A; VIN=0V ISD=3.5A; dI/dt=20A/s Min Typ 0.8 220 0.28 2.5 Max Unit V ns C A
VDD=30V; L=200H Reverse Recovery Current (see test circuit, figure 2)
PROTECTIONS (-40C < Tj < 150C, unless otherwise specified)

Symbol Ilim tdlim Tjsh Tjrs Igf Eas Parameter Drain Current Limit Step Response Current Limit Overtemperature Shutdown Overtemperature Reset Fault Sink Current Single Pulse Avalanche Energy Test Conditions VIN=5V; VDS=13V VIN=5V; VDS=13V Min 6 Typ 9 4.0 150 135 VIN= 5V; VDS=13V; Tj=Tjsh starting Tj=25C; VDD=24V VIN=5V; Rgen=RIN MIN=150; L=24mH (see figures 3 & 4) 200 15 175 200 Max 12 Unit A s C C mA mJ
(*) Pulsed: Pulse duration = 300s, duty cycle 1.5%
4/29

PROTECTION FEATURES During normal operation, the INPUT pin is electrically connected to the gate of the internal power MOSFET through a low impedance path. The device then behaves like a standard power MOSFET and can be used as a switch from DC to 50KHz. The only difference from the users standpoint is that a small DC current IISS (typ. 100A) flows into the INPUT pin in order to supply the internal circuitry. The device integrates: - OVERVOLTAGE CLAMP PROTECTION: internally set at 45V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads. - LINEAR CURRENT LIMITER CIRCUIT: limits the drain current ID to Ilim whatever the INPUT pin voltage. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold Tjsh. - OVERTEMPERATURE AND SHORT CIRCUIT PROTECTION: these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cut-out occurs in the range 150 to 190 C, a typical value being 170 C. The device is automatically restarted when the chip temperature falls of about 15C below shut-down temperature. - STATUS FEEDBACK: in the case of an overtemperature fault condition (Tj > Tjsh), the device tries to sink a diagnostic current Igf through the INPUT pin in order to indicate fault condition. If driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. If the drive impedance is high enough so that the INPUT pin driver is not able to supply the current Igf, the INPUT pin will fall to 0V. This will not however affect the device operation: no requirement is put on the current capability of the INPUT pin driver except to be able to supply the normal operation drive current IISS. Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit.
5/29

Figure 1: Switching Time Test Circuit for Resistive Load
VD Rgen Vgen
ID 90%
tr td(on)
10% td(off)
tf t
Vgen
Figure 2: Test Circuit for Diode Recovery Times
A D I
A
FAST DIODE
OMNIFET
S B
L=100uH B
150 Rgen
I
VDD
OMNIFET
S
Vgen
8.5
6/29

Figure 3: Unclamped Inductive Load Test Circuits Figure 4: Unclamped Inductive Waveforms
RGEN VIN PW
Figure 5: Input Charge Test Circuit
VIN
7/29

Source-Drain Diode Forward Characteristics
Vsd (mV)
1000 950
Static Drain Source On Resistance

Rds(on) (mOhm)
500
Tj= - 40C
450
Vin=0V
900 850 800 750 700 650 600 550 500 0 2 4 6 8 10 12 14 400 350 300 250 200 150 100 50 0 0 0.25 0.5
Vin=2.5V
Tj=25C
Tj=150C
0.75
1.25
Id(A)
Id(A)
Derating Curve
Static Drain-Source On resistance Vs. Input Voltage

Rds(on) (mOhm)
120 110 100 90 80 70 60 50 40 30 20 10 0 3 3.5 4 4.5 5 5.5 6 6.5 7
Tj= - 40C Tj=25C
Id=3.5A
Tj=150C
Vin(V)
Static Drain-Source On resistance Vs. Input Voltage

Rds(on) (mOhm)
140
Transconductance
Gfs (S)
20 18
120
Tj=150C
Vds=13V
16 14
Id=6A Id=1A Tj=-40C Tj=25C Tj=150C
100
80
12 10
60
Tj=25C
8
Tj=-40C Id=6A Id=1A Id=6A Id=1A
40
6 4 2
20
0 3 3.5 4 4.5 5 5.5 6 6.5
0 0 1 2 3 4 5 6 7 8
Vin(V)
Id(A)
8/29

Static Drain-Source On Resistance Vs. Id
Rds(on) (mOhm)
140
Transfer Characteristics
Idon(A)
10 9
Tj=25C Tj=-40C Tj=150C
120
Vin=3.5V
Vds=13.5V
8 7
Vin=5V Tj=150C
100
80
6 5
60
Tj=25C
Vin=3.5V Vin=5V Vin=3.5V Tj=-40C Vin=5V
4 3 2 1
40
20
0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
0 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
Id(A)
Vin(V)
Turn On Current Slope

di/dt(A/us)
8 7 6 5 4 3 2 1 0 100 200 300 400 500 600 700 800 900 1000 1100
Turn On Current Slope

di/dt(A/us)
2.25 2
Vin=5V Vdd=15V Id=3.5A
1.75 1.5 1.25 1 0.75 0.5 0.25 100 200 300 400 500 600 700
Vin=3.5V Vdd=15V Id=3.5A
800
900 1000 1100
Rg(ohm)
Rg(ohm)
Input Voltage Vs. Input Charge

Vin(V)
8 7 6 5
Turn off drain source voltage slope

dv/dt(V/us)
300
250
Vds=12V Id=3.5A
200
Vin=5V Vdd=15V Id=3.5A
150 4 3 2 1 0 0 0 5 10 15 20 25 100 200 300 400 500 600 700 800 900 1000 1100 100
50
Qg(nC)
Rg(ohm)
9/29

Turn Off Drain-Source Voltage Slope
dv/dt(v/us)
300
Capacitance Variations
C(pF)
600
250
500
200
Vin=3.5V Vdd=15V Id=3.5A
f=1MHz Vin=0V
400
150
300
100
50
200
0 100 200 300 400 500 600 700 800 900 1000 1100
100 0 5 10 15 20 25 30 35
Rg(ohm)
Vds(V)
Switching Time Resistive Load

t(us)
5.5 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0 250 500 750 1000 1250 1500 1750 2000 2250 2500
Switching Time Resistive Load

t(ns)
1600
tr Vdd=15V Id=3.5A Vin=5V tr td(off)

1200 1400
tf
1000 800 600
Vdd=15V Id=3.5A Rg=150ohm
td(off)
400
td(on)
200
tf
td(on)
0 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25
Rg(ohm)
Vin(V)
Output Characteristics
ID(A)
12 11 10 9 8 7 6 5 4
Vin=3V Vin=5V Vin=4.5V Vin=4V
Normalized On Resistance Vs. Temperature

Rds(on)
2.25
1.75
Vin=5V Id=3.5A
1.5
1.25
1 3 2 1 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13
Vin=2.5V
0.75
Vin=2V
0.5 -50 -25 0 25 50 75 100 125 150 175
VDS(V)
T(C)
10/29

Normalized Input Temperature
Vin(th)
1.15 1.1 1.05 1 0.95 10 0.9 9 0.85 0.8 0.75 0.7 -50 -25 0 25 50 75 100 125 150 175 8 7 6 5 -50 -25 0 25 50 75 100 125 150 175
Threshold
Voltage
Vs.
Current Limit Vs. Junction Temperature

Ilim (A)
15 14
Vds=Vin Id=1mA
13 12 11
Vds=13V Vin=5V
T(C)
Tj (C)
Step Response Current Limit

Tdlim(us)
7
6.5
Vin=5V Rg=150ohm
5.5
4.5
3.5 5 10 15 20 25 30 35
Vdd(V)
11/29

SO-8 Maximum turn off current versus load inductance
ILMAX (A) 100
10
A B C
1 0.01
0.1
1 L(mH)
10
100
A = Single Pulse at TJstart=150C B= Repetitive pulse at TJstart=100C C= Repetitive Pulse at TJstart=125C Conditions: VCC=13.5V Values are generated with RL=0 In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. VIN, IL Demagnetization Demagnetization Demagnetization
12/29

DPAK Maximum turn off current versus load inductance
ILMAX (A) 100
10
A B C
1 0.01 0.1 1 L(mH) 10 100
13/29

SOT-223 Maximum turn off current versus load inductance
ILMAX (A) 100
10
A B C
1 0.01 0.1 L(mH)

10
14/29
SO-8 THERMAL DATA

SO-8 PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm, Cu thickness=35m, Copper areas: 0.14cm2, 0.6cm2, 1.6cm2).
Rthj-amb Vs PCB copper area in open box free air condition
RTHj_amb (C/W)
SO-8 at 4 pins connected to TAB
110 105 100 95 90 85 80 75 70 0 0.5 1 1.5 2 2.5

PCB CU heatsink area (cm^2)
15/29
SOT-223 THERMAL DATA

SOT-223 PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm, Cu thickness=35m, Copper areas: 0.11cm2, 1cm2, 2cm2).
RTH j-amb (C/W)
140 130 120 110 100 90 80 70 60 0 0.5 1 1.5 2 2.5

Cu area (cm^2)
16/29
DPAK THERMAL DATA

DPAK PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 60mm x 60mm, PCB thickness=2mm, Cu thickness=35m, Copper areas: from minimum pad lay-out to 8cm2).
RTH j_amb (C/W)
90 80 70 60 50 40 30 0 2 4 6 8 10
PCB CU heatsink area (cm^2)
17/29

DPAK Thermal Impedance Junction Ambient Single Pulse
ZT H (C/W) 1000
100
Footprint 6 cm2
10
0.1 0.0001 0.001 0.01 0.1 1 Time (s) 10 100 1000
Thermal fitting model of an OMNIFET II in DPAK
Pulse calculation formula
Z TH = R TH + Z THtp ( 1 )
where
= tp T
Footprint 0.1 0.35 1.20 2 15 61 0.0006 0.0021 0.05 0.3 0.45 0.8 6
Thermal Parameter
Area/island (cm2) R1 (C/W) R2 (C/W) R3 ( C/W) R4 (C/W) R5 (C/W) R6 (C/W) C1 (W.s/C) C2 (W.s/C) C3 (W.s/C) C4 (W.s/C) C5 (W.s/C) C6 (W.s/C)
Tj
C1
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
Pd
24
T_amb
18/29

SO-8 Thermal Impedance Junction Ambient Single Pulse
ZT H (C/W) 1000
100
Footprint 2 cm2
10
0.1 0.0001 0.001 0.01 0.1 1 T ime (s) 10 100 1000
Thermal fitting model of an OMNIFET II in SO-8
where
= tp T
Footprint 0.2 0.9 3.5 21 16 58 3.00E-04 9.00E-04 7.50E-03 0.045 0.35 1.05 2
Thermal Parameter
Tj
C1
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
Pd
28
T_amb
19/29

SOT-223 Thermal Impedance Junction Ambient Single Pulse
ZT H (C /W) 1000
Footprint
100
2 cm2
10
0.1 0.0001 0.001 0.01 0.1 1 T ime (s) 10 100 1000
Thermal fitting model of an OMNIFET II in SOT-223
where
= tp T
Footprint 0.2 1.1 4.5 24 0.1 100 3.00E-04 9.00E-04 3.00E-02 0.16 1000 0.5 2
Thermal Parameter
Tj
C1
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
Pd
45
T_amb
20/29
TO-251 (IPAK) MECHANICAL DATA

mm. MIN. 2.2 0.9 0.7 0.64 5.2 0.3 0.95 0.45 0.48 6 6.4 4.4 15.9 9 0.8 0.8 0.6 0.6 6.2 6.6 4.6 16.3 9.4 1.2 1 0.017 0.019 0.236 0.252 0.173 0.626 0.354 0.031 0.031 TYP MAX. 2.4 1.1 1.3 0.9 5.4 0.85 0.012 0.037 0.023 0.023 0.244 0.260 0.181 0.641 0.370 0.047 0.039 MIN. 0.086 0.035 0.027 0.025 0.204 inch TYP. MAX. 0.094 0.043 0.051 0.031 0.212 0.033
DIM. A A1 A3 B B2 B3 B5 B6 C C2 D E G H L L1 L2
H C A C2 L2 D B3 B6 A1 L
= =
B5
A3
=
B2
G
=
L1
21/29
1 1
TO-252 (DPAK) MECHANICAL DATA

mm. DIM. MIN. A A1 A2 B B2 C C2 D E G H L2 L4 R V2 0 0.6 0.2 8 0 2.2 0.9 0.03 0.64 5.2 0.45 0.48 6 6.4 4.4 9.35 0.8 1 0.023 0.008 8 TYP MAX. 2.4 1.1 0.23 0.9 5.4 0.6 0.6 6.2 6.6 4.6 10.1 MIN. 0.086 0.035 0.001 0.025 0.204 0.017 0.019 0.236 0.252 0.173 0.368 0.031 0.039 TYP. MAX. 0.094 0.043 0.009 0.035 0.212 0.023 0.023 0.244 0.260 0.181 0.397 inch
R A C2 A1 C
L2
A2
22/29
L4
0.60 MIN. FLAT ZONE
B2
V2 = =
SOT-223 MECHANICAL DATA

mm. DIM. MIN. A B B1 c D e e1 E H V A1 0.02 0.1 3.3 6.7 0.6 2.9 0.24 6.3 0.7 3 0.26 6.5 2.3 4.6 3.5 7 3.7 7.3 10 (max) 0.0008 0.004 0.13 0.264 TYP MAX. 1.8 0.85 3.15 0.35 6.7 0.024 0.114 0.009 0.248 0.027 0.118 0.01 0.256 0.09 0.181 0.138 0.276 0.146 0.287 MIN. TYP. MAX. 0.071 0.033 0.124 0.014 0.264 inch
0046067
23/29
SO-8 MECHANICAL DATA

mm. DIM. MIN. A a1 a2 a3 b b1 C c1 D E e e3 F L M F 3.8 0.4 4.8 5.8 1.27 3.81 4.0 1.27 0.6 8 (max.) 0.14 0.015 5.0 6.2 0.65 0.35 0.19 0.25 0.1 TYP MAX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 0.188 0.228 0.050 0.150 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. TYP. MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019 inch
24/29
SOT-223 TAPE AND REEL SHIPMENT (suffix 13TR)
REEL DIMENSIONS
Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 12.4 60 18.4
TAPE DIMENSIONS
According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 12 4 8 1.5 1.5 5.5 4.5 2
All dimensions are in mm.
End
Start Top cover tape 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min No components Components No components
25/29

SO-8 TUBE SHIPMENT (no suffix)
Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1)

100 2000 532 3.2 6 0.6
TAPE AND REEL SHIPMENT (suffix 13TR) REEL DIMENSIONS

TAPE DIMENSIONS
According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 12 4 8 1.5 1.5 5.5 4.5 2
End
26/29

DPAK FOOTPRINT
A
TUBE SHIPMENT (no suffix)

1 .6
6 .7
1 .8
3 .0
2 .3 6 .7 2 .3
B
Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1) All dimensions are in mm.
75 3000 532 6 21.3 0.6
TAPE AND REEL SHIPMENT (suffix 13TR)
REEL DIMENSIONS
TAPE DIMENSIONS
According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 16 4 8 1.5 1.5 7.5 6.5 2
End
27/29
IPAK TUBE SHIPMENT (no suffix)

A C
Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1)

75 3000 532 6 21.3 0.6
28/29
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 2003 STMicroelectronics - Printed in ITALY- All Rights Reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com
29/29
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VND 7 N 04

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VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1

OMNIFET II: FULLY AUTOPROTECTED POWER MOSFET

TYPE VNN7NV04 VNS7NV04 VND7NV04 VND7NV04-1

TO251 (IPAK) T&R VNN7NV0413TR VNS7NV0413TR VND7NV0413TR

n ESD PROTECTION n DIRECT ACCESS TO THE GATE OF THE

Linear Current Limiter

VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1

CONNECTION DIAGRAM (TOP VIEW)

SOURCE SOURCE SOURCE INPUT

DRAIN DRAIN DRAIN

SO-8 Package (*)

CURRENT AND VOLTAGE CONVENTIONS

DRAIN IIN RIN INPUT SOURCE

VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1

Value SO-8 27 90 (*) DPAK 2.1 65 (*) IPAK 2.1 102

Unit C/W C/W C/W

VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1

SOURCE DRAIN DIODE

VDD=30V; L=200H Reverse Recovery Current (see test circuit, figure 2)

PROTECTIONS (-40C < Tj < 150C, unless otherwise specified)

(*) Pulsed: Pulse duration = 300s, duty cycle 1.5%

VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1

VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1

Figure 2: Test Circuit for Diode Recovery Times

VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1

Figure 5: Input Charge Test Circuit

VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1

Static Drain Source On Resistance

Static Drain-Source On resistance Vs. Input Voltage

Static Drain-Source On resistance Vs. Input Voltage

0 3 3.5 4 4.5 5 5.5 6 6.5

VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1

Vin=3.5V Vin=5V Vin=3.5V Tj=-40C Vin=5V

0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6

0 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5

Turn On Current Slope

Turn On Current Slope

Vin=5V Vdd=15V Id=3.5A

Vin=3.5V Vdd=15V Id=3.5A

900 1000 1100

Input Voltage Vs. Input Charge

Turn off drain source voltage slope

Vin=5V Vdd=15V Id=3.5A

VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1

Vin=3.5V Vdd=15V Id=3.5A

Switching Time Resistive Load

Switching Time Resistive Load

tr Vdd=15V Id=3.5A Vin=5V tr td(off)

Vdd=15V Id=3.5A Rg=150ohm

Normalized On Resistance Vs. Temperature

0.5 -50 -25 0 25 50 75 100 125 150 175

VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1

Current Limit Vs. Junction Temperature

Step Response Current Limit

VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1

ILMAX (A) 100

VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1

ILMAX (A) 100

1 0.01 0.1 1 L(mH) 10 100

VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1

ILMAX (A) 100

1 0.01 0.1 L(mH)

Value SO-8 27 90 () DPAK 2.1 65 () IPAK 2.1 102