DLD GTU Question Bank

Chapter-1 Binary System

Convert the following numbers to decimal (i) (10001.101) 2 (ii) (101011.11101) 2 (iii) (0.365) 8 (iv) A3E5 (v) CDA4 (vi) (11101.001) 2 (vii) B2D4 Perform the operation of subtractions with the following binary numbers using 2 complement (i) 10010 - 10011 (ii) 100 -110000 (iii) 11010 -10000 Define : Integrated Circuit and briefly explain SSI, MSI, LSI and VLSI Define: Digital System. Convert following Hexadecimal Number to Decimal : B28, FFF, F28 Convert following Octal Number to Hexadecimal and Binary: 414, 574, 725.25 Convert the following Numbers as directed: (1) (52)10 = ( ) 2 (2) (101001011)2 = ( ) 10 (3) (11101110) 2 = ( ) 8 (4) (68)10 = ( )16 Convert decimal 225.225 to binary ,octal and hexadecimal Convert decimal 8620 into BCD , excess-3 code and Gray code. Represent the decimal number 8620 in BCD , Excess-3 , and Gray code Convert the Decimal Number 250.5 to base 3, base 4, base 7 & base 16.

Chapter- 2 Boolean algebra and Logic Gates

Demonstrate by means of truth tables the validity of the following theorems of Boolean algebra (i) De Morgans theorems for three variables (ii) The Distributive law of + over Draw the logic symbol and construct the truth table for each of the following gates. [1] Two input NAND gate [2] Three input OR gate [3] Three input EX-NOR gate [4] NOT gate Give classification of Logic Families and compare CMOS and TTL families Explain SOP and POS expression using suitable examples Draw symbol and construct the truth table for three inputs Ex-OR gate. What is the principle of Duality Theorem? Explain briefly: standard SOP and POS forms. What are Minterms and Maxterms? Define: Noise margin , Propagation delay Explain briefly : SOP & POS , minterm & maxterm , canonical form , propagation delay, fan out Given Boolean function F= x y + x y + y z 1. Implement it with only OR & NOT gates 2. Implement it with only AND & NOT gates

PREPARED BY: Prof Nirav R. Patel, EEE Dept., GMFE

Express following Function in Product of Maxterms F(x,y,z)= ( xy + z ) ( y + xz )

Chapter- 3 Simplification of Boolean Functions

Obtain the simplified expressions in sum of products for the following Boolean functions: (i) F(A,B,C,D,E) =(0,1,4,5,16,17,21,25,29) (ii) ABCE + ABCD +BDE + BC D Reduce the expression: (1) A+B(AC+(B+C)D) (2) (A+(BC))(AB+ABC) Simplify the Boolean function: (1) F = ABC+BCD+ABCD+ABC (2) F =ABD+ACD+ABC d=ABCD+ACD+ABD Where d indicates Dont care conditions. Simplify the Boolean function: (1)F(w,x,y,z) = (0,1,2,4,5,6,8,9,12,13,14) (2)F(w,x,y) = (0,1,3,4,5,7) Simplify the following Boolean function by using Tabulation method. F = (0,1,2,8,10,11,14,15 ) Simplify the following Boolean function using K-map F( w,x,y,z) = ( 1 , 3 , 7 , 11 , 15 ), with dont care conditions d(w,x,y,z) = ( 0, 2 ,5 ) Simplify the following Boolean function using tabulation Method and draw logic diagram using NOR gates only F(w,x,y,z ) = ( 0 ,1 , 2 , 8 ,10 ,11,14,15 ) Determine the Prime Implicants of following Boolean Function using Tabulation Method. F(A,B,C,D,E,F,G)=(20,28,38,39,52,60,102,103,127) Simplify the following Boolean function using K-Map. F=ABC+BCD+ABCD+ABC

Chapter- 4 Combinational Logic

Design a combinational circuit that accepts a three bit binary number and generates an output binary number equal to the square of the input number. With necessary sketch explain full adder in detail Design a 4 bit binary to BCD code converter Design a combinational circuit that generates the 9 complement of a BCD digit Design a full-adder with two half-adders and an OR gate Implement Boolean expression for Ex-OR gate using NAND gates only Draw symbol and truth table for four input EX-OR gate. Explain NAND and NOR as an universal gate Simplify Boolean function F ( w,x,y,z ) = ( 0,1,2,4,5,6,8,9,12,13,14 ) using K-map and Implement it using (i) NAND gates only (ii) NOR gates only Design the Combinational Circuits for Binary to Gray Code Conversion. Explain Design Procedure for Combinational Circuit & Difference between Combinational Circuit & Sequential Circuit. Explain with figures how NAND gate and NOR gate can be used as Universal gate. Implement the following Boolean functions (i) F= A (B +CD) +BC with NOR gates (ii) F= (A + B) (CD + E) with NAND gates Design a BCD to decimal decoder Design a combinational circuit whose input is four bit binary number and output is the 2s complement of the input binary number.

PREPARED BY: Prof Nirav R. Patel, EEE Dept., GMFE

Design BCD to Excess-3 code converter using minimum number of NAND gates

Chapter- 5 Combinational Logic With MSI AND LSI

Discuss 4-bit magnitude comparator in detail Design a full adder circuit using decoder and multiplexer write short note on EEPROM,EPROM and PROM Define: [1] Comparator [2] Encoder [3] Decoder [4] Multiplexer [5] De-multiplexer [6] Flip Flop [7] PLA What is multiplexer? Implement the following function with a multiplexer: F(A,B,C,D) = (0 , 1 , 3 , 4 , 8 , 9 ,15 ) Write short note on : Read Only Memory (ROM) A combinational circuit is defined by functions: F1(A,B,C) = ( 3 , 5 , 6, 7 ) ,F2(A,B,C) = ( 0 , 2 , 4, 7 ) Implement the circuit with PLA having three inputs ,four product term and two outputs What is meant by multiplexer? Explain with diagram and truth table the Operation of 4-to-1 line multiplexer What is meant by decoder? Explain 3-to-8 line decoder with diagram and truth table Construct 4*16 Decoder with help of 2*4 Decoder. Discuss 4 bit BCD Adder in Detain.

Chapter- 6 Sequential Logic

Discuss D-type edge- triggered flip-flop in detail (i)With neat sketch explain the operation of clocked RS flip (ii)Show the logic diagram of clocked D With logic diagram and truth table explain the working JK Flipflop. Also obtain its characteristic equation. How JK flip-flop is the refinement of RS flip-flop? Draw and explain the working of following flip-flops [1] Clocked RS [2] JK Convert SR flip-flop into JK flip-flop Draw logic diagram , graphical symbol , and Characteristic table for clocked D flip-flop What is race-around condition in JK flip-flop? Explain working of master-slave JK flip-flop with necessary logic diagram , state equation and state diagram Explain the working of the Master Slave J K flip-flop Explain the procedure followed to analyze a clocked sequential circuit With suitable example Explain Master Slave Flip Flop through J.K Flip Flop Give comparison between combinational and Sequential logic circuits Design a counter with the following binary sequence:0,4,2,1,6 and repeat (Use JK flip-flop) Design a counter with the following binary sequence:0,1,3,7,6,4, and repeat.(Use T flip-flop) Design sequential counter as shown in the state diagram using JK flip-flops Design Sequential Circuit with J.K. Flip Flops to satisfy the following state equation.

PREPARED BY: Prof Nirav R. Patel, EEE Dept., GMFE

A( t + 1 ) =A B CD + A B C + ACD +AC D B(t+1)= A C + CD + A BC C(t + 1) = B D(t +1)=D

Chapter- 7 Registers Transfer Logic & Micro-Operation

Discuss Interregister Transfer in detail With respect to Register Transfer logic, explain Inter-register Transfer with necessary diagrams. Prepare a detailed note on: Instruction Codes. State and explain the features of register transfer logic Explain briefly: (i) logic and shift micro-operations (ii) fixed-point binary data and floating-point data Define : state table , state equation , state diagram , input & output equations Define the different mode of operation of registers & explain any two in details. Explain Macro operations Versus micro operations

Chapter- 8 Registers, Counters and the Memory unit

Draw the state diagram of BCD ripple counter, develop its logic diagram, and explain its operation. Construct a Johnson counter with Ten timing signals. What is the function of shift register? With the help of simple diagram explain its working. With block diagram and timing diagram explain the serial transfer of information from register A to register B. With logic diagram explain the operation of 4 bit binary ripple counter. Explain the count sequence, How up counter can be converted into down counter? Explain the working of 4 bit asynchronous counter Explain memory unit Give classification of counters and explain asynchronous 4-bit binary ripple counter Explain working of 4-bit binary ripple counter Draw and explain block diagram of 4-bit bidirectional shift register with Parallel load How many flip flops are required to build a shift register to store following numbers. i) Decimal 28 ii) Binary 6 bits iii) Octal 17 iv)Hexadecimals A Explain 4-bit up-down binary synchronous counter. Explain Johnson Counters.

PREPARED BY: Prof Nirav R. Patel, EEE Dept., GMFE

Chapter- 9 Processor Logic Design

What is scratchpad memory? With diagram explain the working of a processor unit employing a scratchpad memory. Draw the block diagram of a processor unit with control variables and explain its operation briefly. Explain the design of Arithmetic Logic Unit Draw block diagram of a 4-bit arithmetic logic unit. Design an adder / 5subtractor circuit with one selection variable S and two inputs A and B .when S = 0 circuit performs A+B, when S = 1 circuit performs A B by taking the 2s complement of B Explain Arithmetic micro operations Explain Arithmetic addition and arithmetic subtraction. Briefly explain processor unit with a 2-port memory Explain common cathode types seven segments displays.

Chapter- 10 Control Logic Design

With simple diagram explain the working of control logic with sequence register and decoder. Briefly explain control organization. With diagram explain control logic with one flip-flop per state. Explain Control Logic Design Draw and explain block diagram of microprograme control. What is the difference between hardwired control and micro program control? Write advantages and disadvantages of each method Write the Comparisons between Hard wired control and micro programmed Controls.

PREPARED BY: Prof Nirav R. Patel, EEE Dept., GMFE