CS 2253 COMPUTER ORGANIZATION AND ARCHITECTURE UNIT I - BASIC STRUCTURE OF COMPUTERS

PART A 1. Define functional units of a system 2. Define basic operational concepts 3. Define basic performance equation 4. Define clock and clock cycle 5. Define addressing mode 6. Differentiate auto increment and auto decrement 7. What do you mean by straight line sequencing 8. List four functions of system software 9. What is memory access time 10. Differentiate RISC and CISC 11. Define system throughput 12. What is word length 13. Whar are the basic instruction types 14. What are the phases available in straight line sequencing 15. What are two possible techniques for increasing clock rate 16. What is n ripple carry adder 17. What is sign extension 18. What are generate and propagate function 19. Define mantissa underflow 20. Define exponent overflow 21. State the rule for add/subtract floating number 22. State the rule for multiplication of floating number 23. State the rule for division of floating number 24. What are the three types of truncation 25. Define guard bits 26. Define chopping 27. Give a schematic of 2-bit array multiplier 28. Write IEEE standard for floating point format 29. State the principle of carry lookahead adder 30. Give the principle of operation of booths multiplication algorithm PART B 1. Explain the architecture of a basic computer 2. Explain the various instruction types 3. Write in detail about various addressing modes

4. Discuss the factors influencing performance 5. What are the various types of ISAs possible? Discuss 6. Explain with neat block diagram the floating point addition/subtraction 7. Explain in detail the principle of carry lookahead adder 8. Describe the algorithm for integer division with suitable example 9. Explain with block diagram the two techniques to speed up the multiplication operations 10. Explain the booths algorithm for multiplcation of signed twos complement numbers

UNIT II - BASIC PROCESSING UNIT

PART A 1. List the basic operations performed by the processor 2. Define data path 3. Define latency and throughput 4. What do you mean by bit-oring approach 5. What is micro instruction 6. Define nano programming 7. Compare hardwired control and microprogrammed control 8. What are the advantages of multiple bus organization over single bus organization 9. Write control sequence for executing the instruction add R4,R5,R6 10. Define control store 11. What is micro routine 12. What is nano control memory 13. Why is WMFC needed when reading from or writing to memory 14. What are nano instructions & the capacity of nano control memory 15. What is the nano instruction format of QM-1 PART B 1. 2. 3. 4. 5. Draw and explain typical hardwired control unit Draw and explain microprogrammed control unit Explain multiple bus organization in detail Explain nanoprogramming and nanoprogram control List and explain the steps involved in the execution of a complete instruction

UNIT III PIPELINING

PART A 1. 2. 3. 4. 5. Define pipelining Draw the structure of two stage instruction pipeline What are the major characteristics of a pipeline Whar are the various stages in a pipeline execution What is precise exception

6. What are the types of pipeline hazard? Define them 7. List any two conditions when a processor can stall 8. Define delayed branching 9. Explain deadlock 10. Define stall 11. What is branch prediction 12. Define dynamic branch prediction with state machine representation 13. What is instruction level parallelism 14. What are the problems faced in instruction pipeline 15. Write down the expression for speedup factor in a pipelined architecture 16. What are the features of addressing modes used in modern processor PART B 1. Explain the different types of hazards that can occur in a pipeline 2. Explain with diagram the basic concepts of pipelining and compare it with sequential processing 3. What is data hazard? Explain the methods for dealing with the data hazard 4. Explain the influence on instruction sets 5. Explain about various exception 6. What is branch hazard? Describe the methods for dealing with the branch hazard

UNIT IV PIPELINING
PART A 1. Define memory cycle time 2. What is virtual memory 3. What is locality of reference 4. Define set associative cache 5. What is write back cache 6. Give the formula to calculate average memory access time 7. What is memory interleaving 8. What is address translation page fault routine, page fault and demand paging 9. What is TLB 10. Define memory refreshing 11. What is SRAM and DRAM 12. What is associative memory 13. Define the terms: spatial locality and temporal locality 14. Give the feature of ROM cell 15. List the difference between static RAM and Dynamic RAM PART B 1. What is virtual memory? Explain the virtual memory address translation 2. Discuss the various mapping techniques used in cache memories

3. Give the basic cell of an associative memory. Explain its operation. Show how associated memories can be constructed using this basic cell 4. Discuss about the different types of ROM 5. Explain the organization of magnetic disk in detail 6. Discuss the concept of memory interleaving and give its advantages 7. Describe the organization of atypical RAM chip

UNIT V I/O OGANIZATION

PART A 1. What are the disadvantages of bus 2. What are the types of bus 3. Differentiate synchronus bus from asynchronous bus 4. Compare memory mapped I/O and I/O mapped I/O 5. List down the arbitration schemes used in centralized bus arbitration approach 6. What are the advantages of polling method 7. What is DMA 8. List out the features of PCI bus 9. List the features of USB 10. Explain the features of SCSI 11. Why bus termination is required in the SCSI bus 12. List the types of data transfer of a USB 13. List the elements of a USB 14. What is a strobe signal 15. What is bus arbitration 16. Define privilege exception 17. What is priority inteerupt 18. What is the difference between a subroutine and an interrupt-service routine 19. List out the objectives of USB 20. List down the function performed by an I/O

PART B 1. 2. 3. 4. 5. 6. 7. 8. Discuss the design of a typical input or output interface Briefly compare the characteristics of SCSI with PCI Describe the working principle of USB Describe in detail about IOP organization Explain the bus arbitration mechanism in DMA interface How the parallel port output interface circuit works How data transfers can be controlled using handshaking technique How do you connect multiple I/O devices to a processor using interrupts. Explain with suitable diagrams 9. Explain in detail about interrupt handling