Professional Documents
Culture Documents
Link Surroundings
Links integrated onto 1V, 100A processors
Required |Zsupply| < 1 m for ~100mV supply noise
On-Chip Regulation
ref Clk
up PFD down
Vcp
Regulator Types
Switching vs. linear
(Easy vs. Not easy to integrate)
EE290C
Lecture 15
EE290C
Lecture 15
Compensation Techniques
Miller Compensation RC Compensation
How do these two techniques achieve stability? What are the implications of that on PSRR?
EE290C Lecture 15 7
EE290C
Lecture 15
Define PSRR as inverse of max. sensitivity Similar results if minimize Vreg/Vdd with white noise on Vdd
(j )/V (j )|| ||V
dd
-20
-25
-30
reg
-35
10MHz
100MHz Frequency
1GHz
EE290C
Lecture 15
EE290C
Lecture 15
10
EE290C
Lecture 15
11
3 2
A o GBW
Aa =
2 3
GBW Ao
EE290C
Lecture 15
12
EE290C
Lecture 15
13
Implications
-10
RC Filter
PSRR
1 2
AoGBW
2x 2x
Source-Follower-Based Regulator
EE290C
Lecture 15
16
PSRR Comparison
EE290C
Lecture 15
17
Practical Issue #1
EE290C
Lecture 15
18
Practical Issue #2
EE290C
Lecture 15
19
EE290C
Lecture 15
20
Typical Design
EE290C
Lecture 15
21
Cdecap
Load
Local feedback efficiently trades gain for bandwidth Next lecture: use local f/b to drastically improve PSRR
EE290C Lecture 15 22