designfeature By Charles Kitchin, Analog Devices Inc

IT MAY SEEM LIKE A SIMPLE TASK TO MODIFY YOUR OP-AMP DESIGN TO WORK FROM A SINGLE VOLTAGE POWER SUPPLY, BUT THE CHANGE IN PERFORMANCE WILL SURPRISE YOU.

Demystifying single-supply op-amp design

attery-powered op-amp applications, such as its supply line. Because a 1V change on the supply those found in automotive and marine equip- line causes a 0.5V change at the output of the divider, ment, have only a single available power source. the circuits power-supply rejection is only 6 dB. Other applications, such as computers, may oper- Even worse, instability often occurs in circuits in ate from the ac power lines but still have only a sin- which the op amp must supply large output currents gle polarity power source, such as 5 or 12V dc. into a load. Unless the power supply is well-regulatTherefore, it is often a practical necessity to power ed and well-bypassed, large signal voltages appear on op-amp circuits from a single polarity supply. But the supply line. With the op amps noninverting insingle-supply operation has its drawbacks: It re- put referenced directly off the supply line, these sigquires additional passive components in each stage nals will feed directly back into the op amp, often iniand, improper execution of the design can lead to se- tiating instability. The use of careful layout, rious instability problems. multicapacitor-power-supply bypassing, star Single-supply applications have inherent prob- grounds, and a pc-board power plane may provide lems that dual-supply op-amp circuits often over- circuit stability. However, it is easier to reintroduce come. The fundamental problem is that an op amp some reasonable amount of power-supply rejection is a dual-supply device, so you must employ biasing into the design. using external components to center the op amps output voltage at midsupply. This approach allows RESISTOR-DIVIDER BIASING One way to increase power-supply rejection is to the maximum input and output voltage swing for a given supply voltage. In some low-gain applications modify the circuit (Figure 2). Capacitor C2 now byhaving low input signals, the op amps output can be passes the tap point on the voltage divider, restoronly 2 or 3V above ground. But in most cases, you VS VS must avoid clipping, and thus you must center the 0.1 F 1 F output around midsupply. The circuit of Figure 1 shows a simple sinRA * * 100k Figure 1 gle-supply biasing method. This noninvertVS/2 C OUT ing, ac-coupled, amplifier circuit uses a resistor di+ VIN VOUT CIN vider with two biasing resistors, RA and RB, to set the VS/2 /2. The voltage on the noninverting input equal to VS RB * 100k RLOAD input signal, VIN, is capacitively coupled to the noninverting input terminal. FOR RA=RB, R2 R1 This simple circuit has some serious limitations. 1 . BW1= / 2 RA)CIN 2( 1 The first limitation is that the op amps power-supC1 1 . BW2= ply rejection is almost entirely missing, because any * 2R1C1 *STAR GROUNDS. change in supply voltage directly changes the VS/2 1 . BW3= 2RROADCOUT biasing voltage, which the resistor divider sets. Power-supply rejection is an important and frequently FOR AC SIGNALS, VOUT=VIN(1+(R2/R1)), WHERE XC1<<R1. overlooked op-amp characteristic. Normally high power-supply rejection that any modern op amp provides greatly reduces the problem of ac signals A first-cut single-supply op-amp design yields a potentially and power-supply hum feeding into the op amp via unstable circuit.

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designfeature Op-amp design

ing some ac power-supply and other factors can become VS VS 0.1 F 1 F rejection. Resistor RIN complex. However, you can Figure 2 provides a dc return greatly simplify the design by RA * * path for the VS/2 reference using a cookbook apRIN 100k 100k VS/2 voltage and sets the circuits proach. For a common voltC OUT + VOUT ac input impedance. Many age-feedback op amp operat+ RB VS/2 C2 published applications ciring from a single 15 or 12V 100k CIN * cuits show a 100/100-k supply, a resistor divider us* RLOAD VIN voltage divider for RA and RB ing two 100-k resistors is a R2 R1 150k with a 0.1-F or similar careasonable compromise be/10 BW2, FOR RA=RB AND BW1= 1 pacitance value for C2. Howtween supply-current conBW3, AND BW4, C1 ever, the parallel combinasumption and input-bias 1 BW1= . * *STAR GROUNDS. / 2RA)C2 2( 1 tion of RA and RB and C2 set current errors. You can re1 . BW2= the 3-dB bandwidth of duce the resistors for a 5V 2RINCIN this network, which is equal supply to a lower value, such 1 . BW3= 2R1C1 to: as 42 k. In addition, some 1 3dB BW1/2 (50,000) applications need to operate BW4= . 2RLOADCOUT (0.1106F)30 Hz. from the new 3.3V standard. FOR AC SIGNALS, VOUT=VIN(1+(R2/R1)), Instability can still occur, For 3.3V applications, the op WHERE XC1<<R1. because the circuit has esamp must be a rail-to-rail deTO MINIMIZE INPUT-BIAS-CURRENT ERRORS, sentially no power-supply vice, and you must bias it 1 R2 SHOULD EQUAL RIN+( / 2 RA). rejection for low frequenclose to midsupply. You can cies. So, any signals lower One way to increase power-supply rejection is to modify the circuit using a further reduce the biasing rethan 30 Hz on the supply decoupled op-amp-biasing circuit. sistors to approximately 27 line can easily find their way k. back to the positive input of Current-feedback op amps VS VS 0.1 F 1 F the op amp. A practitypically target high-frequenUS Figure 3 cal solution to this cy use; the lowpass filter that R A US * problem is to increase the R2 and stray circuit capaci* 100k tance form can severely revalue of capacitor C2. It VS/2 COUT + needs to be large enough to duce the circuits 3-dB bandVOUT RB VS/2 effectively bypass the voltage width. Therefore, currentC2 100k * divider at all frequencies feedback op amps normally * RLOAD within the circuits passneed to use a low resistance FOR RA=RB AND XC2<<XC1, R2 band. A good rule of thumb value for R2. An op amp such R 1 1 50k . BW1= as the AD811, which targets is to set this pole at one/ 2RA)C2 2(1 C1 use in video applications, tenth the 3-dB input 1 VIN . BW2= 2R1C1 typically will have optimum bandwidth, set by RIN/CIN *STAR GROUNDS. 1 and R1/C1. Even though the performance using a 1-k BW3= . 2RLOADCOUT dc circuit gain is unity, you resistor for R2. Therefore, FOR AC SIGNALS, VOUT=VIN(R2/R1), these high-speed applications need to consider the op WHERE XC1<<R1. need to use smaller resistor amps input-bias currents. TO MINIMIZE INPUT-BIAS-CURRENT ERRORS, / 2RA. R2 SHOULD EQUAL 1 values in the RA/RB voltage The RA/RB voltage divider adds considerable resistance divider to minimize inputin series with the op amps You can also add decoupling to a single-supply inverting-amplifier circuit. bias-current errors. Unless positive input terminal, the circuit must operate over equal to the parallel combination of the TABLE 1TYPICAL COMPONENT VALUES FOR THE CIRCUIT OF FIGURE 2 two resistors. Maintaining the op amps Input Output output close to midsupply requires balbandwidth bandwidth CIN R1 C1 C2 COUT RLOAD ancing this resistance by increasing the Gain (Hz) (Hz) (F) (k) (F) (F) (F) (k) resistance in the negative input terminal 10 10 10 0.3 16.5 1.5 3 0.2 100 by an equal amount. Current-feedback 20 10 10 0.3 7.87 3 3 0.2 100 op amps often have unequal input-bias 10 50 50 0.1 16.5 0.3 0.6 0.05 100 currents, which further complicates the 101 20 20 0.2 1.5 6.8 2 0.1 100 design. Notes: RA=RB=100 k, RIN=100 k, and R2=150 k. A single-supply op-amp circuit design Capacitance values are rounded off to next highest common value. Because the CIN/RIN pole and that considers input-bias current errors C1/R1 poles are at the same frequency and both affect the input bandwidth, each capacitor is 2 as well as power-supply rejection, gain, larger than it would otherwise be for a single pole RC-coupled input. The table lists a C2 value that provides a corner frequency of one-tenth that of the input bandwidth. input- and output-circuit bandwidth,

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designfeature Op-amp design

a wide temperature range, you can use a modern FETinput op amp instead of a bipolar device to reduce input-bias-current errors. In any case, balancing the resistance in the op amps input terminals is still a wise precaution. Tables 1 and 2 provide typical component values for the circuits in figures 2 and 3 for several gains and 3-dB bandwidths. ZENER-DIODE BIASING Although the resistor-divider-biasing technique is low-cost and keeps the op amps output voltage at VS/2, the op amps common-mode rejection depends entirely upon the RC time constant that RA , RB, and C2 form. Using a C2 value that provides at least 10 times the RC time constant of the input RC coupling network, R1/C1 and RIN/CIN, helps to ensure a reasonable common-mode-rejection ratio. With 100-k resistors for RA and RB, you can keep practical values of C2 fairly small as long as the circuit bandwidth is high enough. However, another way to provide the necessary VS/2 biasing for single-supply operation is to use a zener-diode regulator (Figure 4). Current flows through resistor RZ to the zen-

TABLE 2TYPICAL COMPONENT VALUES FOR THE CIRCUIT OF FIGURE 3

Gain 10 20 10 100 Input bandwidth (Hz) 10 10 50 20 Output bandwidth (Hz) 10 10 50 20 R1 (k) 2 1 2 1 C1 (F) 8.2 20 2 8.2 C2 (F) 0.5 0.5 0.1 0.3 COUT (F) 0.2 0.2 0.05 0.1 RLOAD (k) 100 100 100 100

Notes: R2=50 k, and RA=RB=100 k. Capacitance values are rounded off to next highest common value. Because the C1/R1 pole and C2/RA/RB poles are at the same frequency, and both affect the input bandwidth, each capacitor is 2 larger than it would otherwise be for a single-pole, RC-coupled input.

er diode. Capacitor CN helps prevent any zener-generated noise from feeding into the op amp. Low-noise circuits may need to use a larger value for CN than the specified 10 F. Choose a zener diode that has an operating voltage close to VS/2. Select resistor RZ to provide a high enough zener current to operate the diode at its stable rated voltage and to minimize the zener output noise. It is also important to minimize power consumption and heating and to prolong the diodes life. Because the op amps input current is essentially zero, its a good idea to choose a lowpower zener. A 250-mW device is best, but the more common 500-mW types are also acceptable. The ideal zener current varies with each manufacturer, but practical levels of 5 A for a 250-mW
VS

diode and 5 mA for a 500-mW version are usually a good compromise for this application. Within the operating limits of the zener diode, the circuit of Figure 4 basically restores the op amps power-supply rejection. But this restoration comes at a price: The op amps output is now at the zener voltage rather than at VS/2. If the power-supply voltage drops, nonsymmetrical clipping can occur on large signals. Furthermore, the circuit now consumes more power. You also still need to consider input-bias currents. Resistors RIN and R2 should be close to the same value to prevent input bias currents from creating a large offset-voltage error. Figure 5 shows an inverting-amplifier circuit using the same zener-biasing method. You can use Table 3 with the cirVS

0.1 F

1 F

0.1 F

1 F * VZ COUT VOUT * RLOAD

Figure 4
CIN VIN IZ VS RZ

Figure 5
US * VZ + * IZ VZ COUT VOUT * RLOAD VIN R2 R1 100k C1 R1 VS RZ RIN 100k

* + + C2 VZ 10 F * VZ

RIN 100k + CN 10 F

VZ

R2 100k

SELECT RZ TO PROVIDE THE DESIRED ZENER OPERATING CURRENT, IZ. SEE TEXT. VSVZENER RZ= . IZ 1 BW1= . 2RINCIN 1 . BW2= 2R1C1 1 BW3= . 2RLOADCOUT FOR AC SIGNALS, VOUT=VIN(1+(R2/R1)), WHERE XC1<<R1, TO MINIMIZE INPUT-BIAS-CURRENT ERRORS, R2 SHOULD EQUAL RIN.

C1 * *STAR GROUNDS.

SELECT RZ TO PROVIDE THE DESIRED ZENER OPERATING CURRENT, IZ. SEE TEXT. FOR AC SIGNALS, VOUT=VIN(R2/R1), WHERE XC1<<R1, RZ= VSVZENER IZ . *STAR GROUNDS.

BW1= BW2= BW3=

1 . 2R1C1 1 . 2RINC2 1 . 2RLOADCOUT

TO MINIMIZE INPUT-BIAS-CURRENT ERRORS, R2 SHOULD EQUAL RIN.

Zener-diode biasing also improves the power-supply rejection of this noninverting amplifier.

The same zener-diode-biasing arrangement also improves an inverting amplifier design.

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designfeature Op-amp design

cuits in figures 4 and 5 to and RB to provide the desired provide practical VS/2 voltage reference that VS Figure 6 the AD663A data sheet RZ resistor values VS shows. for use with some com1 F 0.1 F VIN SENSE mon zener diodes. Note VOUT(2) NOISE AND TURN-ON TIME * * that for the lowest possible REF ADM663A RA Some op-amp applications circuit noise, select the ADM666A VS/2 COUT + VSET need a low-noise amplifier, zener-diode current by GROUND VOUT and low-noise-amplifier cirreferring to the zener RB VS/2 1.3 TO 16V ADJUSTABLE * cuits require low resistance product data sheet. Tables RLOAD OUTPUT * values in the signal path. 4 and 5 provide practical VIN Johnson (resistor) noise component values for figR2 R1 C1 equals 4 nV times the square ures 4 and 5 for several *STAR GROUNDS. root of the resistance value in circuit gains and bandkilohms. Although the Johnwidths. A 1.65V biasing voltage You can use a linear-voltage-regulator-biasing circuit for low-voltage op-amp son noise of a 1-k resistor is only 4 nV/Hz, this amount is necessary for op-amp designs. increases to 18 nV/Hz for a circuits operating from the 20-k resistor and 40 new 3.3V standard; how110k nV/Hz for a 100-k resisever, zener diodes are tor. Even though C2 bypasses commonly available Figure 7 the RA/RB resistor divider to only with voltages 0.1 F 1 F ground, these resistors set a as low as 2.4V. The easiest RA VS + limit on the minimum value way to provide this biasing 220k * * that you can use for the op voltage is to use a linear VS/2 VS/2 amps feedback resistor, and, voltage regulator, such as + C2 the larger this value is, the the ADM663A or ADM0.1 F 1 F greater the Johnson noise. So, 666A devices (Figure 6). RB 0.1 F * 220k low-noise applications need Although a zener diode is * * to use much smaller op-ampusually the cheapest voltVS biasing-resistor values than age regulator available, a *STAR GROUNDS. 100 k. However, lower value linear voltage regulator has resistors in the divider mean lower drift over tempera- An op amp provides a phantom ground for battery-powered, dc-coupled higher power-supply current ture and less noise than a applications. and reduced battery life. zener. Select resistors RA and RB to provide the desired VS/2 volt- from this supply voltage. The op amp Fortunately, the zener-diode biasing age reference, which the AD663A data also must be able to supply an output method supplies VS/2 without the need sheet describes. current large enough to power the load for large resistors. As long as you bypass circuit. Capacitor C2 bypasses the volt- the zener to keep its noise out of the cirBATTERY-POWERED, DC-COUPLED CIRCUITS age-divider output enough to prevent cuit, you can reduce both noise and supWith the use of suitably large input any resistor noise from feeding into the ply current. The use of a linear voltage and output coupling capacitors, an ac- op amp. This capacitor need not provide regulator is even better, because both its coupled circuit can operate at frequen- power-supply rejection because the load noise and its output impedance are low. cies well below 1 Hz, but some applica- current flows directly to ground, so any You also need to consider circuit turntions require a true dc response. signal currents flow equally from both on time. The approximate turn-on time Battery-powered applications permit the sides of the battery. Select resistors RA equals the RC time constant of the lowuse of a phantomest bandwidth filter you TABLE 3RECOMMENDED RZ VALUES AND ground circuit (Figure use. The circuits call for 7). This circuit provides the RA/RB and C2 voltageMOTOROLA PART NUMBERS FOR FIGURES 4 AND 5 dual-supply voltages, divider network to have a Supply Zener Zener RZ both positive and negative 10-times-longer time voltage voltage Zener current value with respect to ground, constant than that of the () (V) (V) type (IZ) from a single battery. An input or output circuit. 15 7.5 1N4100 500 A 15k op amp buffers the outThis longer time constant 15 7.5 1N4693 5 mA 1.5k 12 6.2 1N4627 500 A 11.5k put of a VS/2 voltage disimplifies the circuit de12 6.2 1N4691 5 mA 1.15k vider. If you use a lowsign because as many as 9 4.3 1N4623 500 A 9.31k voltage battery, such as three RC poles set the in9 4.3 1N4687 5 mA 931 3.3V, the op amp should put bandwidth. This long 5 2.4 1N4617 500 A 5.23k be a rail-to-rail device and time constant also helps 5 2.7 1N4682 5 mA 464 able to operate effectively keep the biasing network

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TABLE 4TYPICAL COMPONENT VALUES FOR THE CIRCUIT OF FIGURE 4
Gain 10 20 10 101 Input bandwidth (Hz) 10 10 50 20 Output bandwidth (Hz) 10 10 50 20 CIN (F) 0.3 0.3 0.1 0.2 R1 (k) 11 5.23 11 1 C1 (F) 2 4.7 0.47 15 COUT (F) 0.2 0.2 0.05 0.1 RLOAD (k) 100 100 100 100

Notes: RIN=R2 = 100 k, and CN=0.1 F. Select RZ from Table 3. Capacitance values are rounded off to next highest common value. Because the CIN/RIN pole and C1/R1 poles are at the same frequency, and both affect the input bandwidth, each capacitor is 2 larger than it would otherwise be for a single-pole, RC-coupled input.

TABLE 5TYPICAL COMPONENT VALUES FOR THE CIRCUIT OF FIGURE 5

Gain 10 20 10 100 Input bandwidth (Hz) 10 10 50 20 Output bandwidth (Hz) 10 10 50 20 R1 (k) 10 5 10 1 C1 (F) 2.7 4.7 0.5 12 C2 (F) 0.2 0.2 0.05 0.1 COUT (F) 0.2 0.2 0.05 0.1 RLOAD (k) 100 100 100 100

Notes: RIN=R2=100 k. Select RZ from Table 3. Capacitance values are rounded off to next highest common value. Because the C1/R1 pole and C2/RIN poles are at the same frequency, and both affect the input bandwidth, each capacitor is 2 larger than it would otherwise be for a single-pole, RC-coupled input.

from turning on before the op amps input and output networks, and, therefore, the op amps output gradually climbs from 0V to VS/2 without railing to the positive-supply line. Table 1 supplies a value for a 3-dB corner frequency that is one-tenth that of R1/C1 and RLOAD/COUT. For example, in Figure 2, for a circuit bandwidth of 10 Hz and a gain of 10, Table 1 recommends a C2 value of 3 F, which provides a 3-dB bandwidth of 1 Hz. The parallel combination of RA and RB50 k3 F0.15-sec RC time constant. So, the op amps output will take approximately 0.15 sec to settle to VS/2. The input and output RC networks charge as much as 10 times faster. In applications in which the circuits 3-dB, low-frequency bandwidth is low, the circuit turn-on time may become excessively long. In that case, a zener-biasing method may be a better choice. INPUT-HEADROOM CONSIDERATIONS Some specialty op amps are designed for low-voltage operation. Powering these op amps from a low-voltage single supply, such as 5 or 3.3V, may introduce input-headroom limitations. This scenario can happen if the amplifiers input stage does not limit symmetrically. For example, the AD8061 op amp has an input-common-mode-voltage range that extends to ground or the negative-supply line. However, its inputs can swing to

within only 1.8V of the positive-supply voltage without introducing dc errors or limiting device bandwidth. So, if you operate this amplifier from a single 5V supply and bias the amplifiers positive input at VS/2, 2.5V, the input voltage can swing in the negative direction a full 2.5 to 0V. But, in the positive direction, it can swing only 1V before clipping. This situation is not a problem if the amplifier operates at a gain of 2.5 or higher, because it will reach its maximum output swing of 2.5V before the input stage limits. However, if the amplifier operates at a lower gain, you must bias the positive input below VS/2 to allow symmetrical input stage limiting. In the case of the AD8061, biasing the positive input at 1.5V allows a 3V p-p input swing without clipping. Refer to the individual product data sheets to determine the optimum single-supply biasing voltage. Authors biography Charles Kitchin is an application engineer at Analog Devices (Wilmington, MA), where he has worked for 25 years. In his current position, he develops application circuits and writes technical articles, application notes, and books. He has an ASET degree from the Wentworth Institute (Boston) and several years study toward a BSET at the University of Lowell (Lowell, MA).
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