Professional Documents
Culture Documents
General Description
These N-Channel enhancement mode field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. These products have been designed to minimize on-state resistance while provide rugged, reliable, and fast switching performance. They can be used in most applications requiring up to 500mA DC. These products are particularly suited for low voltage, low current applications such as small servo motor control, power MOSFET gate drivers, and other switching applications.
Features
High density cell design for low RDS(ON). Voltage controlled small signal switch. Rugged and reliable. High saturation current capability.
_______________________________________________________________________________
MMBF170
Units V V V
Drain-Gate Voltage (RGS < 1M) Gate-Source Voltage Drain Current - Continuous - Pulsed Maximum Power Dissipation Derate Above 25C Operating and Storage Temperature Range Maximum Lead Temperature for Soldering Purposes, 1/16" from Case for 10 Seconds
mA
mW mW/C C C
ON CHARACTERISTICS (Note 1) Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance All All BS170 MMBF170 0.8 2.1 1.2 320 320 3 5 V
mS
SWITCHING CHARACTERISTICS (Note 1) Turn-On Time VDD = 25 V, ID = 200 m A, VGS = 10 V, RGEN = 25 VDD = 25 V, ID = 500 mA, VGS = 10 V, RGEN = 50 toff Turn-Off Time VDD = 25 V, ID = 200 m A, VGS = 10 V, RGEN = 25 VDD = 25 V, ID = 500 mA, VGS = 10 V, RGEN = 50
Note: 1. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%.
10 10 10 10
ns
ns
VGS = 10V
, DRAIN-SOURCE CURRENT (A) 1.5
9.0
8.0
DRAIN-SOURCE ON-RESISTANCE
V GS =4.0V
4.5 5.0 6 .0
7.0 6.0
1 RDS(on) , NORMALIZED
2.5
7.0
1.5
5.0
0.5
8.0 9.0 10
4.0 3.0
0 1 2 3 V DS , DRAIN-SOURCE VOLTAGE (V) 4 5
I 0
V G S = 10V
DRAIN-SOURCE ON-RESISTANCE DRAIN-SOURCE ON-RESISTANCE 1.75
V GS = 10V
2.5
ID = 500mA
R DS(on) , NORMALIZED
R DS(ON) , NORMALIZED
1.5
TJ = 125C
1.25
1.5
25C
1
-55C
0.5
0.75
0.5 -50
-25
125
150
1.1
VDS = 10V
1.6 ID , DRAIN CURRENT (A)
T J = -55C
25C
125C
Vth , NORMALIZED
1.05
V DS = VGS I D = 1 mA
1.2
0.95
0.8
0.9
0.4
0.85
0 0 2 V
GS
10
0.8 -50
-25
125
150
ID = 100A
1.075 1.05 1.025 1 0.975 0.95 0.925 -50 IS , REVERSE DRAIN CURRENT (A)
1 0.5
V GS = 0V
, NORMALIZED
TJ = 125C
0.1 0.05
25C -55C
BV
DSS
0.01 0.005
-25
125
150
0.001 0.2
0.4 V SD
0.6
0.8
1.2
1.4
Figure 8. Body Diode Forward Voltage Variation with Current and Temperature.
10
C iss
20 CAPACITANCE (pF)
ID = 5 0 0 m A
8
V DS = 25V
C oss
10
C rss f = 1 MHz V GS = 0V
1 2 V DS 3 5 10 20 30 50
VDD
t d(on)
t on tr
90%
t off t d(off)
90%
tf
V IN
D
RL V OUT
DUT
Output, Vout
VGS
10%
10% 90%
R GEN
Inverted
Input, Vin
S
10%
50%
50%
Pulse Width
3 2 1
Lim it
10
( DS ) ON
3 2
0u
s
I D , DRAIN CURRENT (A)
10
1 0.5
RD S( O Lim N) it
0u
0.5
1m 10 ms 10 0m s 1s 10 s DC
1m 10
ms
0.1 0.05
0.1 0.05
10
0m
T A = 25C
1s 10 s DC
T A = 25C
2 5 10 20 30 V DS , DRAIN-SOURCE VOLTAGE (V) 60 80
60
80
0.5
D = 0.5
t1
0.02 0.01
t2
Single Pulse
TJ - T A = P * R
JA (t)
0.001
0.01
10
100
300
R JA (t) = r(t) * R JA R
JA = (See Datasheet)
0.01
Single Pulse
t1
t2
100
300
CBVK741B019
NSID:
PN2222N
SPEC:
D/C1:
D9842
B2
FSCINT Label
(FSCINT)
5 Reels per Intermediate Box F63TNR Label Customized Label 375mm x 267mm x 375mm Intermediate Box
Customized Label
(F63TNR)3
Unit weight = 0.22 gm Reel weight with components = 1.04 kg Ammo weight with components = 1.02 kg Max quantity per intermediate box = 10,000 units
FSCINT Label 327mm x 158mm x 135mm Immediate Box Customized Label 5 Ammo boxes per Intermediate Box F63TNR Label 333mm x 231mm x 183mm Intermediate Box
Customized Label
BULK OPTION
See Bulk Packing Information table Anti-static Bubble Sheets
FSCINT Label
L34Z
NO LEADCLIP
2.0 K / BOX
5 EO70 boxes per intermediate Box 530mm x 130mm x 83mm Intermediate box Customized Label
FSCINT Label 10,000 units maximum per intermediate box for std option
FIRST WIRE OFF IS EMITTER (ON PKG. 92) ADHESIVE TAPE IS ON BOTTOM SIDE FLAT OF TRANSISTOR IS ON BOTTOM
FIRST WIRE OFF IS COLLECTOR (ON PKG. 92) ADHESIVE TAPE IS ON BOTTOM SIDE FLAT OF TRANSISTOR IS ON TOP
Hd P Pd
b Ha H1 HO d L L1 W1 S WO W2 W
t1 P1 F1 P2 DO ITEM DESCRIPTION PO Base of Package to Lead Bend Component Height Lead Clinch Height Component Base Height Component Alignment ( side/side ) Component Alignment ( front/back ) Component Pitch Feed Hole Pitch Hole Center to First Lead Hole Center to Component Center Lead Spread Lead Thickness Cut Lead Length Taped Lead Length Taped Lead Thickness Carrier Tape Thickness SYMBOL b Ha HO H1 Pd Hd P PO P1 P2 F1/F2 d L L1 t t1 W WO W1 W2 DO S DIMENSION 0.098 (max) 0.928 (+/- 0.025) 0.630 (+/- 0.020) 0.748 (+/- 0.020) 0.040 (max) 0.031 (max) 0.500 (+/- 0.020) 0.500 (+/- 0.008) 0.150 (+0.009, -0.010) 0.247 (+/- 0.007) 0.104 (+/- 0 .010) 0.018 (+0.002, -0.003) 0.429 (max) 0.209 (+0.051, -0.052) 0.032 (+/- 0.006) 0.021 (+/- 0.006) 0.708 (+0.020, -0.019) 0.236 (+/- 0.012) 0.035 (max) 0.360 (+/- 0.025) 0.157 (+0.008, -0.007) 0.004 (max)
Carrier Tape Width Hold - down Tape Width Hold - down Tape position Feed Hole Position Sprocket Hole Diameter Lead Spring Out
D4
D2
Reel Diameter Arbor Hole Diameter (Standard) (Small Hole) Core Diameter Hub Recess Inner Diameter Hub Recess Depth Flange to Flange Inner Width W1 Hub to Hub Center Width W3 Note: All dimensions are inches
D1 D2 D2 D3 D4 W1 W2 W3
W2
D3
TO-92; TO-18 Reverse Lead Form (J35Z Option) (FS PKG Code 92, 94, 96)
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in: inches [millimeters]
Note: All package 97 or 98 transistors are leadformed to this configuration prior to bulk shipment. Order L34Z option if in-line leads are preferred on package 97 or 98. * Standard Option on 97 & 98 package code
2000 Fairchild Semiconductor International January 2000, Rev. B
3P
SOT-23 Packaging Information Packaging Option Packaging type Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg) Note/Comments Standard (no flow code ) TNR 3,000 7" Dia 187x107x183 24,000 0.0082 0.1175 D87Z TNR 10,000 13" 343x343x64 30,000 0.0082 0.4006
3P
3P
3P
Components Trailer Tape 300mm minimum or 75 empt y poc kets Leader Tape 500mm minimum or 125 empty pockets
F E2 B0 Wc
Tc K0
P1
A0
B0
2.77 +/-0.10
W
8.0 +/-0.3
D0
1.55 +/-0.05
D1
1.125 +/-0.125
E1
1.75 +/-0.10
E2
6.25 min
F
3.50 +/-0.05
P1
4.0 +/-0.1
P0
4.0 +/-0.1
K0
1.30 +/-0.10
T
0.228 +/-0.013
Wc
5.2 +/-0.3
Tc
0.06 +/-0.02
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481 rotational and lateral movement requirements (see sketches A, B, and C).
20 deg maximum Typical component cavity center line
0.5mm maximum
0.5mm maximum
Component Rotation
Component Rotation
W1 Measured at Hub
Dim A Max
Dim A max
Dim N
See detail AA
Dim D min
Reel Option
7" Dia
Dim A
7.00 177.8 13.00 330
Dim B
0.059 1.5 0.059 1.5
Dim C
512 +0.020/-0.008 13 +0.5/-0.2 512 +0.020/-0.008 13 +0.5/-0.2
Dim D
0.795 20.2 0.795 20.2
Dim N
2.165 55 4.00 100
Dim W1
0.331 +0.059/-0.000 8.4 +1.5/0 0.331 +0.059/-0.000 8.4 +1.5/0
Dim W2
0.567 14.4 0.567 14.4
Dim W3 (LSL-USL)
0.311 0.429 7.9 10.9 0.311 0.429 7.9 10.9
8mm
13" Dia
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in: inches [millimeters]
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACEx Bottomless CoolFET CROSSVOLT DOME E2CMOSTM EnSignaTM FACT FACT Quiet Series FAST
DISCLAIMER
FASTr GlobalOptoisolator GTO HiSeC ISOPLANAR MICROWIRE OPTOLOGIC OPTOPLANAR PACMAN POP
PowerTrench QFET QS QT Optoelectronics Quiet Series SILENT SWITCHER SMART START SuperSOT-3 SuperSOT-6 SuperSOT-8
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. G