Ment Naga

AERONAUTICAL CRASH PREVENTION THROUGH RF COMMUNICATION SYSTEM
CHAPTER 1 INTRODUCTION
Embedded systems are electronic devices that incorporate microprocessor with in their implementation. The main purpose of the microprocessor is to simplify the system design and provide flexibility. This system may not have a disk driver and so the software is often stored in a ROM chip. Embedded systems often have several things to do at once. They must respond to external events (e.g.: someone pushes an elevator button).
An Embedded system is any computer system hidden inside a product other than a computer. Embedded systems are found in wide range of applications like expensive industrial control applications. As the technology brought down the cost of dedicated processors. They began to appear in moderately expansive applications such as automobiles, communications and office equipment, televisions. Todays embedded system is so inexpensive that they are used in almost every electronic product in our life. Many embedded systems have to run 24 hours a day you cant just reboot when something goes wrong. For this reason a good coding practices and thorough testing take on a new level of realm of embedded processors.Performance goals will force us to learn and apply new techniques such as multitasking and scheduling. The need to communicate directly with sensors actuators, keypads, displays etc will require programmers to have a better understanding of how alternative methods for performing input and output provide opportunities to trade speed, complexity and cost.
How powerful are embedded processors

The embedded system found in most consumer products employs a single chip controller. That includes the microprocessor, a limited amount of memory and simple input output devices. By far the vast majority of the embedded systems in production today are based on the 4bit, 8bit, or 16bit processors. Although 32bit processors account for relatively small percentage of the current market, their use in embedded systems is growing at the fastest rate. In 1998, almost 250 million 32bit embedded processor were shipped, compared to 100million desk top computers.
SPHOORTHY ENGINEERING COLLEGE 1
what programming languages are used

Although it is occasionally necessary to code some small parts of an embedded application program in assembly language, rest of the code in even the simplest application is written in a high level language. Traditionally the choice of the language has been C. Programs written in C are very portable from one compiler and/or target processor to another. C compilers are available for a number of different target processors, and they generate very efficient code. Despite the popularity of C++ and Java for desktop application programming, they are rarely used in embedded systems because of the large run-time overhead required to support some of their features. For example, even a relatively simple C++ program will produce about twice as much code as the same program written in C,and the situation is Much worse for large program that makes extensive use of the run-time library. Ec++ was designed by a group of Japanese microprocessor manufacturers called the EC++ technical group.
Embedded Application Program

Object fil e Read write Memory (RAM)
Compiler
Assembler Re entrant library Run time kernel Linker
loader Program(RAM) initializati Image on Read only File Rom Memory burner (ROM) Burner (ROM)
Fig. Embedded Application Program
A compiler and/or an assembler are used to build one or more object files that are linked to gather with a run-time library to form an executable image thats stored as a file on the disk. When we want run a desktop application program, its executable image is loaded from a disk into memory by a part of the operating system known as the Loader. The operating system itself is already in memory, put there during the boot process. The desktop system is intended to run a number of different application programs. Thus, read-write main memory is used so that an entirely different application program can be quickly and easily loaded into memory, replacing the previous application whenever necessary. Unlike general desktop systems embedded systems are designed to serve a single purpose. Once the embedded software is in memory, there is usually no reason to change it. This allows a less expansive read only memory to be used for permanent storage of the program. Since there is no need to store the program on disk, a significant amount of software can be eliminated that would otherwise be necessary to support a file system. Both the embedded applications software and a real-time kernel are stored in the same read only memory as a single program image, with no need for a file system, the kernel Is much smaller than the regular OS and is easily linked into the program as yet together another object file. In general the same kind of software development tools are used to build both embedded and desktop applications. Although tools suites designed especially for embedded applications developments are commercially available, in many cases its possible to use same compiler, assembler and linker that you use for desktop applications. There are two important differences, however. First, the run time library that comes with compilers for desktop applications is usually not intended for multitasking applications and must be replaced by one that is reentrant. Second, additional software called a locator is required to convert the linkers output to a form suitable for storing in read only memory. In a desktop OS load an executable program image produced by a linker into memory, it has to modify a few bytes whose value depends on the address where the program is to be loaded. Before we can use such an executable image to permanently store our embedded program in a read only memory, we must first perform the same fix-ups using a program called a locator.
1.1
Embedded Software Development Tools Application programmers typically do their work on the same kind of computer on which
the application will run. If programmers edit the program, compiles its links it, tries it out and debugs it, all on the same machine. The tactic has to change for embedded systems. In the first place, most embedded systems have specialized hardware to attach to special sensors or to drive special controls, and the only way to try out the software is on the specialized hardware. In the second place, embedded systems often use microprocessors that have never been used as the basis of workstations. Obviously, programs do not get magically compiled into the instruction set for whatever microprocessor you happen to have chosen for your system, and programs do not magically jump into the memory of your embedded system for execution.
Host and Target Machines

Most programming work for embedded systems is done on a host, a computer system on which all the programming tools run. Only after the program has been written, compiled, assembled and linked is it moved to target, the system that is shipped to customers. Some people use the word workstation instead of host; the word target is almost universal (See in Figure given below).
HOST MACHINE Cross Assemblers

Another tool that will need if we must write any of the program in assembly language is a cross assembler. As we might imagine from the name, a cross assembler is an assembler that run on host but produces binary instructions appropriated for the target. The input to the cross assembler must be assembly language appropriated for the target (since that is the only assembly language that can be translated into binary instructions for the target).
Linker/Locators for Embedded Software

The first difference between a native linker and locator is the nature of the output files that they create. The native linker creates a file on the disk drive of the host system that is read by
the O.S called the loader. The locator creates file that will be used by some program that copies the output to the target system. Later, the output from the locator will have to run its own. In an embedded system, there is no separate O.S. Linkers for embedded system is often called as locators.
EC Files(.C) Cross Compiler . Ob j Link er Locat or
Assembly (.asm)
Cross Assembler
. Ob j
Fig. 1.1 Cross Compilers
1.2
Embedded Design Methodology

The fast growing complexity and short time to market of today's real-time embedded
systems necessitates new design methods and tools to face the problem of specification, design, analysis, scheduling, simulation, integration and validation of complex systems. In the project, a system level method for embedded real-time systems design is developed exploiting System strength for system level Dan co-design modeling. In order to support the methodology, some extension to System is proposed starting form RTOS modeling and framework for scheduling simulation.
1.3 Schematic Diagram:
Fig:1.2.1 Schematic diagram
CHAPTER 2 EMBEDDED MICROCONTROLLER AND HARDWARE

2.1 Introduction
A micro controller (also MCU or C) is a functional computer system-on-a-chip. It contains a processor core, memory, and programmable input/output peripherals. Micro controllers include an integrated CPU, memory (a small amount of RAM, program memory, or both) and peripherals capable of input and output. It emphasizes high integration, in contrast to a microprocessor, which only contains a CPU (the kind used in a PC). In addition to the usual arithmetic and logic elements of a general-purpose microprocessor, the micro controller integrates additional elements such as read-write memory for data storage, read-only memory for program storage, Flash memory for permanent data storage, peripherals, and input/output interfaces. At clock speeds of as little as 32KHz, micro controllers often operate at very low speed compared to microprocessors, but this is adequate for typical applications. They consume relatively little power (mill watts or even microwatts), and will generally have the ability to retain functionality while waiting for an event such as a button press or interrupt. Power consumption while sleeping (CPU clock and peripherals disabled) may be just nanowatts, making them ideal for low power and long lasting battery applications. Micro controllers are used in automatically controlled products and devices, such as automobile engine control systems, remote controls, office machines, appliances, power tools, and toys. By reducing the size, cost, and power consumption compared to a design using a separate microprocessor, memory, and input/output devices, micro controllers make it economical to electronically control many more processes. Circumstances that we find ourselves in today in the field of microcontrollers had their beginnings in the development of technology of integrated circuits. This development has made it possible to store hundreds of thousands of transistors into one chip. Microprocessors and microcontrollers are widely used in embedded systems products. Microcontroller is a programmable device.
2.2 The Major Features of 89C52 Microcontroller
Fig:2.2 block diagram of 89C52

Why AT 89C52
The system requirements and control specifications clearly rule out the use of 16, 32 or
64 bit micro controllers or microprocessors. Systems using these may be earlier to implement due to large number of internal features. They are also faster and more reliable but, the above application is satisfactorily served by 8-bit micro controller. Moreover ATMEL is the leader in flash technology in todays market place Using an inexpensive 8-bit Microcontroller will doom the 32-bit product failure in any competitive market place.Coming to the question of why to use AT89C52 of all the 8-bit microcontroller available in the market the main answer would be because it has 8 Kb on chip flash memory which is just sufficient for our application. The on-chip Flash ROM allows the program memory to be reprogrammed in system or by conventional nonvolatile memory Programmer. Moreover ATMEL is the leader in flash technology in todays market place and hence using AT 89C52 is the optimal solution. Holding low forces the CPU to execute out of external memory regardless of the Program .AT89C52 consists of Internal ROM or EPROM (8751) of 0(8031) to 8K (89C52)Internal RAM of 256 bytes. Eight bit CPU with registers A (the accumulator) and B Sixteen-bit program counter (PC) and data pointer (DPTR).
PSEN: Program Store Enable is the read strobe to external Program Memory. When the device
is executing out of external Program Memory, PSEN is activated twice each machine cycle (except that two PSEN activations are skipped during accesses to external Data Memory). PSEN is not activated when the device is executing out of internal Program Memory. Another important signal 89C52 is program store signal.
EA/VPP: When EA is held high the CPU executes out of internal Program Memory (unless the
Program Counter exceeds 0FFFH in the 80C52). Holding EA low forces the CPU to execute out of external memory regardless of the Program Counter value. In the 80C31, EA must be externally wired low. In the EPROM devices, this pin also receives the programming supply voltage (VPP) during EPROM programming. The EA pin is connected to vcc to indicate that the program code is stored in the micro controller on chip ROM. To indicate the program code is stored in external ROM.
P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST (RXD)P3.0 (TXD)P3.1 (INT0)P3.2 (INT1)P3.3 (T0)P3.4 (T1)P3.5 (WR)P3.6 (RD)P3.7 XTAL2 XTAL1 GND
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
AT89 C52
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
Vcc P0.0(AD 0) P0.1(AD1) P0.2(AD P0.3(AD3 22222) P ) 0.4(AD4 ) P0.5(AD5) P0.6(AD6) P0.7(AD7 ) EA/VPP ALE/PROG PSEN P2.7(A15) P2.6(A14 P2.5(A13 ) P ) 2.4(A12 P2.3(A11 ) ) P2.2(A10) P2.1(A9) P2.0(A8)
2.3 PIN DIAGRAM OF AT 89C52
2.3 Port Description ALE/PROG: Address Latch Enable output pulse for latching the low byte of the address
during accesses to external memory. ALE is emitted at a constant rate of 1/6 of the oscillator frequency, for external timing or clocking purposes, even when there are no accesses to external
memory. (However, one ALE pulse is skipped during each access to external Data Memory.) This pin is also the program pulse input (PROG) during EPROM programming.
XTAL1: Input to the inverting oscillator amplifier. XTAL2: Output from the inverting oscillator amplifier. Port 0: Port 0 is an 8-bit open drain bi-directional port. As an open drain output port, it can sink
eight LS TTL loads. Port 0 pins that have 1s written to them float, and in that state will function as high impedance inputs. Port 0 is also the multiplexed low-order address and data bus during accesses to external memory. In this application it uses strong internal pull-ups when emitting 1s.
Port 0 emits code bytes during program verification. In this application, external pull-ups are required.
Port 1: Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. Port 1 pins that have 1s
written to them are pulled high by the internal pull-ups, and in that state can be used as inputs. As inputs, port 1 pins that are externally being pulled low will source current because of the internal pull-ups.
Port 2: Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. Port 2 emits the highorder address byte during accesses to external memory that use 16-bit addresses. In this application, it uses the strong internal pull-ups when emitting 1s.
Port 3: Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. It also serves the
functions of various special features of the 80C52 Family as follows: Port Pin Alternate Function
PORT 3.0 PORT 3.1 PORT 3.2 PORT 3.3 PORT 3.4 PORT 3.5 PORT 3.6
RXD ( SERIAL INPUT PORT) TXD (SERIAL OUTPUT PORT) INTO ( EXTERNAL
INTERRUPT 0) INT1 ( EXTERNAL INTERRUPT 1) T0 (TIMER 0 EXTERNAL INPUT) T1 (TIMER 1 EXTERNAL INPUT) WR (EXTERNAL DATA MEMORY WRITE STROBE) RD (EXTERNAL DATA MEMORY READ STROBE) SUPPLY VOLTAGE CIRCUIT GROUND POTENTIAL
PORT 3.7
VCC VSS
AT89C52 MICROCONTROLLER ARCHITECTURE

The 89C52 architecture consists of these specific features: Eight bit CPU with registers A (the accumulator) and B Sixteen-bit program counter (PC) and data pointer (DPTR) Eight- bit stack pointer (PSW) Eight-bit stack pointer (Sp) Internal ROM or EPROM (8751) of 0(8031) to 8K (89C52) Internal RAM of 256 bytes:
1. Four register banks, each containing eight registers

2. Sixteen bytes, which may be addressed at the bit level
3. Eighty bytes of general- purpose data memory
Thirty two input/output pins arranged as four 8-bit ports:p0-p3 Two 16-bit timer/counters: T0, T1 and T2 Full duplex serial data receiver/transmitter: SBUF Control registers: TCON, TMOD, SCON, PCON, IP, and IE
Two external and three internal interrupts sources. Oscillator and clock circuits
AT89C52 FAMILY INSTRUCTION SET

The 89C52 instruction set is optimized for 8-bit control applications. It provides a variety of fast addressing modes for accessing the internal RAM to facilitate byte operations on small data structures. The instruction set provides extensive support for one-bit variables as a separate data type, allowing direct bit manipulation in control and logic systems that require Boolean processing.
2.4 Basic Components of Embedded System

Embedded Hardware, Embedded Software/Firmware, RTOS or Real Time Kernel
Input drivers interface

Interru pts I2C UART
Switches/Sens ors LCD
Hard ware
Appl icati on speci fic Hard war e
Electrical interface
Time rs
CPU
I/O Ports
DAC
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ROM S/W
ADC
Output driver interface
Keypad interface
Fig. 2.3 Basic Embedded Components
2.5 Addressing Modes

The addressing modes in the 89C52 instruction set are as follows:
a. Direct Addressing
In direct addressing the operand is specified by an 8-bit address field in the instruction. Only internal Data RAM and SFRs can be directly addressed.
b. Indirect Addressing
In indirect addressing the instruction specifies a register which contains the address of the operand. Both internal and external RAM can be indirectly addressed. The address register for 8bit addresses can be R0 or R1 of the selected bank, or the Stack Pointer. The address register for 16-bit addresses can only be the 16-bit data pointer register, DPTR.
c. Register Instructions
The register banks, containing registers R0 through R7, can be accessed by certain instructions which carry a 3-bit register specification within the opcode of the instruction. Instructions that access the registers this way are code efficient, since this mode eliminates an address byte. When the instruction is executed, one of the eight registers in the selected bank is accessed. One of four banks is selected at execution time by the two bank select bits in the PSW.
d. Register-Specific Instructions
Some instructions are specific to a certain register. For example, some instructions always operate on the Accumulator, or Data Pointer, etc., so no address byte is needed to point to it. The op-code itself does that. Instructions that refer to the Accumulator as A assemble as accumulator specific op-codes.
e.Immediate Constants
The value of a constant can follow the op-code in Program Memory. For example, MOV A, #100 loads the Accumulator with the decimal number 100. The same number could be specified in hex digits as 64H.
f. Indexed Addressing
Only program Memory can be accessed with indexed addressing, and it can only be read. This addressing mode is intended for reading look-up tables in Program Memory A 16-bit base register (either DPTR or the Program Counter) points to the base of the table, and the Accumulator is set up with the table entry number. The address of the table entry in Program Memory is formed by adding the Accumulator data to the base pointer. Another type of indexed addressing is used in the case jump instruction. In this case the destination address of a jump instruction is computed as the sum of the base pointer and the Accumulator data.
2.6 MEMORY MODELS MEMORY ORGANIZATION

All 80C51 devices have separate address spaces for program and data memory, as shown in Figures 1 and 2. The logical separation of program and data memory allows the data memory to be accessed by 8-bit addresses, which can be quickly stored and manipulated by an 8-bit CPU. Nevertheless, 16-bit data memory addresses can also be generated through the DPTR register. Program memory (ROM, EPROM) can only be read, not written. There can be up to 64k bytes of program memory. In the 80C51, the lowest 4k bytes of program are on-chip. In the ROM less versions, all program memory is external. The read strobe for external program memory is the PSEN (program store enable). Data Memory (RAM) occupies a separate address space from Program Memory. In the 80C52, the lowest 128 bytes of data memory are on-chip. Up to 64k bytes of external RAM can be addressed in the external Data Memory space. In the ROM less version, the lowest 128 bytes are on-chip. The CPU generates read and write signals, RD and WR, as needed during external Data Memory accesses. External Program Memory and external Data Memory may be combined if desired by applying the RD and PSEN signals to the inputs of an AND gate and using the output of the gate as the read strobe to the external Program/Data memory.
a. Program Memory
After reset, the CPU begins execution from location 0000H. Each interrupt is assigned a fixed location in Program Memory. The interrupt causes the CPU to jump to that location, where
it commences execution of the service routine. External Interrupt 0, for example, is assigned to location 0003H. If External Interrupt 0 is going to be used, its service routine must begin at location 0003H. If the interrupt is not going to be used, its service location is available as general purpose Program Memory. The interrupt service locations are spaced at 8-byte intervals: 0003Hfor External Interrupt 0, 000BH for Timer 0, 0013H for External Interrupt 1, 001BH for Timer 1, etc. If an interrupt service routine is short enough (as is often the case in control applications), it can reside entirely
within that 8-byte interval. Longer service routines Can use a jump instruction to skip over subsequent interrupt locations, if other interrupts are in use. The lowest 4k bytes of Program Memory can either be in the on-chip ROM or in an external ROM. This selection is made by strapping the EA (External Access) pin to either VCC, or VSS. In the 80C51, if the EA pin is strapped to VCC, then the program fetches to addresses 0000H through 0FFFH are directed to the internal ROM. Program fetches to addresses 1000H through FFFFH are directed to external ROM. If the EA pin is strapped to VSS, then all program fetches are directed to external ROM. The ROM less parts (8031, 80C31, etc.) must have this pin externally strapped to VSS to enable them to execute from external Program Memory. The read strobe to external ROM, PSEN, is used for all external program fetches. PSEN is not activated for internal program fetches. The hardware configuration for external program execution is shown in Figure 4. Note that 16 I/O lines (Ports 0 and 2) are dedicated to bus functions during external Program Memory fetches. Port 0 (P0 in Figure 4) serves as a multiplexed address/data bus. It emits the low byte of the Program Counter (PCL) as an address, and then goes into a float state awaiting the arrival of the code byte from the Program Memory. During the time that the low byte of the Program Counter is valid on Port 0, the signal ALE (Address Latch Enable) clocks this byte into an address latch. Meanwhile, Port 2 (P2 in Figure 4) emits the high byte of the Program Counter (PCH). Then PSEN strobes the EPROM and the code byte is read into the microcontroller. Program Memory addresses are always 16 bits wide, even though the actual amount of Program Memory used may be less than 64k bytes. External program execution sacrifices two of the 8-bit ports, P0 and P2, to the function of addressing the Program Memory. b. Data Memory The CPU in this case is executing from internal ROM. Port 0 serves as a multiplexed
address/data bus to the RAM, and 3 lines of Port 2 are being used to page the RAM. The CPU generates RD and WR signals as needed during external RAM accesses. There can be up to 64k bytes of external Data Memory. External Data Memory addresses can be either 1 or 2 bytes wide. One-byte addresses are often used in conjunction with one or more other I/O lines to page the RAM, as shown in Figure 5. Two-byte addresses can also be used, in which case the high address byte is emitted at Port 2. Internal Data Memory is mapped in Figure 6.
The memory space is shown divided into three blocks, which are generally referred to as the Lower 128, the Upper 128, and SFR space. Internal Data Memory addresses are always one byte wide, which implies an address space of only 256 bytes. However, the addressing modes for internal RAM can in fact accommodate 384 bytes, using a simple trick. Direct addresses higher than 7FH access one memory space and indirect addresses higher than 7FH access a different memory space. Thus Figure 6 shows the Upper 128 and SFR space occupying the same block of addresses, 80H through FFH, although they are physically separate entities. The Lower128 bytes of RAM are present in all 80C51 devices as mapped in Figure 7. The lowest 32 bytes are grouped into 4 banks of 8 registers. Program instructions call out these registers as R0 through R7. Two bits in the Program Status Word (PSW) select which register bank is in use. This allows more efficient use of code space, since register instructions are shorter than instructions that use direct addressing. The next 16 bytes above the register banks form a block of bit-addressable memory space. The 80C51 instruction set includes a wide selection of single-bit instructions, and the 128 bits in this area can be directly addressed by these instructions. The bit addresses in this area are 00H through 7FH. All of the bytes in the Lower 128 can be accessed by either direct or indirect addressing. The Upper 128 (Figure 8) can only be accessed by indirect addressing. Figure 9 gives a brief look at the Special Function Register (SFR) space. SFRs include the Port latches, timers, peripheral controls, etc. These registers can only be accessed by direct addressing. Sixteen addresses in SFR space are both byte- and bit-addressable. The bit-addressable SFRs are those whose address ends in 0H or 8H
Fig 2.7 80C51 Block Diagram
Types of memory:
The 89C52 have three general types of memory. They are on-chip memory , external Code memory and external Ram. On-Chip memory refers to physically existing memory on the microcontroller itself. External code memory is the code memory that resides off chip. This is often in the form of an external EPROM. External RAM is the Ram that resides off chip. This often is in the form of standard static RAM or flash RAM. a) Code memory Code memory is the memory that holds the actual 89C52 programs that is to be run. This memory is limited to 64K. Code memory may be found on-chip or off-chip. On-Chip memory refers to physically existing memory on the microcontroller itself. External code memory is the code memory that resides off chip It is possible to have 4K of code memory onchip and 60K off chip memory simultaneously. If only off-chip memory is available then there can be 64K of off chip ROM. This is controlled by pin provided as EA b)Internal RAM The 89C52 have a bank of 256 of internal RAM. The internal RAM is found on-chip. So it is the fastest Ram available. And also it is most flexible in terms of reading and writing. Internal Ram is volatile, so when 89C52 is reset, this memory is cleared. 256 bytes of internal memory are subdivided. The CPU in this case is executing from internal ROM. Port 0 serves as a multiplexed address/data bus to the RAM, and 3 lines of Port 2 are being used to page the RAM. The CPU in this case is executing from internal ROM. Port 0 serves as a multiplexed address/data bus to the RAM, and 3 lines of Port 2 are being used to page the RAM. the addressing modes for internal RAM can in fact accommodate 384 bytes. The first 32 bytes are divided into 4 register banks. Each bank contains 8 registers. Internal RAM also contains 256 bits, which are addressed from 20h to 2Fh. These bits are bit addressed i.e. each individual bit of a byte can be addressed by the user. They are numbered 00h to 7Fh. The user may make use of these variables with commands such as SETB and CLR.
CHAPTER 3 HARDWARE DESCRIPTION

3.1 REGULATED POWER SUPPLY
A variable regulated power supply, also called a variable bench power supply, is one where you can continuously adjust the output voltage to your requirements. Varying the output of the power supply is the recommended way to test a project after having double checked parts placement against circuit drawings and the parts placement guide. This type of regulation is ideal for having a simple variable bench power supply. Actually this is quite important because one of the first projects a hobbyist should undertake is the construction of a variable regulated power supply. While a dedicated supply is quite handy e.g. 5V or 12V, it's much handier to have a variable supply on hand, especially for testing. Most digital logic circuits and processors need a 5 volt power supply. To use these parts we need to build a regulated 5 volt source. Usually you start with an unregulated power supply ranging from 9 volts to 24 volts DC (A 12 volt power supply is included with the Beginner Kit and the Microcontroller Beginner Kit.). To make a 5 volt power supply, we use a LM7805 voltage regulator IC .
FIG: The LM7805 is simple to use. You simply connect the positive lead of your unregulated DC power supply (anything from 9VDC to 24VDC) to the Input pin, connect the negative lead to the Common pin and then when you turn on the power, you get a 5 volt supply from the Output pin.
a.
CIRCUIT FEATURES
Brief description of operation: Gives out well regulated +5V output, output current capability of 100 mA Circuit protection: Built-in overheating protection shuts down output when regulator IC gets Circuit complexity: Very simple and easy to build Circuit performance: Very stable +5V output voltage, reliable operation Availability of components: Easy to get, uses only very common basic components Design testing: Based on datasheet example circuit, I have used this circuit successfully as part Applications: Part of electronics devices, small laboratory power supply Power supply voltage: Unregulated DC 8-18V power supply Power supply current: Needed output current + 5 mA Component costs: Few dollars for the electronics components + the input transformer cost too hot
of many electronics projects
b. BLOCK DIAGRAM
Fig 3.1 Power Supply Block Diagram

c. CIRCUIT DIAGRAM
3.2 CIRCUIT DIAGRAM OF POWER SUPPLY
BASIC POWER SUPPLY CIRCUIT

Above is the circuit of a basic unregulated dc power supply. A bridge rectifier D1 to D4 rectifies the ac from the transformer secondary, which may also be a block rectifier such as WO4 or even four individual diodes such as 1N4004 types. (See later re rectifier ratings).The principal advantage of a bridge rectifier is you do not need a centre tap on the secondary of the transformer. A further but significant advantage is that the ripple frequency at the output is twice the line frequency (i.e. 50 Hz or 60 Hz) and makes filtering somewhat easier. As a design example consider we wanted a small unregulated bench supply for our projects. Here we will go for a voltage of about 12 - 13V at a maximum output current (IL) of 500ma (0.5A). Maximum ripple will be 2.5% and load regulation is 5%.Now the RMS secondary voltage (primary is whatever is consistent with your area) for our power transformer T1 must be our desired output Vo PLUS the voltage drops across D2 and D4 ( 2 * 0.7V) divided by 1.414. This means that Vsec = [13V + 1.4V] / 1.414 which equals about 10.2V. Depending on the VA rating of your transformer, the secondary voltage will vary considerably in accordance with the applied load. The secondary voltage on a transformer advertised as say 20VA will be much greater if the secondary is only lightly loaded. If we accept the 2.5% ripple as adequate for our purposes then at 13V this becomes 13 * 0.025 = 0.325 Vrms. The peak to peak value is 2.828
time this value. Vrip = 0.325V X 2.828 = 0.92 V and this value is required to calculate the value of C1. Also required for this calculation is the time interval for charging pulses. If you are on a 60Hz system it is 1/ (2 * 60 ) = 0.008333 which is 8.33 milliseconds. For a 50Hz system it is 0.01 sec or 10 milliseconds.Remember the tolerance of the type of capacitor used here is very loose. The important thing to be aware of is the voltage rating should be at least 13V X 1.414 or 18.33. Here you would use at least the standard 25V or higher (absolutely not 16V).With our rectifier diodes or bridge they should have a PIV rating of 2.828 times the Vsec or at least 29V. Don't search for this rating because it doesn't exist. Use the next highest standard or even higher. The current rating should be at least twice the load current maximum i.e. 2 X 0.5A or 1A. A good type to use would be 1N4004, 1N4006 or 1N4008 types. These are rated 1 Amp at 400PIV, 600PIV and 1000PIV respectively. Always be on the lookout for the higher voltage ones when they are on special.
TRANSFORMER RATING
In our example above we were taking 0.5A out of the Vsec of 10V. The VA required is 10 X 0.5A = 5VA. This is a small PCB mount transformer available in Australia and probably elsewhere. This would be an absolute minimum and if you anticipated drawing the maximum current all the time then go to a higher VA rating.The two capacitors in the primary side are small value types and if you don't know precisely and I mean precisely what you are doing then OMIT them CONSTRUCTION The whole project MUST be enclosed in a suitable box. The main switch (preferably double pole) must be rated at 240V or 120V at the current rating. All exposed parts within the box MUST be fully insulated, preferably with heat shrink tubing.
3.2 BUZZER
A buzzer is an audio signaling device which may be mechanical, electromechanical, or piezoelectric. Typical uses of buzzers and beepers include alarms, timers and confirmation of user input such as a mouse click or keystroke.A joy buzzer is an example of a purely mechanical
buzzer.
Early devices were based on an electromechanical system identical to an electric
bell without the metal gong. Similarly, a relay may be connected to interrupt its own actuating current, causing the contacts to buzz. Often these units were anchored to a wall or ceiling to use it as a sounding
board. The word "buzzer" comes from the rasping noise that electromechanical buzzers made. A piezoelectric element may be driven by an oscillating electronic circuit or other audio signal source, driven with a piezoelectric audio amplifier. Sounds commonly used to indicate that a button has been pressed are a click, a ring or a beep. Uses

Enunciator panels Electronic metronomes Game shows
3.3LCD Background:
One of the most common devices attached to a micro controller is an LCD display. Some of the most common LCDs connected to the many microcontrollers are 16x2 and 20x2 displays. This means 16 characters per line by 2 lines and 20 characters per line by 2 lines, respectively.
Basic 16x 2 Characters LCD

The LCD requires 3 control lines as well as either 4 or 8 I/O lines for the data bus. The user may select whether the LCD is to operate with a 4-bit data bus or an 8-bit data bus. If a 4-bit data bus is used the LCD will require a total of 7 data lines (3 control lines .The three control
lines are referred to as EN, RS, and RW..The EN line is called "Enable." This control line is used to tell the LCD that we are sending it data. To send data to the LCD, our program should make sure this line is low (0) and then set the other two control lines and/or put data on the data bus. When the other lines are completely ready, bring EN high (1) and wait for the minimum amount
Of time required by the LCD datasheet (this varies from LCD to LCD), and end by bringing it low (0) again.
Figure 3.3.1: LCD Pin diagram 3.3.1Pin description:
PI N NO.
PIN NO.1 SS PIN NO.2 CC PIN NO.3 EE PIN NO.4 S PIN NO.5 /W PIN NO.6 N PIN NO.7 0 PIN NO.8 1 PIN NO.9 2 PIN NO.10 3 PIN NO.11 4 PIN NO.12 5 PIN NO.13 6 PIN NO.14 7
NA ME
V V V R
DESCRIPTION
POWER SUPPLY(GND) POWER SUPPLY(+5V) CONTRAST ADJUST 0=INSTRUCTION INPUT 1=DATA INPUT 0=WRITE TO LCD 1=READ FROM LCD ENABLE SIGNAL DATA BUS LINE 0 (LSB) DATA BUS LINE 1 DATA BUS LINE 2 DATA BUS LINE 3 DATA BUS LINE 4 DATA BUS LINE 5 DATA BUS LINE 6 DATA BUS LINE 7( MSB)
E D D D D D D D D
Table 3.3.2 Character LCD pins with Microcontroller

The RS line is the "Register Select" line. When RS is low (0), the data is to be treated as a command or special instruction (such as clear screen, position cursor, etc.). When RS is high (1), the data being sent is text data which should be displayed on the screen. For example, to display the letter "T" on the screen we would set RS high The RW line is the "Read/Write" control line. When RW is low (0), the information on the data bus is being written to the LCD.
An 8051 program must interact with the outside world using input and output devices that communicate directly with a human being. One of the most common devices attached to an 8051 is an LCD display. Some of the most common LCDs connected to the 8051 are 16x2 and 20x2 displays. This means 16 characters per line by 2 lines and 20 characters per line by 2 lines, respectively. Fortunately, a very popular standard exists which allows us to communicate with the vast majority of LCDs regardless of their manufacturer. The standard is referred to as HD44780U, which refers to the controller chip which receives data from an external source (in this case, the 8051) and communicates directly with the LCD.
Fig 3.3.2 Interfacing of lcd with microcontroller
PIN ASSIGNMENT:
INTERFACE TIMING (DATA WRITE)
. Technical Specifications:
Power Requirements: 5 VDC Communication: 4-bit or 8-bit Parallel Interface Dimensions: ~3.25L x ~1.75W x 0.25H in (~85L x ~45W x ~6H mm) Operating Temperature32 to +158 F (0 to + 70 C) An 8051 program must interact with the outside world using input and output devices that communicate directly with a human being. One of the most common devices attached to an 8051 is an LCD display. Some of the most common LCDs connected to the 8051 are 16x2 and 20x2 displays. This means 16 characters per line by 2 lines and 20 characters per line by 2 lines, respectively.
3.4 LED:
A light-emitting diode (LED) is a semiconductor light source. LEDs are used as indicator lamps in many devices, and are increasingly used for lighting. Introduced as a practical electronic component in 1962, early LEDs emitted low-intensity red light, but modern versions are available across the visible, ultraviolet and infrared wavelengths, with very high brightness. The internal structure and parts of a led are shown in figures 3.4.1 and 3.4.2 respectively.
Fig 3.4.1: Inside a LED Working:
Fig 3.4.2: Parts of a LED
The structure of the LED light is completely different than that of the light bulb. Amazingly, the LED has a simple and strong structure. The light-emitting when a diode is forward biased (switched on), electrons are able to recombine with holes within the device, releasing energy in the form of photons. This effect is called electroluminescence and the color of the light (corresponding to the energy of the photon) is determined by the energy gap of the semiconductor. An LED is usually small in area (less than 1 mm2), and integrated optical components are used to shape its radiation pattern and assist in reflection. LEDs present many advantages over incandescent light sources including lower energy consumption, longer lifetime, improved robustness, smaller size, faster switching, and greater durability and reliability. However, they are relatively expensive and require more precise current and heat management than traditional light sources. The compact size of LEDs has allowed new text and video displays and sensors to be developed, while their high switching rates are useful in advanced communications technology. The electrical symbol and polarities of led are shown in fig: 3.4.3.
Fig 3.4.3: Electrical Symbol & Polarities of LED

LED lights have a variety of advantages over other light sources: High-levels of brightness and intensity High-efficiency Low-voltage and current requirements Low radiated heat Applications of LED fall into three major categories:
Visual signal application where the light goes more or less directly from the LED to the Illumination where LED light is reflected from object to give visual response of these A light-emitting diode (LED) is a semiconductor device that emits incoherent narrow-
human eye, to convey a message or meaning.
object
spectrum light when electrically biased in the forward direction of the p-n junction. This effect is a form of electroluminescence.
An LED is usually a small area source, often with extra optics added to the chip to shape its
radiation pattern [10]. The color of the emitted light depends on the composition and condition of the semiconducting material used, and can be infrared, visible, or near-ultraviolet. This effect is
called electroluminescence and the color of the light (corresponding to the energy of the photon) is determined by the energy gap of the semiconductor. An LED is usually small in area (less than 1 mm2), and integrated optical components are used to shape its radiation pattern and assist in
Color Infrared Red Orange
Maximum Forward Voltage 1.6V 1.8 V to 2.1 V 2. Yellow 2.4V Green 2.6V Blue 3.0 V to 3.5 V White 3.0 V to 3.5 V Ultraviolet 3.5V
reflection. LEDs present many advantages over incandescent light sources including lower energy consumption.
3.5
RF Transmitter General Description:

simple-to-use for designing. The ST-TX01-ASK is an ASK Hybrid transmitter module. ST-
TX01-ASK is designed by the Saw Resonator, with an effective low cost, small size, and

38
Frequency Range: 315 / 433.92 MHZ. Supply Voltage: 3~12V. Output Power: 4~16dBm Circuit Shape: Saw
SPHOORTHY ENGINEERING COLLEGE
Fig: 3.5.1 315/434 MHz TRANSMITTER
Fig: 3.5.2 433 MHz RF Transmitter STT-433 Pin Description:

ANT: 50 ohm antenna output. The antenna port impedance affects output power and harmonic emissions. An L-C low-pass filter may be needed to sufficiently filter harmonic emissions. Antenna can be single core wire of approximately 17cm length or PCB trace antenna VCC: Operating voltage for the transmitter. VCC should be bypassed with a .01uF ceramic capacitor and filtered with a 4.7uF tantalum capacitor. Noise on the power supply will degrade transmitter noise performance DATA: Digital data input. This input is CMOS compatible and should be driven with CMOS level inputs. GND: Transmitter ground. Connect to ground plane.The STT-433 is ideal for remote control applications where low cost and longer range is required. The transmitter operates from a 1.512V supply, making it ideal for battery- powered applications. The transmitter employs a SAWstabilized oscillator, ensuring
Features of RF transmitter:
433.92 MHz Frequency Low Cost 1.5-12V operation 11mA current consumption at 3V Small size dBm output power at 3V
Specifications of RF transmitter:
1. 2. 3. 4. Operating Voltage Vcc: 1.5 to 12 Volts DC Operating Current: Icc - 11mA @3V, 59mA @5V Frequency Accuracy: -75 to 75 KHz Center Frequency: 433 Mhz
5. 6. 7. 8.
RF Output Power: 4 dBM@3V (2 mW), 16 dBM@5V (39 mW) Data Rate: 200 to 3K bps Temperature:-20 to +60 Deg. C Power up delay: 20 ms
Theory:
OOK (On off Keying) modulation is a binary form of amplitude modulation. When a logical 0 (data line low) is being sent, the transmitter is off, fully suppressing the carrier. In this state, the transmitter current is very low, less than 1mA. When a logical 1 is being sent, the carrier is fully on. In this state, the module current consumption is at its highest, about 11mA with a 3V power supply. OOK is the modulation method of choice for remote control applications where power consumption and cost are the primary factors. Because OOK transmitters draw no power when they transmit a 0, they exhibit significantly better power consumption than FSK transmitters.OOK data rate is limited by the start-up time of the oscillator. High-Q oscillators which have very stable center frequencies take longer to start-up than low-Q oscillators. Data Rate: The oscillator start-up time is on the order of 40uSec, which limits the maximum data rate to 4.8 kbit/sec. SAW stabilized oscillator: The transmitter is basically a negative resistance LC oscillator whose center frequency is tightly controlled by a SAW
resonator. SAW (Surface Acoustic Wave) resonators are fundamental frequency devices that resonate at frequencies much higher than crystals.
Applications:
1. 2. 3. 4. 5.
41
Remote Keyless Entry (RKE) Remote Lighting Controls Wireless Alarm and Security Systems Long Range RFID Automated Resource Management
6. 7.
8.
Wireless security systems Car Alarm systems Remote controls Sensor reporting
9.
3.6 RF Receiver: General Description:

The ST-RX02-ASK is an ASK Hybrid receiver module. A effective low cost solution for using at 315/433.92 MHZ. The circuit shape of ST-RX02-ASK is L/C. Receiver Frequency: 315 / 433.92 MHZ Typical sensitivity: -105dBm Supply Current: 3.5mA IF Frequency: 1MHz
Features:
Low power consumption. Easy for application. Operation temperature range : 2070 Operation voltage: 5 Volts.
Fig: 3.5.2 315/434 MHz RECEIVER Overview:

The STR-433 is ideal for short-range remote control applications where cost is a primary concern. The receiver module requires no external RF components except for the antenna. It generates virtually no emissions, making FCC and ETSI approvals easy. The Super-regenerative design exhibits exceptional sensitivity at a very low cost. The manufacturing-friendly SIP style package and low-cost make the STR-433 suitable for high volume applications
Features:
Low Cost Voperation 3.5mA current drain No External Parts are required Receiver Frequency: 433.92 MHZ Typical sensitivity: -105dBm IF Frequency: 1MHz 433.92 MHz Frequency Low Cost 1.5-12V operation 11mA current consumption at 3V Small size dBm output power at 3V
Pin Diagram of RF Receiver:
FIG: 3.3.2 PIN DIAGRAM OF RF RECEIVER Pin Name Description:

ANT: Antenna input. GND: Receiver Ground. Connect to ground plane. VCC: (5V) VCC pins are electrically connected and provide operating voltage for the receiver. VCC can be applied to either or both. VCC should be bypassed with a .1F ceramic capacitor. Noise on the power supply will degrade receiver sensitivity. DATA: Digital data output. This output is capable of driving one TTL or CMOS load. It is a CMOS compatible output.
Operation:
The STR-433 uses a super-regenerative AM detector to demodulate the incoming AM carrier. A super regenerative detector is a gain stage with positive feedback greater than unity so that it oscillates. An RC-time constant is included in the gain stage so that when the gain stage
oscillates, the gain will be lowered over time proportional to the RC time constant until the oscillation eventually dies. When the oscillation dies, the current draw of the gain stage decreases, charging the RC circuit, increasing the gain, and ultimately the oscillation starts again. In this way, the oscillation of the gain stage is turned on and off at a rate set by the RC time constant. This rate is chosen to be super-audible but much lower than the main oscillation rate. Detection is accomplished by measuring the emitter current of the gain stage. Any RF input signal at the frequency of the main oscillation will aid the main oscillation in restarting. If the amplitude of the RF input increases, the main oscillation will stay on for a longer period of time, and the emitter current will be higher. Therefore, we can detect the original baseband signal by simply low-pass filtering the emitter current. The average emitter current is not very linear as a function of the RF input level. It exhibits a 1/ln response because of the exponentially rising nature of oscillator start-up. The steep slope of a logarithm near zero results in high sensitivity to small input signals. This rate is chosen to be super-audible but much lower than the main oscillation rate. Detection is accomplished by measuring the emitter current of the gain stage. The most common source for NRZ data is from a UART embedded in a micro-controller. Applications that use NRZ data encoding typically involve microcontrollers.
Power Supply: The STR-433 is designed to operate from a 5V power supply. It is crucial
that this power supply be very quiet. 11mA current consumption at 3V.The power supply should be bypassed using a 0.1uF low-ESR ceramic capacitor and a 4.7uF tantalum capacitor. These capacitors should be placed as close to the power pins as possible. The STR- 433 is designed for continuous duty operation. From the time power is applied, it can take up to 750mSec for the data output to become valid. The Super-regenerative design exhibits exceptional sensitivity at a very low cost.
Schematic Diagram
FIG
1.Schematic Diagram
3.7 ANALOG SENSORS Features

Analog sensors give both a voltage signal 0-10V, and current signal 0-20mA. Analog sensors may be used for distance, thickness control of conveyor belts, detection of
unevenness, positioning, continuous level-control, max-control with variable hysteresis as well as for counting and control, to name but a few, they are particularly suited for use in measuring techniques and control systems and are PLC-compatible. Analog sensors give a signal output which is Proportional to sensing distance.
General:
In common with capacitive and inductive sensors the analog sensor also consists of a transistor oscillator. The oscillator current will be influenced by the approach of metals and electric conductive media to the inductive analog sensors or by metals and all non-metals.
FIG3.7.1INDUCTIVE ANALOG SENSOR
FIG:3.7.2 CAPACITIVE ANALOG
3.8 MAX 232

The MAX232 is a dual driver/receiver that includes a capacitive voltage generator to supply TIA/EIA-232-F Voltage levels from a single 5-V supply. Each receiver converts TIA/EIA-232-F inputs to 5-V TTL/CMOS levels. These receivers have a typical threshold of 1.3 V, a typical hysteresis of 0.5 V, and can accept 30-V inputs. Each driver converts TTL/CMOS input levels into TIA/EIA-232-F levels.
3.9 RS 232
The MAX220MAX249 family of line drivers/receivers is intended for all EIA/TIA-232E and V.28/V.24 communications interfaces, particularly applications where 12V is not available. These parts are especially useful in battery-powered systems, since their low-power shutdown mode reduces power dissipation to less than 5W. The MAX225, MAX233, MAX235, and MAX245/MAX246/MAX247 use no external components and are recommended for applications where printed circuit board space is critical.
CHAPTER 4 INTRODUCTION TO KEIL SOFTWARE

4.1 KEIL Vision IDE Overview
The Vision IDE from Keil combines project management, make facilities, source code editing, program debugging, and complete simulation in one powerful environment. The Vision development platform is easy-to-use and it helps you quickly create embedded programs that work. The Vision editor and debugger are integrated in a single application that provides a seamless embedded project development environment. Vision is the Keil Integrated Development and Debugging Environment that helps you quickly create and test embedded applications for ARM7, ARM9, Cortex-M3, C16x, ST10, XC16x, C251, and C51 embedded micro controllers. It combines all aspects of embedded project development including source code editing, project organization and management, revision control, make facility, target debugging, simulation, and Flash programming. Vision offers a significant advantage to new users and to developers who must get projects working quickly.
A51 Macro Assembler

The A51 Assembler is a macro assembler for the 8051 family of microcontrollers. It supports all 8051 derivatives. It translates symbolic assembly language mnemonics into relocatable object code where the utmost speed, small code size, and hardware control are critical. The A51 assembler translates assembler source files into a relocatable object modules. The DEBUG directive adds full symbolic information to the object module and supports debugging with the Vision Debugger or an in-circuit emulator.
In addition to object files, the A51 assembler generates list files which may optionally include symbol table and cross reference information.
C51 C Compiler
Compiler Details Compiler Directives Code Optimizer Memory Models Memory Types Pointers Interrupt Functions Library Reference The Keil C51 C Compiler for the 8051 microcontroller is the most popular 8051 C compiler in the world. It provides more features than any other 8051 C compiler available today. The C51 Compiler allows you to write 8051 microcontroller applications in C that, once compiled, have the efficiency and speed of assembly language. Language extensions in the C51 Compiler give you full access to all resources of the 8051. The C51 Compiler translates C source files into reloadable object modules which contain full symbolic information for debugging with the Vision Debugger or an in-circuit emulator. In addition to the object file, the compiler generates a listing file which may optionally include symbol table and cross reference information. FEATURES: Nine basic data types, including 32-bit IEEE floating-point,
Flexible variable allocation with bit, data, bdata, idata, xdata, and pdata memory types, Interrupt functions may be written in C, Full use of the 8051 register banks, Complete symbol and type information for source-level
debugging,
Built-in interface for the RTX51 Real-Time Kernel, Support for dual data pointers on Atmel, AMD, Cypress, Dallas Semiconductor, Infineon, Support for the Philips 8xC750, 8xC751, and 8xC752 limited instruction sets, Support for the Infineon 80C517 arithmetic unit.
Philips, and Triscend microcontrollers,
BL51 Code Banking Linker/Locator

The BL51 code banking linker/locator combines OMF51 object modules and creates executable 8051 programs. The linker resolves external and public references and assigns absolute or fixed addresses to reloadable program segments. The BL51 Linker processes object files created by the Keil C51 Compiler and A51 Assembler and the Intel PL/M-51 Compiler and ASM-51 Assembler. These object modules must adhere to the OMF51 object module specification. BL51 outputs an absolute OMF51 object module that may be loaded into practically any emulator, the Keil Vision Debugger, or the OH51 Object-HEX converter (to create an Intel HEX file).
OH51 Object-HEX Converter

The OH51 Object-HEX converter creates Intel HEX files from absolute OMF51 object modules. Absolute object files may be created by the following: The BL51 code banking linker. The A51 assembler. The OC51 banked object converter. Intel HEX files are ASCII files that contain a hexadecimal representation of your program. They may be easily loaded into a device programmer for writing EPROMs or other memory devices. Several utilities are available that may help you with your HEX files: HEX2BIN converts an Intel HEX file into a flat BINARY file.
BIN2HEX converts a flat BINARY file into an Intel HEX file. The following documents provide additional information about the different output file formats.
Description of the Intel OMF51 Object Module Format. Description of the Intel HEX File Format.
OC51 Banked Object Converter

The OC51 banked object file converter creates an absolute object module for each code bank in a banked object module. You do not need this utility unless you have created a code banking program using the BL51 code banking linker. When you create a code banking application, all symbolic and source-level information is maintained in the banked object module and is transferred by OC51 to each individual absolute object module for each code bank. Once you have used OC51 to create the absolute object modules, you may use OH51 to create an Intel HEX file for each code bank.
Why You Need A Simulator

We agree that you can probably create, test, and debug your embedded applications without a simulator. However, there are several reasons why a simulator (like the Vision Debugger) can make your engineering tasks easier and save you lots of development time. Customers with the simulator spend less time debugging simple program errors. The simulator lets them learn about things like on-chip peripherals and addressing modes without designing real hardware It is our experience that customers who have a simulator require LESS technical support and are able to get up-to-speed with the tools faster. The simulator makes it easy to write and test code and learn about programming your microcontroller.
The Vision Debugger provides complete simulation support for on-chip peripherals like PWM, Power saving modes, A/D, Serial I/O, and so on. It is easier for our support engineers to explain complex problems if you have a simulator.
It is easier to discover if a problem is in the hardware or software when you use a simulator. For example, if the application works in the simulator and if it works in the emulator, there's most likely a problem with the target hardware. The simulator requires no setup time. An emulator may require configuration and a target board before you can debug. The simulator is not a replacement for an emulator. A simulator is a different tool entirely. While an emulator allows you to debug software running on your target hardware, a simulator allows you to debug your software as well as your understanding of the microcontroller and the programming language. There are no real-time debugging effects of a simulator. For debugging embedded applications, we have a general list of favorite tools that we use in- house. Logic Probe Digital Multi-Meter High-speed Analog Oscilloscope High-speed Digital Storage Oscilloscope Logic Analyzer (with a disassembly pod) Emulator Software Simulator
4.2 Embedded C Features:

Memory Areas Memory Types Memory Models Memory Type Specifiers Variable Data Type Specifiers Bit Variables and Bit-addressable Data Special Function Registers Pointers Function Attributes
4.3 Memory Areas

The 8051 architecture supports several physically separate memory areas or memory spaces for program and data. Each memory area offers certain advantages and disadvantages. There are memory spaces that may be: _ read from but not written to. _ read from or written to ._ read from or written to more quickly than other memory spaces. This wide variety of memory space is quite different from most mainframe, minicomputer, and microcomputer architectures where the program, data, and constants are all loaded into the same physical memory space within the computer. Refer to the Intel 8-Bit Embedded Controllers handbook or other 8051 data books for more information about the 8051 memory architecture.
4.4 Code Memory

Program (CODE) memory is read only; it cannot be written to. Program memory may reside within the 8051 CPU, it may be external, or it may be both, depending upon the 8051 derivative and the hardware design. There may be up to 64 KBytes of program memory. Program
code, including all functions and library routines, is stored in program memory. Constant variables may also be stored in program memory. The 8051 executes programs stored in program memory only. Program memory may be accessed using the code memory type specifier in the Cx51 compiler.
Internal Data Memory

Internal data memory resides within the 8051 CPU and is read/write. Up to 256 bytes of internal data memory are available depending upon the 8051 derivative. The first 128 bytes of internal data memory are both directly and indirectly addressable. The upper 128 bytes of data memory (from 0x80 to 0xFF) can be addressed only indirectly. There is also a 16 byte area starting at 20h that is bit-addressable. Access to internal data memory is very fast because it can be accessed using an 8-bit address. However, internal data memory is limited to a maximum of 256 bytes. Internal data can be broken down into three distinct memory types: data, I data, and b data. The data memory specified always refers to the first 128 bytes of internal data memory. Variables stored here are accessed using direct addressing. The I data memory specified refers to all 256 bytes of internal data memory; however, this memory type specified code is generated by indirect addressing which is slower than direct addressing. The b data memory specified refers to the 16 bytes of bit-addressable memory in the internal data area (20h to 2Fh). This memory type specified allows you to declare data types that can also be accessed at the bit.
External Data Memory

External data memory is read/write. Access to external data is slower than access to internal data memory because the external data memory is indirectly accessed through a data pointer register which must be loaded with an address. Several 8051 devices provide on-chip XRAM space that is accessed with the same instructions as the traditional external data space. This XRAM space is typically enabled via dedicated chip configuration SFR registers and
overlaps the external memory space. There may be up to 64 KBytes of external data memory; though, this address space does not necessarily have to be used as memory. The Cx51 Compiler offers two different memory types that access external data: xdata and pdata. The xdata memory specifier refers to any location in the 64 KByte address space of external data memory. The pdata memory type specifier refers to only one (1) page or 256 bytes of external data memory. See Compact Model on page 95 for more information on pdata.
Special Function Register Memory

The 8051 provides 128 bytes of memory for Special Function Registers (SFRs). SFRs are bit, byte, or word-sized registers that are used to control timers, counters, serial I/O, port I/O, and peripherals.
4.5
Dumping steps:
Initially before connecting the program dumper to the microcontroller kit the window is
appeared as shown below.
Fig 4.5.1.: Picture of program dumper window
Select Tools option and click on Check Communication for establishing a connection as shown in below window
Fig 4.5.2: Picture of checking communications before dumping Program into microcontroller
After connecting the dumper properly to the microcontroller kit the window is appeared as shown below.
Fig 4.5.3: Picture after connecting the dumper to microcontroller
Again by selecting the Tools option and clicking on Check Communication the
microcontroller gets recognized by the dumper and hence the window is as shown below.
61
Fig 4.5.4: Picture of dumper recognition to microcontroller
Import the program which is .hex file from the saved location by selecting File option
Fig 4.5.5: Picture of program importing into the microcontroller
After clicking on Import Hex option we need to browse the location of our program and
click the prog.hex and click on open for dumping the program into the microcontroller.
Fig 4.5.6: Picture of program browsing which is to be dumped
After the successful dumping of program the window is as shown below.

66
Fig 4.5.7: Picture after program dumped into the microcontroller
CHAPTER 5 CODING
CHAPTER 6 RESULT
The project AERONAUTICAL CRASH PREVENTION THROUGH RF
COMMUNICATION SYSTEM was designed to operate a toll gate using RF remote.

Also, the total vehicle count is displayed on LCD. The project has been executed successfully.
CHAPTER 7
7.1CONCLUSION:
Integrating features of all the hardware components used have been developed in it. Presence of every module has been reasoned out and placed carefully, thus contributing to the best working of the unit. Secondly, using highly advanced ICs with the help of growing technology, the project has been successfully implemented. Thus the project has been successfully designed and tested.
7.2 FUTURE SCOPE:

Our project RF based toll gate with vehicle counter is mainly intended to to operate a toll gate using RF remote. Also, the total vehicle count is displayed on LCD. This operation is performed through an intelligent device called Microcontroller. The main drawback of this system is it uses wireless RF communication which gives the communication only for limited distance. Zigbee can be used to increase the distance.
CHAPTER 8
BIBLIOGRAPHY:
1. 2. 3.
WWW.ATMEL.DATABOOK.COM WWW.KEIL.COM WWW.WIKIPEDIA.COM
CHAPTER 9
REFERENCES:
Microcontrollers Architecture, Programming, Interfacing and System Design. BY: - Raj kamal
Embedded system BY: - Mazda and Mazidi
PCB Design Tutorial BY:- David.L.Jones.
PIC Microcontroller Manual BY:-Microchip..
Embedded C BY:-Michael.J.Pont.

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AERONAUTICAL CRASH PREVENTION THROUGH RF COMMUNICATION SYSTEM

How powerful are embedded processors

SPHOORTHY ENGINEERING COLLEGE 1

AERONAUTICAL CRASH PREVENTION THROUGH RF COMMUNICATION SYSTEM

what programming languages are used

Embedded Application Program

Assembler Re entrant library Run time kernel Linker

Fig. Embedded Application Program

SPHOORTHY ENGINEERING COLLEGE 2

AERONAUTICAL CRASH PREVENTION THROUGH RF COMMUNICATION SYSTEM

AERONAUTICAL CRASH PREVENTION THROUGH RF COMMUNICATION SYSTEM

Host and Target Machines

HOST MACHINE Cross Assemblers

Linker/Locators for Embedded Software

AERONAUTICAL CRASH PREVENTION THROUGH RF COMMUNICATION SYSTEM

EC Files(.C) Cross Compiler . Ob j Link er Locat or

SPHOORTHY ENGINEERING COLLEGE 5

AERONAUTICAL CRASH PREVENTION THROUGH RF COMMUNICATION SYSTEM

Fig. 1.1 Cross Compilers

Embedded Design Methodology

SPHOORTHY ENGINEERING COLLEGE 6

AERONAUTICAL CRASH PREVENTION THROUGH RF COMMUNICATION SYSTEM

1.3 Schematic Diagram:

SPHOORTHY ENGINEERING COLLEGE 7

AERONAUTICAL CRASH PREVENTION THROUGH RF COMMUNICATION SYSTEM

Fig:1.2.1 Schematic diagram

SPHOORTHY ENGINEERING COLLEGE 8

AERONAUTICAL CRASH PREVENTION THROUGH RF COMMUNICATION SYSTEM

CHAPTER 2 EMBEDDED MICROCONTROLLER AND HARDWARE

AERONAUTICAL CRASH PREVENTION THROUGH RF COMMUNICATION SYSTEM

2.2 The Major Features of 89C52 Microcontroller

Fig:2.2 block diagram of 89C52

AERONAUTICAL CRASH PREVENTION THROUGH RF COMMUNICATION SYSTEM

AERONAUTICAL CRASH PREVENTION THROUGH RF COMMUNICATION SYSTEM

2.3 PIN DIAGRAM OF AT 89C52

SPHOORTHY ENGINEERING COLLEGE 12

AERONAUTICAL CRASH PREVENTION THROUGH RF COMMUNICATION SYSTEM

AERONAUTICAL CRASH PREVENTION THROUGH RF COMMUNICATION SYSTEM

SPHOORTHY ENGINEERING COLLEGE 14

AERONAUTICAL CRASH PREVENTION THROUGH RF COMMUNICATION SYSTEM

SPHOORTHY ENGINEERING COLLEGE 15

AERONAUTICAL CRASH PREVENTION THROUGH RF COMMUNICATION SYSTEM

AT89C52 MICROCONTROLLER ARCHITECTURE

1. Four register banks, each containing eight registers

3. Eighty bytes of general- purpose data memory

AT89C52 FAMILY INSTRUCTION SET

2.4 Basic Components of Embedded System

AERONAUTICAL CRASH PREVENTION THROUGH RF COMMUNICATION SYSTEM

Embedded Hardware, Embedded Software/Firmware, RTOS or Real Time Kernel

Input drivers interface

Switches/Sens ors LCD

Appl icati on speci fic Hard war e

Output driver interface

Fig. 2.3 Basic Embedded Components

2.5 Addressing Modes

AERONAUTICAL CRASH PREVENTION THROUGH RF COMMUNICATION SYSTEM

AERONAUTICAL CRASH PREVENTION THROUGH RF COMMUNICATION SYSTEM

2.6 MEMORY MODELS MEMORY ORGANIZATION

AERONAUTICAL CRASH PREVENTION THROUGH RF COMMUNICATION SYSTEM

AERONAUTICAL CRASH PREVENTION THROUGH RF COMMUNICATION SYSTEM

Fig 2.7 80C51 Block Diagram

SPHOORTHY ENGINEERING COLLEGE 21