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A Power Quality Compensator With DG Interface Capability Using Repetitive Control

Xin Tang, K. M. Tsang, and W. L. Chan
AbstractThis paper presented an expandable grid-connected power quality compensator with distribution generation interface for three-phase three-wire system. The proposed system not only can control the active power ow, but also mitigate load unbalance, harmonics, and manage reactive power. The power quality compensator can simultaneously perform the two functions of power control station and active power lter or either one. To make the system more exible, the grid current, instead of output current of the converter, is shaped to be a sinusoidal current in phase with the grid voltage. The reference currents are generated by multiplying the voltage loop controller output by the corresponding grid voltage waveforms. Consequently, harmonic analysis or dq transformation, as required in the conventional design, is not necessary. In this manner, controlling the dc voltage level is equivalent to performing an active power balance for the whole system. As a result, no additional hardware and interface are required. Experimental results veried the effectiveness of the proposed method. Index TermsActive power lter (APF), distributed generation (DG), unied control.

Fig. 1.

Typical three-phase grid-connected DG interface.

I. INTRODUCTION

NCREASING use of nonlinear loads has resulted in serious problems of harmonics and reactive power in electrical energy distribution networks. Generally, current harmonics increase losses in ac power lines, transformers, and rotating machines. Furthermore, harmonics and voltage imbalance cause oscillatory torque leading to mechanical stress and malfunctions in sensitive equipment. Reactive current also increases distribution system losses, and could cause large amplitude variations in load-side (customer) voltage. Active power lters (APF) as a solution of power quality problems, hence, have been successfully developed [1], [2]. Interest in renewable energy is increasing due to concerns about global warming, air quality, and sustainability. It is expected that distributed generation (DG) from, for instance, wind energy, photovoltaic, fuel cells, etc., will grow in the coming years as a consequence of the heightened awareness of environmental issues in combination with the restructuring of the elec-

Manuscript received January 4, 2010; revised April 4, 2010, and March 17, 2011; accepted January 5, 2012. Date of publication February 10, 2012; date of current version May 18, 2012. Paper no. TEC-00002-2010. X. Tang is with the Department of Electrical Engineering, Changsha University of Science and Technology, Changsha 410076, China (e-mail: tangxin_csu@163.com). K. M. Tsang and W. L. Chan are with the Department of Electrical Engineering, The Hong Kong Polytechnic University, Kowloon, Hong Kong (e-mail: steve.tsang@polyu.edu.hk; eewlchan@polyu.edu.hk). Color versions of one or more of the gures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identier 10.1109/TEC.2012.2183874

tric industry. A typical three-phase three-wire grid-connected DG interface is shown in Fig. 1, where v sn (t) and isn (t) (n = a, b, c) are the grid voltage and current, respectively, and iUn (t) (n = a, b, c) is the output current. Conventional DGs based on renewable energy sources require a power electronic converter to interface with the utility grid because the generated power is dc or has an ac frequency that is either nonconstant or higher than the grid frequency [3]. If local inverters supply the bulk of the local real power demand without supplying reactive and harmonic current, an unreasonable burden is placed on the network operator [4]. Recently, a trend has been to integrate the DG units with the APF capability. Two independent controllers have been designed for DG interface [5] wherein the PV system can act as a solar power generator on sunny days and an APF on rainy days. Based on local measurement and agent-based communication, the power electronic converters were designed to provide nonactive power in addition to active power supply in order to compensate distorted currents [6]. Using adaptive neural ltering for harmonic analysis, a single-phase DG system with active power ltering capability was devised for utility current harmonic compensation [7]. A Z-source inverter-based exible DG system was designed to improve grid power quality [8]. The unied power quality conditioner is combined with DG to compensate voltage sag and swell, voltage interruption, harmonics, and reactive power [9]. Various unbalance compensation solutions have been proposed. A synchronous reference frame (SRF) proportional integral (PI) controller on the positive-sequence component of the inverter voltage has been presented in [10]. The integration of a positive- and negative-sequence SRF-PI controller of inverter output voltage has been proposed in [11]. The negative-sequence current compensation with a shunt converter has been presented

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in [12] and [13], and that with a series converter has been introduced in [14]. A cooperative imbalance compensation method for DG interface converters is designed by negative-sequence reactive power calculation [15]. Based on adaptive linear neuron control, the DG interface is utilized to not only control the active power ow, but also to mitigate load unbalance and harmonics, and to manage the reactive power of the system [16]. In this paper, a unied control method is proposed for a simple three-phase DG interface with a series diode for preventing power reversal to transmit active power, mitigate load unbalance and harmonics, and compensate reactive power. The DG can simultaneously perform the two functions of power station and APF or either one. The overall design is composed of the outer voltage loop and the inner current loops. The dc voltage is controlled to balance active power of the whole system. To achieve a high power factor and low distortion and to balance the load, the grid currents, not the output current of the DG interface in the aforementioned methods, are controlled to be balanced sinusoidal currents in phase with the grid voltages using the repetitive control algorithm. In addition, the reference currents are generated in multiplying the voltage loop controller output by the corresponding grid voltage waveforms, whereas positiveand negative-sequence harmonics of load current obtained via frequency analysis or dq transformation in the conventional design are not required. As a result, no additional hardware and interface are required. The novelty of proposed system is simplicity and scalable. Neither time consuming advanced signal processing algorithm nor complex dq transformation, which could be quite costly to implement, is required. The system could easily be scaled up by adding more modules. The experimental results will be present to verify the excellent performance of the proposed method. II. CONTROLLER STRUCTURE The proposed controller is shown in Fig. 2, where v sx (t) and isx (t) (x = a, b) are the grid voltage and current, respectively, and ir x (t) (x = a, b) is the reference current. The inner loop consists of two separate current control loops. Its function is to shape the grid currents into sinusoidal currents in phase with the grid voltage waveforms. Technically, only one phase-locked loop (PLL) is needed and the other current reference signal could be generated from phase shift network. In this paper, the same hardware circuit design was employed for both phases and hence two PLLs are needed. The third current is controlled by the Kirchhoff current law as it is a three-wire system. To this end, two current sensors are placed at the grid terminals and these currents are used as the feedback signals in the corresponding current control loops. It is worth mentioning that current sensor is not required at the load terminal or at the lter inductor. In this case, the load current is seen as a disturbance signal for the grid current control loop. If the current control loops are properly designed to attenuate their disturbance in a sufciently large frequency band, the performance specication will be achieved in spite of the disturbance phase characteristic. The outer control loop is the voltage control loop. Its main function is to maintain the dc bus voltage close to the reference

Fig. 2.

Controller structure.

value. Since the inner current loop controls the grid current and its reference is the output of the voltage controller multiplied by a sinusoidal carrier signal in phase with the corresponding grid voltage, it is not necessary to calculate the unbalanced harmonics component and the reactive power component of the load current. In this manner, controlling the dc voltage level is equivalent to performing an active power balance for the whole system. When the DG source injects active power to the dc capacitor C, it will accumulate the dc voltage level, while the DG interface will maintain the voltage level by transmitting the active power to the grid. On the contrary, when there is no DG source, the DG interface will maintain the voltage level by absorbing power from the grid for acting as an APF. III. CURRENT CONTROL LOOP If the reference signal is a periodic signal, conventional PI is difcult to track the waveform of the input reference and to eliminate the effects of the disturbance. Repetitive control [17], which is originated from the internal model principle, provides a solution to eliminate periodic error occurred in dynamic systems. A repetitive controller can be viewed as a periodic waveform generator, augmented within the control loop of a control system, i.e., a closed loop regulated by a feedback controller, so that the periodic error can be eliminated. In this paper, a repetitive controller is designed to track the reference current and eliminate the effect of the grid voltage and the load current. The block diagram representation of the current loop control is shown in Fig. 3, where Gi (s) = KPW M /(1 + p s) is the transfer function of the converter.

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Fig. 3.

Block diagram of current control loop.

Fig. 4. Magnitudefrequency characteristics of the sensitivity function and the low-pass lter.

Fig. 5.

Block diagram of voltage control loop. TABLE I CIRCUIT PARAMETERS OF THE EXPERIMENTAL SETUP

Fig. 6. Performance of the DG interface with no local nonlinear load at VD G = 340 V. (a) Waveforms (channel 1: the A-phase grid voltage; channel 2: the A-phase grid current; channel 3: the B-phase grid current; channel 4: the dc voltage). (b) Spectrum of the A-phase grid current. (c) Spectrum of the B-phase grid current.

The transfer function of the repetitive controller is written as follows: Kq (s)e Ur x (s) = Ecx (s) 1 Kq (s)esT d
sT d

where x = a, b, Td is the period of the grid supply frequency, and Kq (s) is the transfer function of a low-pass lter. If Kq (s) = 1, the transfer function of (1) will have innity gain at integer multiple of the grid supply frequency, and higher harmonics appearing in iL a (t) and iL b (t) can therefore be fully attenuated by the current control loop. To minimize the HF switching effect to appear in the repetitive controller, Kq (s) is chosen as a lowpass lter to improve the stability of the close-loop system, and the bandwidth of the lter has to be sufciently wide enough to cover the harmonics concerned. The characteristic equation of the current closed-loop system is given by 1 + GO (s) Kq (s)esT d = 0 where GO (s) = Gi (s)/Ls. (2)

(1)

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Fig. 7. Local nonlinear load. (a) Waveforms (channel 1: the A-phase grid voltage; channel 2: the A-phase grid current; channel 3: the B-phase grid current; channel 4: the dc voltage). (b) Spectrum of the A-phase grid current. (c) Spectrum of the B-phase grid current.

Fig. 8. Performance of the DG interface with a local nonlinear load at VD G = 0 V. (a) Waveforms (channel 1: the A-phase grid voltage; channel 2: the A-phase grid current; channel 3: the B-phase grid current; channel 4: the dc voltage). (b) Spectrum of the A-phase grid current. (c) Spectrum of the B-phase grid current.

Dene the regeneration spectrum as follows: R(w) = |Kq (jw)SO (jw)| (3) The magnitudefrequency characteristics of SO (s), which satisfy SO (s) = Ms and |SO (jws )| = 1, are also shown in Fig. 4. From (3), the Kq (s) is designed as follows: |Kq (jws )| = 1 1 < (1 + jws q ) Ms (5)

where SO (jw) = 1/(1 + GO (jw)) is the sensitivity function of the original unity feedback system. It is easy to ensure that 1 + GO (s) = 0 has no zeros on the right half of the s plane by adjusting the constant KPW M . Based on the above condition, if R(w) < 1 for all w, the closed-loop system of Fig. 4 is stable for all values of Td . The effect of the free design parameter of Kq (s) on the stability of the repetitive control system is clearly illustrated by (3). Let Kq (s) be a rst-order lter with the form 1 Kq (s) = (1 + q s) (4)

and the time constant q has to be small enough to allow higher harmonics concerned to pass through. IV. VOLTAGE CONTROL LOOP It is known that the whole system is always keeping active power balance, i.e., PS (t) = PL (t) + PU (t) (6)

and its magnitudefrequency characteristics, which satisfy Kq (s) 1, are shown in Fig. 4.

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Fig. 10. Dynamic performance of the DG interface for VD G changing (channel 1: the A-phase grid voltage; channel 2: the A-phase grid current; channel 3: the B-phase grid current; channel 4: the dc voltage).

Fig. 9. Performance of the DG interface with a local nonlinear load at VD G = 360 V. (a) Waveforms (channel 1: the A-phase grid voltage; channel 2: the A-phase grid current; channel 3: the B-phase grid current; channel 4: the dc voltage). (b) Spectrum of the A-phase grid current. (c) Spectrum of the B-phase grid current.

Fig. 11. Dynamic performance of the DG interface for starting (channel 1: the A-phase grid voltage; channel 2: the A-phase grid current; channel 3: the B-phase grid current; channel 4: the dc voltage).

Neglecting the power loss of the DG interface, the change quantity vd of the capacitor C is determined by where PS (t), PL (t), and PU (t) are active power of the grid, the load, and the DG interface, respectively. Assuming that the grid current isx (t) can track the reference signal ir x (t), then iS a (t) = ir a (t) = w(t) sin(t) (7) 1 1 C(Vr + vd (t))2 CVr2 2 2 0 (9) where PD G(t) is the power of the DG source and Vr is the dc reference voltage. 2 Using Laplace transform and neglecting the term vd (t), (9) is rewritten as follows: (PU (t) + PDG (t))dt = vd (s) = (PU (s) + PDG (s)) . sCVr (10)
t

where w(t) is the output of the voltage loop controller, which governs the magnitude of the reference grid current. Therefore, the active power of the grid is written as follows: PS (t) = 3VS a IS a = 3w(t)VS a 2 (8)

The block diagram of the voltage loop is shown in Fig. 5, where Gv (s) = 1/sCVr . Consider a PI controller of the form GcV (s) = KP + KI . s (11)

where VS a and IS a are therms value of the grid voltage and the grid current, respectively.

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The voltage loop characteristic equation is given by (s) = CVr s2 + 3VS KI 3VS KP s+ 2 2 (12)

with the undamped natural frequency n = 3V K S I 2CVr (13)

and the damping ratio is governed by 3VS KP 2n = 2CVr or 3VS KP . = 2 2CVr n (14)

As the reference currents ir a (t) and ir b (t) are derived from the voltage loop PI controller output w(t) and the phase lock loop, a smooth output w(t) is required in order to reduce higher harmonics appear in the reference currents ir a (t) and ir b (t). If the bandwidth of the voltage loop is set to be very much lower than the grid supply frequency, the disturbance effects of PL (t) and PDG (t) appear on w(t) will substantially be attenuated by the voltage control loop above the grid supply frequency. If the bandwidth of the voltage loop is set to 1/n times the supply frequency fv , the integral gain KI becomes (2fv )2 2CVr . (15) KI = n2 3VS If the damping ratio of the voltage loop is set to one, the proportional gain KP becomes 4fv 2CVr KP = . (16) 3nVS V. EXPERIMENTAL RESULTS To verify the effectiveness of the proposed method, an experimental setup was built and was tested under different conditions. The dc bus voltage has to be larger than the peak of the lineto-line grid voltage, at the same time, it must be lower than the DG voltage VDG , and then the dc voltage Vr was set to 310 V. The other parameters of the circuit are listed in Table I. A threephase rectier fed a resistor in series with capacitor used as the nonlinear load and another resistor connected between A- and C-phase used as the unbalanced load. With q = 0.06 ms, the bandwidth of Kq (s) is around 2.65 kHz, which means that the interface can handle up to 53 harmonics. With n = 10, the bandwidth of the voltage control loop is 5 Hz. To demonstrate the proposed system as a power control station, an experiment was conducted. Fig. 6 shows performance of the DG interface with no local nonlinear load at VDG = 340 V. The spectrum was obtained from Fluke 41B. It can be seen that the three-phase grid currents were sinusoidal and in phase with the grid voltages. The grid current produced an almost-unity power factor of 0.99, and its total harmonic distortion (THD) was about 3.93%. In order to illustrate the load balancing and harmonic compensation capability of the

proposed system as an APF, an experiment with unbalanced nonlinear loads and no DG was conducted. Fig. 7 shows the waveform and spectrum of local nonlinear load currents. The three-phase load currents were unbalanced. The A-phase current THD was 37.3% and the power factor was 0.83. The B-phase current THD was 51.6% and the power factor was 0.74. Fig. 8 shows performance of the DG interface as an APF. It can be seen that the high-order harmonics had clearly been reduced and the three-phase unbalance was mitigated. The three-phase current THDs were all lower than 6.7% and the power factor of overall system was 0.98. To demonstrate the DG interface with dual functions, another experiment was conducted. Fig. 9 shows performance of the DG interface with a local nonlinear load at VDG = 360 V. It can be seen that the DG interface effectively performed dual functions. The three-phase current THDs were all lower than 7.0% and the power factor of overall system was 0.98. To demonstrate the dynamic response of the proposed system, the VDG was changed from 320 to 340 V and there was no local load. Fig. 10 shows the grid current and the dc voltage during the transition. It took around 0.16 s for the grid currents to settle down. Furthermore, Fig. 11 shows the grid currents and the dc voltage while the DG interface was engaged at VDG = 360 V. The grid currents have been reversed and it took around 0.2 s for the grid currents to settle down. VI. CONCLUSION A novel unied control method for the DG interface is proposed in this paper. The proposed method allows the utilization of DG to generate active power, eliminates harmonics, compensates reactive power, and mitigates load unbalance. Therefore, its multifunctional behavior replaces the need for other power electronics compensators such as DSTATCOM and APF to enhance the performance of the distribution networks. In this manner, controlling the dc voltage level can be equivalent to performing an active power balance for the whole system. The reference currents are generated in multiplying the voltage loop controller output by the corresponding grid voltage waveform, and the harmonic analysis as required in the conventional design is not necessary. As a result, the proposed method is simple and can be easily implemented. REFERENCES
[1] K. M. Tsang and W. L. Chan, Design of single phase active power lter using analogue cascade controller, IEE Proc. Electr. Power Appl., vol. 153, no. 5, pp. 735741, Sept. 2006. [2] S. A. Gonzalez, R. Garcia-Retegui, and M. Benedetti, Harmonic computation technique suitable for active power lters, IEEE Trans. Ind. Electron., vol. 54, no. 5, pp. 27912796, Oct. 2007. [3] J. M. Carrasco, L. G. Franquelo, and J. T. Bialasiewicz, Power-electronic systems for the grid integration of renewable energy sources: A survey, IEEE Trans. Ind. Electron., vol. 53, no. 4, pp. 10021016, Aug. 2006. [4] F. Blaabjerg, R. Teodorescu, M. Liserre, and A. V. Timbus, Overview of control and grid synchronization for distributed power generation systems, IEEE Trans. Ind. Electron., vol. 53, no. 5, pp. 13981409, Oct. 2006. [5] Y.-C. Kuo, T.-J. Liang, and J.-F. Chen, A high-efciency single-phase three-wire photovoltaic energy conversion system, IEEE Trans. Ind. Electron., vol. 50, no. 1, pp. 116122, Feb. 2003.

TANG et al.: POWER QUALITY COMPENSATOR WITH DG INTERFACE CAPABILITY USING REPETITIVE CONTROL

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[6] K. J. P. Macken, K. Vanthournout, and J. Van deneybus, Distributed control of renewable generation units with integrated active lter, IEEE Trans. Power Electron., vol. 19, no. 5, pp. 13531360, Sept. 2004. [7] M. Cirrincione, M. Pucci, and G. Vitale, A single-phase DG generation unit with shunt active power lter capability by adaptive neural ltering, IEEE Trans. Ind. Electron., vol. 55, no. 5, pp. 20932110, May 2008. [8] C. J. Gajanayake, D. M. Vilathgamuwa, P. C. Loh, R. Teodorescu, and F. Blaabjerg, Z-source-inverter-based exible distributed generation system solution for grid power quality improvement, IEEE Trans. Energy. Convers., vol. 24, no. 3, pp. 695704, Sept. 2009. [9] B. Han, B. Bae, H. Kim, and S. Baek, Combined operation of unied power-quality conditioner with distributed generation, IEEE Trans. Power Deliver., vol. 21, no. 1, pp. 330338, Jan. 2006. [10] M. Illindala and G. Venkataramanan, Control of distributed generation systems to mitigate load and line imbalances, in Proc. 33rd Annu. IEEE Power Electron. Spec. Conf., 2002, pp. 20132018. [11] P. Hsu and M. Behnke, A three-phase synchronous frame controller for unbalanced load, in Proc. 29th Annu. IEEE Power Electron. Spec. Conf., 1998, pp. 13691374. [12] Y. Li, D. M. Vilathgamuwa, and L. P. Chiang, Microgrid power quality enhancement using a three-phase four-wire grid-interfacing compensator, IEEE Trans. Ind. Appl., vol. 41, no. 6, pp. 17071719, Nov./Dec. 2005. [13] H. S. Song and K. H. Nam, Dual current control scheme for PWM converter under unbalanced input voltage conditions, IEEE Trans. Ind. Electron., vol. 46, no. 5, pp. 953959, Oct. 1999. [14] W. C. Lee, T. K. Lee, and D. S. Hyun, A three-phase parallel active power lter operating with PCC voltage compensation with consideration for an unbalanced load, IEEE Trans. Power Electron., vol. 17, no. 5, pp. 807814, Sept. 2002. [15] P.-T. Cheng, C.-A. Chen, T.-L. Lee, and S.-Y. Kuo, A cooperative imbalance compensation method for distributed-generation interface converters, IEEE Trans. Ind. Appl., vol. 45, no. 2, pp. 805815, Mar./Apr. 2009. [16] M. I. Marei, E. F. El-Saadany, and M. M. A. Salama, A novel control algorithm for the DG interface to mitigate power quality problems, IEEE Trans. Power. Deliver., vol. 19, no. 3, pp. 13841392, Jul. 2004. [17] M.-C. Tsai and W.-S. Yao, Design of a plug-in type repetitive controller for periodic inputs, IEEE Trans. Control Syst. Technol., vol. 10, no. 4, pp. 547555, Jul. 2002.

Xin Tang received the M.S. and Ph.D. degrees in control engineering from the Central South University, Changsha, China, in 2001 and 2005, respectively. He is currently an Associate Professor in the Department of Electrical Engineering, Changsha University of Science and Technology, Changsha. His research interests include power electronics applications in power system and DSP-based control system.

K. M. Tsang received the B.Eng. and Ph.D. degrees in control engineering from the University of Shefeld, Shefeld, U.K., in 1985 and 1988, respectively. He is currently an Associate Professor in the Department of Electrical Engineering, The Hong Kong Polytechnic University, Kowloon, Hong Kong. His research interests include system identication, adaptive control, and pattern recognition.

W. L. Chan received the B.Sc.(Eng.) and M.Phil. degrees from the University of Hong Kong, Pokfulam, Hong Kong, in 1988 and 1993, respectively, and the Ph.D. degree from City University London, London, U.K., in 2000. He is currently an Associate Professor in the Department of Electrical Engineering, The Hong Kong Polytechnic University, Kowloon, Hong Kong. His major research interests include microprocessor applications, and applications of articial intelligence in electrical engineering.