ABSTRACT

This project focuses on hysteresis modulation for multilevel inverters. Now a days hysteresis modulation for power electronic converters is attractive in many different applications because of its unmatched dynamic response and wide commandtracking bandwidth. Multilevel converters have been broadly used in high power applications. They have more attraction due to reduction of harmonic contents and voltage stress in power electronic applications. Switching of power electronic devices is controlled in multilevel inverters to synthesis a desired output waveform using several levels of voltage and a pulse-width modulation technique. An alternative way to regulate current through a multilevel inverter is to use hysteresis comparison to determine the switching instants of each phase leg. As with all hysteresis systems, this approach would be expected to have a fast dynamic response and a continuous spread harmonic spectrum. Various strategies are available also to vary the hysteresis band to narrow the switching frequency range for applications where this is desirable. However, in all cases, by comparing a reference and a load current, the current controller generates switching states for the power electronic devices, which decreases the current error back towards zero once it exceeds certain bounding limits. The switching frequencies of high-power converters are limited by the switching losses. A smaller hysteresis band also leads to a high switching frequency. And it also gives fast dynamic performance and accurate tracking characteristics.

LIST OF FIGURES
Page No. Fig. 2.1 Fig. 2.2 Single-phase structure of a multilevel cascaded H-bridges inverter. Output phase voltage waveform of an 11-level cascade inverter with 5 separate dc sources. Fig. 2.3 Three-phase wye-connection structure for electric vehicle motor drive and battery charging. Fig. 2.4 Fig. 2.5 Fig. 2.6 Fig. 2.7 Three-phase six-level structure of a diode-clamped inverter. Three-phase six-level structure of a flying capacitor inverter. Generalized P2 multilevel converter topology for one phase leg. Mixed-level hybrid unit configuration using the three-level diode-clamped converter as the cascaded converter cell to increase the voltage levels. Fig. 3.1 Fig. 3.2 Block diagram of pulse width modulation Sinusoidal pulse width modulation waveforms a) sinusoidal and triangular signals b) switch S1 state c) switch S3 state d) ac output voltage Fig. 3.3 The three-phase VSI. Ideal waveforms for the SPWM (a) carrier and modulating signals; (b) switch S1 state; (c)switch S3 state; (d) ac output voltage; (e) ac output voltage spectrum; (f) ac output current; (g) dc current; (h) dc current spectrum; (i) switch S1 current; (j) diode D1 current. Fig. 4.1 Fig. 4.2 Fig. 4.3 Cascaded n-level inverter using N number of H-bridges. Multiband hysteresis modulation. (a) Five-level modulation (two cascaded H-bridges). (b) Multiband hysteresis modulation. 28 23 27 27 20 16 19 8 10 12 15 7 6

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Fig. 4.4

Time-domain representation of five-level hysteresis modulation, showing switching function, various bands, and five-level switching logic. 30

Fig. 4.5

Block diagram for a generalized n-level-inverter-controlled system using multiband hysteresis modulation. 33 34

Fig. 4.6 Fig. 4.7

Two-level hysteresis modulation. MB five-level hysteresis modulation. (a) Current error and hysteresis band plots. (b) Inverter output voltage.

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Fig. 4.8 Fig. 4.9

Three-level MOB hysteresis modulation. Five-level MOB hysteresis modulation.

Fig. 4.10 MMOB five-level hysteresis modulation. Fig. 4.11 TB five-level hysteresis current control. Fig. 4.12 Modified TB five-level hysteresis current control. Fig. 5.1 Fig. 5.2 Simulation Diagram. Transient performance of MB scheme. (a) Reference and measured load current. (b) Current error and hysteresis band plots. Fig. 5.3 Transient performance of MB scheme. (a) Inverter output voltage. (b) FFT Analysis. Fig. 5.4 MOB five-level hysteresis current control with fixed voltage applied at the band crossings of the current error. (a) Current error trajectory along with allotted bands. (b) Inverter switched output voltage. Fig. 5.5 Fig. 5.6 FFT analysis of MOB

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Transient performance of MMOB modulation. (a) Current error and hysteresis band plots. (b) Inverter output voltage. 54 55
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Fig. 5.7

FFT Analysis of MMOB.

Fig. 5.8

TB five-level hysteresis modulation. (a) Current error and the hysteresis band plots. (b) Inverter output voltage. 56 57

Fig. 5.9

FFT Analysis of TB.

Fig. 5.10 Modified TB five-level hysteresis current control. (a) Current error and hysteresis band plots. (b) Inverter switched output voltage. Fig. 5.11 FFT Analysis of MTB. 58 59

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LIST OF TABLES
Page No. Table 2.1 Diode-clamped six-level inverter voltage levels and corresponding switch states. Table 2.2 Flying-capacitor six-level inverter redundant voltage levels and corresponding switch states. Table 5.1 Comparison of Hysteresis modulation schemes. 13 60 69 10

Table A.1 Circuit parameters.

NOMENCLATURE

MHM MB MOB MMOB TB MTB m s SDCS NPC PWM SHE CBPWM VSI SPWM SVM HB IGBT FFT

Multi level hysteresis modulation Multi band Multi offset band Modified multi offset band Time based band Modified time based band Number of voltage sources Number of DC sources Separate DC source Neutral point clamped Pulse width modulation Selective harmonic analysis Carrier based pulse width modulation Voltage source inverter Sinusoidal pulse width modulation Space vector modulation Hysteresis band Insulated gate bipolar transistor Fast Fourier Transform

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