02-B Performance Event Reference

OptiX RTN 600 Radio Transmission System Maintenance Guide
B Performance Event Reference
Performance Event Reference
B.1 Performance Event List

The list is categorized based on the performance event type, and includes all the events of the OptiX RTN 600.
B.1.1 SDH Performance Event List

SDH performance events are classified into five categories: pointer justification, regenerator section error, multiplex section error, higher order path error and lower order path error. Table B-1 Pointer justification performance event list Event Name AUPJCHIGH AUPJCLOW AUPJCNEW TUPJCHIGH TUPJCLOW TUPJCNEW Description Count of positive AU pointer justification Count of negative AU pointer justification Count of new AU pointer justifications Count of positive TU pointer justifications Count of negative TU pointer justifications Count of new TU pointer justifications PO1 and PH1 Source SL1, SD1, SLE, SDE, IF1A, and IF1B
Table B-2 Regenerator section error performance event list Event Name RSBBE RSES RSSES Description Regenerator section block of background error Regenerator section errored second Regenerator section severely errored second Source SL1, SD1, SLE, SDE, IF1A, and IF1B
Issue 06 (2007-12-30)
Huawei Technologies Proprietary
B-1
Event Name RSUAS RSCSES RSOFS RSOOF
Description Regenerator section unavailable second Regenerator section consecutive severely errored second Regenerator section out-of-frame second Regenerator section out of frame
Source
Table B-3 Multiplex section error performance event list Event Name MSBBE MSES MSSES MSCSES MSUAS MSFEBBE MSFEES MSFESES MSFECSES MSFEUAS Description Multiplex section block of background error Multiplex section errored second Multiplex section severely errored second Multiplex section consecutive severely errored second Multiplex section unavailable second Multiplex section far end block of background error Multiplex section far end errored second Multiplex section far end severely errored second Multiplex section far end consecutive severely errored second Multiplex section far end unavailable second Source SL1, SD1, SLE, SDE, IF1A, and IF1B
Table B-4 Higher order path error performance event list Event Name HPBBE HPES HPSES HPCSES HPUAS HPFEBBE HPFEES HPFESES
B-2
Description Higher order path block of background error Higher order path errored second Higher order path severely errored second Higher order path consecutive severely errored second Higher order path unavailable second Higher order path far end block of background error Higher order path far end errored second Higher order path far end severely errored second
Source SL1, SD1, SLE, SDE, IF1A, and IF1B
Issue 06 (2007-12-30)
Event Name HPFECSES HPFEUAS
Description Higher order path far end consecutive severely errored second Higher order path far end unavailable second
Source
Table B-5 VC-3 path bit error performance event list Event Name VC3BBE VC3ES VC3SES VC3CSES VC3UAS VC3FEBBE VC3FEES VC3FESES VC3FECSES VC3FEUAS Description VC-3 background block error VC-3 errored second VC-3 severely errored second VC-3 consecutive severely errored second VC-3 unavailable second VC-3 far end block of the background error VC-3 far end errored second VC-3 far end severely errored second VC-3 far end consecutive severely errored second VC-3 far end unavailable second Source EFT4
Table B-6 Lower order path error performance event list Event Name LPBBE LPES LPSES LPCSES LPUAS LPFEBBE LPFEES Description Lower order path block of background error Lower order path errored second Lower order path severely errored second Lower order path consecutive severely errored second Lower order path unavailable second Lower order path far end block of background error Lower order path far end errored second Source PO1, PH1, and EFT4
Issue 06 (2007-12-30)
B-3
Event Name LPFESES LPFECSES LPFEUAS
Description Lower order far end severely errored second Lower order path far end consecutive severely errored second Lower order far end unavailable second
Source
B.1.2 Microwave Performance Event List

The microwave performance events contain events of the microwave power and the FEC. Table B-7 Microwave power performance event list Event Name TSL_MAX TSL_MIN TSL_CUR RSL_MAX RSL_MIN RSL_CUR Description Maximum value of microwave transmit signal level Minimum value of microwave transmit signal level Current value of microwave transmit signal level Maximum value of microwave receive signal level Minimum value of microwave receive signal level Current value of microwave receive signal level Source ODU
Table B-8 FEC performance event Event Name FEC_BEF_COR_ER FEC_COR_BYTE_CNT Description Bit error rate before FEC correction FEC corrected byte count Source IF1A and IF1B
B.1.3 Other Performance Event List

Besides the SDH and microwave performance events, the OptiX RTN 600 also supports performance events of the optical power and the board temperature. Table B-9 Optical power performance event list Event Name TPLMAX TPLMIN
B-4
Description Maximum value of transmit optical power Minimum value of transmit optical power
Source SD1 and SL1
Issue 06 (2007-12-30)
Event Name TPLCUR RPLMAX RPLMIN RPLCUR
Description Current value of receive optical power Maximum value of received optical power Minimum value of received optical power Current value of received optical power
Source
Table B-10 Board temperature performance event list Event Name BDTMPMAX BDTMPMIN BDTMPCUR Description Maximum board temperature Minimum board temperature Current board temperature Source IF1A, IF1B, PXC, EFT4, ODU, and SCC
B.2 Performance Events and Corrective Procedures

Based on the event type, this part describes all the performance events of the OptiX RTN 600 and the corrective procedures in details.
B.2.1 AUPJCHIGH, AUPJCLOW and AUPJCNEW

Performance Event Meaning
l l l
AUPJCHIGH stands for "Count of positive AU pointer justifications". AUPJCLOW stands for "Count of negative AU pointer justifications". AUPJCNEW stands for "Count of new AU pointer justifications".
Performance Event Attribute

Performance Event Attribute Performance event cell Description PPJE(AUPJCHIGH) NPJE(AUPJCLOW) NDF(AUPJCNEW) Unit Block
Impact on the System

Less than six AUPJCHIGH and AUPJCLOW events do not impact the system. If the pointer is justified for more than six times, or if even the AUPJCNEW occurs, bit errors might exist in the service.
Issue 06 (2007-12-30) Huawei Technologies Proprietary B-5
Relevant Alarms
When the AUPJCHIGH, AUPJCLOW and AUPJCNEW cross the preset threshold, the MSAD_CROSSTR alarm might occur.
Probable Causes
The NE clock is not synchronized.
Procedure
Refer to section 2.5 Troubleshooting Pointer Justifications. ----End
B.2.2 TUPJCHIGH, TUPJCLOW and TUPJCNEW

l l l
TUPJCHIGH stands for "Count of positive TU pointer justifications". TUPJCLOW stands for "Count of negative TU pointer justifications". TUPJCNEW stands for "Count of new TU pointer justifications".

Performance Event Attribute Performance event cell Description TUPPJE(TUPJCHIGH) TUNPJE(TUPJCLOW) TUNDF(TUPJCNEW) Unit Block

Less than six TUPJCHIGH and TUPJCLOW do not impact the system. If the pointer is justified for more than six times, or if even the TUPJCNEW exists, bit errors might exist in the service.
Relevant Alarm
When the TUPJCHIGH, TUPJCLOW and TUPJCNEW cross the preset threshold, the HPAD_CROSSTR alarm occurs.
Probable Causes
The NE clock is not synchronized.
B-6
Issue 06 (2007-12-30)
Procedure
Refer to section 2.5 Troubleshooting Pointer Justifications. ----End
B.2.3 RSBBE, RSES, RSSES, RSCSES and RSUAS

l
RSBBE stands for "regenerator section background block error". The BBES are the errored blocks excluding those in the unavailable and severely errored seconds.
RSES stands for "regenerator section errored second". The ES is the second with one or more errored blocks. RSSES stands for "regenerator section severely errored second". The SES is the second in which more than 30% errored blocks or at least one severely disturbed period (SDP) exists. The SDP is the period during which the BER of all the consecutive blocks in a period of less than four consecutive blocks or 1ms (the longer period is applied) is equal to or higher than 102 or the signal is lost.
RSCSES stands for "regenerator section consecutive severely errored second". The CSES is the second in which the SES occurs in a consecutive mode and lasts for less than 10 seconds.
RSUAS stands for "regenerator section unavailable second". The UAS is a period of unavailable time that begins at the onset of ten CSESs. When SESs disappear for ten consecutive seconds, the available time begins from the eleventh second, with the previous ten seconds included.
NOTE
When the intermediate board works in the PDH mode, the performance events might also be reported. These events are detected through the self-defining overhead byte B1 of the PDH microwave frame.

Performance Event Attribute Performance event cell Unit Description B1CNT Block (RSBBE) Second(RSES, RSSES, RSCSES and RSUAS)

Too many bit errors can interrupt the service (the bit error rate needs to be less than 103 for the voice service, and 106 for the data service).
Relevant Alarm
When the RSBBE, RSES, RSSES, RSCSES and RSUAS events cross the preset threshold, the RS_CROSSTR alarm can occur.
Probable Causes
The system detects the RSBBE by the B1 byte.
Procedure
Refer to section 2.4 Troubleshooting Bit Errors. ----End
B.2.4 RSOOF and RSOFS

l
RSOOF stands for "Regenerator section out of frame". The OOF block is the data block in which incorrect A1 and A2 bytes are detected. RSOFS stands for "regenerator section out-of-frame second". The OFS second is a second in which one or more OOF blocks are detected.

Performance Event Attribute Performance event cell Unit Description OOF Block (RSOOF) Second (RSOFS)

The system discards OOF data blocks. Thus, an RSOOF event is like a big error (one RSOOF exists in a second, and the BER is not less than 1.25 x 105).
Relevant Alarms
If RSOOF is received in five consecutive frames, the equipment will enter the OOF state. If the OOF state lasts for 3 ms, the equipment will report the R_LOF alarm. As a result, all the services are interrupted.
Probable Causes
The system detects that the A1 and A2 bytes are incorrect.
B-8 Huawei Technologies Proprietary Issue 06 (2007-12-30)
Procedure
If the R_LOF alarms are reported at the same time, process the errors according to the alarms. Otherwise, refer to section 2.4 Troubleshooting Bit Errors . ----End
B.2.5 MSBBE, MSES, MSSES, MSCSES and MSUAS

l
MSBBE stands for "multiplex section background block error". The BBE is the errored blocks excluding those in the unavailable and severely errored seconds.
MSES stands for "multiplex section errored second". The ES is the second with one or more errored blocks. MSSES stands for "multiplex section severely errored second". The SES is the second in which more than 30% errored blocks or at least one severely disturbed period (SDP) exists. The SDP is the period during which the BER of all the consecutive blocks in a period of less than four consecutive blocks or 1ms (the longer period is applied) is equal to or higher than 102 or the signal is lost.
MSCSES stands for "multiplex section consecutive severely errored second". The CSES is the second in which the SESs occur in a consecutive mode and lasts for less than 10 seconds.
MSUAS stands for "multiplex section unavailable second". The UAS is a period of unavailable time that begins at the onset of ten CSESs. When SESs disappear for ten consecutive seconds, the available time begins from the eleventh second, with the previous ten seconds included.

Performance Event Attribute Performance event cell Unit Description B2CNT Block (MSBBE) Second(MSES, MSSES, MSCSES and MSUAS)

Relevant Alarm
When the MSBBE, MSES, MSSES, MSCSES and MSUAS cross the preset threshold, the MS_CROSSTR alarm can occur.
Probable Causes
The system detects the MSBBE by the B2 byte.
Procedure
B.2.6 MSFEBBE, MSFEES, MSFESES, MSFECSES and MSFEUAS

l
MSFEBBE stands for "multiplex section far end background block error". The FEBBE (far end background block error) indicates that the BBE occurs at the opposite end.
MSFEES stands for "multiplex section far end errored second". The FEES ( far end errored second) indicates that the ES occurs at the opposite end. MSFESES stands for "multiplex section far end severely errored second". The FESES (far end severely errored second) indicates that the SES occurs at the opposite end.
MSFECSES stands for "Multiplex section far end consecutive severely errored second". The FESES (far end consecutive severely errored second) indicates that the CSES occurs at the opposite end.
MSFEUAS stands for "multiplex section unavailable second". The FEUAS (far end unavailable second) indicates that the UAS occurs at the opposite end.

Performance Event Attribute Performance event cell Unit Description LFEBE Block (MSFEBBE) Second(MSFEES, MSFESES, MSFECSES and MSFEUAS)

Relevant Alarm
The MS_REI alarm occurs at the local end.
Probable Causes
The system detects the MSFEBBE by the M1 byte.
Procedure
Clear the corresponding event at the opposite end. ----End
B.2.7 HPBBE, HPES, HPSES, HPCSES and HPUAS

l
HPBBE stand for "Higher order path block of background error". BBE (background block error) the errored blocks excluding those in the unavailable and severely errored seconds.
HPES stands for "higher order path errored second". The ES (errored second) the second with one or more errored blocks. HPSES stands for "higher order path severely errored second". The SES is the second in which more than 30% errored blocks or at least one severely disturbed period (SDP) exists. The SDP is the period during which the BER of all the consecutive blocks in a period of less than four consecutive blocks or 1ms (the longer period is applied) is equal to or higher than 102 or the signal is lost.
HPCSES stands for "higher order path consecutive severely errored second". The CSES (consecutive severely errored second) is the second in which the SESs occur in a consecutive mode and lasts for less than 10 seconds.
HPUAS stands for "higher order path unavailable second". The UAS (unavailable second) is a period of unavailable time that begins at the onset of ten CSESs. When SESs disappear for ten consecutive seconds, the available time begins from the eleventh second, with the previous ten seconds included.

Performance Event Attribute Performance event cell Unit Description B3CNT Block (HPBBE) Second(HPES, HPSES, HPCSES and HPUAS)

Relevant Alarms
When the HPBBE, HPES, HPSES, HPCSES and HPUAS events cross the preset threshold, the HP_CROSSTR alarm can occur.
Probable Causes
The system detects higher order path bit errors by the B3 byte.
Procedure
B.2.8 HPFEBBE, HPFEES, HPFESES, HPFECSES and HPFEUAS

l
HPFEBBE stands for "higher order path far end background block error". The far end background block error (FEBBE) refers to the error detected at the remote end. HPFEES stands for "higher order path far end errored second". The far end errored second (FEES) refers to the ES detected at the remote end. HPFESES stands for "higher order path far end severely errored second". The far end severely errored second (FESES) refers to the SES detected at the remote end. HPFECSES stands for "higher order path far end consecutive severely errored second". The far end consecutive severely errored second (FESES) refers to the CSES detected at the remote end.
HPFEUAS stands for "higher order path unavailable second". The far end unavailable second (UAS) refers to the UAS detected at the remote end.

Performance Event Attribute Performance event cell Unit Description PFEBE Block (HPFEBBE) Second(HPFEES, HPFESES, HPFECSES and HPFEUAS)

A few bit errors cannot affect services. But if the bit errors are excessive (less than 103 for voice services and 106 for data services), the services can be interrupted.
Relevant Alarms
The HP_REI alarm occurs at the local node at the same time.
Probable Causes
The system detects the HPFEBBE by the bit 1 to bit 4 of the G1 byte.
Procedure
Clear the corresponding performance events at the opposite end. ----End
B.2.9 VC3BBE, VC3ES, VC3SES, VC3CSES, VC3UAS

l
VC3BBE stands for "VC-3 background block error". BBE is an errored block occurring outside the period of UAT and SES. VC3ES stands for "VC-3 errored second". An ES is a certain second with one or more errored blocks detected. VC3SES stands for "VC-3 severely errored second". An SES is a certain second which contains not less than 30% errored blocks or at least one serious disturbance period (SDP). The SDP is a period of at least four consecutive blocks or 1 ms (taking the longer one) where the error ratios of all the consecutive blocks are more than or equal to 10-2 or loss of signal occurs.
VC3CSES stands for "VC-3 consecutive severely errored second". CSES indicates that the SES events consecutively occur, but last less than 10 seconds. VC3UAS stands for "VC-3 unavailable second". A UAS period is counted from the first second of 10 consecutive severely errored seconds (SESs). These ten seconds is considered to be part of the unavailable time. A new available second period starts from the first second of ten consecutive non-SESs. These ten seconds is considered to be part of the available time.

Performance Event Attribute Performance event cell Unit Description B3CNT Block (VC3BBE) Second (VC3ES, VC3SES, VC3CSES, VC3UAS)
Issue 06 (2007-12-30)
B-13

A small number of bit errors do not affect the services. Too many bit errors, however, can interrupt the services (the bit error rate needs to be less than 10-3 for the voice service, and 10-6 for the data service).
Related Alarm
When the VC3BBE, VC3ES, VC3SES, VC3CSES, or VC3UAS performance event crosses the preset threshold, the LP_CROSSTR alarm can occur.
Probable Causes
The system detects the VC3BE by the B3 byte.
Procedure
B.2.10 VC3FEBBE, VC3FEES, VC3FESES, VC3FECSES, VC3FEUAS

l
VC3FEBBE stands for "VC-3 far end background block error". A VC3FEBBE indicates that a BBE event is detected at the far end. VC3FEES stands for "VC-3 far end errored second". An FEES indicates that an ES event is detected at the far end. VC3FESES stands for "VC-3 far end severely errored second". An FESES indicates that an SES event is detected at the far end. VC3FECSES stands for "VC-3 far end consecutive severely errored second". An FECSES indicates that a CSES event is detected at the far end. VC3FEUAS stands for "VC-3 far end unavailable second". An FEUAS indicates that a UAS event is detected at the far end.

Performance Event Attribute Performance event cell Unit Description VC3FEBE Block (VC3FEBBE) Second (VC3FEES, VC3FESES, VC3FECSES, VC3FEUAS)
B-14
Issue 06 (2007-12-30)

A small number of bit errors do not affect the services. Too many bit errors, however, can interrupt the services (the bit error rate needs to be less than 10-3 for the voice service, and 10-6 for the data service).
Related Alarm
At the same time, the LP_REI_VC3 alarm is reported at the local NE.
Probable Causes
The system detects the VC3FEBE by bits 14 of the G1 byte.
Procedure
Clear the corresponding performance events at the opposite NE. ----End
B.2.11 LPBBE, LPES, LPSES, LPCSES and LPUAS

l
LPBBE stands for "lower order path background block error". Background block errors (BBE) refer to the errored blocks excluding those in the unavailable and severely errored seconds.
LPES stands for "Lower order path errored second". The ES is the second with one or more errored blocks. LPSES stands for "lower order path severely errored second". The SES is the second in which more than 30% errored blocks or at least one severely disturbed period (SDP) exists. The SDP is the period during which the bit error rate of all the consecutive blocks in a period of less than four consecutive blocks or 1ms (the longer period is applied) is equal to or higher than 102 or the signal is lost.
LPCSES stands for "lower order path consecutive severely errored second". The consecutive severely errored second (CSES) is the second in which the SES occurs in a consecutive mode and lasts for less than 10 seconds.
LPUAS stands for "lower order path unavailable second". The unavailable second (UAS) is a period of unavailable time that begins at the onset of ten CSESs. When SESs disappear for ten consecutive seconds, the available time begins from the eleventh second, with the previous ten seconds included.

Performance Event Attribute Performance event cell
Issue 06 (2007-12-30)
Description LPBIP2CNT
B-15
Performance Event Attribute Unit
Description Block(LPBBE) Second(LPES, LPSES, LPCSES, LPUAS)

Too many bit errors can interrupt the service (the bit error rate needs to be less than 103 for the voice service, and 106 for the data service), the service can be interrupted.
Relevant Alarm
When the LPBBE, LPES, LPSES, LPCSES, and LPUAS events crosses the preset threshold, the LP_CROSSTR alarm can occur.
Probable Causes
The system detects the lower path bit errors by using the BIP2 of the V5 byte.
Procedure
B.2.12 LPFEBBE, LPFEES, LPFESES, LPFECSES and LPFEUAS

l
LPFEBBE stands for "lower order path far end background block error". The far end background block error (FEBBE) refers to the error detected at the remote end. LPFEES stands for "lower order path far end errored second". The far end errored second (FEES) refers to the ES detected at the remote end. LPFESES stands for "lower order path far end severely errored second". The far end severely errored second (FESES) refers to the SES detected at the opposite end.
LPFECSES stands for "lower order path far end consecutive severely errored second". The far end consecutive severely errored second (FESES) refers to the CSES detected at the remote end.
LPFEUAS stands for "lower order path unavailable second". The far end unavailable second (UAS) refers to the UAS detected at the remote end.

Performance Event Attribute Performance event cell
B-16 Huawei Technologies Proprietary
Description LPFEBE
Issue 06 (2007-12-30)
Performance Event Attribute Unit
Description Block (LPFEBBE) Second (LPFEES, LPFESES, LPFECSES, and LPFEUAS)

Relevant Alarm
If the performance event occurs on the PO1/PH1 board, the LP_REI alarm is generated at the local NE at the same time. If the performance event occurs on the EFT4 board, the LP_REI_VC12 alarm is generated at the local NE at the same time
Probable Causes
The system detects the LPFEBE by the bit 3 of the V5 byte.
Procedure
Clear the corresponding event at the opposite end. ----End
B.2.13 TSLMAX, TSLMIN and TSLCUR

l l l
TSLMAX stands for "maximum value of microwave transmit signal level". TSLMIN stands for "minimum value of microwave transmit signal level". TSLCUR stands for "current value of microwave transmit signal level".

Performance Event Attribute Performance event cell Unit Description TSL 0.1 dBm

When the microwave transmit power is too low or too high, the receive power at the opposite station will be too low or too high. Moreover, bit errors might occur and services might be interrupted.
Relevant Alarm
If the transmit power crosses the threshold, the RADIO_TSL_HIGH or RADIO_TSL_LOW alarm can occur.
B.2.14 RSLMAX, RSLMIN and RSLCUR

l l l
RSLMAX stands for "Maximum value of microwave receive signal level". RSLMIN stands for "Maximum value of microwave receive signal level". RSLCUR "Current value of microwave receive power".

Performance Event Attribute Performance event cell Unit Description RSL 0.1dBm

When the microwave receive power is overly low or overly high, bit errors might occur and the service might be interrupted.
Relevant Alarm
If the receive power crosses the threshold, the RADIO_RSL_HIGH or RADIO_RSL_LOW alarm occurs.
B.2.15 FEC_BEF_COR_ER, FEC_COR_BYTE_CNT

l
FEC_BEF_COR_ER stands for "FEC bit error rate before correcting the errors". This event indicates the impact of the external environment on the transmission. FEC_COR_BYTE_CNT stands for "FEC corrected byte count". This event indicates the impact of the FEC.

Performance Event Attribute Performance event cell Unit Description FECBEFCORER None (FEC_BEF_COR_ER) Byte (FEC_COR_BYTE_CNT)
B-18
Issue 06 (2007-12-30)

If the FEC_BEF_COR_ER is too high, there will be residual bit errors in services after the FEC.
Relevant Alarms
If any byte cannot be troubleshooted, the MW_FECUNCOR alarm occurs.
B.2.16 TPLMAX, TPLMIN and TPLCUR

l l l
TPLMAX stands for "Maximum value of output optical power". TPLMIN stands for "Minimum value of output optical power". TPLCUR stands for "Current value of output optical power".

Performance Event Attribute Performance event cell Unit Description OPM 0.1 dBm

In the normal case, the receive optical power is 3 dB higher than the receiver sensitivity, and 5 dB lower than the overload power. If the transmit power is overly low or high, the receive optical power might be overly low or high at the opposite end. Thus, bit errors might occur and even the service might be interrupted.
Relevant Alarms
l
If the receive optical power at the opposite end is lower than the receiver sensitivity, the IN_PWR_LOW alarm can occur. If the receive optical power at the opposite end is higher than the overload power, the IN_PWR_HIGH alarm can occur.
B.2.17 RPLMAX, RPLMIN and RPLCUR

l l l
RPLMAX stands for "maximum received power of the optical port laser". RPLMIN stands for "minimum received power of the optical port laser". RPLCUR stands for "approximate received power of the optical port laser".
Huawei Technologies Proprietary B-19
Issue 06 (2007-12-30)

Performance Event Attribute Performance event cell Unit Description IPM dBm

In the normal case, the received power is 3 dB higher than the receiver sensitivity, and 5 dB lower than the overload power. When the receive optical power is overly low or high, bit errors might occur and even the service might be interrupted.
Relevant Alarms
l
If the receive optical power is lower than the receiver sensitivity, the IN_PWR_LOW alarm can occur. If the receive optical power is higher than the receiver sensitivity, the IN_PWR_HIGH alarm can occur.
B.2.18 BDTMPMAX, BDTMPMIN and BDTMPCUR

l l l
BDTMPMAX stands for "Maximum board temperature". BDTMPMIN stands for "Minimum board temperature". BDTMPCUR stands for "Current board temperature".

Performance Event Attribute Performance event cell Unit Description None 0.1

Overly high or low board temperature might cause faults such as degradation of the board working performance and bit errors.
Relevant Alarm
If the board temperature crosses the threshold, the TEMP_ALARM alarm occurs.

02-B Performance Event Reference

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02-B Performance Event Reference

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OptiX RTN 600 Radio Transmission System Maintenance Guide

B Performance Event Reference

Performance Event Reference

B.1 Performance Event List

B.1.1 SDH Performance Event List

Huawei Technologies Proprietary

B Performance Event Reference

OptiX RTN 600 Radio Transmission System Maintenance Guide

Event Name RSUAS RSCSES RSOFS RSOOF

Source SL1, SD1, SLE, SDE, IF1A, and IF1B

Huawei Technologies Proprietary

OptiX RTN 600 Radio Transmission System Maintenance Guide

B Performance Event Reference

Event Name HPFECSES HPFEUAS

Huawei Technologies Proprietary

B Performance Event Reference

OptiX RTN 600 Radio Transmission System Maintenance Guide

Event Name LPFESES LPFECSES LPFEUAS

B.1.2 Microwave Performance Event List

B.1.3 Other Performance Event List

Source SD1 and SL1

Huawei Technologies Proprietary

OptiX RTN 600 Radio Transmission System Maintenance Guide

B Performance Event Reference

Event Name TPLCUR RPLMAX RPLMIN RPLCUR

B.2 Performance Events and Corrective Procedures

B.2.1 AUPJCHIGH, AUPJCLOW and AUPJCNEW

Performance Event Attribute

Impact on the System

B Performance Event Reference

OptiX RTN 600 Radio Transmission System Maintenance Guide

B.2.2 TUPJCHIGH, TUPJCLOW and TUPJCNEW

Performance Event Attribute

Impact on the System

Huawei Technologies Proprietary

OptiX RTN 600 Radio Transmission System Maintenance Guide

B Performance Event Reference

B.2.3 RSBBE, RSES, RSSES, RSCSES and RSUAS

Performance Event Attribute

Impact on the System

B Performance Event Reference

OptiX RTN 600 Radio Transmission System Maintenance Guide

B.2.4 RSOOF and RSOFS

Performance Event Attribute

Impact on the System

OptiX RTN 600 Radio Transmission System Maintenance Guide

B Performance Event Reference

B.2.5 MSBBE, MSES, MSSES, MSCSES and MSUAS

Performance Event Attribute

Impact on the System

B Performance Event Reference

OptiX RTN 600 Radio Transmission System Maintenance Guide

B.2.6 MSFEBBE, MSFEES, MSFESES, MSFECSES and MSFEUAS

Performance Event Attribute

Impact on the System

OptiX RTN 600 Radio Transmission System Maintenance Guide

B Performance Event Reference

B.2.7 HPBBE, HPES, HPSES, HPCSES and HPUAS

Performance Event Attribute

Impact on the System

B Performance Event Reference

OptiX RTN 600 Radio Transmission System Maintenance Guide

B.2.8 HPFEBBE, HPFEES, HPFESES, HPFECSES and HPFEUAS