Experiment 3 Synchronous binary & Ripple Counters

Objectives:
To implement the synchronous binary and ripple counter using flip flop and verifying the function of the Synchronous Up/Down Counter (74169).

Background Information:
A counter is a sequential circuit that moves through a predefined sequence of states upon applying of clock pulses. The sequence of states may follow the binary number sequence or an arbitrary manner (no sequence). The simplest example of a counter is the binary counter which follows the binary number sequence. An n-bit binary counter contains n flip-flops and can count binary numbers from 0 to (2n -1). Counters are classified into two types: synchronous counters and ripple counter. In a synchronous counter, all flip flops are triggered by a common pulse (CP). In the ripple counter a flip flop output used as a signal for triggering other flip flop. In this experiment we will present these two types and explain their design and operation.

Synchronous Binary Counter:

Figure 3-1 : Circuit diagram of the 4-bit synchronous binary counter

Equipments:
1. 2. 3. 4. 4 J-K flip-flops (2 x 7473 TTLIC chip). 4 AND logic gates (1 x 7408 TTL-IC chip). Logic Lab Trainer. Connection leads.

Procedures:
1. 2. 3. 4. 5. 6. 7. Collect all IC chips necessary to build the circuit from the IC drawers. Bring some connection wires with varying lengths. Derive the wiring diagram for the logic diagram shown in Figure 3-1. Insure that the power switch of the IC trainer is turned off. Plug the IC chips into the proper sockets. Connect the voltage supply and ground lines to the chips. Use the wires to connect the outputs of one IC to the input of another ICs according to the

derived wiring diagram, try to work from left to right. 8. 9. 10. 11. Once all connections have been done, turn on the power switch of the IC trainer. Clear the flip-flops by applying logic '0' to the clear input. Enable the counter and observe its function with each negative-edge in clock pulse input. After finishing the experiment, turn off the power switch, disconnect the wires and take out all of

the IC chips from the trainer.

Ripple Binary Counter:

Figure 3-2 : Circuit diagram of the 4-bit ripple binary counter

Equipments:
1. 2. 3. 4 J-K flip-flops (2 x 7473 TTL IC chip) . Logic Lab Trainer. Connection leads.

Procedures:
1. 2. 3. 4. Derive the wiring diagram for shown logic diagram. Insure that the power switch of the IC trainer is turned off. Plug the IC chips into the proper sockets. Connect the voltage supply and ground lines to the chips.

5. 6. 7. 8. 9.

Use the wires to connect the outputs of one IC to the input of another ICs according to the Once all connections have been done, turn on the power switch of the IC trainer. Clear the flip-flops by applying logic '0' to the clear input. Enable the counter and observe its function with each negative transition of clock pulse. After finishing the experiment, turn off the power switch, disconnect the wires and take out all of

derived wiring diagram, try to work from left to right.

the IC chips from the trainer.

Verification of function of Synchronous Up/Down Counter (74169):

This counter will count either up or down depending on the level of the U/D input, it changes state on rising clock edges and has an active low parallel load input and two active low enable inputs. The pinout diagram for the 74169 is given here.

Procedures:
1. 2. 3. 4. 5. 6. 7. 8. Derive the wiring diagram. Insure that the power switch of the IC trainer is turned off. Insert 74169 chip into one of the 16-pin socket on your trainer board. Connect the voltage supply and ground lines to the chips. Once the connections have been done, turn on the power switch of the IC trainer. Make your connections according to the derived wiring diagram. Verify the counter function according to its mode select table and record your notes. After finishing the experiment, turn off the power switch, disconnect the wires, take out all IC

chips from the trainer, put back everything you have used, close IC trainer and clean your table.

Questions:
1. 2. Explain the design of the 4-bit binary synchronous counter shown in Figure 3-1, draw the state For the binary ripple counter shown in Figure 3-2, what will be the count if the normal (not diagram, derive the State Table, show the K-Maps. complemented) outputs of the flip-flops are connected to clock.