Systematic design of 3-bit counter with D flip-flops

Follow same procedure as before, building up the transition table The difference is in the inputs needed for the flip-flops: the behaviour of a D flip-flop is much simpler: - Qn+1 = D - i.e. Q output after clock transition = D input at transition (which depends on the present states of the flip-flops) - value of Qn (before clock transition) has no direct effect - it is just a simple memory cell (latch) There are no dont care inputs for a simple counter, which leads to more complicated logic.

State transition table for 3-bit counter with D flip-flops

The present state and next state columns are the same as for the JKs present state label 0 1 2 3 4 5 6 7 C 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 A 0 1 0 1 0 1 0 1 label 1 2 3 4 5 6 7 0 next state C 0 0 0 1 1 1 1 0 B 0 1 1 0 0 1 1 0 A 1 0 1 0 1 0 1 0 inputs needed DC 0 0 0 1 1 1 1 0 DB 0 1 1 0 0 1 1 0 DA 1 0 1 0 1 0 1 0

Because the D flip-flops are simple memories, the inputs needed are identical to the next state. Simply copy the columns across thats all there is to it!

K-maps for 3-bit counter with D flip-flops

BA

DC
C 0 1

00 01 11 10 0 1 BA 0 1 1 0 0 1

There are no dont care entries here.

DC = A C + B C + A B C = ( A + B ) C + A B C = ( A B) C + ( A B) C = ( A B) C
DB = A B + A B = A B

DB
C 0 1

00 01 11 10 0 0 BA 1 1 0 0 1 1

DA
C 0 1

00 01 11 10 1 1 0 0 0 0 1 1

DA = A

Compare expressions for JK and D flip-flops J=K A B C D 1 A AB ABC D A =1 AB (AB) C (ABC) D A

Note similarities in pattern between JK and D flip-flops D inputs have extra xor term with output of same flip-flop

Circuit for 3-bit counter using D flip-flops

A A 1 AB AB (AB) C ABC (ABC) D

A clock

B carry in

C single stage carry out

Compare the circuit with JKs 1 1

J Q J Q J Q J Q

clock You should know from the tutorial why the flip-flops are connected like this!

Conclusions
Counters using D flip-flops can be designed in the same way as those using JK flip-flops It is easier to construct the transition table because the inputs required are simply the outputs wanted in the next state The logic is more complicated because there are no dont care states to simplify the K-maps Formally, the system with D flip-flops separates the two main functions of the system: - storage of the present state (the D flip-flops) - determination of the next state (the combinational logic connected to the inputs of the flip-flops This is the architecture of a Moore state machine

Moore state machine without inputs

determination of the next state storage of the present state

present state

combinational logic

next state

clocked register (D-type flip-flops) clock

present state

This can be generalized to include inputs to the combinational logic. In practice the design is done using software and special hardware description languages that specify the function of the circuit (Verilog, VHDL). This will be taken further in Digital Electronics 2.