CHAPTER - 1 ORGANISATION PROFILE

Neyveli, Home of the Neyveli Lignite Corporation, is today Indias energy bridge to the 21-century. Neyveli is a town located about 55 km east of Cuddalore in the South Arcot district of Tamil Nadu. Pt.Nehru launched a mining operations with his golden touch in May 1957. During the construction of irrigation wells occurrence of lignite deposits at shallow depths was noticed in Neyveli area. When systematic geological investigations were taken up in the area, occurrence of lignite over an area of 260 sq.km. With reserves of 2100 million tones discovered. NLC has achieved the objectives it has set for itself. Fulfilling its corporate mission to be the leader in the industry. Neyveli Lignite Corporation is certified ISO 9001:2000 for Quality Management, ISO 14001:2004 for Environment Management, OHSAS 18001 for Safety Management. Neyveli Lignite Corporation Limited (NLC) is a government-owned lignite mining company in India and is in service of the nation for the last 4 decades. One of the public sector undertakings, the company is wholly owned by the Union Government (49 percent) and administered through the Ministry of Coal. Computing of two open cast mines, two pit head Thermal Power Stations, with an installed capacity of 2490 MW of electricity per year. Of this, the origin state of Tamil Nadu consumes 1167 MW, with the neighboring states (Kerala Karnataka, and Andra Pradesh) consuming most of the rest. NLCs growth is sustained and its contribution to Indias social and economic development is significant. Neyveli Lignite Corporation Limiteds net current assets stand at Rs 3744.81 crore as on FY 2006-2007.
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1.1 MINES - I
Demarcated over an area of 16.90 Sq.km. with a reserve of about 287 million tones. Mine-I is situated on the Northern part of the field adjacent to the Neyveli Township. The lignite seam was first exposed in August 1961 and regular lignite mining was commenced in May 1962. The mine has a production capacity of 10.5 million tones of lignite per annum and feeds lignite to the 600 MW capacities of first Thermal Power Station and 420MW Thermal Power Station-I Expansion.

1.2 MINES IA
Mine IA is adjacent to the existing Mine-I block on the eastern side. The project was commissioned in 2001. The total reserve in Mine-IA is 120 million tonnes in an area of 11.6 sq.km. The annual capacity of this mine is 3 million tonnes and lignite was first exposed in March 2003. This mine feeds lignite to M/S ST-CMS, an independent Power project 250 MW and NLCs Thermal Power Station.

1.3 THERMAL POWER STATION - I

2

An opitome of India-Soviet collaboration, Neyveli-Thermal Power Station-I (TPS-I) was commissioned with one unit of 50 MW each and three units of 100 MW each. The unique features of this power station. First lignite-fired Thermal Power Station in South East Asia First pit head Thermal Power station in India First largest Thermal Power station in South India Continuously achieving over 70% plant load factor, from 1982-83 to 1991-92 against the national average of around 50% and has continuously bagged the meritorious productivity award instituted by the Department of Power, Government of India. The power generated from The Thermal Power Station is fed to the grid of Tamilnadu Electricity Board, the sole beneficiary.

1.4 THERMAL POWER STATION-I EXPANSION

This Power Station consists of two units of 210 MW each. The first unit of this Power Station was synchronized on 21.10.2002 and the second unit on 22.07.2003. The power generated from this Power Station is shared by Tamilnadu, Kerela, Karnataka and Pondichery.

Some of the special features of this power station are:

Fully Automated Plant controlled by Distributed Digital Control Monitoring and Information System(DDCMIS),

Environment-friendly equipment and Dry Ash collection system,

Online Sulphur dioxide (SO2) Monitoring, Oxides Nitrogen (NOx) Analyzers.

1.5 MINES - II
Mine II is located 5 Kms South of Mine-I spread over an area of 26 sq.kms. with 390 million tonnes reserve. The lignite steam was first exposed in September 1984 and regular lignite mining commenced in March 1985. The maximum overburden is 103m, and the lignite thickness varies from 8 to 22 m. Initially, the mine was started with a production capacity of 4.7 million tonnes and in February '83 the capacity was enhanced to 10.5 million tonnes per annum. The lignite production in this mine meets the fuel requirement of Thermal Power Station-II.

1.6 THERMAL POWER STATION-II

The Second Thermal Power Station consists of 7 numbers of 210 MW Units and hence having an installed capacity of 1470 MW. Units 1, 2&3 were constructed in the First Stage followed by the Second Stage Units 4, 5, 6 & 7. Lignite for the station is supplied from Mine-II having an annual capacity of 10.5 Million Tonnes. Unit 1 was commissioned in March 1986 and commissioning of the 7th unit was carried out in June 1993. Year after year production records are broken by Thermal Power Station II. The southern states of TamilNadu, Kerala, Karnataka and AndraPradesh and the Union Territory of Puducherry are the beneficiaries of the power produced in the power station. The First Stage units are fully of foreign origin. Boilers are of M/s EVT Germany design and manufactured, supplied and erected by M/S Traselectro of Hungary. Turbines are of M/S Westing house U.S.A design and manufactured, supplied and erected by the erstwhile M/S Franco Tosi of Italy (now merged with M/S Ansaldo of Italy). Generator is of Ercole Marelli, Italys supply. Stage-II units are fully of M/S BHELs supply even though the Boilers are of M/S EVT Germanys design, Turbines are of M/S KWU Germanys (a Siemens subsidiary) design and Generator is of Russian design. 9014.04 Million units of Electricity can be generated per annum from this power station at 70% annual plant load factor; but the actual production figures in recent years are much higher.

1.6.1 SWITCH YARD TS II

The switchyard is to transmit power generated by 7 Nos. of 210 MW units (3Units in stage 1 and 4 units in stage 2). The transmission voltage is 230 kV and 400kV. Thermal Power Station II switchyard is one of the biggest switch yard in the Southern Grid. 230kV system is connected to TNEB grid and Puducherry Electricity system. 400kV system is connected to Southern Electricity grid through Power Grid Corporation Limited lines. The total share of power from central generating stations such NLC, Ramagundam, MAPS, Kaiga, Taltcher etc is fed to Puducherry Electricity System through the 2 Nos. of 230kV feeders from the Thermal Power station II 230kV yard. The 230kV and 400kV system in switchyard are interconnected through 400kV/230kV interconnecting auto transformers. The bus arrangements in switchyard are 2 Main bus and 1 transfer bus system. There are 3 system buses in 230kV and 400kV yard namely First Bus, Second Bus and Transfer Bus. Each bay is meant for each equipment to connect with any one bus. The bay consists of first Bus isolator (89A), Second bus isolator (89B), Line isolator (89C), Transfer Bus Isolator (89 D, Breaker, current Transformer, Capacitance Voltage Transformer, Lightening arresters, Breaker earth bus side (89E1), Breaker earth line side (89 E2), Line earth (89E3) etc. Each bay has respective control panel and relay panel in control room. Wave Traps are provided in transmission lines except mining feeders for PLCC purpose. Isolator is an off load device. It can be operated only without load since it is not having arc quenching medium. Isolator is used to select any one of the bus system to the element and also for perfect isolation of breaker.
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Breaker is an on load device. It can be operated either with load or without load. Through the breaker only the element is charged or isolated. The breaker is an fast acting device During fault the protection relays senses the fault and trips the breaker. The faulty equipment is isolated from the system by tripping of respective breaker.

230KV SYSTEM OPERATION

There are 22 bays in 230kV switchyard as follows 3 Nos. of Generator bays for stage 1 units. 2Nos. of Station Transformers bays for Station Transformer (ST1 and ST2) of capacity 50MVA each. The station Transformers are feeding supply to Stage1 Station Auxiliaries. 2Nos. of Station Transformers bays for Station Transformer (ST3 and ST4) of capacity 30 MVA each. The station Transformers are feeding supply to Stage2 Station Auxiliaries. 2 Nos. of Mining feeders bays ( Mining Feeder 1 and Mining Feeder 2) to feed supply to Mines 1 and Mines 1A 2Nos. of Mining feeders bays ( Mining Feeder 3 and Mining Feeder 4) to feed supply to Mines 2

 2 Nos. of Tie line (Tie Line 1 and Tie Line 2 ) feeder bays are inter linking Thermal Power station 1 and Thermal Power Station 2

STCMS-1&STCMS-2 bays are to inter linking the STCMS Thermal Station Kadalangudy Kadalangudy Puducherry feeder bay is to connect Villianur sub station in Puducherry. Bhahoor feeder bay is to connect Bhahoor sub station in Puducherry. Inter connecting Transformer 1 and Interconnecting Transformer 2 bays are to inter connect 400kV system through 2 Number of Auto Transformers of each of capacity 250 MVA One number of Bus coupler bay is to connect the 2 Main buses namely Bus 1 and Bus 2 One number of Bus Transfer bay with Transfer Bus is to divert load of any one bay main breaker to Bus Transfer breaker without supply interruption and with all protection. bay is to connect the TNEB sub station at

400kV SYSTEM
There are 13 bays in 400kV switchyard as follows 4 Nos. of Generator bays for stage 2 units.

5 Nos of Transmission line bays namely (Chennai, Salem-1, Salem-2, Trichy1and TS-1 Expansion to TSII

2 Nos of inter connecting Transformers of capacity 250 MVA 1 No Bus coupler bay 1 No of Bus Transfer Bay.

1.7 THERMAL POWER STATION-II EXPANSION

Government of India sanctioned the installation of 2 units of 250 MW each as an expansion of Second Thermal Power Station on 18th October 2004 at a cost of Rs. 2030.78 crore. The time schedule for commissioning of Unit I is 53 months and for Unit II is 57 months from the date of sanction of GOI. Revised cost estimate of the project was approved by GOI for Rs. 2453.57 Crores during July 2008. During the year 2008-09, lifting of boiler drum for unit 2 was completed in May 2008. Erection of Chimney and Cooling tower 1 have been completed. Erection works are in progress in respect of Boiler, Turbine condenser and other packages. The first unit is expected to be commissioned in May 2010 and second unit in November 2010.

1.8 FUTURE PLANS

NLC is poised for a rapid growth in the mining and power generation capacity and is expanding its activities not only at Neyveli but also in other parts of the country. NLC is also venturing in New projects with fuels other than Lignite. The following projects are proposed to be taken up by NLC during the 11th /12th Plan period :

Bithnok Lignite Mine-cum-Power Project ( 2.1 MTPA Lignite Mine with linked 250 MW Power Plant) Hadla Lignite Mine-cum-Power Project (Barsingsar Extension) ( 2.5 MTPA Lignite Mine with linked 250 MW Power Plant) Jayamkondam Lignite Mine cum Power Project ( 13.5 MTPA Lignite Mine with linked 1600 MW Power Plant) Valia Lignite Mine cum Power Project at Gujarat ( 8 MTPA Lignite Mine with linked 1000 MW Power Plant) A 15 MTPA Coal Mine under Joint Venture with MCL and a 2000 MW Power Plant in Ib valley in Orissa. NLCs New Thermal Power Project at Neyveli ( 2 X 500MW ) in lieu of TPS-I. Mine III linked with TPS III ( 8 MTPA Lignite Mine and 1000 MW Power Plant) at Neyveli.

Coal based power project at Madhya Pradesh (1000 MW Power Plant) Coal based power project at Jharkand (1000 MW Power Plant) Coal based power project at Uttar Pradesh (2000 MW Power Plant)

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Fund requirement of the above projects will be met from internal accruals and borrowings. Upon successful completion of the above projects, NLCs mining capacity will be increased to 79.70 MTPA, ( both Lignite and Coal ) and power generation capacity will be raised to 14740 MW.

CHAPTER 2 CONTROL AND INTERLOCKS

2.1 ISOLATORS AND INTERLOCKS 2.1 i INTRODUCTION The Isolators are OFF LOAD electrical device in the 230 KV and 400 KV Switchyard. There are 3 different types of isolators available in the switchyard. All the isolators both bus and line in 230Kv side are of Double break center operated. All the bus isolators in 400Kv side are of Pantograph type. The line isolators in 400Kv side are of center break type. All the isolators are motor operated. All the power contactors, switches, fuses, limit switches, aux. contacts, motor with gear assembly etc. are housed in the Motor Operated Mechanism (MOM) box. 2.1 ii ISOLATOR CONTROL The motor operated isolators can be operated remotely from control room or from the local MOM box electrically by selecting the local / remote accordingly only when certain interlocks (conditions) are satisfied.. Normally this switch is set for remote operation only. In case of failure of remote operation or for test purposes local operation is done. A fly back control switch is provided in the control panel for operating the isolators. The green lamp in the control panel will glow indicating that the isolator is open. A red lamp would indicate the closed condition of the isolator.
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2.1 iii MANUAL OPERATION In addition to electrical operation, manual operation with an operating handle is also possible. When all the interlock conditions are satisfied if the push button MPB in the MOM box is pressed the main solenoid coil MSC is energised. The plunger shaft of the solenoid coil normally rests in the groove of the castle key interlock shaft (KIMC). On energisation of the solenoid coil the plunger shaft is lifted up, thus releasing the castle key. The castle key can now be turned in the anticlockwise direction to release the mechanical interlock latch, which normally act as stopper for the insertion of manual operation handle. The manual operation handle can now be inserted through the opening provided for and turned, to close or open the isolator. After the manual operation is carried out the castle key is to be put back in position and turned in the clockwise direction restoring the condition needed for remote/local operation by electrically. 2.1 iv ISOLATOR INTERLOCKS The interlocks are implemented for safe guarding the equipments and for personal safety. The isolator can be closed / opened electrically, only when certain interlocks (conditions) are satisfied. For 230Kv bus isolator 89A i.e. I bus isolator can be opened eclectically from remote if the following conditions are satisfied. a. KIMC (Key interlock main coil) key i.e. isolator manual operation key shall be in the front panel of the MOM box and turned 'ON'. b. Over load relay shall be in reset condition. c. II bus isolator (89B) is open.
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would be

d. Breaker (52) is open e. Local / remote switch is in remote position f. Transfer bus isolator ( 89D) is open The I bus isolator (89A) can be closed electrically from remote if the following conditions are satisfied along with the above mentioned conditions (a to f). (If the element is being taken in to service from shutdown). g. Earth switch (E1) is open h. CVT-A isolator in closed in condition i.e. 230Kv I bus shall be in charged condition. If the element is already in service on transfer bus then 89A can be opened if transfer bus isolator (89D) is in closed condition, bus transfer isolator (89TrA) in closed condition along with the above mentioned conditions a to e. If the element is already in service on transfer bus then 89A can be closed if transfer bus isolator (89D) is in closed condition, bus transfer isolator(89TrA) in closed condition and the above mentioned conditions a to e and g&h. 2.1 v ISOLATOR OPERATION: For both the opening and closing operations 3phase AC and 220V DC switches shall be in ON condition along with fuses. Fuse rating for 220V DC is 2A and for 3 phase AC is 4A. As soon as closing command is given from remote, Bus Bar Protection CT switching relay 89AX (In CTMK) will pickup and extend DC supply to the closing contact in MOM box.

The open indication of 89A will vanish immediately as soon as command is given
13

provided all the above interlocks are satisfied. Close indication is in series with 89A aux. Contact (NO) and 89AX(NO). When aux. contacts have changed while closing, 89AY relay will pick up (In relay panel). The open indication will come when the aux. Contacts are changed and 89AX is reset. The open indication is in series with aux. contact (NC) and 89AX (NC). When aux. contacts have changed while opening, 89AY relay will reset. This 89AY relay is used for isolator contact multiplication purpose. A typical control circuit for a 1st bus isolator is shown in fig 1.1.1

14

+ve
J 23

89A ISO LATO R C O NTRO L C IRC UIT 220V DC SUPPLY

-ve

K529 FS 28 4A J 5A J5 J 7 FS 2A KIM C K23 O LR

89BY

K567 52

K569 89D 89D 89TRA

89BY

K537 89BC X

K549

K49 L R K51 K55 K551 O NC 89A

89AX
RC

PBO

K53

C .C

LSO

K59 LSC K45

OC

K547

OC 89E1 K571 89C V TA K531

K31

C C K33 K63 K35 PBC

O C K43 89A XO NC K541 K547

K47
CC

M SC

L R

K539

89AX

CC

FS J 8 2A 89A 89A X L251 L253 89A 89A 89A 89A X K573 K575 89AY
CC RC

J6

FS29 4A

RED

G REEN

Fig 1.1.1 DIAGRRAM

FIRST BUS ISOLATOR CONTROL CIRCUIT

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2.2 BREAKER CONTROL CIRCUIT There are two types of breakers available in the 230/400 Kv yard; one is gang operated and another is individual pole operated. In the gang operated type all the three poles are controlled by a single operating mechanism. In the individual pole type, each pole will have its own operating mechanism. At switchyard three different types of operating mechanisms are available. One is Spring Charging mechanism, another is Hydraulic mechanism (oil) and the third one is Pneumatic (air) mechanism. Each breaker irrespective of the type will have one number Closing coil (CC) and two numbers of Tripping coils(TC1 & TC2). Since opening of the breaker in case of a fault in the system is more important as a redundancy two nos. of Trip coils are provided. Each TC will be monitored for its healthiness by Trip coil supervision relays (95,195). When the breaker is in open condition two relays will monitor the TC healthiness via breaker NC aux. Contact. When in service one relay will monitor the TC healthiness via breaker NO aux. Contact. When there is any problem in the TC then its circuit supervision relay will sense and give alarm. These trip coil supervision relays contacts are used in the closing circuit interlock of the breaker. If any TC is unhealthy then the breaker will not close. Breaker can be closed from the remote when the following interlocks are satisfied. 1. Both the earth switches E1&E2 are kept opened. 2. All the trip relays 86, including the Bus Bar protection relay 96 are in reset condition. 3. Trip coil supervision relays are reset.
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4. Local- remote switch in remote condition. 5. All the synchronizing conditions are satisfied. 6. Spring charged or sufficient oil or air pressure availability shall be ok depending on the type of breaker. 2.2 i LOCAL BREAKER BACKUP PROTECTION If any protection relay senses the fault and initiates a tripping via trip relay contacts then the breaker TC1 & TC2 will pickup and breaker will open. If the breaker fails to open even after receiving tripping signal then the fault will not get cleared and lead to unwanted damages to other related equipments. To avoid such things one backup protection for the breaker is available which is called Local Breaker Backup protection (LBB) . When the element is in service all the three phases current will be passing thro the LBB relay. As soon as the trip relay picks up one of its contact will extend DC supply to the trip coils. Simultaneously one more contact of the trip relay will extend the DC supply to the LBB relay. As soon as DC supply is extended to the LBB relay, the LBB relay will pickup and initiates a timer 2/50Z, which starts counting 200ms. The TC1&TC2 will pickup as soon as DC supply was extended to them and breaker will open. When the breaker opens the current thro the LBB relay will become zero and the timer 2/50Z resets. But if the breaker did not open then the current in that pole will be flowing thro LBB relay and after 200ms time was lapsed the timer 2/50Z will pickup and initiates a contact in the Bus Bar Protection DC circuit which in turn trips all the elements connected that bus where the faulty breaker was connected. When all the elements connected to the bus including the Bus coupler opens then the corresponding bus will become dead the

17

fault will be cleared. Maintenance personnel can access the breaker, which was not opened and can start working. 2.3 FEEDERS DISTANCE PROTECTION Basically these relays operate on the principle of Impedance (ratio V/I) measurement. Any conductor used in the transmission line will have its own characteristic impedance the value of which will be given by the manufacturer of the conductor. When ever a fault occurs in the line the impedance will reduce depending upon the fault current. A relay, which measures this impedance continuously, will operate and trip the feeder to clear the fault. Theoretically the V/I ratio measured will be constant for any particular fault position and will only vary if the position of the fault with respect to the relay point varies. Thus nearer the fault to the relay lower would be the ratio V/I and conversely the farther the fault from the relay higher would be the ratio V/I. Hence this impedance relays are also called as Distance protection relays. 2.4 BUS BAR PROTECTION (BBP) 2.4 i INTRODUCTION BBP is provided for bus faults like flashover at the isolators, at the circuit breaker bushings, CT and PT faults. A large proportion of bus bar faults results from human error rather than a switchgear components failure. It also covers the failure of insulators of isolators and breakers during operation and mal-operation of earth switches. 2.4 ii BBP SYSTEM The BBP relays should be sensitive so that the bus faults are sensed and cleared instantaneously to ensure grid stability. In BBP scheme there are three zones viz. zone-A, zone-B, zone-C covering first bus, second bus and Tr. bus. The BBP
18

scheme is based on differential protection principle, which compares the magnitude and phase of the circulating currents in the respective zones of protection. The BBP circuit is the combination of CTs and relays which are used to detect faults occurring within the bus bar zones and which initiates tripping of all those circuit breakers connected in that zone so that the concerned bus will become dead to isolate this faults. 2.4 iii BBP CT CIRCUIT When BBP operates in any one of the busses, all elements connected to the faulty bus including bus coupler trip. If the Transfer bus breaker is in service, it also gets tripped. BBP will be always selective irrespective of the configuration. Each zone has got three BBP Differential relays namely 87A, 87B, 87C. All the BBP CTs of that zone are connected differentially with these relays. Two secondary cores namely Core4 and Core 5 of the Switchyard CTs (1600A/1A in 230Kv side and 2000A/1A in 400kv side) of each element are used for the BBP. Core-4 is for Main zone and Core 5 is for Check Zone. Whenever an element is connected to the 1st bus or 2nd bus or Transfer bus accordingly CT switching relays 89Ax or 89BX or 89Dx housed in the CT Marshalling Kiosk of the respective bay in outdoor yard will pickup. CT secondary of the BBP core 4 will be connected to the Main Zone differential relay circuits Zone A, Zone B or Zone C through the 89Ax or 89BX or 89DX relay contacts. BBP Core 5 will be directly connected to the Check Zone Differential relay circuits. This check zone is to ensure that the fault has really occurred in the bus. For bus coupler Breaker tripping, the BBP core of the B/C CT on the 1 st bus side of the breaker will be connected to Zone-B and the BBP core of the B/C CT on the
19

2nd bus side of the breaker will be connected to Zone-A. For the transfer bus main zone core is connected to zone-A or zone-B through 89TRAx or 89TRBx and core 2 is connected to zone-C. 2.4 iv OPERATION OF BBP During normal operation secondary current will circulate in the zone and there will not be any differential current passing thro' differential relay 87. In case of fault the differential current flow thro' the respective relays which will initiate in case of open circuit of any one of the CTs or when the unbalance current increases due to the saturation of the any of the CTs differential current will flow thro' differential relays which will initiate unnecessary tripping. To avoid mal operation like this BBP supervisory relays 95A,B,C and CH are provided. These relays are connected parallel to the differential relay 87. For low differential current flow thro' 87 & 95, 95 relay picks up earlier than 87 relays which will short the differential relay 87 after a time delay. An annunciation Bus Bar Protection Zone A/ B /C Faulty will come. Immediately the concerned element has to be checked and problem shall be corrected otherwise till 95 relay is in picked up condition Busbar Protection of that zone will be out of service. But when actual fault comes the diff.current flow will be high and 87 picks up faster than 95. The diff. Relay 87 picks up instantaneously before 95 relay shorts this relay. The connections of the BBP circuits are shown in the fig.2.4.1 to 2.4.3. 2.4 v BBP ACTUATION SCHEME Each element has got a BBP relay (96) which will trip the particular element. In case when the BBP operates 96 relay of all the elements connected to the particular bus have to energise including B/C. For each zone BBP cut out switch is provided in the control panel. In case BBP operates in any one of the buses, differential relays 87CH along with 87A or 87B or 87 C will energise 96 relay of allthe
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elements connected to that bus including B/C.

In case LBB operates for anyone of the elements 2/50z and 50z will initiate BBP. 87 CH check zone differential relay which get energized from separate CT core to ensure that really a fault has occurred and BBP should not act for false pick up of the main zone 87A, 87B, 87C differential relays. If the 87C Check Zone relay is not available then for any false pick up of the Zone A,B,C differential relays 87A,87B or 87C the BBP will act.

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TYPICAL UNIT

BUS I BUS II TRANSFER BUS

TYPICAL FEEDER

BUS I BUS II TRANSFER BUS

89A

89B 89D 52 TTB2

89A

89B

89D

52 89C TTB2

TTB1 89AX A ZONE 1 BUS WIRES B C 89BX A ZONE 2 BUS WIRES B C 89DX A ZONE 3 BUS WIRES B C N

TTB1 89AX

89BX

89DX

A B CHECK ZONE BUS WIRES C N

Fig : 2.4.1 BBP ZONE 1,2,3 & CHECK ZONE CT CONNECTION DIAGRAM

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A ZO N E I B W IR E S C N

B11
Z O N E II W IR E S

A B C N

B31 B51 B81 95C AX

B15 B35 B55 B 81 95CBX

A Z O N E III B W IR E S C N

B 21 B 41 B61 B81 95C C X

SD1

SD2

SD3

SD4

SD5 SD6

SD7

SD8 SD9

1 0 -7 0 V 9 5 C A

1 0 -7 0 V 9 5 C B

1 0 -7 0 V 9 5 C C IN O U T

2 5 -3 2 5 V
87 AA 87 AB

2 5 -3 2 5 V
87 BA 87 BB 87 BC

2 5 -3 2 5 V
87 CA

87 AC

87 CB

87 CC

IN O U T

IN O U T

A B

C h e c k Z o n e w irC s e
N B81 95C X

SD7

SD8 SD9

1 0 -7 0 V 9 5 C H IN O U T

2 5-32 5V
87A CH

87B CH

87C CH

Fig 2.4.2 BBP DIFFERENTIAL RELAYS

23

80T

P11

P13

P15

- Ve
96 CC
96 AB

2/50Z

50Z

2/50Z

96 CC

96 ABC

89TRBX
89TRAX

96 AB 96 C

50Z

2/50ZX
89BX 89AX

89DX

96 CC

TRANSFER BUS COUPLER

96 AB

TYPICAL ICT. 96 96 96

89DX
50Z 2/50ZX

96 C
TYPICAL G.T

89BX
89AX

96

96

96

97 C

89DX
I II B/T
50Z

96
X

89BX

+ve

96

96

96

TYPICAL FEEDER

89AX
96 B C B 96 B C B 96 B C B

2/50Z

OUT

P15

P13

87CC 87CB OUT 87CA CHECK 87BC 87BB 87BA 87CHC

P3

OUT

P9

Zone C

IN

IN

P3

P7

OUT

Zone B

IN

P11

87AC 87AB 87AA

87CHB 87CHA

Fig 2.4.3 BBP DC CIRCUIT

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IN P5

P1

Zone C

P2

50Z

2/50Z

96 B C A

96 B C A

96 B C A

CHAPTER 3 CABLE FAULT

CABLE A cable is two or more wires running side by side and bonded, twisted or braided together to form a single assembly. In mechanics cables, otherwise known as wire ropes, are used for lifting, hauling and towing or conveying force through tension. In electrical engineering cables used to carry electric currents. An optical cable contains one or more optical fibers in a protective jacket that supports the fibers. For power transmission at distances greater than a few kilometres electric cables are used. In the 19th century and early 20th century, electrical cable was often insulated using cloth, rubber and paper. Plastic materials are generally used today, except for high reliability power cables. MULTI CORE CABLE A multi core cable is a generic term for an electrical cable that has multiple cores. The term is normally only used in relation to a cable that has more cores than commonly encountered. For example, a four core mains cable is never referred to as multi core, but a cable comprising four coaxial cables in a single sheath would be considered a multi core.

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TYPES OF CABLES There are three types of cables such as. 1- Twisted pair cable 2- Coaxial cable 3- Fiber optic cable Twisted-Pair Cable A twisted pair cable consists of two copper conductors, each one with its own plastic insulation and twisted together. One wire carries the signal and other is used as ground reference. The advantage of twisting is that both wires are equally affected by external influences. So the unwanted signals are canceled out as the receiver calculates the difference between signals in two wires. This cable is of two types such as. 1- UTP (unshielded twisted pair) 2- STP (shielded twisted pair) STP cable has one extra metal shield covering the insulated twisted pair conductors. But this is absent in UTP cables. The most common UTP connector is RJ45. The unshielded twisted pair cable is classified into seven categories based on cable quality. Category 1 of cables is used in telephone lines with data rate around 0.1 Mbps. Whereas Category 5 used in LANs having 100 Mbps data rate.

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Performance of twisted-pair cable is measured by comparing attenuation versus frequency. Attenuation increases with frequency above 100 kHz. These cables are used in telephone lines to provide voice and data channels. DSL lines and Local area networks also use twisted pair cables. Coaxial Cable Coaxial cable (coax) carries high frequency signals than twisted-pair cables. Coax has a central core conductor of solid wire enclosed in an insulator, which is covered by an outer conductor of metal foil. This outer conductor completes the circuit. Outer conductor is also enclosed in an insulator, and the whole cable is protected by a plastic cover. These cables are categorized by RG (radio government) ratings. RG-59 used for Cable TV, RG-58 for thin Ethernet and RG-11 for thick Ethernet. The connector used in these cables is called BNC connector; it is used to connect the end of the cable to a device. Though the coaxial cable has higher bandwidth, but its attenuation is much higher compare to twisted-pair cables. It is widely used in digital telephone networks where a single cable can carry data up to 600 Mbps. Cable TV networks use RG-59 coaxial cable. Traditional Ethernet LANs also use this cable. Fiber-Optic Cable A fiber optic cable transmits signals in the form of light. Optical fiber use reflection to guide light through a channel. It consists of two main parts: core and cladding.
27

Core is denser compare to cladding and is made up of plastic or glass. Cladding acts as a protective cover to core. The difference in density of core and cladding is such that a beam of light moving through the core is reflected off the cladding, instead of being refracted into it. Two modes of propagation of light are possible in optical fiber such as: multimode and single mode. Multimode fiber allows multiple beams from a light source move through the core. In multimode step-index fiber, the core density remains constant from the center to the edges. But in multimode gradedindex fiber, core density gradually decreases from the center of the core to its edge. Graded-index fiber creates less distortion in the signal compare to stepindex. There are two types of connectors for fiber optic cables. The SC connector is used for cable TV, and ST connector used for connecting cable to networking devices. Attenuation in fiber optic cable is very low compare to other two types of cable. It provides very high bandwidth and immunity to electromagnetic interference. Light weight and greater immunity to tapping makes it more preferable cable. Fiber optic cable is often used in backbone networks because of its wide bandwidth and cost effectiveness. Local area networks such as 100Base-FX network and 100Base-X use this cable. Also it is used by cable TV companies.

28

CABLE FAULT Cable faults are diverse in nature and exhibit differing characteristics. It is possible to select a method of location according to the characteristics of the fault; this necessitates having the various different types of instruments from which the appropriate one has to be chosen. In recent years it has however become a practice to convert all faults as far as possible into a type which could be located using one technique; this is done by providing fault burning equipment in order to convert as far as possible all faults into stable low resistances. CABLE FAULT LOCATOR As the cable used is lengthy (for eg.,500m), it is very difficult to find affected cable by manual process. So we are using cable fault locator method to locate the fault in the cable.The cable fault locator method involves following steps. The steps necessary for determining fault locations can be subdivided into five main catagories. 1. Fault classification identifying the type of fault 2. Pre-location determining the distance to the fault 3. Route tracing determining the route of the cable at the site 4. Pinpointing determining the exact position of the cable the site 5. Cable identification determining the faulty cable amongst several cables

29

For carrying out the above process, there are various methods, which are as follows. Insulation test, measuring the resistance of a fault Testing DC test (determining the flash-over voltage) Sheath fault test

VLF test (determining the flash-over voltage) Teleflex measurements (pulse reflection and TDR measurements) ARM (Arc Reflection Method)

Pre-location

ARM Plus (Arc Reflection Method Plus) ARM power burning

Decay Plus (Arc Reflection Method)

Decay (travelling wave method, oscillation method) Current catching (ICE) Three-phase current catching (ICE)

ICE Plus (low-voltage networks only) High-voltage bridge method (pre-locating sheath faults) Voltage drop method (pre-locating sheath faults) Burning Performance burning Line location Line routing

Fault conversion

Route tracing

Pinpointing
30

Audio frequency generator (twist field method, minimum turbidity method) Shock discharges (acoustic field method, acoustic pinpointing) Pinpointing sheath fault Phase identification when earthed Phase identification and phase determination on live systems

Cable and phase identification

CHAPTER 4
31

CABLE FAULT LOCATOR

Cable faults are diverse in nature and exhibits different characteristics such as underground cable fault, overhead cable fault etc., The cable length is very length( for eg., 500m). So manual process of locating fault in cable is tedious work and takes much time. Its very difficult to locate the fault in cables especially in multi core cables. Its quite tedious job to detect the affected cable in multi core cables. To avoid such problems, the cable fault locator is used to find the fault in the particular cable. In this method, at one end of the cable the transmitter part is fixed and at the other end receiver part is fixed. The data is transmitted from the transmitter to the receiver. If the data end in the transmitter is not received in the receiver, then that particular cable is affected. These processes is done by the microcontroller. The microcontroller is programmed with C language. Data transmission is the key process in this method. In the receiver side, to show the data which is received from the transmitter LCD display is used. The data transmission is discussed briefly as follows., Data transmission Data transmission, digital transmission or digital communications is the physical transfer of data (a digital bit stream) over a point-to-point or point-to-multipoint transmission medium. Examples of such media are copper wires, optical fibers, wireless communication media, and storage media. The data is often represented as an electro-magnetic signal, such as an electrical voltage signal, a radiowave or microwave signal or an infra-red signal.

32

While analog communications is the transfer of continuously varying information signal, digital communications is the transfer of discrete messages. The messages are either represented by a sequence of pulses by means of a line code (baseband transmission), or by a limited set of continuously varying wave forms (passband transmission), using a digital modulation method. According to the most common definition of digital signal, both baseband and passband signals representing bitstreams are considered as digital transmission, while an alternative definition only considers the baseband signal as digital, and the passband transmission as a form of digital-to-analog conversion. Data transmitted may be digital messages originating from a data source, for example a computer or a keyboard. It may also be an analog signal such as a phone call or a video signal, digitized into a bit-stream for example using pulse-code modulation (PCM) or more advanced source coding (data compression) schemes. This source coding and decoding is carried out by codec equipment. Types of data transmission Baseband or passband transmission The physically transmitted signal may be one of the following: A baseband signal ("digital-over-digital" transmission): A sequence of electrical pulses or light pulses produced by means of a line coding scheme such as Manchester coding. This is typically used in serial cables, wired local area networks such as Ethernet, and in optical fiber communication. It results in a pulse amplitude modulated signal, also known as a pulse train.

33

A passband signal ("digital-over-analog" transmission): A modulated sine wave signal representing a digital bit-stream. Note that this is in some textbooks considered as analog transmission, but in most books as digital transmission. The signal is produced by means of a digital modulation method such as PSK, QAM or FSK. The modulation and demodulation is carried out by modem equipment. This is used in wireless communication, and over telephone network local-loop and cable-TV networks. Serial and parallel transmission In telecommunications, serial transmission is the sequential transmission of signal elements of a group representing a character or other entity of data. Digital serial transmissions are bits sent over a single wire, frequency or optical path sequentially. Because it requires less signal processing and less chances for error than parallel transmission, the transfer rate of each individual path may be faster. This can be used over longer distances as a check digit or parity bit can be sent along it easily. In telecommunications, parallel transmission is the simultaneous transmission of the signal elements of a character or other entity of data. In digital communications, parallel transmission is the simultaneous transmission of related signal elements over two or more separate paths. Multiple electrical wires are used which can transmit multiple bits simultaneously, which allows for higher data transfer rates than can be achieved with serial transmission. This method is used internally within the computer, for example the internal buses, and sometimes externally for such things as printers,

34

The major issue with this is "skewing" because the wires in parallel data transmission have slightly different properties (not intentionally) so some bits may arrive before others, which may corrupt the message. A parity bit can help to reduce this. However, electrical wire parallel data transmission is therefore less reliable for long distances because corrupt transmissions are far more likely. Asynchronous and synchronous data transmission Asynchronous transmission uses start and stop bits to signify the beginning bit ASCII character would actually be transmitted using 10 bits e.g.: A "0100 0001" would become "1 0100 0001 0". The extra one (or zero depending on parity bit) at the start and end of the transmission tells the receiver first that a character is coming and secondly that the character has ended. This method of transmission is used when data are sent intermittently as opposed to in a solid stream. In the previous example the start and stop bits are in bold. The start and stop bits must be of opposite polarity. This allows the receiver to recognize when the second packet of information is being sent. Synchronous transmission uses no start and stop bits but instead synchronizes transmission speeds at both the receiving and sending end of the transmission using clock signals built into each component. A continual stream of data is then sent between the two nodes. Due to there being no start and stop bits the data transfer rate is quicker although more errors will occur, as the clocks will eventually get out of sync, and the receiving device would have the wrong time that had been agreed in protocol (computing) for sending/receiving data, so some bytes could become corrupted (by losing bits).

35

Ways to get around this problem include re-synchronization of the clocks and use of check digits to ensure the byte is correctly interpreted and received. CIRCUIT DIAGRAM CABLE CHECKING-TRANSMITTER:

+ 5 v

+ 5 v
1 2 3 4 5 6 7 8
1 1 1 1 1 1 1 1

4 0

3 1 3 3 3 3 3 3 3 3

9 8 7 6 5 4 3 2

2 3 4 5 6 7 8 9

9 PIN "D"TYPE

6 7 8

AT89C51

1 2 3 4

+ 5 v

1 0 M F D
1 0 K
1 2 M H z

0 1 2 3 4 5 6 7

D L E

2 D

+ 5 v

1 8 1 9 2 0

2 1 2 2 2 3 + 1 2 V

T 1

7 8 0 5
12V AC 750mA
+

+ 5 V

2 3 0 V

A C

2 2 0 0 M F D / 2 5 V

1 0 M F D / 2 5 V

36

CABLE CHECKING-RECEIVER:

+5v 4k7 sip resistor

C

+5v 4k7 sip resistor

C

+5v

+5v
1

2 3 4 5 6 7 8 9

1 2 3 4 5 6 7 8

40

31

39 38 37 36 35 34 33 32 +5V 10K
1

2 3 4 5 6 7 8 9

7 8 9 10 11 12 13 14 3 1 16 2

2 3 4 5 6 7 8 9

9 PIN "D"TYPE

6 7 8

AT 89C51

10K 15 4 5 6 +12V
2 3 4 5 6 7 8 9

+5v
R3 R E S IS T O R

18 19
12 MHz

20

21 22 23

T1

7805
12V AC 750mA
+

LCD(2X16)

1 2 3 4

10 11 12 13 14 15 16 17

+5V

230V AC

2200MFD/25V

10MFD/25V

37

CHAPTER-5 MICROCONTROLLER
INTRODUCTION TO MICROCONTROLLER SERIES:89SXX Family TECHNOLOGY:CMOS FEATURES OF 89SXX FAMILY

Compatible with MCS-51 Products Write/Erase Cycles

4 Kbytes of In-System Reprogrammable Flash Memory Endurance: 1,000 Fully Static Operation: 0 Hz to 24 MHz Three-Level Program Memory Lock 128 x 8-Bit Internal RAM 32 Programmable I/O Lines Two 16-Bit Timer/Counters Six Interrupt Sources Programmable Serial Channel Low Power Idle and Power Down Modes

38

INTRODUCTION TO AT89S52 The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4Kbytes of Flash Programmable and Erasable Read Only Memory (PEROM). The device is manufactured using Atmels high density nonvolatile memory technology and is compatible with the industry standard MCS-51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides a highly flexible and cost effective solution to many embedded control applications. The AT89C51 provides the following standard features: 4 Kbytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power Down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.

39

PIN DIAGRAM

40

AT89S51-Pin Diagram PIN DESCRIPTIONS PORTS OF AT89S51 The various ports of AT89S51 are as follows: VCC-Supply Voltage GND-Ground Port 0 Port 0 is an 8-bit open drain bidirectional I/O port. As an output port each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs. Port 0 may also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode P0 has internal pullups. Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pullups are required during program verification. Port 1 Port 1 is an 8-bit bidirectional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 1 also receives the low-order address bytes during Flash programming and program verification. Port 2

41

Port 2 is an 8-bit bidirectional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX@ DPTR). In this application it uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification. Port 3 Port 3 is an 8-bit bidirectional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups. Port 3 also serves the functions of various special features of the AT89C51 as listed below:

AT89S51 Port3-Description
42

RST Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device. ALE/PROG Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcrontroller is in external execution mode. PSEN Program Store Enable is the read strobe to external program memory. When the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. EA/VPP External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to

43

FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require 12-volt VPP. XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit. XTAL2 Output from the inverting oscillator amplifier. OSCILLATOR CHARACTERISTICS XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in following figure.

AT89S51 Oscillator Connection.

44

Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure .

AT89S52 External Clock Driven Configuration.

There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed.
45

IDLE MODE In idle mode, the CPU puts itself to sleep while all the onchip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this ware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory. POWER DOWN MODE In the power down mode the oscillator is stopped, and the instruction that invokes power down is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the power down mode is terminated. The only exit from power down is a hardware reset. Reset redefines the SFRs but does not change the onchip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize.

46

MICRO CONTROLLER BLOCK DIAGRAM The general block diagram of Microcontroller ATMEL AT89S51 is shown below..

47

CHAPTER 6 HARDWARE IMPLEMENTATION

48

POWER SUPPLY The power supply for the various units of the circuits is given by the power supply module. Power supply circuit converts the normal available 230v AC into required 5v,12v, variable voltages. This module consists of step down transformer, which step down the available 230v AC into 9v,15v,25v AC supply. Then this low voltage is converted into DC current by the Diode Bridge Rectifier. The value of the diode used in this bridge is 1N4007. The Bridge Rectifier Circuit is formed with four silicon power diodes of 1A current rating. Then there is Filter circuit for filtering out the ripple voltages which present in the output of the Diode Bridge Rectifier. A 230v/12v transformer with current rating of 1A is used. An electrolytic capacitor C1 of 2200 MFD/25v rating is provided at the output of the rectifier circuit as filter 10 MFD/25v capacitor are provided in the circuit to bypass the high frequency components of the rectified voltage. Then the filtered output is regulated by the Voltage Regulator. For the required output voltage, the voltage regulator is used. Voltage Regulated IC is 7805 for 5v supply, IC7812 for 12v supply, LM317 for variable voltage. All the regulated power supply circuits are designed to deliver maximum current of 500mA.

49

Circuit diagram of +5v power supply

Circuit diagram of +12v power supply PIN DIAGRAM

General Description The LM78XX series of three terminal positive regulators are available in the TO-220 package and with several fixed output voltages, making them useful in a
50

wide range of applications. Each type employs internal current limiting, thermal shut down and safe operating area protection, making it essentially indestructible. If adequate heat sinking is provided, they can deliver over 1A output current. Although designed primarily as fixed voltage regulators, these devices can be used with external components to obtain adjustable voltages and currents. ELECTRICAL CHARACTERISTICS

51

52

LCD INTERFACE INTRODUCTION The LCD has 2 rows of alphanumeric characters and 16 characters in each row. Each row includes a rare mounted printed circuit board that includes the drive circuitry for the display. The module uses a microcontroller to implement commands. LCD DESCRIPTION Vcc, Vss and Vee While Vcc and Vss provide +5v and ground respectively, Vee is used for controlling LCD contact.

Rs- Resistor select There are two very important resistors inside LCD. The Rs pin is used for their selection as follows. If Rs=0, the instruction command code register is selected, allowing the user to send a command such as clear display, cursor at home. If Rs=1, the data register is selected allowing the user to send data to be displayed on the LCD. R/W- Read/Write R/W input allows the user to write information to the LCD or read the information from it. R/W=1 when reading, R/W=0 when writing.
53

E-Enable The enable pin is used by the LCD the latch information presented to its data pins. When data is supplied to data pins, a high to low pulse must be applied to this pin in order from the LCD to latch in the data presented at the data pins. This pulse must be a minimum of 450ns wide. Do-D7 The 8 bit data pins, Do-D7, are used to send information to the LCD or read the content of the LCDs internal registers, to display the letter and number, we send ASCII codes for the letters and numbers while making RS=1. There also instruction command codes that can be send to the LCD to clear the display or force the cursor to home position or blink the cursor.

54

CHAPTER 7 MERITS AND DEMERITS

MERITS

Reduces the risk of faults lost after Reduces the risk of damage to lines Reduces the risk of the unknown devices and operator Reduces the risk of cost Reliability of the system is high

DEMERITS

Program used for the microcontroller is complex in nature. Sensitivity of the microcontroller is high

55

CONCLUSION In our project, the fault in multi core cable is effectively detected by the automatic process using microcontroller programmed with C language, which is used both in transmitter and receiver. So the microcontroller detect the data transmission and find out the cable which is affected. Hence the process is more easier, reliable and simple. Finally we conclude that cable fault can be easily located by the cable fault locator method using microcontroller. FUTURE ASSESMENT Now we are using wires in cable fault locator, in future we can use wireless system to detect fault in multi core cables. By using wireless system, we can locate the fault by placing the cable fault locator near the cables.

56

APPENDICES I
;CABLE HEALTH CHECKING-TRANSMITTER ;----------;p0.0;p2.0- led output ;P3.0- data output ;P3.1-data output ;30h=00, ;39= ;r0 r1 int counter[28] ;r5 dly counter nop ajmp begin org 000bh ljmp int org 0050h begin: mov sp,#60h mov tcon,#00h mov ie,#00h mov p2,#00h mov p3,#00h mov 30h,#00h mov 31h,#00h setb p1.1 setb p1.0 setb p1.2 setb p1.3 setb p1.4 setb p1.5 setb p1.6 setb p1.7 mov th0,#06h mov tmod,#02h mov psw,#00h mov r2,#14h mov r1,#0c8h mov r5,#0fh setb tcon.4 mov ie,#82h start: mov p3,#0aah lcall dlyq mov p3,#55h lcall dlyq ljmp start org 0000h

57

dlyq: dly2q: dly1q:

push psw mov psw,#00h mov r5,#05h mov r6,#30h djnz r6,dly1q djnz r5,dly2q pop psw ret

;delay ;30 ;r5 dly counter

int:

push psw push acc push dpl push dph mov psw,#00h djnz r2,in1 mov r2,#14h djnz r1,in1 mov r1,#0c8h ljmp intnest in1: ljmp intend intnest: mov a,30h cjne a,#00h,int3 mov 30h,#55h setb p2.0 ljmp intend int3: mov 30h,#00h clr p2.0 intend: pop dph pop dpl pop acc pop psw reti

end

APPENDICES II
58

;CABLE HEALTH CHECKING-RECIVER ;----------;p0.0-p0.7 lcd data ;p2.0- Rs,P2.1-R/W,P2.2-E ;P3.0- INPUT ;P3.1 ;30h=00, ;39= ;r0 r1 int counter[28] ;r5 dly counter nop ajmp begin org 000bh ljmp int org 0050h begin: mov sp,#60h mov tcon,#00h mov ie,#00h mov p2,#00h mov p3,#00h mov 30h,#00h mov 31h,#00h mov 40h,#20h mov 41h,#20h mov 42h,#20h mov 43h,#20h mov 44h,#20h ;eeprom addd mov 45h,#20h mov 46h,#20h mov 47h,#20h mov 48h,#20h mov th0,#06h mov tmod,#02h mov psw,#00h mov r2,#14h mov r1,#0c8h mov r5,#0fh setb p1.1 setb p1.0 setb p1.2 setb p1.3 setb p1.4 setb p1.5 setb p1.6 setb p1.7 setb tcon.4 mov ie,#82h lcdisp:mov a,#3ch 59 org 0000h

acall comd1 lcall dly1 mov a,#3ch acall comd1 lcall dly1 mov a,#3ch acall comd1 lcall dly1 mov a,#3ch acall command mov a,#0eh acall command mov a,#06h acall command mov a,#01h acall command star: mov a,#80h acall command mov p0,#20h acall comd2 mov p0,#20h acall comd2 mov p0,#20h acall comd2 mov a,#81h acall command mov p0,#43h acall comd2 mov p0,#43h acall comd2 mov p0,#43h acall comd2 mov a,#82h acall command mov p0,#41h acall comd2 mov p0,#41h acall comd2 mov p0,#41h acall comd2 mov a,#83h acall command mov p0,#42h acall comd2 mov p0,#42h acall comd2 mov p0,#42h acall comd2 mov a,#84h acall command mov p0,#4ch

;8bits,2 rows,5*10 dots ;strop command to disply ;screen,cursour on ;strop command to disply ;shift cursor right ;strop command to disply ;clear memory and home cursor ;strop command to disply

; blank

; C

;A

; B

60

acall comd2 mov p0,#4ch acall comd2 mov p0,#4ch acall comd2 mov a,#85h acall command mov p0,#45h acall comd2 mov p0,#45h acall comd2 mov p0,#45h acall comd2 mov a,#86h acall command mov p0,#20h acall comd2 mov p0,#20h acall comd2 mov p0,#20h acall comd2 mov a,#87h acall command mov p0,#43h acall comd2 mov p0,#43h acall comd2 mov p0,#43h acall comd2 mov a,#88h acall command mov p0,#48h acall comd2 mov p0,#48h acall comd2 mov p0,#46h acall comd2 mov a,#89h acall command mov p0,#45h acall comd2 mov p0,#45h acall comd2 mov p0,#45h acall comd2 mov a,#8Ah acall command mov p0,#43h acall comd2 mov p0,#43h acall comd2

; L

;e

; blank

; C

; H

; E

;C 61

mov p0,#43h acall comd2 mov a,#8bh acall command mov p0,#4bh acall comd2 mov p0,#4bh acall comd2 mov p0,#4bh acall comd2 mov a,#8ch acall command mov p0,#49h acall comd2 mov p0,#49h acall comd2 mov p0,#49h acall comd2 mov a,#8dh acall command mov p0,#4eh acall comd2 mov p0,#4eh acall comd2 mov p0,#4eh acall comd2 mov a,#8eh acall command mov p0,#47h acall comd2 mov p0,#47h acall comd2 mov p0,#47h acall comd2 mov a,#8fh acall command mov p0,#20h acall comd2 mov p0,#20h acall comd2 mov p0,#20h acall comd2 mov a,#0c0h acall command mov p0,#20h acall comd2 mov p0,#20h acall comd2 mov p0,#20h acall comd2

; K

; I

;N

; G

; blank

; blank

62

mov a,#0c1h acall command mov p0,#20h acall comd2 mov p0,#20h acall comd2 mov p0,#20h acall comd2 mov a,#0c2h acall command mov p0,#20h acall comd2 mov p0,#20h acall comd2 mov p0,#20h acall comd2 mov a,#0c3h acall command mov p0,40h acall comd2 mov p0,40h acall comd2 mov p0,40h acall comd2

; blank

; blank

; 40

mov a,#0c4h acall command mov p0,41h acall comd2 mov p0,41h acall comd2 mov p0,41h acall comd2 mov a,#0c5h acall command mov p0,42h acall comd2 mov p0,42h acall comd2 mov p0,42h acall comd2 mov a,#0c6h acall command mov p0,43h acall comd2 mov p0,43h acall comd2 mov p0,43h

;mov cursor to space 7,line1

;41

;42

;43 63

acall comd2 mov a,#0c7h acall command mov p0,44h acall comd2 mov p0,44h acall comd2 mov p0,44h acall comd2 mov a,#0c8h acall command mov p0,45h acall comd2 mov p0,45h acall comd2 mov p0,45h acall comd2 mov a,#0c9h acall command mov p0,46h acall comd2 mov p0,46h acall comd2 mov p0,46h acall comd2 mov a,#0cah acall command mov p0,47h acall comd2 mov p0,47h acall comd2 mov p0,47h acall comd2 mov a,#0cbh acall command mov p0,48h acall comd2 mov p0,48h acall comd2 mov p0,48h acall comd2 mov a,#0cch acall command mov p0,49h acall comd2 mov p0,49h acall comd2 mov p0,49h acall comd2 mov a,#0cdh acall command

;44

;45

;46

;47

;48

;49

64

mov p0,#20h acall comd2 mov p0,#20h acall comd2 mov p0,#20h acall comd2 mov a,#0ceh acall command mov p0,#20h acall comd2 mov p0,#20h acall comd2 mov p0,#20h acall comd2 mov a,#0cfh acall command mov p0,#20h acall comd2 mov p0,#20h acall comd2 mov p0,#20h acall comd2 ljmp STAR command: push acc acall ready pop acc mov p0,a lcall comd1 ret comd1: clr p2.0 clr p2.1 setb p2.2 clr p2.2 ret setb p2.0 clr p2.1 setb p2.2 clr p2.2 ret

;blank

;blank

;blank

;3.3-2.0 ;3.4-2.1 ;3.5-2.2

comd2:

ready:clr p2.0 setb p2.1 setb p2.2 mov p0,#0ffh mov a,p0 clr p2.2 anl a,#80h cjne a,#00h,ready 65

ret dly: dlyx: push psw mov psw,#00h mov r6,#02h djnz r6,dlyx pop psw ret push psw mov psw,#00h mov r5,#20h mov r5,#03h djnz r5,dlyx1 pop psw ret push psw mov psw,#00h mov r5,#05h mov r6,#30h djnz r6,dly1q djnz r5,dly2q pop psw ret ;delay

dly1: ; dlyx1:

;delay ;

dlyq: dly2q: dly1q:

;delay ;30 ;r5 dly counter

keyread: push psw push acc mov p3,#0ffh mov a,p3 ; anl a,#0aah cjne a,#0aah,krd1 mov 30h,#55h ljmp krdend krd1: mov p3,#0ffh mov a,p3 ; anl a,#55h cjne a,#55h,krd2 mov 30h,#55h ljmp krdend krd2: mov 30h,#00h ljmp krdend krdend: pop acc pop psw ret

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push psw push acc push dpl push dph mov a,30h cjne a,#55h,time1 mov 40h,#20h mov 41h,#20h mov 42h,#20h mov 43h,#20h mov 44h,#20h mov 45h,#67h mov 46h,#6fh mov 47h,#6fh mov 48h,#64h mov 49h,#20h ljmp tend time1: mov 40h,#20h mov 41h,#4eh mov 42h,#6fh mov 43h,#74h mov 44h,#20h mov 45h,#67h mov 46h,#6fh mov 47h,#6fh mov 48h,#64h mov 49h,#20h tend: pop dph pop dpl pop acc pop psw ret int: push psw push acc push dpl push dph mov psw,#00h djnz r2,in1 mov r2,#14h djnz r1,in1 mov r1,#32h ljmp intnest in1: ljmp intend intnest: lcall keyread ; lcall keyread lcall time intend: pop dph pop dpl pop acc 67

time:

pop psw reti

end

BIBLIOGRAPHY
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 Mohammed Ali Mazidi and Janice Gillispe Mazidi rafiquzzaman, the 8051 Microcontroller and Embedded sytems. REFERENCE WEBSITES
1. 2. 3. 4. 5.

www.microcontroller.com www.wikipedia.com www.cablejoints.com www.atmel.com www.google.com

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