48th IEEE International Midwest Symposium on Circuits and Systems, Cincinnati, Ohio, U.S.A.

, 7-10 August, 2005

Full Custom Design of the Interface for an in vitro

Neural Biosensor
Zihong Liu1, Student Member, IEEE, Pengsheng Huang2, Zhihua Wang2, Senior Member, IEEE, Lei Feng3,
Chun Zhang2, Dongmei Li1, Shangkai Gao3, Senior Member, IEEE, Xindong Song2, Tianling Ren2
1
Department of Electronic Engineering, Tsinghua University, Beijing 100084, China
2
Institute of Microelectronics, Tsinghua University, Beijing 100084, China
3
Department of Biomedical Engineering, Tsinghua University, Beijing 100084, China
Liuzihong00@mails.tsinghua.edu.cn, Hps02@mails.tsinghua.edu.cn

Abstract—This paper describes the interface design for an in

vitro neural biosensor which tends to combine biological
neural network and integrated circuits together in a micro-
system for intelligent bio-computation. As a simple case,
design and fabrication process for the 4×4 Microelectrode-
Array (MEA) that interfaces neural tissue with circuits is
presented in detail. The experimental results have primarily
demonstrated good performance of the MEA that was
fabricated in IC Manufacture Center for IME of Tsinghua
University. A tentative 256×256 MEA containing two
128×128 MEAs (one for stimulation while the other for
recording) for the final biosensor can hopefully arise from it
by the same token. Additionally, we also briefly present the Fig.1. Schematic representation: Top view of the hybrid neural chip
front-end design for the neural recording in this paper. structure for intelligent recognition [2].

In this paper, we’ll focus on presenting the full

I. INTRODUCTION
The development of MEMS technology and neuro-
science has resulted in more and more neural-electronic
hybrid systems in the past several decades. Although a
variety of biosensors or bioelectronics have been develop-
ed for neuroscience research, people still need more efforts
to learn from the ‘brain’.
Based on microelectronics and neurobiology, neuron-
silicon interaction chip has become an emerging field in
recent years [1]-[3]. In [2], we have proposed a hybrid
neural network chip jointing VLSI and biological neurons
on a single silicon wafer for intelligent recognition. The
basic working principles of the neural chip contain three
blocks (see Fig.1. [2]): 1) Raw input signal pre-processing
integrated circuits; 2) Living neural tissue (e.g. brain slice,
single neurons to be cultured) that grows spontaneously in
vitro on the silicon-based Microelectrode-Array (MEA); 3)
Post-processing assembly for the signals recorded by the
MEA.
custom design and fabrication process for the interface
components that mainly include MEA and front-end
circuits. However, the 4×4 MEA reported herein is just a
preliminary sample of the tentative 256×256 fully
integrated silicon MEA (containing two 128×128 MEAs,
one for stimulation while the other for recording) for the
final biosensor chip. The MEA will be directly connected
to the CMOS front-end on the silicon wafer.
II. 4×4 MICROELECTRODE ARRAY FOR TEST
Fig.2 illustrates the schematic view of a single silicon
shaft with four electrode sites (for recording or
stimulation).

This research was supported in part by the National Natural Science

Foundation of China (No. 60475018, No. 60372021) and National Key
Basic Research and Development Program (No. G2000036508). Fig.2. Schematic view of a single silicon shaft with four electrode sites.
 48th IEEE International Midwest Symposium on Circuits and Systems, Cincinnati, Ohio, U.S.A., 7-10 August, 2005

The fabrication process for the MEA is outlined Partial SEM micrograph of the 4×4 MEA that was
particularly in Fig. 3 as well as the following text (italic fabricated in the IC Manufacture Center for Institute of
letters refer to Fig. 3): Microelectronics, Tsinghua University, is shown in Fig.4.
(a) Thermal oxidation of silicon was performed both
on the front side and back side. An LPCVD silicon nitride
layer was deposited as the KOH resist. A window was
opened on the back side using reactive ion etching (RIE)
and in buffered HF successively. Then the wafer backside
was etched down to ~50µm left in KOH.
(b) The remaining nitride layer was first RIE etched,
after which the silicon oxidation was etched in buffered
HF. New thermal oxidation of silicon was performed on
the front side. Ti/Au (~1000 Å) was e-beam evaporated
and patterned with a photo-resist lift-off process, to form
conductor traces.
(c) A PECVD silicon nitride layer was deposited as an
intermediate dielectric.
(d) Trace windows were opened by etching the nitride
layer in HF. Al (~8000 Å) was e-beam evaporated and
patterned with a wet etching process, to form the bond Fig.4. SEM photomicrograph of the 4×4 microelectrode-array.
pads.
(e) Windows (20µm×20µm) were opened to the Au III. FRONT-END FOR NEURAL RECORDING
electrodes using RIE.
Neural responses activated by the external stimulation
(f) With a resist mask the remaining nitride layer was signals will be recorded by the MEA and finally sent to the
first RIE etched, after which the silicon was etched in an post-processing integrated circuits. As for the on-chip
inductively coupled plasma deep reactive ion etching signal processing, the hardware design has further been
equipment (ICP DRIE), to release the probe shafts. discussed in some recent reports [4]-[7]. In this paper,
according to the specific measurement performance of the
MEA presented above, we have designed the on-chip
CMOS preamplifier-array for the neural recording.

A. Parameter Measurement of the Microelectrode

Fig.3. Schematic illustration of the fabrication process described in
the text (not to scale). (a) Thermal oxidation, Si3N4 deposited, litho 1,
Si3N4 etch, SiO2 etch and Si etch, (b) SiN etch, SiO2 etch, thermal
oxidation, litho 2 and Ti/Au deposited and lift off, (c) Si3N4 deposited, (d)
litho 3, Si3N4 etch and Al deposited, (e) litho 4, Si3N4 etch, (f) litho 5,
Si3N4 etch and Si etch.
We tested the microelectrode with a standard setup for
3-point impedance measurements [8] with Agilent 4284A
LCR Meter. The microelectrode impedance is character-
rized in 0.9% saline solution at room temperature, by a Pt
counter electrode and an Ag/AgCl reference electrode. The
input signal for test is a sine wave with a magnitude of
70mV (ideally similar to that of a neural action potential).
Fig. 5(a) shows the measured results of the electrode
impedance with respect to different frequencies; Fig. 5(b)
shows the measured phase-frequency relationship, it’s
obvious that the total impedance exhibits capacitive.
Hence, we can make the microelectrode equivalent to the
parallel connection of a resistor Re and a capacitor Ce [6].
Fig.5(c) shows the measured relationship between the
equivalent capacitance Ce and the varying frequency.
When the frequency is 1KHz, the total impedance of the
microelectrode is about 1.3MOhm and the equivalent
capacitance is 132pF or so.
 48th IEEE International Midwest Symposium on Circuits and Systems, Cincinnati, Ohio, U.S.A., 7-10 August, 2005

180
4
10 160
Impedance |Z| (K Ohm)

Capacitance (pF)
140
3
10
120

100
2
10 80

60
1
10
40

20
10 100 1k 10k 100k 1M
10 100 1k 10k 100k 1M
Frequency (Hz)
Frequency (Hz)
(a) (c)
Fig.5. (a) The measured electrode impedance Vs. frequency.
(b) Phase Vs. frequency. (c)Equivalent capacitance Vs. frequency
-60

-80 B. Analog Front-End: Preamplifier Array

In order to record the useful neural signal typically
Phase (degrees)

-100
with a magnitude in the range of 50–500µV, a frequency
in the range of 0.1–10 kHz, a random DC open circuit
potential offset that is developed at the electrode-
-120 electrolyte interface and may be as high as
positive/negative several hundred millivolts, design of the
-140
preamplifier array faces a lot of challenges. Several low-
power, low-noise as well as efficient DC baseline rejection
methods have been reported [4]-[7]. As shown in Fig.6, in
-160
10 100 1k 10k 100k 1M
our design, we have proposed a new DC rejection way
Frequency (Hz) with two inversely cascade PMOS transistors located at
the input of the preamplifier to form a symmetric
(b) equivalent high-impedance resistor for both positive and
negative DC offset as high as several volts. Based on [4],
Fig.6 shows the full preamplifier circuit topology in our
design. The preamplifier has a nominal AC gain of 60dB;
in the meantime it can largely reject the DC offset
developed at the electrode-electrolyte surface. We’ll pre-

Equivalent of

the Microelectrode

Fig.6. Proposed preamplifier circuit topology

 48th IEEE International Midwest Symposium on Circuits and Systems, Cincinnati, Ohio, U.S.A., 7-10 August, 2005
sent the design of the preamplifier in more detail in
another forthcoming paper.
IV. EXPERIMENT ON THE INTERFACE
In order to verify the recording ability of the interface
for the final in vitro neural biosensor chip, we mounted the
MEA on a PCB board (Fig. 7a) and built a platform to
record the electrical signals transmission in sciatic nerve
trunk of the bullfrog. The calf muscle was dissected and
cultured in the Ringer's solution. Later we laid the sciatic
nerve trunk on the microelectrode array as well as referen-
cing Ag electrodes (Fig. 7b). Electrical pulse stimulations
were added at the distal end and middle site of the nerve.
Fig.8 shows the measurement results. It can be seen that
the magnitude of the electrical signals recorded by the
MEA increases with the stimulation current Isti until Isti>
6mA when the display shows to enter saturation.
(a)
Sciatic Nerve of the Bull frog
Referencing Ag-
Electrode
MEA
(b)
Fig.7. (a) Microelectrode array mounted on a PCB board for test.
(b) Experimental setup for recording the electrical signals transmission
in sciatic nerve trunk of the bullfrog.
V. CONCLUSIONS
The full custom design and fabrication process of the
interface for an in vitro neural biosensor which tends to
combine biological neural network and integrated circuits
together in a microsystem for intelligent bio-computation
has been presented. A 4×4 microelectrode array that
interfaces neural tissue with circuits has been fabricated
for test and experimentally demonstrated to be with good
performance. Based on it, a tentative 256×256 MEA
containing two 128×128 MEAs for the final biosensor can
hopefully arise from this work thereof with some more
challenges. Analog front-end including novel preamplifier
array for neural recording has also been briefly described;
more details focusing on the novel preamplifier will be
discussed in another forthcoming paper.
Isti = 1mA Isti = 2mA
Isti = 3mA Isti = 4mA
10mV
1s
Isti = 6mA Isti = 10mA
Fig.8. The recorded electrical signals by the MEA under different
current stimulation to the bullfrog sciatic nerve with magnitude Isti from
1mA to 10mA; the interval of stimulation is set to be 1s, while the
stimulation pulse width is Tsti = 60×40μs.
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