ASK1CA Development Board User's Manual: Shenzhen Tencent Computer Technology Co., LTD

Shenzhen Tencent Computer Technology Co., Ltd.
ASK1CA Development Board Users Manual
August 28, 2010
August 28, 2010
Preface
The ASK1CA provides a cost-efficient development board for use by FPGA beginners. This educational tool features a 144-pin Cyclone FPGA on a 1/4 A4-paper size (10.5 x 14.85 cm) PCB equipped with a variety of I/Os and displays for use in a multitude of experiments covered in associated VLSI reading materials. Two models of the development board exist, with Cyclone FPGAs of differing capabilities: Model ASK1CA-3 ASK1CA-6 Description EP1C3TC144 (30,000 gates) FPGA w/ EPCS1 1MB PROM for start-up design storage EP1C6TC144 (60,000 gates) FPGA w/ EPCS4 4MB PROM for start-up design storage
The difference between the boards resides in the density of the FPGA and the accompanying PROM chip and not in the functions it can perform with the included I/O devices.
Chapter I
An introduction to the ASK1CA Development Board.
1.1 Interface characteristics
August 28, 2010
A list of features of the ASK1CA development board are as follows: A 30,000 Gate Cyclone EP1C3 FPGA or 60,000 Gate Cyclone EP1C6 (144-pin TQFP Package) (EP1C3TC144 / EP1C6TC144) 1M-Byte or 4M-Byte Parallel Flash, and programming configuration PROM chip 128K bytes of fast asynchronous SRAM 8-bit VGA display output 9-pin RS-232 serial DM9 9 - pin female port (DCE terminal) PS/2 Mouse and Keyboard Port Eight 7-segment LED Eight Orange LEDs Four Push buttons 10 MHz Quartz clock source (on back of the board) 50 MHz Quartz clock source FPGA Configuration Indicator LED 22-pin I/O expansion connector (2.54mm pitch double-pin) JTAG and AS download ports 5V and USB external power supply sockets Power Status LEDs
1.2 Power-on demo

Upon initial start-up of the board, an LED blink demo contained in the non-volatile PROM will be uploaded to the FPGA. This demo will remain on the PROM until it is overwritten, where upon start-up subsequent designs will be uploaded.
August 28, 2010
Chapter II
Interactive functions present on the board.
2.1 LEDs
ASK1CA comes with eight LED lights labelled LED0 - LED7, featured in the table are LED Name LED5 LED6 LED7 LED8 LED9 LED10 LED11 LED12 FPGA Pin 10 11 27 28 31 32 33 34
2.2 Push Buttons

ASK1CA study panel with four buttons, labels, respectively, BT3 --- BT6, the following key arguments to the FPGA Button Name S3 S4 S5 S6 FPGA Pin 4 5 6 7
Fast asynchronous SRAM

ASK1CA board a 128K bytes of 15 ns asynchronous SRAM model for CY7C1019CV33 The principle see the figure below
August 28, 2010
2.3 Seven-Segment Displays

Two, 4-digit seven segment displays are included on the ASK1CA board, controlled individually by selecting the figure LED0 - LED7 with their distinct signals LEDA - LEDDP defining the character to be displayed. Signal LEDA LEDB LEDC LEDD LEDE LEDF LEDG LEDDP LED0 LED1 LED2 LED3 LED4 LED5 LED6 LED7 FPGA Pin 39 41 49 47 42 40 50 48 35 36 37 38 51 52 53 56
2.4 Clock Input

Onboard the ASK1CA, a 50MHz quartz crystal connected to the FPGA global clock inputs rising-edge GCLK0 (pin 16) and falling-edge GCLK1 (pin 17).
2.5 LCD Matrix Display

The ASK1CA includes a 1602 LCD Matrix Display whose module can be communicated to via 16-pin IO connector (CON9 may not be marked). This shares connections with the neighbouring 22-pin IO connector (CON10) used for similar devices. Supply voltage for these connectors can be selected by the CON8 jumper (upper pins 5v, lower pins 3.3v).
August 28, 2010
The following table concerns the 16-pin connector: Data bit D0 D1 D2 D3 D4 D5 D6 D7 RS (1 = Data, 0 = Inst) RW EN FPGA Pin 60 61 62 67 68 69 70 71 57 58 59
2.6 Extended I/O Block

ASK1CA 2.54 double needle with a 22 pin, 1602-character liquid crystal pin to pin, when You need to be extended to other, you can remove the 1602-character LCD, so the 1602 character LCD occupied by the IO port will be able to get Come to you for extended experiments.
2.7 SRAM Interface

SRAM Address Bus Configuration Address bit A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 FPGA Pin 72 73 74 75 84 85 86 96 97 98 99 100 103 110 111 112
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Write Enable (WE), Output Enable (OE) and Control Signal (CE) Function WE OE CE SRAM Data Bus Configuration Data bit D0 D1 D2 D3 D4 D5 D6 D7 FPGA Pin 77 78 79 82 22 23 26 27 FPGA Pin 83 109 76
2.8 VGA Output

The ASK1CA DE-15F connection for the VGA Output is as follows VGA Colour Input VSYNC HSYNC R0 R1 R2 G0 G1 G2 B0 B1 FPGA Pin 128 129 125 124 123 122 121 120 119 114
2.9 Buzzer
Function Buzzer FPGA Pin 134
August 28, 2010
2.10 RS-232 Serial Port

Function TXD RXD FPGA Pin 142 141
2.11 PS/2 Keyboard and Mouse Interface

Function CON2 CLK CON2 DATA CON3 CLK CON3 DATA FPGA Pin 140 139 132 133
2.12 I2C Interface

Function SCL SDA FPGA Pin 131 130
August 28, 2010

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