You are on page 1of 2

Arab Academy for Science & Technology and Maritime Transport College of Engineering & Technology Department of Electronics

and Communications Engineering


Cairo Campus

EC 535
Instructor: E-mail: Office: Off. Hrs: Phone #: GTA: E-mail: Office: Off. Hrs: Phone #:

Digital VLSI Design


Course Outline
Prof. Hazem H. Ali hazem@aast.edu C101

S2012

Eng. Hesham Hamdy


ec_aast_hesham@yahoo.com

B412

268-5615 (6, 7, 8) / Ext.: 504 / 551 The objective of this course is to achieve an understanding CMOS Digital Design Objective: circuits and Layout CMOS VLSI DESIGN, Neil H.E Weste and David Harris, Addison Wisley Press, Text: 2005 1. Lecture Notes. References: 2. Principle of VLSI Design, Neil H.E. Weste Online Resources http://www.ac.tut.fi/aci/courses/76527/ 7th Week (30%): Exam I: 20 % Assignments: 10 % Grading: Project 30%

Final Exam (40%)

Week of
Lecture 1
20th Feb

EVENT
Introduction to MOS transistor Introduction to Microwind_1 Basic Gates Design: Inverter, NAND, Combinational Logic and NOR Gates Basic Inverter and NAND design using Microwind Digital design logic using Stick Diagram-Compound Gates-Pass Transistors and Transmission Gates-Tristates From Stick Diagram to Layout MUX design -Latches and flip flop Design-Top level Interface-Block Diagram Circuit and Physical Design MUX, Latches and flip flops using microwind MOS Transistor Theory_1 : Introduction Ideal I-V Characteristics C-V Charcteristics Non Ideal I-V Characteristics Problem Sets 1 MOS Transistor Theory_2: DC Transfer Characteristics Microwind Quiz Exam I Revision Circuit Characterization and Performance Estimation_1: Introduction Delay Estimation- Logical Effort and transistor sizing-Power Dissipation Problem Sets 2 Circuit Characterization and Performance Estimation_2: Interconnect Delay in logic circuit using Microwind and DSCH Combinational Circuit Design: Dynamic Circuits Pass Transistor Circuits Sequential Circuit Design_1: Introduction- Sequencing Static Circuit Problem Sets 3 Sequential Circuit Design_2: Circuit Design of Latches and Flip Flops [Conventional CMOS circuits] Problem sets 4 Testing and Verifications Projects Discussion VHDL Introduction to VHDL Revision

Tutorial 2
27th Feb

Lecture Tutorial

Lecture
5th March

Tutorial Lecture

12th March

Tutorial

Lecture
19th March

6 7

26th March 2nd April

Tutorial Lecture Tutorial Lecture Tutorial Lecture

9th April

Tutorial 9 Lecture
16th April

Tutorial Lecture Tutorial

10

23th April

11 12 13 14 15

30th May

Lecture Tutorial Lecture Tutorial Lecture Tutorial Lecture Tutorial

7th May 14th May 21st May 28th May

Final Exam

Good Luck

You might also like