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CSE 3442/5442
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A/D Conversion
The process of A/D conversion involves:
Band-limiting the analog signal Setting periodic sampling points (setting a sampling period) at which the continuous time analog signal is going to be digitized. Freezing the analog signal at the sampling points so that the signal does not change for the duration of conversion (sample and hold) Determining what digital value best represents the analog signal level (quantizing).
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Periodic Sampling
Now that we have limited the bandwidth of the signal, we need to sample it. The Nyquist/Shannon theorems say that you need to sample the signal at least at twice the maximum frequency contained in the signal. (E.g., if you limited your signal to a max frequency of 10Hz, You should sample it at least at 20Hz, i.e., 20 times a second). In many cases though we start from the sampling frequency and having a good understanding of that we limit the signal to at most half of that. 7
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Example: Oversampling
If original signal was indeed nicely limited, oversampling will result in more samples than we need for processing and reconstruction (i.e., burden on our calculations/ processor time) Shown here is 20 samples per second (a sampling clock of 20Hz)
Sampled Version of x(t) with Ts = 0.05 s 2
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Example: Undersampling
Undersampling will result loosing the features of a signal. If we wanted to reconstruct the signal the reconstructed signal (red) would not look the same as the original (black) signal What is the sampling clock used here?
Sampling x(t) and x 1(t) with Ts = 0.2 s 2
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Quantization
Now that the signal is not changing for some time (depending on the sampling period), we need to determine what digital value best represents the analog level. This will take some time, which should not be more than the sampling period! There are many methods of doing this, many microcontrollers use successive approximation to do this.
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CONTROL LOGIC
11 V3 10 V2 01 V1 V0 00
Vin time
Set DAC output to V2 = 01 DAC generates analog voltage V2 (Vin>V2) Set MSB to 1
DAC
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DAC now generates V3 Set LSB to 0 since V3>Vin Digitize in n Bits = n Cycles Due to errors does not scale well to above 12 -14 bits
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A/D Converters
Analog-to-digital converters (A/D converters or ADCs) are used to convert continuous signals to discrete values.
Resolution: usually expressed in n-bits. Conversion time: how long it takes to convert from analog to digital. Reference: what is the reference (e.g., the highest and lowest value to which we are comparing). Linear vs. non-linear transfer (equal step size vs. changing step size) 15
ADC Resolution
n-bits, where n can be any number but rarely below 8 or rarely higher than 24. Resolution determines the quantization steps. An 8-bit ADC has 256 different values, thus if Vmin (V-ref) is 0V and Vmax (V+ref) is 5V and the quantization is linear, then the precision is 5/256 ~= 19.5mV (we could say 10mV). The resolution of an AD converter is unchangeable (we can lower it from software by ignoring LSBs), but the Vref can be changed to fit the dynamic range of the sensor to increase precision. 16
Vref
We know that the resolution (n-bits) determines how many quantization steps there are, thus determining the relative scale. What determines the absolute scale though, i.e., what voltage value represents 0 and what voltage value represents 0b11111111 (for 8-bit resolution)? V-ref and V+ref are used for that. ADC circuitries usually have a default of V-ref=Vss and V+ref=Vcc . However most ADCs let you feed in analog voltages representing V-refand V+ref.
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Vref (contd)
In general Vref-s could be any voltage but many times it is required to be within [Vss, Vcc]. The PIC microcontrollers built in ADCs do require that. So, whats the step size of an 8-bit ADC where V-ref =2V and V+ref=3V? (3.9mV) What would happen if V-ref =-2V and V+ref=2V, how would we want the values represented? The digital output can be expressed in a number of coding schemes, such as binary, or two's complement binary, or offset binary. If we know all this, we can reconstruct the voltage level in software.
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Stand-alone ADCs
Parallel versus serial output:
An n-bit parallel output ADC has n-pins to talk to a CPU unit in addition to data ready and channel selection bits. Less CPU time, more data pins. A serial output ADC has two pins to talk to the CPU, one for clock, the other for data. More CPU time, few pins. Can be a combination, where (similarly to how we talk to the LCD) x-bits at a time are sent out serially. Can balance CPU time and pins.
Number of analog input channels (i.e., how many sensor can be connected). They can be multiplexed (one ADC) or parallel (many ADCs inside). Start and end of conversion signals. We need to tell the ADC when to start conversion (indication of sampling) and it has to have feedback on when the conversion is finished. Thus there can be many pins in an ADC for communication and ADC channels. Most PIC microcontrollers have ADC peripherals built in. The above will have an effect on these peripherals.
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PIC18 ADC
ADC can be found on most PIC18-s as an integrated peripheral The on chip ADC peripheral needs to be programmed before use. SFR registers are used for all communications between the ADC peripheral and the CPU. PIC18 ADC-s are 10-bit, successive approximation. (Other microcontrollers have different precision and architecture on chip ADCs). Thus two 8-bit registers are needed with 6 bits unused (ADRESL and ADRESH). Up to 16 analog channels (8 for PIC18F452; AN0-AN7) multiplexed to a single ADC. Reference voltage can be fed. Control registers used to set-up and start conversion.
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Sampling Frequency
Note, that we have only described a single conversion. If periodical conversion needs to be set up, the GO bit has to be turned on periodically and data produced (ADRESH, ADRESL) has to be read periodically. This can be done by:
Calculating timing (i.e., NOP instructions after DONE) Using timer peripherals (not covered yet) Proper interrupt processing.
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Using Interrupts with the ADC We can ask the ADC peripheral to notify us when a conversion is done. This way we do not have to constantly poll it. The PIE1.ADIE mask is used to enable the interrupt (remember to enable GIE, and recall priorities!). The PIR1.ADIF flag is set when interrupt is triggered.
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Sensor Interfacing and Signal Conditioning Sensors can be of many kinds but mainly active or passive. If they are passive then they usually change their resistance (or charge) relative to the measured physical value, e.g., PTC and NTC temperature sensors, pressure sensors, etc. Active sensors these days are by far more common (as we prefer linear response), and thus need a voltage supply and provide a controlled voltage output.
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Sensor Interfacing and Signal Conditioning (Passive Thermistor) As a passive sensor lets look at a typical thermistor: Thermistor
Temperature [C] Resistance 0 29490 25 10000 50 3893 75 1000 100 817
35000 30000 25000 Ohm 20000 15000 10000 5000 0 0 20 40 60 Celsius 80 100 120
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Sensor Interfacing and Signal Conditioning (Passive Thermistor) We need to convert this resistance into a voltage that we can sample. A voltage divider can come in handy:
Vcc
R1
Rt
What should the value of R1 be? How should Vref-s be set? Why is C necessary, what should be the value? 37
Sensor Interfacing and Signal Conditioning (Active Sensors) Active sensors output voltage that is proportional to the measured physical value. In many cases the output voltage is linear on some accepted physical scale (e.g., Celsius, Pascal, Hgmm, g, rpm, etc.) So what happens if the output voltage range is well within the supply range of the microcontroller? (Vref) What happens if the output voltage range is well outside the supply range of the microcontroller? (Resistor/diode conditioning) 38 Bandwidth should still be limited!
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Rf
Vs
2R I/2
2R I/4
2R I/8
2R I/16
2R
Rf
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MAX522
3-wire serial interface Two 8-bit, buffered DACs
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MAX522 DAC
3-wire serial Interface
!CS: needs to be kept low when feeding in data. Rising edge will modify behavior of DAC. SCLK: every rising edge data is clocked in (<5MHz) DIN: Data line
Each command is 16 bits long For PIC interfacing, we can program it directly or use serial communication peripherals
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Summary
AD conversion is the process of taking an analog level and converting it to a digital value. Many times we are interested in continuous time signals and thus have to sample that signal periodically. The Nyquist/Shannon theorems tell us to sample at least at twice the highest frequency for the signal to be reconstructable. First signal has to be band-limited, then sampled, then samples converted. After digital processing then the signal can be reconstructed using a DAC.
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