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Lecture - 11: Applications of Operational Amplifiers

Analog Inverter and Scale Changer:


The circuit of analog inverter is shown in fig. 1. It is same as inverting voltage amplifier. Assuming OPAMP to be an ideal one, the differential input voltage is zero. i.e. vd = 0 Therefore, v1 = v2 = 0 Since input impedance is very high, therefore, input current is zero. OPAMP do not sink any current. iin= if vin / R = - vO / Rf vo = - (Rf / R) vin If R = Rf then vO = -vin, the circuit behaves like an inverter. If Rf / R = K (a constant) then the circuit is called inverting amplifier or scale changer voltages.

Fig. 1

Inverting summer:
The configuration is shown in fig. 2. With three input voltages va, vb & vc. Depending upon the value of Rf and the input resistors Ra, Rb, Rc the circuit can be used as a summing amplifier, scaling amplifier, or averaging amplifier. Again, for an ideal OPAMP, v1 = v2. The current drawn by OPAMP is zero. Thus, applying KCL at v2 node

This means that the output voltage is equal to the negative sum of all the inputs times the gain of the

Fig. 2

circuit Rf/ R; hence the circuit is called a summing amplifier. When Rf= R then the output voltage is equal to the negative sum of all inputs.

vo= -(va+ vb+ vc)


If each input voltage is amplified by a different factor in other words weighted differently at the output, the circuit is called then scaling amplifier.

The circuit can be used as an averaging circuit, in which the output voltage is equal to the average of all the input voltages. In this case, Ra= Rb= Rc = R and Rf / R = 1 / n where n is the number of inputs. Here Rf / R = 1 / 3. vo = -(va+ vb + vc) / 3 In all these applications input could be either ac or dc.

Noninverting configuration:
If the input voltages are connected to noninverting input through resistors, then the circuit can be used as a summing or averaging amplifier through proper selection of R1, R2, R3 and Rf. as shown in fig. 3. To find the output voltage expression, v1 is required. Applying superposition theorem, the voltage v1 at the noninverting terminal is given by

Hence the output voltage is


Fig. 3

This shows that the output is equal to the average of all input voltages times the gain of the circuit (1+ Rf / R1), hence the name averaging amplifier. If (1+Rf/ R1) is made equal to 3 then the output voltage becomes sum of all three input voltages. vo = v a + vb+ vc Hence, the circuit is called summing amplifier.

Example - 1
Find the gain of VO / Vi of the circuit of fig. 4. Solution:

Current entering at the inveting terminal

Applying KCL to node 1,

Applying KCL to node 2,

Fig. 4 Thus the gain A = -8 V / VO

xample - 2
Find a relationship between VO and V1 through V6 in the circuit of fig. 5.

Fig. 5 Solution: Let's consider of V1 (singly) by shorting the others i.e. the circuit then looks like as shown in fig. 6.

The current flowing through the resistor R into the i/e.

The current when passes through R, output an operational value of

Let as now consider the case of V2 with other inputs shorted, circuit looks like as shown in fig. 7.

Fig. 6

Now VO is given by

same thing to V4 and V6 net output V" = V2 + V4 + V6 (3) From (2) & (3) V' + V" = (V2 + V4 + V6 ) - (V1 + V3 + V5) So VO = V2 + V4 + V6 V1 - V3 - V5. Example - 3
1. Show that the circuit of fig. 8 has A = VO / Vi = - K (R2 / R1) with K = 1 + R4 / R2 + R4 / R3, and Ri = R1. 2. Specify resistance not larger than 100 K to achieve A = -200 V / V and Ri = 100 K.

Fig. 7

Fig. 8 Solution:

Lecture - 12: Applications of Operational Amplifiers

Differential Amplifier:
The basic differential amplifier is shown in fig. 1.

Fig. 1 Since there are two inputs superposition theorem can be used to find the output voltage. When Vb= 0, then the circuit becomes inverting amplifier, hence the output due to Va only is Vo(a) = -(Rf / R1) Va Similarly when, Va = 0, the configuration is a inverting amplifier having a voltage divided network at the noninverting input

Example - 1

Find vout and iout for the circuit shown in fig. 2. The input voltage is sinusoidal with amplitude of 0.5 V.

Fig. 2 Solution: We begin by writing the KCL equations at both the + and terminals of the op-amp. For the negative terminal,

Therefore, 15 v- = vout For the positive terminal,

This yields two equations in three unknowns, vout, v+ and v-. The third equation is the relationship between v+ and v- for the ideal OPAMP, v + = vSolving these equations, we find vout = 10 vin = 5 sin t V Since 2 k resistor forms the load of the op-amp, then the current iout is given by

Example - 2
For the different amplifier shown in fig. 3, verify that

Fig. 3 Solution: Since the differential input voltage of OPAMP is negligible, therefore, v1= vx and v2 = vy The input impedance of OPAMP is very large and, therefore, the input current of OPAMP is negligible.

Thus And From equation (E-1)

or From equation (E-2)

or The OPAMP3 is working as differential amplifier, therefore,

Integrator:
A circuit in which the output voltage waveform is the integral of the input voltage waveform is called integrator. Fig. 4, shows an integrator circuit using OPAMP.

Fig. 4 Here, the feedback element is a capacitor. The current drawn by OPAMP is zero and also the V2 is virtually grounded. Therefore, i1 = if and v2 = v1 = 0

Integrating both sides with respect to time from 0 to t, we get

The output voltage is directly proportional to the negative integral of the input voltage and inversely proportional to the time constant RC. If the input is a sine wave the output will be cosine wave. If the input is a square wave, the output will be a triangu lar wave. For accurate integration, the time period of the input signal T must be longer than or equal to RC. Fig. 5, shows the output of integrator for square and sinusoidal inputs.

Fig. 5

Example - 3
Prove that the network shown in fig. 6 is a non-inverting integrator with .

Solution: The voltage at point A is vO / 2 and it is also the voltage at point B because different input voltage is negligible. vB = VO / 2 Therefore, applying Node current equation at point B,

Fig. 6

Lecture - 13: Applications of Operational Amplifiers

Differentator:
A circuit in which the output voltage waveform is the diffe rentiation of input voltage is called differentiator.as shown in fig. 1.

Fig. 1 The expression for the output voltage can be obtained from the Kirchoff's current equation written at node v2.

Thus the output vo is equal to the RC times the negative instantaneous rate of change of the input voltage vin with time. A cosine wave input produces sine output. fig. 1 also shows the output waveform for different input voltages. The input signal will be differentiated properly if the time period T of the input signal is larger than or equal to Rf C. T Rf C As the frequency changes, the gain changes. Also at higher frequen cies the circuit is highly susceptible at high frequency noise and noise gets amplified. Both the high frequency noise and problem can be corrected by additing, few components. as shown in fig. 2.

Fig. 2

Voltage to current converter:


Fig. 3, shows a voltage to current converter in which load resistor RL is floating (not connected to ground).

The input voltage is applied to the non-inverting input terminal and the feedback voltage across R drives the inverting input terminal. This circuit is also called a current series negative feedback, amplifier because the feedback voltage across R depends on the output current iL and is in series with the input difference voltage vd. Writing the voltage equation for the input loop. vin = vd + vf But vd since A is very large,therefore, vin = vf vin = R iin iin = v in / R. and since input current is zero. iL = iin = vin ./ R The value of load resistance does not appear in this equation. Therefore, the output current is independent of the value of load resistance. Thus the input voltage is converted into current, the source must be capable of supplying this load current.

Fig. 3

Grounded Load:
If the load has to be grounded, then the above circuit cannot be used. The modified circuit is shown in fig. 4.

Since the collector and emitter currents are equal to a close approximation and the input impedance of OPAMP is very high,the load current also flows through the feedback resistor R. On account of this, there is still current feedback, which means that the load current is stabilized. Since vd= 0 v2 = v1 = vin iout = (vCC vin ) / R Thus the load current becomes nearly equal to iout. There is a limit to the output current that the circuit can supply. The base current in the transistor equals iout / dc. Since the op-amp has to supply this base current iout / dcmust be less than Iout (max) of the op-amp, typically 10 to 15mA. There is also a limit on the output voltage, as the load resistance increases, the load voltage increases and then the transistor goes into saturation. Since the emitter is at Vin w. r. t. ground, the maximum load voltage is slightly less than Vin.

Fig. 4

In this circuit, because of negative feedback VBEis automatically adjusted. For instance, if the load resistance decreases the load current tries to increase. This means that more voltage is feedback to the inverting input, which decreases VBE just enough to al most completely nullify the attempted increase in load current. From the output current expression it is clear that as Vin increases the load current decreases. nother circuit in which load current increases as Vin increases is shown in fig. 5.

The current through the first transistor


is i = v in / R This current produces a collector voltage of v C = vCC i R = vCC vin Since this voltage drives the noninverting input of the second op-amp. The inverting voltage is vCC- vin to a close approximation. This implies that the voltage across the final R is vCC - (vCC - v in ) = v in and the output current . iout = vin / R As before, this output current must satisfy the condition,that Iout/ dc must be less than the Iout(max) of the OPAMP. Furthermore, the load voltage cannot exceed vCC- vin because of transistor saturation, therefore Iout R must be less than vCC- vin.This current source produces unidirectional load current. fig. 6, shows a Howland current source, that can produce a bidirectional load current.

Fig. 5

Fig. 6 The maximum load current is VCC/ R. In this circuit v in may be positive or negative. Lecture - 14: Applications

Current to voltage converter:


The circuit shown in fig. 1, is a current to voltage converter.

Fig. 1 Due to virtual ground the current through R is zero and the input current flows through Rf. Therefore, vout =-Rf * iin

The lower limit on current measure with this circuit is set by the bias current of the inverting input.

Example

1:

For the current to current converter shown in fig. 2, prove that

Fig. 2 Solution: The current through R1 can be obtained from the current divider circuit.

Since, the input impedance of OPAMP is very large, the input current of OPAMP is negligible.

Thus,

Example - 2
(a). Verify that the circuit shown in fig. 3 has input impedance.

(b). If Z is a capacitor, show that the system behaves as an inductor. (c). Find the value of C in order to obtain a 1H inductance if R1 = R2= 1K.

Fig. 3 Solution: Let the output of OPAMP (1) be v and the output of OPAMP (2) be vo. Since the differential input voltage of the OPAMP is negligible, therefore, the voltage at the inverting terminal of OPAMP (1)will be vi.

For the OPAMP (2),

or, (b). Let the input voltage be sinusoidal of frequency ( If Z is a capacitor, then Z = 1 / C /2 )

Let L = C R1 R2 Therefore, and the system behaves as an inductor.

(c). Given R1 = R2 = 1 K, L = 1 H

Example - 3
Show that the circuit of fig. 4 is a current divider with io = ii / ( 1 + R2 + R1) regardless of the load.

Fig. 4 Solution: since non-inverting and inverting terminals are virtually grounded. Therefore, V1 = VL. Now applying KCL to node (1)

Now current is

Example - 4
(a). For the circuit shown in fig. 5 prove that

. (b). Verify that if R3 / R4 = R1 / R2, the circuit is an instrumentation amplifier with gain A = 1 + R2 / R1. Solution: Here

Fig. 5

(b).

So in this condition circuits as an instrument amplifier with gain

Example - 3
Obtain an expression of the type iO = Vi / R - VO / RO for the circuit shown in fig. 6. Hence verify that if R4 / R3 = R2 / R1 the circuit is a V-I converter with RO = and R = R1 R5 / R2 .

Fig. 6 Solution: Here

iO = current through the resistor.

where

So when

then, Lecture - 15: Applications

Filters:
A filter is a frequency selective circuit that, passes a specified band of frequencies and blocks or attenuates signals of frequencies out side this band. Filter may be classified on a number of ways. 1. Analog or digital 2. Passive or active 3. Audio or radio frequency Analog filters are designed to process only signals while digital filters process analog signals using digital technique. Depending on the type of elements used in their consideration, filters may be classified as passive or active. Elements used in passive filters are resistors, capacitors and inductors. Active filters, on the other hand, employ transistors or OPAMPs, in addition to the resistor and capacitors. Depending upon the elements the frequency range is decided. RC filters are used for audio or low frequency operation. LC filters are employed at RF or high frequencies. The most commonly used filters are these: 1. 2. 3. 4. Low pass filters High pass filter Band pass filter Band reject filter.

5. All pass filter Fig. 1, shows the frequency response characteristics of the five types of filter. The ideal response is shown by dashed line. While the solid lines indicates the practical filter response.

Fig. 1 A low pass filter has a constant gain from 0 Hz to a high cutoff frequency fH. Therefore, the bandwidth is fH. At fH the gain is down by 3db. After that the gain decreases as frequency increases. The frequency range 0 to fH Hz is called pass band and beyond fH is called stop band. Similarly, a high pass filter has a constant gain from very high frequency to a low cutoff frequency fL. below fL the gain decreases as frequency decreases. At fL the gain is down by 3db. The frequency range fL Hz to is called pass band and bleow fL is called stop band.

First Order Low Pass Filter:

Fig. 2, shows a first order low pass Butter-worth filter that uses an RC network for filtering, opamp is used in non-inverting configuration, R1 and Rf decides the gain of the filter. According to voltage divider rule, the voltage at the non-inverting terminal is:

Fig. 2

Thus the low pass filter has a nearly constant gain Af from 0 Hz to high cut off frequency fH. At fH the gain is 0.707 Af and after fH it decreases at a constant rate with an increases in frequency. fH is called cutoff frequency because the gain of filter at this frequency is reduced by 3dB from 0Hz.

Filter Design:
A low pass filter can be designed using the following steps: 1. Choose a value of high cutoff frequency fH. 2. Select a value of C less than or equal to 1 F. 3. Calculate the value of R using . .

4. Finally, select values of R1 and RF to set the desired gain using

Example - 1
Design a low pass filter at a cutoff frequency of 1 kH z with a pass band gain of 2. Solution: Given fH = 1 kHz. Let C = 0.01 F. Therefore, R can be obtained as

A 20 k

potentiometer can be used to set the resistance R.

Since the pass band gain is 2, R1 and RF must be equal. Let R1 = R2 = 10 k .

Low pass filter with adjustable corner frequency


One advantage of active filter is that it is often quite simple to vary parameter values. As an example, a first-order low-pass filter with adjustable corner frequency is shown in fig. 3.

Fig. 3 The voltage at the opamp inputs are given by

Setting v + = v -, we obtain the voltage, v1, as follows:

where The second opamp acts as an inverting integrator, and

Note that we use upper case letters for the voltages since these are functions of s. K is the fraction of V1 sent to the integrator. That is, it is the potentiometer ratio, which is a number between 0 and 1. The transfer function is given by

The dc gain is found by setting s = 0 (i.e., j

=0)

The corner frequency is at KA2 / RC. Thus, the frequency is adjustable and is proportional to K. Without use of the opamp, we would normally have a corner frequency which is inversely propostional to the resistor value. With a frequency proportional to K, we can use a linear taper potentiometer. The frequency is then linearly proportional to the setting of the potentiometer.

Example - 2
Design a first order adjustable low-pass filter with a dc gain of 10 and a corner frequency adjustable from near 0 t0 1 KHz. Solution: There are six unknowns in this problems (RA, RF, R1, R2, R and C) and only three equations (gain, frequency and bias balance). This leaves three parameters open to choice. Suppose we choose the following values: C = 0.1 F R = 10 K R1 = 10K The ratio of R2 to R1 is the dc gain, so with a given value of R1 = 10K , R2 must be 100 k . We solve for A1 and A2 in the order to find the ratio, RF / RA. The maximum corner frequency occurs at K = 1, so this frequency is set to 2 x 1000. Since R and C are known, we find A2 = 6.28. Since A2 and A1 are related by the dc gain, we determine A1 / A2 = 10 and A1 = 62.8. Now, substituting the expression for A2, we find

and since we find RF / RA = 68. RA is chosen to achieve bias balance. The impedance attached to the noninverting input is 10 K || 100 K = 10 K .

Fig. 4 If we assume that RF is large compared with RA ( we can check this assumption after solving for these resistors), the parallel combination will be close to the value of RA. We therefore can choose RA = 10 K . With this choice of RA, RF is found to be 680K and bias balance is achieved. The complete filter is shwn in fig. 4. Lecture - 16: Filters and Precision Diode

Second Order Low-Pass Butterworth filter:


A stop-band response having a 40-dB/decade at the cut-off frequency is obtained with the secondorder low-pass filter. A first order low-pass filter can be converted into a second-order low-pass filter by using an additional RC network as shown in fig. 1.

Fig. 1

Fig. 2

The gain of the second order filter is set by R1 and RF, while the high cut-ff frequency fH is determined by R2, C2, R3 and C3 as follows:

Furthermore, for a second-order low pass Butterworth response, the voltage gain magnitude is given by

where, Except for having the different cut off frequency, the frequency response of the second order low pass filter is identical to that of the first order type as shown in fig. 2.

Filter Design:
The design steps of the second order filter are identical to those of the first order filter as given bellow: 1. Choose a value of high cutoff frequency fH. 2. To simplify the design calculations, set R2 = R3 = R and C2 = C3 = C. Then choose a value of C less than 1 F. 3. Calculate the value of R using . 4. Finally, because of the equal resistor (R2 = R3) and capacitor (C2 = C3) values, the pass band voltage gain AF has to be equal to 1.586. This gain is necessary to guarantee Butterworth response. Therefore, RF = 0.586 R1. Hence choose a value of R1= 100 k and calculate the value of RF.

First Order High Pass Butterworth filter:


Fig. 3, shows the circuit of first order high pass filter.This is formed by interchanging R and C in low pass filter. The lower cut off frequency is fL. This is the frequency at which the magnitude of the gain is 0.707 times its pass band value. All frequencies higher than fL are pass band frequencies with the highest frequency determined by the closed loop bandwidth of the OPAMP.

The magnitude of the gain of the filter

is Fig. 3

If the two filters (high and low) band pass are connected in series it becomes wide band filter whose gain frequency response is shown in fig. 4.

Precision Diodes:
If a sinusoid whose peak value is less than the threshold or cut in voltage Vd(-0.6V) is applied to the conventional half-wave rectifier circuit, output will remain zero. In order to be able to rectify small signals (mV), it is necessary to reduce Vd. By placing a diode in the feedback loop of an OPAMP, the cut in voltage is divided by the open loop gain A of the amplifier. Fig. 5, shows an active diode circuit.

Fig. 5 Hence VD is virtually eliminated and the diode approaches the ideal rectifying element. If the input Vin goes positive by at least VD/A, then the output voltage (=A vd ) exceeds VD and D conducts and thus, provides a negative feedback. Because of the virtual connection between the two inputs vO= vin-vd=vin- v D / A vin. Therefore, the circuit acts as voltage follower for positive signals (above 60 V=0.6 / 1*105) when Vin swing negatively, D is OFF and no current is delivered to the external load. By reversing the diode, the active negative diode can be made.

Active Clippers:
By slightly modifying the circuit, an active diode ideal clipper circuit is obtained. Fig. 6, shows an active clipper which clips the input voltage below v R.

Fig. 6 When vin < VR , then v' is positive and D conducts. Under these conditions, the OPAMP works as a buffer and the output voltage equals the voltage at non-inverting terminal Vout = VR. If vin > VR, then v' is negative and D is OFF and vO = vin RL / (RL + R) Vi if R << RL Thus, output follows input for vin > VR and vO is clamped to VRif vin < VR by about 60 V. Fig. 7, shows the output

waveform of clipper circuit.When D is reverse biased a large differential voltage may appear between inputs and the OPAMP must be capable to withstand this voltage.

Fig. 7

Active Half Wave Rectifier:


The Active half wave rectifier is shown in fig. 8.

Fig. 8

Fig. 9

If vin is positive then output of the OPAMP becomes negative (the non inverting terminal is grounded). Thus diode D2 conducts and provides a negative feedback. Because of the feedback through D2 a virtual ground exists at the input. Thus diode D1 acts as open circuit. The output voltage under this condition is given by vo = v - = 0. If vin goes negative, then output of the OPAMP becomes positive. Thus D1 is conducting and D2 is off. Thus, the circuit behaves as an inverting amplifier. The output of the circuit is given by

The resultant output voltage will be positive. If v in is a sinusoid, the circuit per forms half wave rectification. The transfer characteristic of the half wave active rectifier is shown in fig. 9. The output

does not depend upon the diode forward voltage (vd). Thus, because of the high open loop gain of the OPAMP, the feedback acts to cancel the diode turn-on (forward) voltage. This leads to improved performance since the diode more closely approximates the ideal device.

Axis Shifting of the Half Wave Rrectifier:


The half wave rectified output waveform can be shifted along the vin axis. This is done by using a reference voltage added to the input voltage of the rectifier as shown in fig. 10. This termed axis shifting. It adds or subtracts a fixed dc voltage to the input signal. This process shifts the diode turnon voltage point. If a negative reference voltage, VREF, is applied to the circuit, the diode turns on when the input voltage is still positive. This shifts the vout/ vin transfer characteristic to the right. If a positive reference voltage is applied, the vout/ vin transfer characteristic shifts to the left. These shifted characteristics are shown in fig. 10.

Fig. 10

Fig. 11

The input-output voltage characteristics can also be shifted up or down. This is termed level shifting and is accomplished by adding a second OPAMP with a reference voltage added to the negative input terminal as shown in fig. 11. Lecture - 17: Applications of Operational Amplifiers

Active Full Wave Rectifier:


Method 1: A full wave rectifier, or magnitude operator, produces an output which is the absolute value, or magnitude, of the input signal waveform. One method of accomplishing full wave rectification is to use two half wave rectifiers. One of these operates on the positive portion of the input and the

second operates on the negative portion. The outputs are summed with proper polarites. Fig. 1 illustrates one such configuration. Note that the resistive network attached to the ouput summing opamp is composed of resistors of higher value than those attached to the opamp that generates v1. This is necessary since for negative vin, v2 follows the curve shown above the node labled v2. That is, as the input increases in a negative direction, v2 increases in a positive direction. Since the input impedance to the non-inverting terminal of the summing opamp is high, the voltage, v+ is simply one half of v2 (i.e., the two 100K resistors form a voltage divider). The voltage at the negative summing terminal, v-, is the same as v+, and therefore is equal to v2 / 2. Now when vin is negative, D2 is open, and the node v1 is connected to the inverting input of the first opamp through a 5 K resistor. The inverting input is a virtual ground since the non-inverting input is tied to ground through a resistor. The result is that the voltage divider formed by the 100 K and 5K resistors. In order to achive a characteristic resembling that shown in the figure, this voltage divider must have a small ratio, on the order of 1 to 20.

Fig. 1 Method 2: The method of full wave rectification discussed above requires three separate amplifiers. One simpler circuit or active full wave rectifier, which makes use of only two OPAMPs, is shown in fig. 2. It rectifies the input with a gain of R / R1, controllable by one resistor R1.

Fig. 2 When v in is positive then v' = negative, D1 is ON and D2 is virtual ground at the input to (l). Because D2 is non-conducting, and since there is no current in the R which is connected to the non-inverting input to (2), therefore, V1 =0. Hence, the system consists of two OPAMP in cascade with the gain of A1 equal to (-R / R1) and the gain of A2 equal to (-R / R) = -1. The resultant at voltage output is vo = (R / R1 ) v in > 0 (for vin > 0 voltage output of (1) ) Consider now next half cycle when v in is negative. The v' is positive D1 is OFF and D2 is ON. Because of the virtually ground at the input to (2) V2 = V1 = V Since the input terminals of (2) are at the same (ground) poten tial, the current coming to the inverting terminal of (1) is as indicated infig. 2.

The output voltage is vo = i R + v where i = v / 2R (because input impedance of OPAMP is very high).

The sign of vo is again positive because vin is negative in this half cycle. Therefore, outputs during two half cycles are same; and full wave rectified output voltage is obtained also shown in fig. 2.

Clampers:
Fig. 3, shows an active positive clamper circuit.

Fig. 3 The first negative half cycle produces a positive OPAMP output, which turns ON the diode. This capacitor charges to the peak of the input with the polarity shown in fig. 3. Just beyond the negative peak the diode turns off, the feedback loop opens, and the virtual ground is lost. Therefore, vout = vin + VP Since VP is being added to a sinusoidal voltage, the final output waveform is shifted positively through VP volts. The output wave form swing from 0 to 2VP as shows in fig. 4. Again the reduction of the diode-offset voltage allows clamping with low-level inputs. During most of the cycle, the OPAMP operates in negative saturation. Right at the negative input peak, the OPAMP produces a sharp positive going pulse that replaces any change lost by the clamping capacitor between negative input peaks.

Fig. 4

Comparators:

An analog comparator has two inputs one is usually a constant reference voltage VR and other is a time varying signal vi and one output vO. The basic circuit of a comparator is shown in fig. 5. When the noninverting voltage is larger than the inverting voltage the comparator produces a high output voltage (+Vsat). When the non-inverting output is less than the inverting input the output is low (-Vsat). Fig. 5, also shows the output of a comparator for a sinusoidal.

Fig. 5 vO = -Vsat if vi > VR = + Vsat if v i < VR If VR = 0, then slightest input voltage (in mV) is enough to saturate the OPAMP and the circuit acts as zero crossing detector as shown in fig. 6. If the supply voltages are 15V, then the output compliance is from approximate 13V to +13V. The more the open loop gain of OPAMP, the smaller the voltage required to saturate the output. If v drequired is very small then the characteristic is a vertical line as shown in fig. 6.

Fig. 6 If we want to limit the output voltage of the comparator two voltages (one positive and other negative) then a resistor R and two zener diodes are added to clamp the output of the comparator. The circuit of such comparator is shown in fig. 7, The transfer characteristics of the circuit is also shown in fig. 7.

Fig. 7 The resistance is chosen so that the zener operates in zener region. When VR= 0 then the output changes rapidly from one state to other very rapidly every time that the input passes through zero as shown in fig. 8.

Fig. 8 Such a configuration is called zero crossing detector. If we want pulses at zero crossing then a differentiator and a series diode is connected at the output. It produces single pulses at the zero crossing point in every cycle. Lecture - 18: Applications of Operational Amplifiers

Schmitt Trigger:
If the input to a comparator contains noise, the output may be erractive when vin is near a trip point. For instance, with a zero crossing, the output is low when vin is positive and high when vin is negative. If the input contains a noise voltage with a peak of 1mV or more, then the comparator will detect the zero crossing produced by the noise. Fig. 1, shows the output of zero crossing detection if the input contains noise.

Fig. 1

Figure 19.2

This can be avoided by using a Schmitt trigger, circuit which is basically a comparator with positive feedback. Fig. 2, shows an inverting Schmitt trigger circuit using OPAMP. Because of the voltage divider circuit, there is a positive feedback voltage. When OPAMP is positively saturated, a positive voltage is feedback to the non-inverting input, this positive voltage holds the output in high stage. (v in< vf). When the output voltage is negatively saturated, a negative

voltage feedback to the inverting input, holding the output in low state. When the output is +Vsat then reference voltage Vref is given by

If Vin is less than Vref output will remain +Vsat. When input vin exceeds Vref = +Vsat the output switches from +Vsat to voltage is given by Vsat. Then the reference

The output will remain

Vsat as long as vin > Vref.

Fig. 3

Fig. 4

If vin < Vref i.e. vin becomes more negative than Vsat then again output switches to +Vsat and so on. The transfer characteristic of Schmitt trigger circuit is shown in fig. 3. The output is also shown in fig. 4 for a sinusoidal wave. If the input is different than sine even then the output will be determined in a same way. Positive feedback has an unusual effect on the circuit. It forces the reference voltage to have the same polarity as the output voltage, The reference. voltage is positive when the output voltage is high (+vsat) and negative when the output is low ( vsat). In a Schmitt trigger, the voltages at which the output switches from +vsat to vsat or vice versa are called upper trigger point (UTP) and lower trigger point (LTP). the difference between the two trip points is called hysteresis.

Fig. 5 The hysteresis loop can be shifted to either side of zero point by connecting a voltage source as shown in fig. 5. When VO= +Vsat , the reference. Voltage (UTP) is given by

When VO= -Vsat , the reference. Voltage (UTP) is given by

If VR is positive the loop is shifted to right side; if VR is negative, the loop is shifted to left side. The hysteresis voltage Vhys remains the same.

Non-inverting Schmitt trigger:


In this case, again the feedback is given at non-inverting terminal. The inverting terminal is grounded and the input voltage is connected to non-inverting input. Fig. 6, shows an non-inverting schmitt trigger circuit.

Fig. 6 To analyze the circuit behaviour, let us assume the output is negatively saturated. Then the feedback voltage is also negative (-Vsat). Then the feedback voltage is also negative. This feedback voltage will hold the output in negative saturation until the input voltage becomes positive enough to make voltage positive.

When vin becomes positive and its magnitude is greater than (R2 / R1) Vsat, then the output switches to +Vsat. Therefore, the UTP at which the output switches to +Vsat, is given by

Simillarly, when the output is in positive saturation, feedback voltage is positive. To switch output states, the input voltage has to become negative enough to make. When it happens, the output changes to the negative state from positive saturation to negative saturation voltage negative.

When vin becomes negative and its magnitude is greater than R2 / R1 vsat, then the output switches to -vsat. Therefore,

The difference of UTP and LTP gives the hysteresis of the Schmitt trigger.

In non inverting Schmitt trigger circuit, the

is defined as

Example - 1
Design a voltage level detector with noise immunity that indicates when an input signal crosses the nominal threshold of 2.5 V. The output is to switch from high to low when the signal crosses the threshold in the positive direction, and vice versa. Noise level expected is 0.2 VPP, maximum. Assume the output levels are VH = 10 V and VL = 0V. Solution: For the triggering action required an inverting configuration is required. Let the hysteresis voltage be 20% larger that the maximum pp noise voltage, that is, Vhys = 0.24V. Thus, the upper and lower trigger level voltages are -2.5 0.12, or UTP = 2.38 V and LTP = -2.62 V Since the output levels are VH and VL instead of +Vsat and given by Vsat, therefore, hysteresis voltage is

or and

The reference voltage V R can be obtained from the expression of LTP.

Given that VL = 0, and LTP= -262, we obtain VR = (1 + R2 / R1) LTP = (1 + 1 / 40.7) (-2.62) = - 2.68 V We can select any values for R2 and R1 that satisfy the ratio of 40.7. It is a good practice to have more than 100 k for the sum of R1and R2 and 1 k to 3k for the pull up resistor on the output. The circuit shown in fig. 7 shows a possible final design. The potentiometer serves as a fine adjustment for VR, while the voltage follower makes VR to appear as an almost ideal voltage source.

Fig. 7 Lecture - 19: Schmitt Trigger and Relaxation Oscillator

Example - 1
The Schmitt trigger circuit of fig. 1 uses 6V zener diodes with VD = 0.7 V. if the threshold voltage V1 is zero and the hysteresis is VH = 0.2V. Calculate R1 / R2 and VR.

Fig. 1 Solution: The normal output voltage of Schmitt trigger circuit will be either +VO or Where, VO = VZ + VD = 6.7 V VO,

Let the output voltage be +VO. The voltage V1 can be obtained from the voltage divider circuit consisting of R1 and R2.

When vin > V1 then vo = -VO Therefore, upper trigger point voltage will be given by,

Similarly, the lower trigger point voltage will be given by,

Therefore, the hysteresis voltage is

Since, the threshold voltage v1 is zero,

Therefore,

Relaxation Oscillator:
With positive feedback it is also possible to build relaxation oscillator which produces rectangular wave. The circuit is shown in fig. 2.

Fig. 2 In this circuit a fraction R2/ (R1 +R2) = of the output is feedback to the non-inverting input terminal. The operation of the circuit can be explained as follows: Assume that the output voltage is +Vsat. The capacitor will charge exponentially toward +Vsat. The feedback voltage is +Vsat. When capacitor voltage exceeds +Vsat the output switches from +Vsat to -Vsat. The feedback voltage becomes -Vsat and the output will remain Vsat. Now the capacitor charges in the reverse direction. When capacitor voltage decreases below Vsat (more negative

than Vsat ) the output again switches to +Vsat.This process continues and it produces a square wave. Under steady state conditions, the output voltage and capacitor voltage are shown in fig. 2. The frequency of the output can be obtained as follows: The capacitor charges from - Vsat to + Vsat during time period T/2. The capacitor charging voltage expression is given by

This square wave generator is useful in the frequency range of 10Hz to 10KHz. At higher frequencies, the slew rate of the OPAMP limits the slope of the output square wave. he duty cycle of the output wave can be changed replacing the resistance R by another circuit consisting of variable resistance and two diodes D1 and D2 as shown in fig. 3.

Fig. 3

Fig. 4

When the output is positive then D2 conducts and D1 is OFF. The total feedback resistance becomes Rb+R and charging voltage is reduced by VD. During the interval when the output is negative then D1 conducts and D2 is OFF. The charging resistance becomes R+Ra. The total charging and reverse charging period is decided by total resistance (2 R + Ra + Rb) = constant. Therefore frequency will remain constant but duty cycle changes. The capacitor voltage and output voltage of the oscillator are shown in fig. 4.

The duty cycle is given by By varying Ra and Rb the duty cycle can be charged keeping frequency constant.

Example - 2
Characterize the astable mulitvibrator shown in fig. 5. Establish the frequency range.

Fig. 5 Solution: By observing the way the output section is connected, we conclude that the output voltage oscillates between VL = - 5V and VH = + 5V. To calculate the oscillation frequency range, two extreme values for R1 and R2 are used. Thus, when the wiper of the potentiometer is at its leftmost position, R1 = 120 k and R2 = 10 k . At the other extreme, R1 = 20 k and R2 =110 k . Substituting the values of R1 and R2 in the expression of T, we obtain the two extreme values of T, i.e., Tmin and Tmax

Therefore, fmin = 285 Hz and fmax = 4.6 kHz Lecture - 20: Applications of Operational Amplifiers

Triangular Wave Generator:

In the relaxation oscillator discussed in the previous lecture, capacitor voltage VC has a near triangular wave shape but the sides of the triangles are exponentials rather than straight line. To linear size the triangles, it is required that C be charged with a constant current rather that the exponential current through R. The improved circuit is shown in fig. 1.

Figure 21.1 In this circuit an OPAMP integrator is used to supply a constant current to C so that the output is linear. Because of inversion through the integrator, this voltage is fedback to the non-inverting terminal of the comparator rather than to the inverting terminal. The inverter behaves as a noninverting schmitt trigger. The voltage vR is used to shift the dc level of the triangular wave and voltage vs is used to change the slopes of the triangular wave form is shown in fig. 2.

Fig. 2 To find the maximum value of the triangular waveform assume that the square wave voltage vOis at its negative value = -Vsat. With a negative input, the output v (t) of the integrator is an increasing ramp. The voltage at the non-inverting comparator input v1 is given by

When v1 rises to VR, the comparator changes state from - Vsat to +Vsat and v(t) starts decreasing

linearly similarly, when v1 falls below v R the comparator output changes from +vsat to -vsat. Hence the minimum value of triangular vmin occurs for v1 = vR. Hence the peak value Vmax of the triangular waveform occurs for v1 = VR. Therefore,

The peak to peak swing is given by

The average output voltage is given by . If VR = 0, the waveform extends between -Vsat (R2 / R1 ) and +Vsat (R2 /R1). The sweep times T1 and T2 for Vs = 0 can be calculated as follows: The capacitor charging current is given by

where, vc = -vout is the capacitor voltage.

For vout = -Vsat,

. Therefore,

When the output voltage of first OPAMP is +Vsat, then, the voltage v1 is given by

As triangular voltage increases the voltage v1 also increases. At t = T1, when the voltage vout becomes Vmax, the voltage v1 becomes equal to VR and switching takes place. Therefore,

Similarly, when output voltage is +Vsat, the voltage v1 is given by

As triangular voltage decreases the voltage v1 also decreases. At t = T2, when the voltage vout becomes Vmin, the voltage v1 becomes equal to VR and switching takes place. Therefore,

Therefore,

Solving the above equations, we get

The frequency f is independent of VO, maximum frequency is limited either by slew rate or its maximum output current which determines the charging rate of C. Slowest speed is limited by the bias current of OPAMP. If unequal sweep intervals T1 T2 are desired, then VS can be changed. The positive sweep speed is given by (Vsat + VS) / RC and the negative sweep speed is given by (Vsat -VS)/ RC. The peak-to-peak triangular amplitude is unaffected by the voltage VS.

Therefore,

Similarly, when the output voltage of first OPAMP is

Vsat, then

Therfore,

Therefore,

The oscillation frequency is given by

and the duty cycle is given by

Example-1:

1. Consider the pulse generator shown in fig. 3. In the quiescent state (before a trigger pulse is applied), find V2, VO and V1. 2. At t = 0, a narrow, positive triggering pulse v whose magnitude exceeds VR is applied. At t = 0+, find VO and V1. 3. Verify that the pulse width T = RC ln (2 VO) / VR.

Fig. 3 Solution: (a). Before a trigger pulse is applied, the circuit is in stable stage with the output at vO = +VO ( 0.7). The capacitor C is charged with the polarity shown in fig. 3. Thus, v 1 0.7V VZ +

and v2 = -VR (b). At t = 0, a narrow positive triggering pulse of higher magnitude is applied. The capacitor C voltage can not charge instantaneously. Therefore, v2 becomes positive and greater than v1 ( 0.7 V). The comparator output changes. Thus, v O= - (VZ + 0.7V) = -VO Since capacitor C voltage can not change instantaneously, therefore, v1 = 2 VO (c). The input trigger pulse is of very short duration therefore, after the short duration pulse the voltage v2 returns to (-VR). But the output remains VO because v1 is at 2VO. The capacitor now starts charging exponentially with a time constant t = RC through R towards because diode is reverse biased. VC = (-VO VO) ( 1 e-t / RC ) - VO VO,

The voltage at point v1 is, thus, given by

V1 = - VO

vc e-t / RC ) - VO t / RC

= - VO + 2 VO (1 = - 2 VO e-t / RC

When v1 voltage becomes more than VR, the comparator output switches back to +VO. Let at t = T, the voltage v1 becomes VR

The capacitor now starts charging towards +VO through R until vc reaches +VO and v1 becomes 0.7 V. The waveforms at different points are shown in fig. 4.

Fig. 4

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