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CD54/74HC688, CD54/74HCT688

Data sheet acquired from Harris Semiconductor SCHS196A

September 1997 - Revised May 2000

High Speed CMOS Logic 8-Bit Magnitude Comparator


Description
The HC688 and HCT688 are 8-bit magnitude comparators designed for use in computer and logic applications that require the comparison of two 8-bit binary words. When the compared words are equal the output (Y) is low and can be used as the enabling input for the next device in a cascaded application.

Features
Cascadable Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads Wide Operating Temperature Range . . . -55oC to 125oC Balanced Propagation Delay and Transition Times Signicant Power Reduction Compared to LSTTL Logic ICs HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30%of VCC at VCC = 5V HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il 1A at VOL, VOH

[ /Title (CD74 HC688 , CD74 HCT68 8) /Subject (High Speed CMOS

Ordering Information
PART NUMBER CD54HC688F3A CD74HC688E CD74HC688M CD54HCT688F CD54HCT688F3A CD74HCT688E CD74HCT688M NOTES: 1. When ordering, use the entire part number. Add the sufx 96 to obtain the variant in the tape and reel. 2. Die for this part number is available which meets all electrical specifications. Please contact your local TI sales office or customer service for ordering information. TEMP. RANGE (oC) -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 PACKAGE 20 Ld CERDIP 20 Ld PDIP 20 Ld SOIC 20 Ld CERDIP 20 Ld CERDIP 20 Ld PDIP 20 Ld SOIC

Pinout
CD54HC688, CD54HCT688 (CERDIP) CD74HC688, CD74HCT688 (PDIP, SOIC) TOP VIEW
E A0 B0 A1 B1 A2 B2 A3 B3 1 2 3 4 5 6 7 8 9 20 VCC 19 Y 18 B7 17 A7 16 B6 15 A6 14 B5 13 A5 12 B4 11 A4

GND 10

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright

2000, Texas Instruments Incorporated

CD54/74HC688, CD54/74HCT688 Functional Diagram


A0 A1 A2 A3 A4 A5 A6 A7 B0 B1 B2 B3 B4 B5 B6 B7 2 4 6 8 11 13 15 17 Y 3 5 7 9 12 14 16 18 19

1 E

TRUTH TABLE INPUTS A, B A=B AB X E L L H OUPUTS Y L H H

NOTES: H = High Voltage Level, L = Low Voltage Level, X = Dont Care

CD54/74HC688, CD54/74HCT688 Logic Diagram

A0 2

B0 3

A1 4

B1 5

A2 6

B2 7

A3 8

B3 9

A4 11

B4 12

A5 13

B5 14

A6 15

B6 16

A7 17

B7 18

E 1

10 20

GND VCC

19 Y

CD54/74HC688, CD54/74HCT688
Absolute Maximum Ratings
DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V DC Input Diode Current, IIK For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . . .20mA DC Output Diode Current, IOK For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .20mA DC Output Source or Sink Current per Output Pin, IO For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .25mA DC VCC or Ground Current, ICC or IGND . . . . . . . . . . . . . . . . . .50mA

Thermal Information
Thermal Resistance (Typical, Note 3) JA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only)

Operating Conditions
Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Supply Voltage Range, VCC HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to VCC Input Rise and Fall Time 2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max) 4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max) 6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)
CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specication is not implied.

NOTE: 3. JA is measured with the component mounted on an evaluation PC board in free air.

DC Electrical Specications
TEST CONDITIONS PARAMETER HC TYPES High Level Input Voltage VIH 2 4.5 6 Low Level Input Voltage VIL 2 4.5 6 High Level Output Voltage CMOS Loads High Level Output Voltage TTL Loads Low Level Output Voltage CMOS Loads Low Level Output Voltage TTL Loads Input Leakage Current Quiescent Device Current II ICC VCC or GND VCC or GND VOL VIH or VIL VOH VIH or VIL -0.02 -0.02 -0.02 -4 -5.2 0.02 0.02 0.02 4 5.2 0 2 4.5 6 4.5 6 2 4.5 6 4.5 6 6 6 1.5 3.15 4.2 1.9 4.4 5.9 3.98 5.48 0.5 1.35 1.8 0.1 0.1 0.1 0.26 0.26 0.1 8 1.5 3.15 4.2 1.9 4.4 5.9 3.84 5.34 0.5 1.35 1.8 0.1 0.1 0.1 0.33 0.33 1 80 1.5 3.15 4.2 1.9 4.4 5.9 3.7 5.2 0.5 1.35 1.8 0.1 0.1 0.1 0.4 0.4 1 160 V V V V V V V V V V V V V V V V V V A A SYMBOL VI (V) IO (mA) VCC (V) 25oC MIN TYP MAX -40oC TO 85oC -55oC TO 125oC MIN MAX MIN MAX UNITS

CD54/74HC688, CD54/74HCT688
DC Electrical Specications
(Continued) TEST CONDITIONS PARAMETER HCT TYPES High Level Input Voltage Low Level Input Voltage High Level Output Voltage CMOS Loads High Level Output Voltage TTL Loads Low Level Output Voltage CMOS Loads Low Level Output Voltage TTL Loads Input Leakage Current Quiescent Device Current Additional Quiescent Device Current Per Input Pin: 1 Unit Load II ICC ICC (Note) VCC and GND VCC or GND VCC -2.1 VOL VIH or VIL VIH VIL VOH VIH or VIL -0.02 4.5 to 5.5 4.5 to 5.5 4.5 2 4.4 0.8 2 4.4 0.8 2 4.4 0.8 V V V SYMBOL VI (V) IO (mA) 25oC MIN TYP MAX -40oC TO 85oC -55oC TO 125oC MIN MAX MIN MAX UNITS

VCC (V)

-4

4.5

3.98

3.84

3.7

0.02

4.5

0.1

0.1

0.1

4.5

0.26

0.33

0.4

0 0 -

5.5 5.5 4.5 to 5.5

100

0.1 8 360

1 80 450

1 160 490

A A A

NOTE: For dual-supply systems theoretical worst case (VI = 2.4V, VCC = 5.5V) specication is 1.8mA.

HCT Input Loading Table


INPUT Enable Data Inputs UNIT LOADS 0.7 0.35

NOTE: Unit Load is ICC limit specied in DC Electrical Table, e.g., 360A max at 25oC.

Switching Specications Input tr, tf = 6ns


PARAMETER HC TYPES Propagation Delay (Figure 1) An to Output tPLH, tPHL CL = 50pF 2 4.5 CL =15pF CL = 50pF Bn to Output tPLH, tPHL CL = 50pF 5 6 2 4.5 CL =15pF CL = 50pF 5 6 14 14 170 34 29 170 34 29 210 42 36 210 42 36 255 51 43 255 51 43 ns ns ns ns ns ns ns ns TEST SYMBOL CONDITIONS VCC (V) 25oC MIN TYP MAX -40oC TO 85oC -55oC TO 125oC MIN MAX MIN MAX UNITS

CD54/74HC688, CD54/74HCT688
Switching Specications Input tr, tf = 6ns
PARAMETER E to Output (Continued) VCC (V) 2 4.5 CL =15pF CL = 50pF Output Transition Time (Figure 1) tTLH, tTHL CL = 50pF 5 6 2 4.5 6 Input Capacitance Power Dissipation Capacitance (Notes 4, 5) HCT TYPES Propagation Delay (Figure 1) An to Output Bn to Output tPLH, tPHL tPLH, tPHL tPLH, tPHL CL = 50pF CL =15pF CL = 50pF CL =15pF CL = 50pF CL =15pF 4.5 5 4.5 5 4.5 5 4.5 5 14 14 9 22 34 34 24 15 10 42 42 30 19 10 51 51 36 22 10 ns ns ns ns ns ns ns pF pF CIN CPD CL = 50pF CL =15pF 5 25oC MIN TYP 9 22 MAX 120 24 20 75 15 13 10 -40oC TO 85oC -55oC TO 125oC MIN MAX 150 30 26 95 19 16 10 MIN MAX 180 36 30 110 22 19 10 UNITS ns ns ns ns ns ns ns pF pF

TEST SYMBOL CONDITIONS tPLH, tPHL CL = 50pF

E to Output

Output Transition Time (Figure 1) Input Capacitance Power Dissipation Capacitance (Notes 4, 5) NOTES:

tTLH, tTHL CL = 50pF CIN CPD CL = 50pF CL =15pF

4. CPD is used to determine the dynamic power consumption, per gate. 5. PD = VCC2 fi (CPD + CL) where fi = Input Frequency, CL = Output Load Capacitance, VCC = Supply Voltage.

Test Circuit and Waveform


tr = 6ns ANY INPUT A OR B tPLH OUTPUT Y tTLH tTHL tPHL VS tf = 6ns 90% INPUT LEVEL VS 10% GND

FIGURE 1. PROPAGATION DELAY AMD TRANSITION TIMES

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