Digital Design and MOS Basics

1. How do you convert a XOR gate into a buffer and an inverter (Use only one XOR gate

for each)?
2. Implement a 2-input NAND gate using a 2x1 mux.

3. How can you convert a SR flip-flop to a JK flip-flop? 4. What are the differences between a flip-flop and a latch? 5. What is the difference between Mealy and Moore FSM?
6. Give the transistor level circuit of a CMOS NAND gate.

7. Give two ways of converting a two input NAND gate to an inverter.

8. Give the design of 8x1 multiplexer using 2x1 multiplexers. 9. Design 2 input AND, OR and XOR gates using 2 input NAND gate. 10. Implement a D-latch using 2x1 multiplexers.

11. Implement a full adder using muxs.

12. Realize A+(B.C+D.E) using CMOS.

13. What is meant by static and dynamic power with respect to the operation of a CMOS gate? Why do CMOS gates dissipate close to zero static power? Why is the static power not exactly zero? 14. What is substrate contact? Why it is required?
15. What is back biasing? How it effect the threshold voltage? 16. What is the antenna effect in CMOS layout? What are the design solutions to reduce

antenna effect? 17. Which gate is normally preferred while implementing circuits using CMOS logic NAND or NOR? Why?
18. What happens to the delay of a gate if we increase the load capacitance? Explain! 19. In a simple inverter circuit, if the PMOS in the Pull-Up Network is replaced by an

NMOS and if the NMOS in the Pull-Down Network is replaced by a PMOS transistor, will the design work as a non-inverting buffer? Justify your answer. 20. What is Latch Up? Explain Latch Up with cross section of a CMOS Inverter. How do you avoid Latch Up?