• step 1:

Initialize
TIMER0 PERIOD, TIMER0 CONFIG, TIMER0 WIDTH, TIMER0 ENABLE
To generate a wave of frequency greater than twice of 550Hz (11th ) harmonic.

Ensure that the positive half of the generated waveform is greater than 19
nsec (tconv ).

• step 2:
Load SPI CTL register, determine SCLK (System Clock) using PLL CTL and
PLL DIV registers. Set SPI BAUD register depending on value of SPI BAUD RATE.

• step 3:
Register interrupt Service Routine and enable Timer0 interrupt using SIC IMASK
register.

• step 4:
Enable or disable PF5 using SPI FLG register (programmable flag no. 5),used
for spi enable pin, on positive and negative half of the waveform respectively.

The AD7689 (16 bit serial ADC) after conversion sends the converted data using
SDO pin, when the signal to the CNV pin goes to active LOW. The PF5 pin is used
as slave select signal. The value send to PF5 pin is controlled by the interrupt setting
of the general purpose timer (TIMER0). It is evident that the data sent by the ADC
using the SDO (Serial Data Output) line can be retrieved by an appropriate definition
of the Interrupt Service Routine (ISR). The following steps outline the ISR definition
used

• step 1
Check SPI FLG register content. If SPI FLG=0x0000 goto step 3

• step 2:
Set SPI FLG=0x0000.

Initiate SPI transfer by writing AD7689 configuration register setting in the

SPI TDBR register (transmit data buffer register).

1
 Confirm data transmission (using SPI STAT register)

Confirm data receive from the AD7689 SDO pin (using the SPI STAT regis-
ter). Read and store the data from SPI RDBR register (receive data buffer
register).

• step 2:
Set SPI FLG=0x0020.