The MOS Transistor

VB VS VG VD
Gate

p+ n+ n+
Gate
Bulk Source Oxide Drain
Contact
Bulk p–

VB VS VG VD
Subthreshold Conduction:
Why Bother?
Current levels are extremely low (pA – nA)
+ Extremely low power dissipation (pW – nW)
– Circuits have a limited bandwidth (≤ 100 kHz)

Drain current saturates in about 4UT (100 mV)

+ Current source/sink from almost rail-to-rail
+ Facilitates low-voltage operation
– MOS resistors have a small linear range
Transconductance per unit current is max
+ Amplifiers have maximum gain
+ Reduced node voltage swings
+ Facilitates low-voltage operation
– VT0 mismatch is more pronounced
Exponential current/voltage characteristics
+ Very useful computational primitive
+ High dynamic range in currents
Surface Energy in Subthreshold
VB VS VG VD
Gate

p+ n+ n+

Bulk Source Channel Drain

Contact Depletion
Bulk Layer p–

Surface ψs
Energy VS
VDS
VD
 Subthreshold Channel Current
L

-( VS -y s) UT
N(x) - ( VD -y s) UT
NS µ e µ
ND e

V S – ys ys V D – ys
VS
VDS
VD
Current flow is by diffusion:
∂N ND - N S NS - ND
I = -WqD = -WqD = WqD
∂x L L
W - (V - y ) U - ( V -y ) U
=
L
(
qDN0 e S s T - e D s T )
ys ªy0 + kVG
W kVG UT - VS U T - VD U T
I=
L
I0e e ( -e )
 Capacitive-Divider
View of κ
ψs
bulk Cdep Cox gate

VG
– Vox +
surface
Vox = VG – ψs
Conservation of charge:
∂Qs ∂Qs
∆Qs = 0 = ∂ψ ∆ψs – ∂V ∆Vox
s ox

Cdep Cox

(Cox + Cdep) ∆ψs = Cox ∆VG

∂ψs ∆ψs Cox

≈ ∆V = =κ
∂VG G C ox + C dep
 MOS Transistor Circuit Symbols
D D D D D

GND GND
G B G B G G B G

S S S S S

nMOS transistors

S S S S S

VDD VDD
G B G B G G B G

D D D D D

pMOS transistors
 Subthreshold Channel Current
nMOS: VD
W kVG UT - VS UT VG
I=
L
I0e ( e
V U
- e- D T )
W (kVG - VS ) UT V U
I
=
L
I0e ( 1-e- DS T ) VS
W (kVG - VS ) UT
ª I0e (for VDS ≥ 4UT )
L
pMOS:
W -kVG UT VS UT V U
I=
L
I0 e ( e -eD T ) VS
W ( VS - kVG) UT I
VDS UT
=
L
I0e ( 1- e ) VG
W ( V - kV ) U VD
ª I0e S G T (for VDS £ - 4UT )
L
** Note here that VG < 0, VS < 0, and VD < 0.
 Subthreshold Channel Current
nMOS: VD
W kVG UT - VS UT VG
I=
L
I0e ( e - e- D T
V U
)
W (kVG - VS ) UT V U
I
=
L
I0e ( 1-e- DS T ) VS
W (kVG - VS ) UT
ª I0e (for VDS ≥ 4UT )
L
pMOS:
W k(VW -VG ) UT - (VW- VS ) UT VS
I=
L
I0 e ( e )
(V V ) U
- e- W - D T
W (VS -(1-k)VW -kVG ) UT I
VDS UT VG
=
L
I0e ( 1- e )
W (V - (1-k)VW -kVG ) UT VW
ª I0e S (for VDS £ - 4UT )
L
VD
** Note here that VG > 0, VS > 0, VD > 0, and VW > 0.
Subthreshold Channel Current in Saturation
10–4
–5
I
10
5V
10–6 VG

10–7

10–8 I = I0 ekVG/UT
I (A)

10–9 I0 = 45.4 fA
k = 0.63
10–10 IT0 = 237 nA
VT0 = 0.662 V
10–11

10–12
0 0.5 1 1.5
VG (V)
 Subthreshold Drain Characteristics
1
0.9 I 0.409 V
I = Isat (1 - e )
-VD/UT
0.8 VD

0.7 VG

0.6
I (nA)

0.5 0.389 V

0.4
0.3
0.364V
0.2
0.340 V
0.1
VG = 0.316 V
0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
VD (V)
 Subthreshold Drain Characteristics
1
0.9 I 0.409 V
I = Isat (1 - e )
-VD/UT
0.8 VD
saturation
ohmic
0.7 VG

0.6
I (nA)

0.5 0.389 V

0.4
0.3
0.364V
0.2
0.340 V
0.1
Vsat ª 4UT VG = 0.316 V
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
VD (V)
 General MOS Transistor
Channel Current Dependancies
Electrostatics
VG ψs(z) Dri
ft

Electrostatics

Boltzmann
I
io

n
fus
Boltzmann Dif
VS Qm(z)

Electrostatics:
ψs depends on VG and Qm

Boltzmann Distribution:
Qm depends on ψs and VS

Drift and Diffusion:

I depends on ψs and Qm
Subthreshold MOS Transistor
Channel Current Dependancies
Electrostatics
VG ψs

Boltzmann
I
io

n
fus
Boltzmann Dif
VS Qm(z)

Field lines from gate charges

end on dopant ions in the bulk.
Surface potential: ∆ψs ~ κ∆VG
Channel charge at source:
(κVG–VS)/UT
QS = Q0 e

Channel current flows by diffusion.

Above-Threshold MOS Transistor
Channel Current Dependancies
Electrostatics
VG ψs(z) Dri
ft

Electrostatics

Boltzmann
I

Boltzmann
VS Qm(z)

Field lines from gate charges

end on mobile charges in channel.
∆VG
Surface potential: ∆ψs ~ UT
VG–VT
Channel charge at source:
QS = Cox (VG –VT)
Channel current flows by drift.
 Charge Boundary
Conditions at Threshold
logQ

QT
Q ~ VG –VT
factor of 2

(κVG–VS)/UT
Q ~e

VG
VT
At Q = QT, half of the field lines from
gate charges end on mobile charges.
(κVG–VS)/UT
Extrapolate curve: QT = Q0 e
Q
Take log: κVT – VS = UT log T = κVT0
Q0
Rearrange: VT = VT0 + VS
Threshold
κ for VS=0

VS(D)
Substitute: QS(D) = Cox (VG –VT0 – κ )
 Above-Threshold
Channel Current
Current flows by drift: I = Q µ E||
I is constant ⇒ Larger Q ↔ Smaller E||
Channel has capacitance: Cox to gate
Cdep to bulk
Total capacitance (per unit area):C = Cox + Cdep
∂ψ
Surface potential: ψs ~ Q ⇒ E|| = – s ≈ – 1 ∂Q
C ∂z C ∂z
µ ∂Q
Current (per unit width): I = – C Q
∂z
Integrate from source to drain:

∫ ∫
L QD
µ
I dz = – C Q dQ ⇒ IL = µ (QS – QD)
2 2

0 SQ
2C

Substitute QS and QD; Use κ = CCox

µCox
I=W
L 2κ [(κ(VG –VT0 ) – VS )2 – (κ(V –V ) – V )2]
G T0 D
 Saturation:
Drain Dependance
I
Isat
model
equation

κ(VG –VT0)
VD
Vsat

µCox
Isat = W
L 2κ (κ(VG –VT0) – VS) 2

Model equation peaks and turns around.

QD can’t go negative!
∴ Model valid for VD ≤ Vsat = κ(VG –VT0)

For VD > Vsat, drain is subthreshold ⇒ QD → 0

 Saturation:
Gate Dependance
I

Above-threshold
model

VT VG

µCox
I =W
L 2κ (κ(V G –VT0) – VS) 2
 Above-Threshold Channel Current
nMOS: VD
VG
I=
W µCox
L 2κ
[
(κ (VG − V T 0 ) − VS ) − (κ(VG − V T 0 ) − VD )
2 2
] I
W µCox VS
I= (κ (VG − V T 0 ) − VS ) , for VD ≥ κ(VG − V T 0 )
2

L 2κ

pMOS:

I=
W µCox
L 2κ
[
( VS − κ (VG − V T 0 )) − ( VD − κ(VG − V T 0 ))
2 2
] I
VS

W µCox
I= ( VS − κ (VG − V T 0 )) , for VD ≤ κ(VG − V T 0 )
2 VG
VD
L 2κ
** Note here that VG < 0, VS < 0, VD < 0, and VT0 < 0.
 Above-Threshold Channel Current
nMOS: VD
VG
I=
W µCox
L 2κ
[
(κ (VG − V T 0 ) − VS ) − (κ(VG − V T 0 ) − VD )
2 2
] I
W µCox VS
I= (κ (VG − V T 0 ) − VS ) , for VD ≥ κ(VG − V T 0 )
2

L 2κ

pMOS:
VS
I=
W µCox
L 2κ
( [
κ ((VW − VG ) − V T0 ) − (VW − V S ))
2

I
− (κ ((VW − VG ) − VT 0 ) − (VW − VD ))
2
] VG

W µCox
(κ ((VW − VG ) − V T0 ) − (VW − V S )) ,
VW
2
I=
L 2κ
for VD ≤ VW − κ ((VW − VG ) − VT 0 ) VD
** Note here that VG > 0, VS > 0, VD > 0, and VW > 0.
Above-Threshold Channel Current in Saturation
10
9
I
8
5V
7
VG
6
I ( mA )

5
4
3
mC ox k
2
I= (VG - VT0)
2
mC ox k
1 = 22.6 mA/V2
VT0 = 0.59 V 2
0
0 0.5 1 1.5 2 2.5
VG (V)
Above-Threshold Drain Characteristics
120
ohmic saturation
VG = 2.72 V
100
I
VD
80
model VG
equation
I (mA)

60 2.18 V

40 Vsat = k(VG - VT0) 1.78 V

20 1.47 V
1.25 V

0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
VD (V)
Surface Energy in Subthreshold
VB VS VG VD
Gate

p+ n+ n+

Bulk Source Channel Drain

Contact Depletion
Bulk Layer p–

ψs

Surface
Energy VS
VDS
VD
Surface Energy in Saturation
Above Threshold
VB VS VG VD
Gate

p+ n+ n+

Bulk Source Channel Drain

Contact Depletion
Bulk Layer p–

ψs(z)
Surface
Energy VS
VDS
VD
Surface Energy in Ohmic Region
Above Threshold
VB VS VG VD
Gate

p+ n+ n+

Bulk Source Channel Drain

Contact Depletion
Bulk Layer p–

ψs(z)
Surface
Energy VS
VDS
VD
Enz-Krummenacher-Vittoz Model
log I

Subthreshold
model Above-threshold
model

EKV
model

VT0 VG

I=
W µCox
L κ
[ ( (κ V − V − V ) 2U
2U T log 1 + e ( G T0 ) S T
2 2
)
(
− log 2 1 + e (κ (VG − V T0 ) − VD) 2UT )]
Model is continuous from subthreshold
to above threshold and is valid in both
the ohmic and saturation regions.
log2(1 + ex/2) function smoothly interpolates
between ex and x2.
Not based on first principles.
(i.e., an elegant mathematical hack!)
 EKV Model Channel Current
nMOS: VD

[ (
VG
I=
W µCox
L κ
2 2 (κ V − V − V ) 2U
2UT log 1 + e ( G T0 ) S T ) I
(
− log 2 1 + e (κ (VG − V T0 ) − VD) 2UT )] VS

pMOS:

I=
W µCox
L κ
[ ( ( V − κ V − V ) 2U
2UT log 1 + e S ( G T0 ) T
2 2
) I
VS

(
− log 2 1 + e (VD − κ (VG − V T0 )) 2UT )] VG
VD
** Note here that VG < 0, VS < 0, VD < 0, and VT0 < 0.
 EKV Model Channel Current
nMOS: VD

[ (
VG
I=
W µCox
L κ
2 2 (κ V − V − V ) 2U
2UT log 1 + e ( G T0 ) S T ) I
(
− log 2 1 + e (κ (VG − V T0 ) − VD) 2UT )] VS

pMOS:
VS
I=
W µCox
L κ
2
2U T log
2
[ (
1 + e
(κ ( ( VW − VG )− V T0 )− ( VW − VS )) 2UT
) I
( )]
VG
− log 2 1 + e (κ ( ( VW − VG )− VT0 )− ( VW − VD ) ) 2UT
VW
** Note here that VG > 0, VS > 0, VD > 0, and VW > 0. VD
EKV Model: Channel Current in Saturation
10–4

10–5 subthreshold
model above-threshold
10–6 model

10–7
EKV model
–8 k ( V -V ) 2U
10 kV U 2
(
I = I 0 e T0 T log 1 + e G T0 T )
I (A)

I0 = 45.4 fA
10–9 k = 0.63 I
VT0 = 0.620 V 5V
10–10
VG
–11
10

10–12
0 0.5 1 1.5 2 2.5
VG (V)
 EKV Model: Drain Characteristics
1
0.9 I 0.790 V

0.8 VD
EKV model VG
0.7
0.6
I (mA)

0.5 0.731 V

0.4
0.3
0.683 V
0.2
0.642 V
0.1
VG = 0.609 V
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
VD (V)
 Channel Current in Saturation
30
Isat = 26.2 µA

25
V
I = Isat (1 + VD) gD = 0.11 µA/V
0 V0 = 231 V
20
I (µA)

15
Above-Threshold
Model
10

Ohmic Saturation
5 Region Region
Vsat = 0.845 V
0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
VD (V)

Why does the channel current increase in saturation?

This effect was first studied in bipolars in the
early 1950s by Jim Early.
The effect is commonly called the Early effect.
The Early effect is ultimately what limits the gain
of any transistor.
Channel Length Modulation
(a.k.a. The Early Effect)
VB VS VG VD
Gate

p+ n+ n+

Bulk Source Drain

Contact Depletion
Bulk Layer p–

L′ ∆L
Surface
Energy VS ψs
VDS
VD
∆VD
VD′
 Modeling the Early Effect
I

Early
voltage

–V0 VD

Drain
Conductance gD = ∂∂IV = ∂I ∂L
∂L ∂V
Chain
Rule
D D

∂I =
I=W
L
( )⇒ ∂L
–W
L2
( ) = – LI

⇒ gD = – LI ∂L ≈
∂VD V0 where V0 ∝ L
Isat

Usually modeled as: I = Isat + gDVD

I = Isat + IVsat0 VD
I = Isat (1 + VV0D )