Advanced Microcontrollers: Chapter - 26

Copyright© Dorling Kindersley India Pvt. Ltd.
Chapter - 26
Advanced Microcontrollers
8051 Microcontroller: Internals, Instructions,
Programming and Interfacing by Subrata Ghoshal
Some Advanced Microcontrollers
• We shall discuss those microcontrollers which

were developed after the development of 8051.
We shall confine our discussions within:
• 8-bit microcontroller – Atmel AVR (ATmega8)
• 16-bit microcontroller – Intel MCS-96
• 32-bit microcontroller – ARM microcontroller

01 OF 35
AVR microcontrollers

02 OF 35
Introduction
• Developed by Atmel around 1996.

• Introduction of Flash memory for program
storage.
• Advanced RISC microcontrollers with Harvard
Architecture.
• ATmega8 and ATmega16 are two popular
versions, apart from TINY and XMEGA
versions of AVR.
03 OF 35
Some Important Features of
ATmega8
• 8-bit advanced RISC architecture.

• Register to register architecture without any accumulator.
• 130 instructions including signed and unsigned multiplication.
• 32 general purpose 8-bit registers.
• Fully static to 16 MHz operational frequency.
• 8K bytes on-chip flash program memory.
• 1K bytes on-chip SRAM for data storage.
• 512 bytes on-chip EEPROM.
• Programming lock for software security.
• 23 programmable I/O lines.
04 OF 35
Some Important Features of
ATmega8
• Two 8-bit and one 16-bit Timers/Counters.

• Six-channel 10-bit on-chip ADC.
• Programmable serial USART.
• SPI serial interface.
• Watchdog timer with separate on-chip oscillator.
• On-chip analog comparator.
• External and internal interrupt sources.
• Five sleep modes for power management.

05 OF 35
Pins and Signals of ATmega8
• Note that all 23

I/O lines have
alternate
functions.
• Five power
input lines.
• External crystal
and reset are
not essential.
06 OF 35
Operating Voltage and
Power Consumption
• Operating voltage of

– ATmega8: 4.5V to 5.5V
– ATmega8L: 2.7V to 5.5V
• At 4 Mhz with 3 volts it consumes 3.6 mA, reduced
to 1 mA in idle mode and 0.5 uA in power-down
mode.
• Each port pin of ATmega8L is capable of sourcing
or sinking 20 mA current at 5V and 10 mA current
at 3V. Note the identical sourcing as well as sinking
capabilities.
07 OF 35
Simplified Internal Architecture of
ATmega8
• The central feature is the

AVR core consisting ALU,
32 general purpose
registers including three
index registers, processor
status register, stack
pointer and program
counter with instruction
register and instruction
decoder.
08 OF 35
Map of ATmega8 Program Memory
(Flash)
• Program memory is

arranged as 4K words as
ATmega8 opcodes are
either 16-bit or 32-bit.
• The program memory is
divided into two sections :
boot and application
for software security.

09 OF 35
Organization of 1120 bytes of SRAM
Data Memory
• Data memory (SRAM)

accommodates general
purpose registers, I/O
registers and scratch pad
area.
• I/O registers are similar to
the Special Function
Registers (SFRs) of 8051.
• I/O registers have two sets of
addresses.
10 OF 35
Details of Status Register (SREG) of
ATmega8
• C : carry • S : sign

• Z : zero • H : half carry
• N : negative • T : bit copy storage
• V : 2’s complement • I : global interrupt
overflow disable

11 OF 35
Stack and Stack Pointer
• Stack may be located anywhere within upper 1024

bytes of SRAM. Lower 96 bytes (register area) must
not be occupied by stack.
• 16-bit stack pointer contains two 8-bit registers, SPH
and SPL.
• PUSH command decreases the stack pointer and POP
command increases it.
• In general, the stack pointer to be initialized by the
highest address of SRAM.
12 OF 35
Power Management
and Sleep Modes
• ATmega8 offers five sleep modes for efficient power

management. They are:
– Idle mode
– ADC noise reduction mode
– Power-down mode
– Power-save mode, and
– Standby mode.
• SLEEP instruction evokes the sleep mode.

13 OF 35
System Reset
• Four sources of reset for ATmega8 are:

– Power-on reset
– External reset
– Watchdog reset, and
– Brown-out reset.
• All I/O registers are initialized and execution starts
from the reset vector.
• MCUCSR register holds the information about the
source of reset.
14 OF 35
Watchdog Timer
• Operated by a separate internal oscillator of 1 MHz

frequency.
• May be enabled or disabled through its register
WDTCR.
• Generates system reset at terminal count.
• Useful to avoid ‘hanging’ system.
• To be loaded periodically to avoid system reset.

15 OF 35
Instruction Set
• 130 instructions of ATmega8 are divided into

following five groups:
• Arithmetic and logical instructions
• Branch instructions
• Data transfer instructions
• Bit and bit-test instructions, and
• MCU control instructions

16 OF 35
Intel MCS-96

17 OF 35
Introduction
• Introduced by Intel during 1982.

• Family of 16-bit microcontrollers.
• Widely used in printers, modems and hard disc
drives.
• Have different operating frequencies and offered in
various packages.
• 8XC196 is discussed as a sample member of the
family.

18 OF 35
Some Important Features
of MCS-96
• Following are some of the important features of 8XC196

– Register-to-Register architecture
– 16K on-chip ROM/OTPROM
– 488 bytes register RAM
– Five 8-bit I/O ports
– High speed I/O subsystem
– Full-Duplex serial port
– 16-bit multiply and divide instructions
– 8 or 10-bit A/D converter with sample and hold
– Four 16-bit software timers
– 16-bit up/down counter with capture

19 OF 35
Some Important Features
of MCS-96
– Dynamically configurable 16-bit or 8-bit bus-width

– Three PWM outputs
– 16-bit Watchdog Timer
– 28 interrupt sources, 16 vectors
– HOLD/HLDA bus protocol
– Power-down and idle modes

20 OF 35
Pins and Signals of 8XC196
(68-pin PLCC)
• External memory

interfacing is allowed
through external address,
data and control lines.
• Pin numbers differ in
package type.
• MCS-96 designed around
Princeton (Von Neumann)
architecture.
21 OF 35
Simplified Internal Architecture of
8XC196

22 OF 35
System Memory Map
• Program and data share same memory

space.
• Total addressable memory (internal
and external) is 64K.

23 OF 35
Addressing Modes
• MCS-96 offers five addressing modes, as follows:

– Direct
– Immediate
– Indirect
– Indirect with auto increment
– Indexed

24 OF 35
Instruction Set
• MCS-96 instructions are divided in eleven groups, as follows:

– Arithmetic instructions
– Logical instructions
– Data transfer instructions
– Stack operations
– Jump and Call instructions
– Conditional jumps
– Jump on bit condition
– Loop control
– Single register instructions
– Shift instructions
– Special control instructions

25 OF 35
ARM microcontroller

26 OF 35
ARM Microcontrollers

• 32-bit architecture
• Core is designed by ARM Limited and offered to
various manufacturers to add different peripherals.
• Extremely efficient in power savings.
• Widely used in handsets, iPods, disc drives, etc.
• Offers several advanced features for embedded
applications.

27 OF 35
Simplified Schematic of
ARM Processor Core
• No micro-coding used in the

ARM core.
• The barrel shifter performs
necessary preprocessing
before the register data
enters within ALU.
• This allows easier
calculations of wider ranges
of expressions and
addresses.
28 OF 35
Important Features of
ARM7TDMI Core
• Package type

– 208-pin QFP
• Operating frequency
– Up to 50 MHz
• Operating voltage
– 3.3V +/- 5%
• Architecture
– Fully 16/32-bit RISC architecture
– Integrated system for embedded Ethernet application
– Cost-effective JTAG-based debug solutions
• System manager
– 8/16/32-bit external bus support for ROM/SRAM, Flash memory, DRAM and
external I/O
29 OF 35
ARM7TDMI Core
– One external bus master with bus request/acknowledge pins
– Programmable access cycle (0-7 wait cycles)

– Four-word depth write buffer
– Cost-effective memory to peripheral DMA interface
• Unified instruction/data cache
– Two way set associative unified 8K byte cache
– Support for LRU protocol
– Cache is configurable as an internal SRAM
• I2C serial interface
– Baud rate generator for serial clock generation
• Ethernet controller
– DMA engine with burst mode
– DMA Tx/Rx buffers
– MAC Tx/Rx FIFO buffers
30 OF 35
ARM7TDMI Core
– 100/10 Mbit per second operation

– Station management signalling
– On-chip CAM
– Full-duplex mode with PAUSE feature
– Long/short packet modes
• High-level Data Link Controls (HDLCs)
– HDLC protocol features
– Address search mode
– Selectable CRC or No CRC mode
– Loop back and auto-echo modes
– Modem interface
– Up to 10 Mbps operation
– 2-channel DMA buffer descriptor
31 OF 35
ARM7TDMI Core
• DMA controller
– 2-channel general DMA

– Initiated by a software or external DMA request
– Increments a source or destination address (8, 16 or 32-bit)
– 4 data burst mode
• UARTs
– Two UART blocks with DMA or interrupt based operation
– Support for 5, 6, 7 or 8-bit serial data transmit or receive
– Programmable baud rates
– One or two stop bits
– Odd or even parity
– Break generation and detection
– Parity, overrun and framing error detection
– Infra-red Tx/Rx support
32 OF 35
ARM7TDMI Core
• Timers
– Two programmable 32-bit timers

– Interval mode or toggle mode operation
• Programmable I/O
– 18 programmable I/O ports
– Pins individually configurable
• Interrupt controller
– 21 interrupt sources including 4 external interrupt sources
– Normal or fast interrupt mode
– Prioritized interrupt handling
• Phase Lock Loop (PLL)
– The external clock can be multiplexed by on-chip PLL
– Input frequency range is 10-40 MHz
– Output frequency is five times of input clock
33 OF 35
Renesas Family of Microcontrollers

34 OF 35
Questions

?
35 OF 35

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Copyright© Dorling Kindersley India Pvt. Ltd.

• We shall discuss those microcontrollers which

Copyright© Dorling Kindersley India Pvt. Ltd.

8051 Microcontroller: Internals, Instructions,

8051 Microcontroller: Internals, Instructions,

• Developed by Atmel around 1996.

Copyright© Dorling Kindersley India Pvt. Ltd.

Copyright© Dorling Kindersley India Pvt. Ltd.

Copyright© Dorling Kindersley India Pvt. Ltd.

8051 Microcontroller: Internals, Instructions,

• Note that all 23

Copyright© Dorling Kindersley India Pvt. Ltd.

Copyright© Dorling Kindersley India Pvt. Ltd.

Copyright© Dorling Kindersley India Pvt. Ltd.

Copyright© Dorling Kindersley India Pvt. Ltd.

8051 Microcontroller: Internals, Instructions,

Copyright© Dorling Kindersley India Pvt. Ltd.

Copyright© Dorling Kindersley India Pvt. Ltd.

8051 Microcontroller: Internals, Instructions,

Copyright© Dorling Kindersley India Pvt. Ltd.

Copyright© Dorling Kindersley India Pvt. Ltd.

8051 Microcontroller: Internals, Instructions,

Copyright© Dorling Kindersley India Pvt. Ltd.

Copyright© Dorling Kindersley India Pvt. Ltd.

8051 Microcontroller: Internals, Instructions,

• 130 instructions of ATmega8 are divided into

Copyright© Dorling Kindersley India Pvt. Ltd.

8051 Microcontroller: Internals, Instructions,

8051 Microcontroller: Internals, Instructions,

• Introduced by Intel during 1982.

Copyright© Dorling Kindersley India Pvt. Ltd.

8051 Microcontroller: Internals, Instructions,

Copyright© Dorling Kindersley India Pvt. Ltd.

8051 Microcontroller: Internals, Instructions,

Copyright© Dorling Kindersley India Pvt. Ltd.

8051 Microcontroller: Internals, Instructions,

Copyright© Dorling Kindersley India Pvt. Ltd.

Copyright© Dorling Kindersley India Pvt. Ltd.

• Program and data share same memory

Copyright© Dorling Kindersley India Pvt. Ltd.

8051 Microcontroller: Internals, Instructions,

• MCS-96 offers five addressing modes, as follows:

Copyright© Dorling Kindersley India Pvt. Ltd.

8051 Microcontroller: Internals, Instructions,

• MCS-96 instructions are divided in eleven groups, as follows:

Copyright© Dorling Kindersley India Pvt. Ltd.

8051 Microcontroller: Internals, Instructions,

8051 Microcontroller: Internals, Instructions,

Copyright© Dorling Kindersley India Pvt. Ltd.

8051 Microcontroller: Internals, Instructions,

Copyright© Dorling Kindersley India Pvt. Ltd.

Copyright© Dorling Kindersley India Pvt. Ltd.

Copyright© Dorling Kindersley India Pvt. Ltd.

Copyright© Dorling Kindersley India Pvt. Ltd.

Copyright© Dorling Kindersley India Pvt. Ltd.

Copyright© Dorling Kindersley India Pvt. Ltd.

Copyright© Dorling Kindersley India Pvt. Ltd.

Copyright© Dorling Kindersley India Pvt. Ltd.

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