Experiment 5

FULL ADDER
OBJECTIVE
The student will be able to do the following:

a. Design a one-bit full adder with carry-in and carry-out.

b. Use truth table, Karnaugh map, and Boolean Algebra theorems in
simplifying a circuit design.
c. Implement a full adder circuit based from the design.

Map Simplification

Boolean expression may be simplified by algebraic manipulation. Due to

duality of the boolean function, though uniquely represented by truth table,
the expression may appear in different forms.

Another form that we may simplify boolean expression is the use of

Karnaugh map or K-map. The map is a diagram made up of squares, with
each square representing one minterm of the function. Expressed in graphical
form, alternate expressions can be derived from the same equation.

Two-variable Map. This map consists of four squares. As seen on

Figure 1(b), 0 and 1 are marked on the left and top side of the map to
designate the values of the variables. The column and row represent the
complement and uncomplement of the X and Y variables.

Figure 1(a) represents the 4 minterms you could placed on the K-map.
Figure 1(c) simplifies the functions of adjacent cells.

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 Three-variable Map. This map consists of eight squares. Figure 2(b)
marks 0 and 1 on the left ant top side of the map to designate the values of the
variables. Take note also of adjacent cells in simplifying the equation.

Four-variable Map. Figure 3(a) consists of 16 squares as we apply

minterm numbering system on the map. Simplifying adjacent cells can also
mean by folding the map vertically and horizontally. Figure 3(b) shows how
the four corners derived the simplified terms.

In general, combination of squares during simplification process is as

follows:

 One square represents a minterm of four literals(variables).

 A rectangle of 2 squares represents a product term of three literals.
 A rectangle of 4 squares represents a product term of two literals.
 A rectangle of 8 squares represents a product term of one literal.
 A rectangle of 16 squares produces a function that is equal to logic 1.

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Half Adder

A half adder is an arithmetic circuit that generates the sum of two binary
digits. The circuit is composed of two inputs and two outputs. The input
variables (X and Y) serve as the augend and addend bits; the output variables
(S and C) produce sum and carry. Table 1 defines the truth table operations of
the half adder circuit.

Inputs Outputs
X Y C S
0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0

Table 1. Truth Table of Half Adder

From the given truth table and using a two-variable K-map we could
obtain the circuit Boolean equation of the half adder:

S=X Y
C = XY

Full Adder

A full adder is a combination of arithmetic sum of three input bits. The two
input variables (X and Y) represents the significant bits to be added and the
third bit, Cin, represents the carry from the low significant position. Just like a
half adder circuit, full adder has S and Cout that serve its output.

Table 2 shows the truth table operations of full adder circuit.

Inputs Outputs
X Y Cin Cout S
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1

Table 2. Truth Table of Full Adder

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 The following equations can be derived as we simplify the equation
using K-maps:

S=X Y Cin

Cout = XY + Cin (X Y)

Figure 4 represents the simplified diagram of full adder circuit:

Cin S
FA
X
Cout
Y
Figure 4. Full Adder Simplified Diagram

EQUIPMENT
Prototyping board (breadboard)
DC Power Supply 5V or 9V Battery
Light Emitting Diode (LED) (2)
Solid-core wire (gauge 22, 1 meter long)
Digital ICs:
7486 Quad XOR
7408 Quad AND
7432 Quad OR

K-MAP

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CIRCUIT DIAGRAM

PROCEDURE
1. Based from the given truth table in Table 2, simplify S and Cout using K-map.
Show your simplification in the K-map section.

2. Derive the equation. Simplify further (if any) using Boolean theorems.

3. Draw the equivalent circuits in the CIRCUIT DIAGRAM section. Assign IC

and pin numbers on each gate that you will use. Designate LED for S and
Cout.

4. Plot the design using logic gates in breadboard.

5. Test all input combinations and check if you arrive on the same output result
from the truth table (Table 2).

6. Was there any simplification you have used other than K-map derivation?
Explain your answer.
_______________________________________________________________
_______________________________________________________________

7. What do you think the basic reasons on why we need to use other options in
simplifications?
_______________________________________________________________
_______________________________________________________________
_______________________________________________________________

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8. Given with connected Full Adders (Figure 5), fill-up the possible output of the
truth Table 3.

A1 A0 B1 B0 S0 Cout0 Cin1 S1 Cout1

0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1

Table 3. Truth Table of Two-bit Full Adder

A0 S0
FA0
Cout0
B0

Cin1 S1
FA1
A1
Cout1
B1
Figure 5. Two-bit Full Adder

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REFERENCES
Mano, M. and Kime, C. (2001). Logic and Computer Design Fundamentals (2nd
Edition Updated). Prentice-Hall International

Givone, D. and Roesser, R. (1980). Microprocessors/Microcomputers An

Introduction. McRaw-Hill International.

Concept by:

JERRY C. ESPERANZA
Copyright 2009

http://ThrivingAndLiving.blogspot.com

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