EIE 322

Interface and Embedded

Systems
Microcontroller Architecture
the 8051 example
The 8051 Microcontroller (Chapter 2)
I. MacKenzie, Prentice-Hall 1995, QA 76.8.127M23

Dr. Jimmy To, EIE, PolyU 1

 Introduction to
Microcontrollers
Microprocessors
 CPU only
 Needs many ICs to implement a small system

Dr. Jimmy To, EIE, PolyU 2

 Introduction to
Microcontrollers
Microcontrollers
 CPU + I/O + Timer(s) [+ ROM] [+ RAM]
 Low to moderate performance only
 Limited RAM space, ROM space and I/O pins
 EPROM version available
 Low chip-count to implement a small system
 Low-cost at large quantities
 Development tools readily available at reasonable cost
Dr. Jimmy To, EIE, PolyU 3
Dr. Jimmy To, EIE, PolyU
Return 4
 Signal
Pins

Figure 2-2
8051
pinouts

Dr. Jimmy To, EIE, PolyU 5

 I/O Port Circuitry

Dr. Jimmy To, EIE, PolyU 6

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 Alternate Pin-functions

Dr. Jimmy To, EIE, PolyU 8

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 Memory Space

Dr. Jimmy To, EIE, PolyU 11

 Bit Addressable RAM

Figure 2-6
Summary
of the 8051
on-chip
data
memory
(RAM)

Dr. Jimmy To, EIE, PolyU 12

 Bit Addressable RAM

Figure 2-6
Summary
of the 8051
on-chip
data
memory
(Special
Function
Registers)

Dr. Jimmy To, EIE, PolyU 13

 Register Banks

 Four banks of 8 byte-sized registers, R0 to R7

 Addresses are :
18 - 1F for bank 3
10 - 17 for bank 2
08 - 0F for bank 1
00 - 07 for bank 0 (default)

Dr. Jimmy To, EIE, PolyU 14

 Register Banks

 Active bank selected by bits [ RS1, RS0 ] in

PSW.
 Permits fast “context switching” in interrupt
service routines (ISR).

Dr. Jimmy To, EIE, PolyU 15

Program Status Word (PSW)

Dr. Jimmy To, EIE, PolyU 16

 Address Multiplexing
for External Memory

Figure 2-7
Multiplexing
the address
(low-byte)
and data
bus

Dr. Jimmy To, EIE, PolyU 17

 Code Memory

Figure 2-8
Accessing
external
code
memory

Dr. Jimmy To, EIE, PolyU 18

Dr. Jimmy To, EIE, PolyU
Return 19
 Accessing External
Data Memory

Figure
2-11
Interface
to 1K
RAM

Dr. Jimmy To, EIE, PolyU 20

 Figure
2-10
Timing
for MOVX
instruct-
ion

Dr. Jimmy To, EIE, PolyU

Return 21
 Overlapping External Code
and Data Spaces
Allows the RAM to be
 written as data memory, and
 read as data memory as well as code memory.
This allows a program to be
 "downloaded" from outside into the RAM as
data, and
 executed from RAM as code.

Dr. Jimmy To, EIE, PolyU 22

 Overlapping External Code
and Data Spaces

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