18.

1 Introduction to operational amplifiers

Operational Amplifiers (usually called ‘op amps’) were originally made from discrete components, being
designed to solve mathematical equations electronically, by performing operations such as addition and division in
analogue computers. Now produced in integrated-circuit (IC) form, op amps have many uses, with one of the most
important being as a highgain d.c. and a.c. voltage amplifier.
The main properties of an op amp include:
(i) a very high open-loop voltage gain Ao of around 105 for d.c. and low frequency a.c., which decreases with
frequency increase
(ii) a very high input impedance, typically 106 Ω to 1012 Ω, such that current drawn from the device, or the circuit
supplying it, is very small and the input voltage is passed on to the op amp with little loss
(iii) a very low output impedance, around 100 Ω, such that its output voltage is transferred efficiently to any load
greater than a few kiloohms
The circuit diagram symbol for an op amp is shown in figure
Figure 18.1. It has one output, Vo , and two inputs; the 18.1
inverting input, V1, is marked(-), and the non-inverting
input, V2, is marked (+).
The operation of an op amp is most convenient from a
dual balanced d.c. power supply ±VS (i.e. +VS, 0, -VS);
the centre point of the supply, i.e. 0 V, is common to the
input and output circuits and is taken as their voltage
reference level. The power supply connections are not
usually shown in a circuit diagram.
An op amp is basically a differential voltage amplifier, i.e. it amplifies the difference between input voltages V1
and V2. Three situations are possible:
(i) if V2 > V1, Vo is positive
(ii) if V2 < V1, Vo is negative
(iii) if V2 = V1, Vo is zero

In general,

where Ao is the open-loop voltage gain.

Transfer characteristic
A typical voltage characteristic showing how the output Vo varies with
the input (V2 –V1)is shown in Figure 18.2. It is seen from Figure 18.2 that
only within the very small input range P0Q is the output directly
proportional to the input; it is in this range that the op amp behaves linearly
and there is minimum distortion of the amplifier output. Inputs outside the
linear range cause saturation and the output is then close to the maximum
value, i.e. +VS or -VS. The limited linear behaviour is due to the very high open-loop gain Ao, and the higher it is
the greater is the limitation.

Negative feedback
Operational amplifiers nearly always use negative feedback, obtained by feeding back some, or all, of the output
to the inverting (-) input. The feedback produces an output voltage that opposes the one from which it is taken.
This reduces the new output of the amplifier and the resulting closed-loop gain A is then less than the open-loop
gain Ao. However, as a result, a wider range of voltages can be applied to the input for amplification. As long as
Ao×A, negative feedback gives:
(i) a constant and predictable voltage gain A, (ii) reduced distortion of the output, (iii) better frequency response.
The advantages of using negative feedback outweigh the accompanying loss of gain which is easily increased by
using two or more op amp stages.

Bandwidth
The open-loop voltage gain of an op amp is not constant at all frequencies;
because of capacitive effects it falls at high frequencies. Figure 18.3 shows
the gain/bandwidth characteristic of a 741 op amp. At frequencies below 10
Hz the gain is constant, but at higher frequencies the gain falls at a constant
rate of 6 dB/octave (equivalent to a rate of 20 dB per decade) to 0 dB. The
gain-bandwidth product for any amplifier is the linear voltage gain multiplied
by the bandwidth at that gain. The value of frequency at which the open-loop
gain has fallen to unity is called the transition frequency fT.

fT = closed-loop voltage gain x bandwidth (2)

In Figure 18.3, fT = 106 Hz or 1 MHz; a gain of 20 dB (i.e. 20 log10 10) gives

a 100 kHz bandwidth, whilst a gain of 80 dB (i.e. 20 log10 104) restricts the bandwidth to 100 Hz.

18.2 Some op amp parameters

Input bias current
The input bias current, IB, is the average of the currents into the two input terminals with the output at zero volts,
which is typically around 80 nA (i.e. 80 x 10-9 A) for a 741 op amp. The input bias current causes a volt drop
across the equivalent source impedance seen by the op amp input.

Input offset current

The input offset current, Ios, of an op amp is the difference between the two input currents with the output at zero
volts. In a 741 op amp, Ios is typically 20 nA.

Input offset voltage

In the ideal op amp, with both inputs at zero there should be zero output. Due to imbalances within the amplifier
this is not always the case and a small output voltage results. The effect can be nullified by applying a small offset
voltage, Vos, to the amplifier. In a 741 op amp, Vos is typically 1 mV.

Common-mode rejection ratio

The output voltage of an op amp is proportional to the difference between the voltages applied to its two input
terminals. Ideally, when the two voltages are equal, the output voltages should be zero. A signal applied to both
input terminals is called a common-mode signal and it is usually an unwanted noise voltage. The ability of an op
amp to suppress commonmode signals is expressed in terms of its common-mode rejection ratio (CMRR), which
is defined by:

In a 741 op amp, the CMRR is typically 90 dB.

The common-mode gain, Acom, is defined as:
where Vcom is the common input signal.

Slew rate
The slew rate of an op amp is the maximum rate of change of output
voltage following a step input voltage. Figure 18.4 shows the effects of
slewing; it causes the output voltage to change at a slower rate that the
input, such that the output waveform is a distortion of the input
waveform. 0.5 V/ s is a typical value for the slew rate.

18.3 Op amp inverting amplifier

The basic circuit for an inverting amplifier is shown in Figure 18.5 where the input voltage Vi (a.c. or d.c.) to be
amplified is applied via resistor Ri to the inverting (-) terminal; the output voltage Vo is therefore in anti-phase
with the input. The non-inverting (+) terminal is held at 0 V. Negative feedback is provided by the feedback
resistor, Rf, feeding back a certain fraction of the output voltage to the inverting terminal.

Amplifier gain
In an ideal op amp two assumptions are made, these being that:
(i) each input draws zero current from the signal source, i.e. their input impedance’s are infinite, and
(ii) the inputs are both at the same potential if the op amp is not saturated, i.e. VA = VB in Figure 18.5.
In Figure 18.5, VB = 0, hence VA = 0 and point X is called a virtual earth.

Thus
However, I1 D I2 from assumption (i) above.

Hence the negative sign showing that Vo is negative when Vi is positive, and vice versa.

The closed-loop gain A is given by:

This shows that the gain of the amplifier depends only on the two resistors, which can be made with precise
values, and not on the characteristics of the op amp, which may vary from sample to sample.
For example, if Ri = 10 kΩ and Rf = 100 kΩ, then the closed-loop gain,

Thus an input of 100 mV will cause an output change of 1 V.

Input impedance
Since point X is a virtual earth (i.e. at 0 V), Ri may be considered to be connected between the inverting (-) input
terminal and 0 V. The input impedance of the circuit is therefore Ri in parallel with the much greater input
impedance of the op amp, i.e. effectively Ri. The circuit input impedance can thus be controlled by simply
changing the value of Ri.
18.4 Op amp non-inverting amplifier
The basic circuit for a non-inverting amplifier is shown in Figure 18.7 where the input voltage Vi (a.c. or d.c.) is
applied to the non-inverting (+) terminal of the op amp. This produces an output Vo that is in phase with the input.
Negative feedback is obtained by feeding back to the inverting (-) terminal, the fraction of Vo developed across Ri
in the voltage divider formed by Rf and Ri across Vo

Amplifier gain
In Figure 18.7, let the feedback factor,

It may be shown that for an amplifier with open-loop gain Ao, the closedloop voltage gain A is given by:

For a typical op amp, Ao = 105, thus βAo is large compared with 1, and the above expression approximates to:

Hence

For example, if Ri = 10 kΩ and Rf = 100 kΩ,

Again, the gain depends only on the values of Ri and Rf and is independent of the open-loop gain Ao

Input impedance
Since there is no virtual earth at the non-inverting (+) terminal, the input impedance is much higher (typically 50
MΩ) than that of the inverting amplifier. Also, it is unaffected if the gain is altered by changing Rf and/or Ri. This
non-inverting amplifier circuit gives good matching when the input is supplied by a high impedance source.

18.5 Op amp voltage-follower

The voltage-follower is a special case of the non-inverting amplifier in which
100% negative feedback is obtained by connecting the output directly to the
inverting (-) terminal, as shown in Figure 18.9. Thus Rf in Figure 18.7 is zero
and Ri is infinite.
From equation (6), A = 1/β (when Ao is very large). Since all of the output is
fed back, β = 1 and A ≈ 1. Thus the voltage gain is nearly 1 and Vo = Vi to
within a few millivolts.
The circuit of Figure 18.9 is called a voltage-follower since, as with its transistor emitter-follower equivalent, Vo
follows Vi. It has an extremely high input impedance and a low output impedance. Its main use is as a buffer
amplifier, giving current amplification, to match a high impedance source to a low impedance load. For example,
it is used as the input stage of an analogue voltmeter where the highest possible input impedance is required so as
not to disturb the circuit under test; the output voltage is measured by a relatively low impedance moving-coil
meter
18.6 Op amp summing amplifier
Because of the existence of the virtual earth point, an op amp can be used to
add a number of voltages (d.c. or a.c.) when connected as a multi-input
inverting amplifier. This, in turn, is a consequence of the high value of the
open-loop voltage gain Ao. Such circuits may be used as ‘mixers’ in audio
systems to combine the outputs of microphones, electric guitars, pick-ups,
etc. They are also used to perform the mathematical process of addition in
analogue computing. The circuit of an op amp summing amplifier having
three input voltages V1, V2 and V3 applied via input resistors R1, R2 and R3 is shown in Figure 18.10. If it is
assumed that the inverting (-) terminal of the opamp draws no input current, all of it passing through Rf, then:
I = I1 + I2 + I3
Since X is a virtual earth (i.e. at 0 V), it follows that:

Hence

…………………(8)
The three input voltages are thus added and amplified if Rf is greater than each of the input resistors; ‘weighted’
summation is said to have occurred.
Alternatively, the input voltages are added and attenuated if Rf is less than each input resistor.
For example, if Rf / R1= 4, Rf / R2 = 3 and Rf / R3 = 1 and V1 = V2 = V3 = +1V, then

= - (4 + 3 + 1) = - 8V
If R1 = R2 = R3 = Ri, the input voltages are amplified or attenuated equally, and

Vo = -Rf / Ri (V1 + V2 + V3)

If, also, Ri = Rf then Vo = -(V1 + V2 + V3)

The virtual earth is also called the summing point of the amplifier. It isolates the inputs from one another so that
each behaves as if none of the others existed and none feeds any of the other inputs even though all the resistors
are connected at the inverting (-) input.

18.7 Op amp voltage comparator

If both inputs of the op amp shown in Figure 18.12 are used
simultaneously, then from equation (1), page 1, the output voltage is given
by:

Vo = Ao (V2 -V1)

When V2 > V1 then Vo is positive, its maximum value being the positive supply voltage +Vs, which it has when (V2
- V1) ≥ Vs/Ao. The op amp is then saturated. For example, if Vs = +9V and Ao = 105, then saturation occurs when
(V2 - V1) ≥ 9/105 i.e. when V2 exceeds V1 by 90 μV and Vo ≈ 9V.
When V1 > V2, then Vo is negative and saturation occurs if V1 exceeds V2 by Vs/Ao i.e. around 90 μV in the above
example; in this case, Vo ≈-Vs = -9V.
A small change in (V2 - V1) therefore causes Vo to switch between near +Vs and near to -Vs and enables the op amp
to indicate when V2 is greater or less than V1, i.e. to act as a differential amplifier and compare two voltages. It
does this in an electronic digital voltmeter.
18.8 Op amp integrator
The circuit for the op amp integrator shown in Figure 18.14 is the same as
for the op amp inverting amplifier shown in Figure 18.5, but feedback
occurs via a capacitor C, rather than via a resistor.
The output voltage is given by:

Since the inverting (-) input is used in Figure 18.15, Vo is negative if Vi is positive, and vice versa, hence the
negative sign in equation (9). Since X is a virtual earth in Figure 18.14, i.e. at 0V, the voltage across R is Vi and
that across C is Vo. Assuming again that none of the input current I enters the op amp inverting (-) input, then all of
current I flows through C and charges it up. If Vi is constant, I will be a constant value given by I = Vi/R.
Capacitor C therefore charges at a constant rate and the potential of the output side of C (=Vo, since its input side is
zero) charges so that the feedback path absorbs I. If Q is the charge on C at time t and the p.d. across it (i.e. the
output voltage) changes from 0 to Vo in that time then:
Q = -VoC = It
i.e. -VoC = (Vi/R)*t
i.e. Vo = -(1/CR)*Vi*t
This result is the same as would be obtained from Vo = -(1/CR)∫Vi dt if Vi is a constant value.
For example, if the input voltage Vi = -2V and, say, CR = 1 s, then
Vo = -(-2)t = 2t
A graph of Vo/t will be a ramp function as shown in Figure 18.15 (Vo = 2t
is of the straight line form y = mx + c; in this case y = V o and x = t,
gradient, m = 2 and vertical axis intercept c = 0). Vo rises steadily by +2V/s
in Figure 18.15, and if the power supply is, say, ±9V, then Vo reaches +9V
after 4.5 s when the op amp saturates.

18.9 Op amp differential amplifier

The circuit for an op amp differential amplifier is shown in Figure 18.16
where voltages V1 and V2 are applied to its two input terminals and the
difference between these voltages is amplified.
(i) Let V1 volts be applied to terminal 1 and 0V be applied to terminal 2.
The difference in the potentials at the inverting (-) and non-inverting (+)
op amp inputs is practically zero and hence the inverting terminal must be at
zero potential. Then I1 = V1/R1. Since the op amp input resistance is high,
this current flows through the feedback resistor Rf. The volt drop across
Rf, which is the output voltage Vo = (V1/R1)Rf; hence, the closed loop
voltage gain A is given by:

(ii) By similar reasoning, if V2 is applied to terminal 2 and 0V to terminal 1, then the voltage appearing at the non-
inverting terminal will be (R3/(R2+R3))V2 volts. This voltage will also appear at the inverting (-) terminal and thus
the voltage across R1 is equal to -(R3/(R2+R3))V2 volts.
Now the output voltage,
and the voltage gain,

(iii) Finally, if the voltages applied to terminals 1 and 2 are V1 and V2 respectively, then the difference between the
two voltages will be amplified.
If V1 > V2, then:

If V2 > V1, then:

18.10 Digital to analogue (D/A) conversion

There are a number of situations when
digital signals have to be converted to
analogue ones. For example, a digital
computer often needs to produce a graphical
display on the screen; this involves using a
D/A converter to change the two-level
digital output voltage from the computer,
into a continuously varying analogue voltage
for the input to the cathode ray tube, so that
it can deflect the electron beam to produce
screen graphics. A binary weighted resistor
D/A converter is shown in Figure 18.17 for a
four-bit input. The values of the resistors, R,
2R, 4R, 8R increase according to the binary
scale—hence the name of the converter. The
circuit uses an op amp as a summing
amplifier (see section 18.6) with a feedback
resistor Rf. Digitally controlled electronic switches are shown as S1 to S4. Each switch connects the resistor in
series with it to a fixed reference voltage Vref when the input bit controlling it is a 1 and to ground (0 V) when it is
a 0. The input voltages V1 to V4 applied to the op amp by the four-bit input via the resistors therefore have one of
two values, i.e. either Vref or 0V.
From equation (8), page 5, the analogue output voltage Vo is given by:
Let Rf = R = 1 kΩ, then:

With a four-bit input of 0001 (i.e. decimal 1), S4 connects 8R to Vref, i.e. V4=Vref, and S1, S2 and S3 connect R, 2R
and 4R to 0V, making V1=V2=V3=0. Let Vref=
-8V, then output voltage,

With a four-bit input of 0101 (i.e. decimal

5), S2 and S4 connects 2R and 4R to Vref, i.e.
V2=V4=Vref, and S1 and S3 connect R and 4R
to 0V, making V1=V3=0. Again, if Vref= -8V,
then output voltage,

If the input is 0111 (i.e. decimal 7), the output

voltage will be 7V, and so on. From these
examples, it is seen that the analogue output
voltage, Vo, is directly proportional to the
digital input. Vo has a ‘stepped’ waveform,
the waveform shape depending on the binary
input. A typical waveform is shown in Figure
18.18.

18.11 Analogue to digital (A/D) conversion

In a digital voltmeter, its input is in analogue form and the reading is displayed digitally. This is an example where
an analogue to digital converter is needed.
A block diagram for a four-bit counter type A/D conversion circuit is shown in Figure 18.19. An op amp is again
used, in this case as a voltage comparator (see Section 18.7). The analogue input voltage V2, shown in Figure
18.20(a) as a steady d.c. voltage, is applied to the non-inverting (+) input, whilst a sawtooth voltage V1 supplies the
inverting (-) input.
The output from the comparator is applied to one input
of an AND gate and is a 1 (i.e. ‘high’) until V1 equals
or exceeds V2, when it then goes to 0 (i.e. ‘low’) as
shown in Figure 18.20(b). The other input of the AND
gate is fed by a steady train of pulses from a pulse
generator, as shown in Figure 18.20(c). When both
inputs to the AND gate are ‘high’, the gate ‘opens’ and
gives a ‘high’ output, i.e. a pulse, as shown in Figure
18.20(d). The time taken by V1 to reach V2 is
proportional to the analogue voltage if the ramp is
linear. The output pulses from the AND gate are
recorded by a binary counter and, as shown in Figure
18.20(e), are the digital equivalent of the analogue
input voltage V2. In practise, the ramp generator is a
D/A converter which takes its digital input from the
binary counter, shown by the broken lines in Figure
18.19. As the counter advances through its normal
binary sequence, a staircase waveform with equal steps
(i.e. a ramp) is built up at the output of the D/A
converter (as shown by the first few steps in Figure
18.18.

Problems on operational amplifiers

Problem 1. A differential amplifier has an open-loop voltage gain of 120. The input signals are 2.45 V and 2.35 V.
Calculate the output voltage of the amplifier.

Problem 2. Determine the common-mode gain of an op amp that has a differential voltage gain of 150 x 103 and a
CMRR of 90 dB.

Problem 3. A differential amplifier has an open-loop voltage gain of 120 and a common input signal of 3.0 V to
both terminals. An output signal of 24 mV results. Calculate the common-mode gain and the CMRR.

Problem 4. In the inverting amplifier of Figure 18.5, Ri = 1 kΩ and Rf = 2 kΩ. Determine the output voltage
when the input voltage is: (a) +0.4 V (b) -1.2 V.
Problem 5. The op amp shown in Figure 18.6 has an input bias current of 100 nA at 20°C. Calculate (a) the
voltage gain, and (b) the output offset voltage due to the input bias current. (c) How can the effect of input bias
current be minimised?
Problem 6. Design an inverting amplifier to have a voltage gain of 40 dB, a closed-loop bandwidth of 5 kHz and
an input resistance of 10 kΩ.

Problem 7. For the op amp shown in Figure 18.8, R1 = 4.7 kΩ and R2 = 10 kΩ. If the input voltage is -0.4 V,
determine (a) the voltage gain (b) the output voltage.

Problem 8. For the summing op amp shown in Figure 18.11, determine the output voltage, Vo.

Problem 9. Devise a light-operated alarm circuit using an op amp, a LDR, a LED and a ±15V supply.

Problem 10. A steady voltage of -0.75V is applied to an op amp integrator having component values of R = 200
kΩ and C = 2.5 µF. Assuming that the initial capacitor charge is zero, determine the value of the output voltage
100 ms after application of the input.

Problem 11. In the differential amplifier shown in Figure 18.16, R1=10

kΩ, R2=10 kΩ, R3=100 kΩ and Rf=100 kΩ. Determine the output
voltage Vo if:
(a) V1 =5 mV and V2 = 0
(b) V1 = 0 and V2 = 5mV
(c) V1 = 50 mV and V2 = 25mV
(d) V1 = 25 mV and V2 = 50mV