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ABSTRACT
Five (5) kVA power inverter was designed and simulated base on two topologies; Boost converter
and Half-bridge inverter topology. A 555 timer IC was used as the control at fixed frequencies of 25
kHz and 50 Hz for the two stages. The results of the simulation were obtained. The graphs for both
stages were plotted and the results show a significant increase in the voltage and duty cycle. The
wave form of the output gives a square wave form.
Keywords: Power inverter, Simulation, Topology, Converter
INTRODUCTION
The World demand for electrical energy is constantly
increasing and conventional energy resources are
diminishing and even threatened to be depleted. With
the increasing popularity of alternative power sources,
such as solar and wind, the need for static inverters to
convert dc energy stored in batteries to conventional
ac form has increased substantially. This conversion
can either be achieved by transistors or by SCRs
(silicon controlled rectifiers). For lower and medium
power outputs, transistorised inverters are suitable but
for high power outputs, SCRs should be used.
Transistor inverters are useful in wide variety of
applications. They provide power to the complicated
electronic systems of orbiting satellites and cool
astronaut
suits
(http;//Guru/PEInverters/introduction/pdf/inv.pdf,
2006).
However,
MOSFETs
(Metal
Oxide
Semiconductor Field Effect Transistor) and IGBTs
(Insulated Gate Bipolar Transistor) are good
candidates for the switches in dc to ac conventional
techniques. With the development electronic devices
and circuits, newer equipment often have converters
that allow the user to change the voltage and
frequency applied to the equipment .Power electronics
also provides the industries with effective methods to
save energy and improve performance (Sen, 2002).
Power electronic devices can be divided in to
two categories: Single component and hybrid
Vi
PWM &
Figure 1.0: Boost converter schematic diagram
2.1
, is the duty cycle of switching converter that is
2.2
where
or
2.3 b
However, with 555-timer ICs an inexpensive regulated SMPS is constructed, feedback and pulse width
modulation were shown in Figure 2.0. If the desired inverter frequency and the voltage are known, the power
consumed by the switching on and off of the converter can be estimated by the following equation
(http://supertex.com/pdf/app.note/AN-36.pdf, 2008).
2.4
ZFB
RFB
1
OUT
Cin
THR
Cout
TRI
CON
RD
CT
0
Vout
Qsw
DIS
Battery
VCC
RST
RC
555
GND
The equation above yield duty cycles greater than 100%. For the inductor rating, peak inductor current can be
approximated using the following equation
2.7
Select Qsw and D
For switching transistor Qsw, the most important
parameters are break down voltage, on resistance,
peak current, and power dissipation. For the diode,
the important parameters are reverse break down
Where
Output capacitance Cout stores high voltage energy
and also reduces EMI by restricting high frequency
current paths to stop short loops. The value of Cout
and
types
Select Timing Components
Timing
components
The ratio
cycle, while
determine
together determine
The
3.8
t =0
to
t =T 2
di(t )
+ Ri(t ) = Vs
dt
3.9
Vs
+ Ae t
R
i (t ) =
4.0
L
R
i (t ) =
Vs
1 e t I max e t
R
4.1
I max =
t = 0 and t = T 2 is
Vs
1 e T
R
) I
max
e T 2
I max =
Vs
R
1 e T
T
1 + e
2
2
4.2
i (t ) =
V 1 e
Vs
1 e t s
R 1 + e T
R
Figure 3.0
t = 0 and t = T 2 is
T 2
2
t
e
4.3
(i) Half-bridge inverter with dual supply, and (ii) single supply
1st Stage
2nd Stage
DC-DC (Boost
Converter
DC-AC (H-Bridge
l
)
Control
(555-timer IC)
Control
(555-timer IC)
Feedbac
Buck Converter
Boost Converter
Buck-Boost Converter
10
Vout/Vin
0
0.0
0.2
0.4
0.6
0.8
1.0
Duty cycle(%)
Figure 5.0 Graph of commonly converters compared analytically with equation 2.0 which shows the boost
converter has high gain.
Boost Converter
18
16
14
Vout/Vin
12
10
0.88
0.89
0.90
0.91
0.92
0.93
0.94
Duty Cycle
Figure 6.0 Graph of the gain to the duty cycle from the simulation result
B
1.0
D
(d
u
tyc
y
c
le
)
0.8
0.6
0.4
0.2
0.0
1
RC/RD ratio
Figure 7.0 Graph of maximum duty cycle with ratio of timing resistors
10
10
RC/RD=3
RC/RD=4
RC/RD=5
RC/RD=6
RC/RD=7
RC/RD=8
RC/RD=9
RC/RD=10
70
60
Freqency(kHz)
50
40
30
20
10
0
0
20
40
60
80
100
120
140
160
180
RC kohms
200
180
160
BIAS
V (volt)
140
120
100
80
60
40
20
2
RFB/RC
11
7
8
9
10
22.7 A
330mA
50Hz
25kHz
9.53A
185.32mA
48.6Hz
24.6kHz
XSC1
Ext T ri g
+
_
B
A
_
ZFB
02BZ2.2
L
1
90k
RST
VN10LF
DIS
Cin
7uF
THR
CON
RD 12k
0
CT
4.7uF
Cout
TRI
Vout
Qsw
OUT
D
BAV21
VCC
41k
6-12v
500uH
RFB
RC
555
GND
1nF
ZFB
27
24
02BZ2.2
500uH
RFB
90k
RST
26
Cin
Vout
Qsw
23
OUT
VN10LF
DIS
25
7uF
BAV21
VCC
41k
6-12v
22
RC
XSC1
THR
4.7uF
Cout
TRI
RD 12k
0
CT
1nF
R3
U7
LM7812CT
VREG
2
C2
330nF
0
1J
RST
DIS
THR
TRI
CON
LM555CM
OUT
1K
~1Q
R6
10k
7k
3
14
0
17
U5A
MCT6
18
7408N
12
R7
13 U5B
4
7
U4
MCT6
0
5
1
3554AM
Q2
7k
5
T1
16
7408N
U2C
U3A
74HC113D_4V
7
R2
10k
28
Q3
IRFP250
0
6
1
10
R4
R5
100k
50%
Key=A
GND
1Q
1CLK
VCC
21
20
LINE
VOLTAGE
U2A
11
~1PR
3
U1
A
+
COMMON
1
R1
24k
555
GND
19
42k
50%
Ke y=A
Ext T ri g
+
CON
XMM1
15
IRFP250
0
TS_POWER_25_TO_1
TS25T1 power
Transformer
REFERENCES
http://Guru/PEInverters/introduction/pdf/inv.pdf 24th
February, 2006
PC Sen. (2002), Power Electronics. Tata McGraw-Hill
publishing company limited, New Delhi, India,
726p
Mukund R. Patel (2006). Wind and Solar Power
System: Design, Analysis, and Operation (2nd
edition). CRC press, Taylor & Francis, U.S.A
221-224pp
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