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1.1.2
LOW-VOLTAGE ICSP
PROGRAMMING
PIC16F1703
PIC16LF1703
PIC16F1704
PIC16LF1704
PIC16F1705
PIC16LF1705
PIC16F1707
PIC16LF1707
1.1.2.1
PIC16F1708
PIC16LF1708
PIC16F1709
PIC16LF1709
1.0
The LVP bit in Configuration Word 2 enables singlesupply (low-voltage) ICSP programming. The LVP bit
defaults to a 1 (enabled) from the factory. The LVP bit
may only be programmed to 0 by entering the HighVoltage ICSP mode, where the MCLR/VPP pin is raised
to VIHH. Once the LVP bit is programmed to a 0, only
the High-Voltage ICSP mode is available and only the
High-Voltage ICSP mode can be used to program the
device.
OVERVIEW
The device can be programmed using either the highvoltage In-Circuit Serial Programming (ICSP)
method or the low-voltage ICSP method.
1.1
Hardware Requirements
1.1.1
HIGH-VOLTAGE ICSP
PROGRAMMING
1.2
Pin Utilization
TABLE 1-1:
Pin Name
Pin Type
Pin Description
ICSPCLK
ICSPCLK
ICSPDAT
ICSPDAT
I/O
Program/Verify mode
P(1)
VDD
VDD
Power Supply
VSS
VSS
Ground
MCLR/VPP
DS40001683B-page 1
PIC16(L)F170X
2.0
DEVICE PINOUTS
FIGURE 2-1:
FIGURE 2-2:
14
PIC16(L)F1703/4/5
VDD
RA5
RA4
VPP/MCLR/RA3
RC5
RC4
RC3
2
3
4
5
6
7
13
12
11
10
9
8
VSS
RA0/ICSPDAT
RA1/ICSPCLK
RA2
RC0
RC1
RC2
VDD
NC
NC
VSS
QFN
/4
03
)F
17
(L
16
1
2
3
4
PI
C
RA5
RA4
RA3/MCLR/VPP
RC5
/5
16 1514 13
12
11
10
9
RA0/ICSPDAT
RA1/ICSPCLK
RA2
RC0
RC4
RC3
RC2
RC1
5 6 7 8
DS40001683B-page 2
PIC16(L)F170X
FIGURE 2-3:
20
VSS
19
RA4
18
ICSPCLK/RA1
VPP/MCLR/RA3
17
RA2
RC5
16
RC0
15
RC1
14
13
12
RC2
RB4
RB5
11
RB6
PIC16(L)F1707/8/9
RA5
ICSPDAT/RA0
RC4
FIGURE 2-4:
RC3
RC6
RC7
8
9
RB7
10
RA4
RA5
VDD
VSS
RA0/ICSPDAT
QFN
/8
07
F1
7
(L
)
16
15
14
13
12
11
RA1/ICSPCLK
RA2
RC0
RC1
RC2
6 7 8 9 10
RC7
RB7
RB6
RB5
RB4
PI
C
1
2
3
4
5
/9
20 19181716
VPP/MCLR/RA3
RC5
RC4
RC3
RC6
DS40001683B-page 3
PIC16(L)F170X
3.0
MEMORY MAP
FIGURE 3-1:
8000h
User ID Location
8001h
User ID Location
8002h
User ID Location
8003h
User ID Location
8004h
Reserved
8005h
Revision ID
8006h
Device ID
8007h
Configuration Word 1
8008h
Configuration Word 2
8009h
Calibration Word 1
800Ah
Calibration Word 2
800Bh
Calibration Word 3
800Ch
Calibration Word 4
Implemented
Maps to
0-07FFh
7FFFh
8000h
Program Memory
Implemented
8200h
800Dh-81FFh
DS40001683B-page 4
Maps to
8000-81FF
Configuration Memory
FFFFh
Reserved
PIC16(L)F170X
FIGURE 3-2:
8000h
User ID Location
8001h
User ID Location
8002h
User ID Location
8003h
User ID Location
8004h
Reserved
8005h
Revision ID
8006h
Device ID
8007h
Configuration Word 1
8008h
Configuration Word 2
8009h
Calibration Word 1
800Ah
Calibration Word 2
800Bh
Calibration Word 3
800Ch
Calibration Word 4
800Dh
Reserved
800Eh
Reserved
800Fh
Calibration Word 5
8010h
Calibration Word 6
Implemented
Maps to
0-0FFFh
7FFFh
8000h
Program Memory
Implemented
8200h
8011h-81FFh
Maps to
8000-81FF
Configuration Memory
FFFFh
Reserved
DS40001683B-page 5
PIC16(L)F170X
FIGURE 3-3:
8000h
User ID Location
8001h
User ID Location
8002h
User ID Location
8003h
User ID Location
8004h
Reserved
8005h
Revision ID
8006h
Device ID
8007h
Configuration Word 1
8008h
Configuration Word 2
8009h
Calibration Word 1
800Ah
Calibration Word 2
800Bh
Calibration Word 3
800Ch
Calibration Word 4
800Dh
Reserved
800Eh
Reserved
800Fh
Calibration Word 5
8010h
Calibration Word 6
Implemented
Maps to
0-1FFFh
7FFFh
8000h
Program Memory
Implemented
8200h
8011h-81FFh
DS40001683B-page 6
Maps to
8000-81FF
Configuration Memory
FFFFh
Reserved
PIC16(L)F170X
3.1
User ID Location
DS40001683B-page 7
PIC16(L)F170X
3.2
Device/Revision ID
REGISTER 3-1:
DEV<13:8>
bit 13
R
bit 8
R
DEV<7:0>
bit 7
bit 0
Legend:
R = Readable bit
0 = Bit is cleared
bit 13-0
x = Bit is unknown
1 = Bit is set
Note 1:
REGISTER 3-2:
REV<13:8>
bit 13
R
bit 8
R
REV<7:0>
bit 7
bit 0
Legend:
R = Readable bit
0 = Bit is cleared
bit 13-0
1 = Bit is set
x = Bit is unknown
DS40001683B-page 8
PIC16(L)F170X
TABLE 3-1:
DEVICE
Device ID
Revision ID
PIC16F1703
3061h
2xxxh
PIC16LF1703
3063h
2xxxh
PIC16F1704
3043h
2xxxh
PIC16LF1704
3045h
2xxxh
PIC16F1705
3055h
2xxxh
PIC16LF1705
3057h
2xxxh
PIC16F1707
3060h
2xxxh
PIC16LF1707
3062h
2xxxh
PIC16F1708
3042h
2xxxh
PIC16LF1708
3044h
2xxxh
PIC16F1709
3054h
2xxxh
PIC16LF1709
3056h
2xxxh
DS40001683B-page 9
PIC16(L)F170X
3.3
Configuration Words
3.4
REGISTER 3-3:
Calibration Words
CONFIGURATION WORD 1
R/P-1
R/P-1
R/P-1
FCMEN
IESO
CLKOUTEN
R/P-1
R/P-1
BOREN<1:0>
bit 13
R/P-1
R/P-1
R/P-1
CP
MCLRE
PWRTE
U-1
bit 8
R/P-1
R/P-1
WDTE<1:0>
R/P-1(3)
R/P-1
R/P-1
FOSC<2:0>
bit 7
bit 0
Legend:
R = Readable bit
P = Programmable bit
0 = Bit is cleared
1 = Bit is set
bit 13
bit 12
bit 11
bit 10-9
bit 8
Unimplemented: Read as 1
bit 7
bit 6
bit 5
Note 1:
2:
3:
DS40001683B-page 10
PIC16(L)F170X
REGISTER 3-3:
bit 4-3
bit 2-0
Note 1:
2:
3:
DS40001683B-page 11
PIC16(L)F170X
REGISTER 3-4:
CONFIGURATION WORD 2
R/P-1
R/P-1
R/P-1
R/P-1
R/P-1
R/P-1
LVP
DEBUG
LPBOR
BORV
STVREN
PLLEN
bit 13
bit 8
R/P-1
U-1
U-1
U-1
U-1
R/P-1
ZCDDIS
PPS1WAY
R/P-1
R/P-1
WRT<1:0>
bit 7
bit 0
Legend:
R = Readable bit
P = Programmable bit
0 = Bit is cleared
1 = Bit is set
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
bit 6-3
Unimplemented: Read as 1
bit 2
Note 1:
2:
The LVP bit cannot be programmed to 0 when Programming mode is entered via LVP.
See Vbor parameter for specific trip point voltages.
DS40001683B-page 12
PIC16(L)F170X
REGISTER 3-4:
bit 1-0
Note 1:
2:
DS40001683B-page 13
PIC16(L)F170X
4.0
PROGRAM/VERIFY MODE
4.1
4.1.1
4.1.2
4.1.3
4.2
DS40001683B-page 14
PIC16(L)F170X
4.3
Program/Verify Commands
TABLE 4-1:
Command
Data/Note
Hex
Load Configuration
00h
0, data (14), 0
02h
0, data (14), 0
04h
0, data (14), 0
Increment Address
06h
Reset Address
16h
08h
18h
0Ah
09h
Internally Timed
11h
Internally Timed
DS40001683B-page 15
PIC16(L)F170X
4.3.1
LOAD CONFIGURATION
Note:
FIGURE 4-1:
LOAD CONFIGURATION
16
15
TDLY
ICSPCLK
ICSPDAT
4.3.2
LSb
MSb 0
FIGURE 4-2:
15
16
TDLY
ICSPCLK
ICSPDAT
DS40001683B-page 16
LSb
MSb 0
PIC16(L)F170X
4.3.3
FIGURE 4-3:
15
16
TDLY
ICSPCLK
ICSPDAT
(from Programmer)
ICSPDAT
(from device)
MSb
Input
Output
Input
4.3.4
LSb
INCREMENT ADDRESS
FIGURE 4-4:
INCREMENT ADDRESS
Next Command
1
TDLY
ICSPCLK
ICSPDAT
Address
Address + 1
DS40001683B-page 17
PIC16(L)F170X
4.3.5
RESET ADDRESS
FIGURE 4-5:
RESET ADDRESS
Next Command
1
TDLY
ICSPCLK
0
ICSPDAT
0000h
Address
4.3.6
FIGURE 4-6:
Next Command
2
1
3
6
TPINT
ICSPCLK
ICSPDAT
DS40001683B-page 18
PIC16(L)F170X
4.3.7
FIGURE 4-7:
TPEXT
ICSPCLK
0
ICSPDAT
4.3.8
FIGURE 4-8:
Next Command
2
1
3
6
TDIS
ICSPCLK
ICSPDAT
DS40001683B-page 19
PIC16(L)F170X
4.3.9
Note:
Address 0000h-7FFFh:
Program Memory is erased
FIGURE 4-9:
Next Command
2
1
3
6
TERAB
ICSPCLK
ICSPDAT
4.3.10
FIGURE 4-10:
Next Command
2
1
3
6
TERAR
ICSPCLK
ICSPDAT
DS40001683B-page 20
PIC16(L)F170X
TABLE 4-2:
Devices
PC
<15:5>
16
16
<15:5>
32
32
PIC16F1703
PIC16F1707
PIC16LF1703
PIC16LF1707
PIC16F1704
PIC16F1705
PIC16F1708
PIC16F1709
PIC16LF1704
PIC16LF1705
PIC16LF1708
PIC16LF1709
DS40001683B-page 21
PIC16(L)F170X
5.0
PROGRAMMING ALGORITHMS
DS40001683B-page 22
PIC16(L)F170X
FIGURE 5-1:
Enter
Programming Mode
Bulk Erase
Device
Write Program
Memory(1)
Verify Program
Memory
Write Configuration
Words(2)
Verify Configuration
Words
Exit Programming
Mode
Done
Note 1:
2:
DS40001683B-page 23
PIC16(L)F170X
FIGURE 5-2:
Start
Bulk Erase
Program
Memory(1, 2)
Program Cycle(3)
Read Data
from
Program Memory
Data Correct?
No
Report
Programming
Failure
Yes
Increment
Address
Command
No
All Locations
Done?
Yes
Done
Note 1:
This step is optional if the device has already been erased or has not been previously programmed.
2:
If the device is code-protected or must be completely erased, then Bulk Erase the device per Figure 5-6.
3:
DS40001683B-page 24
PIC16(L)F170X
FIGURE 5-3:
Load Data
for
Program Memory
Begin
Programming
Command
(Internally timed)
Wait TPINT
Begin
Programming
Command
(Externally timed)(1)
Wait TPEXT
End
Programming
Command
Wait TDIS
Note 1: Externally timed writes are not supported for Configuration and Calibration bits.
DS40001683B-page 25
PIC16(L)F170X
FIGURE 5-4:
Load Data
for
Program Memory
Latch 1
Increment
Address
Command
Load Data
for
Program Memory
Latch 2
Increment
Address
Command
Load Data
for
Program Memory
Latch 32
Begin
Programming
Command
(Internally timed)
Begin
Programming
Command
(Externally timed)
Wait TPINT
Wait TPEXT
End
Programming
Command
Wait TDIS
DS40001683B-page 26
PIC16(L)F170X
FIGURE 5-5:
Data Correct?
No
Report
Programming
Failure
Yes
Increment
Address
Command
No
Address =
8004h?
Yes
Increment
Address
Command
Increment
Address
Command
Increment
Address
Command
One-word
Program Cycle(2)
(Config. Word 1)
Read Data
From Program
Memory Command
Data Correct?
No
Report
Programming
Failure
Yes
Increment
Address
Command
One-word
Program Cycle(2)
(Config. Word 2)
Read Data
From Program
Memory Command
Data Correct?
No
Report
Programming
Failure
Yes
Note
1:
2:
Done
DS40001683B-page 27
PIC16(L)F170X
FIGURE 5-6:
ERASE FLOWCHART
Start
Load Configuration
Bulk Erase
Program Memory
Done
Note:
DS40001683B-page 28
PIC16(L)F170X
6.0
CODE PROTECTION
TABLE 7-1:
CONFIGURATION WORD
MASK VALUES
Config. Word 1
Mask
Config. Word 2
Mask
PIC16F1703
0EFBh
3F87h
PIC16LF1703
0EFBh
3F87h
PIC16F1704
3EFFh
3F87h
PIC16LF1704
3EFFh
3F87h
PIC16F1705
3EFFh
3F87h
Device
PIC16LF1705
3EFFh
3F87h
PIC16F1707
0EFBh
3F87h
PIC16LF1707
0EFBh
3F87h
PIC16F1708
3EFFh
3F87h
PIC16LF1708
3EFFh
3F87h
PIC16F1709
3EFFh
3F87h
7.0
PIC16LF1709
3EFFh
3F87h
6.1
Program Memory
In the hex file there are two bytes per program word
stored in the Intel INHX32 hex format. Data is stored
LSB first, MSB second. Because there are two bytes
per word, the addresses in the hex file are 2x the
address in program memory. (Example: The
Configuration Word 1 is stored at 8007h. In the hex file
this will be referenced as 1000Eh-1000Fh).
7.1
Configuration Word
7.2
7.3.1
Device ID
If a device ID is present in the hex file at 1000Ch1000Dh (8006h on the part), the programmer should
verify the device ID against the value read from the
part. On a mismatch condition, the programmer should
generate a warning message.
7.3
Checksum Computation
DS40001683B-page 29
PIC16(L)F170X
7.3.2
TABLE 7-2:
CHECKSUMS
Config1
Config2
Checksum
Unprotected
Device
Unprotected Protected
Mask
Word
Mask
Code-protected
Blank
00AAh
First and
Last
Blank
00AAh
First and
Last
4682h
C7D8h
9484h
15DAh
PIC16F1703
3FFFh
3F7Fh
0EFBh
3FFFh
3F87h
PIC16F1704
3FFFh
3F7Fh
3EFFh
3FFFh
3F87h
6E86h
EFDCh
EC8Ch
6DE2h
PIC16F1705
3FFFh
3F7Fh
3EFFh
3FFFh
3F87h
5E86h
DFDCh
DC8Ch
5DE2h
PIC16F1707
3FFFh
3F7Fh
0EFBh
3FFFh
3F87h
4682h
C7D8h
9484h
15DAh
PIC16F1708
3FFFh
3F7Fh
3EFFh
3FFFh
3F87h
6E86h
EFDCh
EC8Ch
6DE2h
PIC16F1709
3FFFh
3F7Fh
3EFFh
3FFFh
3F87h
5E86h
DFDCh
DC8Ch
5DE2h
PIC16LF1703
3FFFh
3F7Fh
0EFBh
3FFFh
3F87h
4682h
C7D8h
9484h
15DAh
PIC16LF1704
3FFFh
3F7Fh
3EFFh
3FFFh
3F87h
6E86h
EFDCh
EC8Ch
6DE2h
PIC16LF1705
3FFFh
3F7Fh
3EFFh
3FFFh
3F87h
5E86h
DFDCh
DC8Ch
5DE2h
PIC16LF1707
3FFFh
3F7Fh
0EFBh
3FFFh
3F87h
4682h
C7D8h
9484h
15DAh
PIC16LF1708
3FFFh
3F7Fh
3EFFh
3FFFh
3F87h
6E86h
EFDCh
EC8Ch
6DE2h
PIC16LF1709
3FFFh
3F7Fh
3EFFh
3FFFh
3F87h
5E86h
DFDCh
DC8Ch
5DE2h
DS40001683B-page 30
PIC16(L)F170X
8.0
ELECTRICAL SPECIFICATIONS
TABLE 8-1:
AC/DC CHARACTERISTICS
Sym.
Characteristics
Typ.
Max.
Units
VPEW
VBE
2.70
3.60
(VDDMIN(2), VDDMAX)
PIC16F170X
2.30
5.50
2.70
5.50
Read/Write and Row Erase operations
VDDMIN
VDDMAX
Bulk Erase operations
2.7
VDDMAX
IDDI
1.0
mA
IDDP
3.0
mA
VDD
V
V
V
V
V
V
Conditions/Comments
FOSC 16 MHz
FOSC 32 MHz
FOSC 16 MHz
FOSC 32 MHz
VPP
IPP
Current on MCLR/VPP
600
VIHH
8.0
9.0
TVHHR
1.0
VIH
0.8 VDD
VIL
VDD-0.7
VDD-0.7
VDD-0.7
0.2 VDD
VSS+0.6
VSS+0.6
VSS+0.6
2.70
I/O pins
VOH
ICSPDAT output low level
VOL
Brown-out Reset Voltage:
BORV = 0 (high trip)
VBOR
BORV = 1 (low trip)
TENTS
TENTH
TCKL
TCKH
TDS
TDH
TCO
TLZD
THZD
Note
2.40
V
PIC16F170X
1.90
V
PIC16LF170X
Programming Mode Entry and Exit
Programing mode entry setup time: ICSPCLK,
100
ns
ICSPDAT setup time before VDD or MCLR
Programing mode entry hold time: ICSPCLK,
250
s
ICSPDAT hold time after VDD or MCLR
Serial Program/Verify
Clock Low Pulse Width
100
ns
Clock High Pulse Width
100
ns
Data in setup time before clock
100
ns
Data in hold time after clock
100
ns
Clock to data out valid (during a
0
80
ns
Read Data command)
Clock to data low-impedance (during a
0
80
ns
Read Data command)
Clock to data high-impedance (during a
0
80
ns
Read Data command)
1: Externally timed writes are not supported for Configuration and Calibration bits.
2: Bulk-erased devices default to brown-out enabled. VDDMIN is 2.85 volts when performing low-voltage programming on a
bulk-erased device, to ensure that the device is not held in Brown-out Reset.
DS40001683B-page 31
PIC16(L)F170X
TABLE 8-1:
AC/DC CHARACTERISTICS
Sym.
Characteristics
TERAB
TERAR
TPINT
TDLY
Min.
Typ.
Max.
Units
1.0
5
2.5
2.5
5
ms
ms
ms
ms
Conditions/Comments
Program memory
Configuration Words
TPEXT
2.1
ms
Note 1
Time delay from program to compare
300
s
TDIS
(HV discharge time)
TEXIT
Time delay when exiting Program/Verify mode
1
s
Note 1: Externally timed writes are not supported for Configuration and Calibration bits.
2: Bulk-erased devices default to brown-out enabled. VDDMIN is 2.85 volts when performing low-voltage programming on a
bulk-erased device, to ensure that the device is not held in Brown-out Reset.
8.1
AC Timing Diagrams
FIGURE 8-1:
FIGURE 8-3:
PROGRAMMING MODE
ENTRY VDD FIRST
TENTS
TEXIT
VIHH
TENTH
VPP
VIHH
VPP
PROGRAMMING MODE
EXIT VPP LAST
VIL
VDD
VIL
ICSPDAT
VDD
ICSPCLK
ICSPDAT
ICSPCLK
FIGURE 8-4:
PROGRAMMING MODE
EXIT VDD LAST
TEXIT
FIGURE 8-2:
PROGRAMMING MODE
ENTRY VPP FIRST
TENTS
VIHH
VPP
VIL
VDD
TENTH
VIHH
VPP
VIL
VDD
ICSPDAT
ICSPCLK
ICSPDAT
ICSPCLK
DS40001683B-page 32
PIC16(L)F170X
FIGURE 8-5:
TCKH
ICSPCLK
TDS TDH
ICSPDAT
as
input
TCO
ICSPDAT
as
output
TLZD
ICSPDAT
from input
to output
THZD
ICSPDAT
from output
to input
FIGURE 8-6:
15
16
ICSPCLK
ICSPDAT
0 LSb
0
Next
Command
Payload
Command
FIGURE 8-7:
MSb
X
ICSPDAT
(from Programmer)
15
16
ICSPCLK
ICSPDAT
(from Device)
Command
LSb
MSb
Payload
0
Next
Command
DS40001683B-page 33
PIC16(L)F170X
FIGURE 8-8:
VDD
MCLR
TENTS
TENTH
33 clocks
TCKH
TCKL
ICSPCLK
TDH
ICSPDAT
FIGURE 8-9:
LSb of Pattern
0
TDS
1
...
MSb of Pattern
31
VDD
MCLR
TENTH
33 Clocks
TCKH
TCKL
ICSPCLK
TDH
ICSPDAT
LSb of Pattern
0
TDS
1
...
MSb of Pattern
31
DS40001683B-page 34
PIC16(L)F170X
APPENDIX A:
REVISION HISTORY
Revision A (02/2013)
Initial release of this document.
Revision B (06/2013)
Changed PIC16(L)F1704/8 to PIC16(L)F170x in the
document title; Added PIC16(L)F1703/7 and
PIC16(L)F1705/9 devices.
DS40001683B-page 35
PIC16(L)F170X
NOTES:
DS40001683B-page 36
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchips Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as unbreakable.
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchips code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
2013, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620772898
== ISO/TS 16949 ==
2013 Microchip Technology Inc.
DS40001683B-page 37
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DS40001683B-page 38
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11/29/12