GaAs High Electron Mobility Transistor
Rosa Lahiji
EECS521 winter 2003
Abstract- Capacitive modulation of the charge
in the conductive channel is the basic principle
of all the FET devices. Applying this concept to
different geometries and using different material
and doping profiles would result the variety of
the FET transistors. In each type of FET the
confinement of the channel charge and the
isolation between the gate and channel, would
result a novel device with specific properties.
High Electron Mobility Transistor (HEMT) as a
member of this family is studied in this report.
The basic of operation, modeling the 2DEG,
DC, high frequency and Noise models,
fabrication and application of the HEMT, and
specifically AlGaAs/GaAs HEMT is reviewed.
A preliminary design of a single channel HEMT
is investigated and the dependence of its
properties on several parameter such as doping,
composition and geometrical dimensions is
studied.
Key Words- FET, HEMT, MODFET, 2DEG
I. Introduction
Since the invention of the transistor,
there has been a great deal of activities and
progresses in the semiconductor theory and
technology. Different varieties of devices
and material have been investigated. Among
these semiconductor materials, the
compound semiconductor showed very
attractive electrical and optical
characteristics. Hetero-structure devices
that include HEMT are a product of this
Technology.
GaAs-based high electron mobility
transistors (HEMTs) are rapidly replacing
the conventional MESFET technology in
military and commercial application
requiring low noise figures and high gain
particularly at millimeter and microwave
frequencies.
HEMT, also called Modulation Doped
Field Effect Transistor (MODFET) has
attained a serious interest during late 70’s,
when it has been demonstrated that high
mobility can be achieved using hetero-
junctions. In this report the principles of the
Field Effect Transistor as a basic element for
demonstrating the operational concepts will
be described generally. Then the idea of
MODFET on GaAs and its characteristics
will be discussed.
The properties of the AlGaAs/GaAs
interface and the growth and fabrication
techniques are reviewed. Then the
approaches toward modeling the 2D
Electron Gas (2DEG) concentration in a
single channel HEMT will be described.
Modeling the DC and high frequency of a
single channel HEMT structure is
introduced, along with a brief study of the
noise sources of the MODFET structure. A
quick review on the design approaches and
some of the application of HEMT structure
and the state of art characteristics guide us
toward a preliminary design of a
AlGaAs/GaAs HEMT. Then the effect of
the different parameters such as doping,
thickness, material and composition has
been investigated.
II. Principles of FET
The concept of the operation of many
electronic devices lay upon the modulation
of either the current flowing through the
device or the voltage at the output terminal.
In the case of a field effect transistor,
(Fig.1), the current flowing between two
terminals (Source and Drain) is controlled
by the voltage applied to the third terminal,
the Gate. The contact of the source and
drain metal is ohmic, while the gate- Depletion Region
semiconductor junction should have a
Source Gate Drain
Schottkey barrier with rectifying
characteristics. Also since the electron
n+ n+
mobility is much larger than the hole, the n-
channel devices are normally considered. At
N-type Channel
zero bias there could be a depletion of
electrons within a depth in the channel, Semi-insulating Substrate
which is related to different parameters such
as the gate material and the interface
properties. The current flows from source to Fig.1 The schematic of a Field Effect transistor.
drain through the channel. The resistance of
the channel (e.g. the available path for the
current) is controlled by the width of
depletion region, through the gate voltage.
Now by applying a voltage on the gate
electrode (Vg) the depth of the depletion
region, and therefore the conductive portion (a)
of the channel would vary. With Vg<0, the
depletion region would further grow in to
the channel, while narrowing the path for the
electrons to flow and therefore increasing
the resistance of the channel. The voltage, at
(b)
which the whole channel is depleted, is
referred to as the pinch-off voltage (Vp).
Applying a positive voltage to the drain
would attract and collect the electrons to
form the conduction current. By increasing
the drain voltage, the electric field across the (c)
channel would increase, and so would the
velocity of the electrons. The voltage
distribution across the channel would cause
the difference between the gate electrode
and the channel voltage along the channel (d)
length. This would result the different depth Fig.2 The I-V characteristic of a FET, as Vds
of the depletion region along the channel, increases.
which would increase toward the drain, as voltage generates an electric field across the
shown in Fig.1. Further increasing the drain depletion region, which would guarantee the
voltage would cause the channel pinch-off continuity of the current. Although
and the channel to be a resistive pass for the increasing the gate voltage would decrease
current. Increasing the Vds beyond this the depth of the depletion region in to the
voltage won’t change the current much, channel. This would reduce the resistance of
since the pinch-off point would move the channel, and so the better capabilities of
toward the source and the voltage would current derive. Fig.2.
drop across the depletion region. This
III. High Electron Mobility Transistor both the saturation velocity and the mobility
are maximized.
A. Principle Also in this structure a semi-insulating
In each type of FET the confinement of material is used as a substrate in order to
the channel charge and the isolation between have isolation between the adjacent devices.
the gate and channel, would result a novel
device with specific properties.
In a Heterostructure Field Effect
Transistor (HFET), a wide band gap
semiconductor separates the gate electrode
from the active channel.
A High Electron Mobility Transistor
(HEMT) as a HFET device consists of
several layers of compound semiconductor
as shown in Fig.3.
An active channel is formed at the Fig.3 Schematic of a heterostructure FET.
interface of the buffer layer of GaAs and the
doped, wide band gap material, such as
AlGaAs. The donor layer of n-AlGaAs
supplies the electrons for the channel
conduction. These free electrons are allowed
to move in the lattice and will fall in the
lowest energy state, which is available at the
GaAs side of the hetero-junction. The
thickness of this layer is about 100A, which
is much smaller then Broglie wavelength of
the electrons. Therefore the electrons are
quantized in a 2D system at the interface of Fig.4 The energy band diagram of doped AlGaAs
the hetero-junction, known as 2D Electron (wide band gap), GaAs (small band gap) and their
Gas (2DEG) Fig.4. This separation of the heterostructure and the formation of 2DEG.
electrons from the ionized donor impurities
would result less impurity scattering and
therefore higher mobility and effective
velocity of electrons for a certain electric B. Hetero-junction characteristics
field. This sheet of high electron mobility When a semiconductor is epitaxially
can be served as the channel of a FET, and deposited on another semiconductor with the
can be modulated through the gate voltage. same orientation but different physical
Usually there is an un-doped spacer layer property, the atoms of the both sides of the
with the thickness of 20-60A, in between the interface adjust themselves during the
buffer and the donor layer. The presence of interface formation.
such a layer would reduce the Columbic In order to produce a high quality
scattering caused by the electrical hetero-junction some physical parameters
interaction between the electrons and the such as the elastic constant, thermal
donors by further separating them. The expansion and lattice parameter have to be
thickness of this layer is set in a way that considered. To prevent the misfit
dislocations at the interface, the lattice
matching should be achieved by proper
selecting the composition of the material.
Also the ability of the reproducing such a
growth process should be considered.
As the strength of the interfacial bonding
increases, the epitaxial deposit would be
strained homogeneously, or Pseudomorphic.
This structure has its unique properties, for
better carrier transport in channel, which is
outside the topic of this report.
One of the most widely used and best-
understood compound materials is the
Al xGa1− x As / GaAs hetero-structure, which
for all the composition factors between 0
and 1 has a perfect lattice match as shown in
Fig.4.
Al xGa1− x As / GaAs has a Zincblende
crystal structure and its characteristics can
be derived based on the composition factor
x, from the table below.
C. GaAs properties and applications
GaAs is a compound material of the III-
V group, with the energy band gap of
1.424ev at 300K, and the Zincblende crystal
structure with the lattice constant of
5.65325A.
While most compounds lack the good
native oxide as Silicon does (SiO2), but
having certain properties distinguished them
as a perfect material for the microwave and
millimeter-wave monolithic integrated
circuits as in high speed digital circuits.
Most of the compound materials such
as GaAs, are direct band gap, which results
in superior opto-electronic properties, higher
low-field mobility characteristics, hence,
less parasitic resistances and higher peak
velocity that leads to a higher speed device
and operating frequencies. In spite of its
higher cost, relative to silicon, GaAs is the
preferred material for monolithic microwave
integrated circuits (MMICs). GaAs epi-
wafers are used in cellular phones, satellites,
radar systems and various electronic
devices. GaAs is also the material of choice
for lasers and LEDs. The broad range of
opto-electronic applications includes lasers
for fiber optic communications, optical
storage, solid state laser pumping, compact
discs, and indicators in appliances,
automobiles, traffic signals and commercial
displays.
D. Modeling
In order to find proper models for the
device, the distribution of the charge must
be derived for the conducting channel. The
donor doping, composition factor, thickness
of the donor region, as well as the
background doping in the channel would
determine this distribution.
In the linear region the DC model’s
drain current is described by a square law,
while in saturation region the drain current
is proportional to the HEMT’s 2DEG
density n s . This parameter can be calculated
or modeled in different ways, which few of
them are mentioned here.
With a self-consistent 1D quantum
mechanical solution of the Poisson and
Schrodinger equations, the band
configuration, and the charge distribution is
determined.
ε .(V g − Vth )
ns =
q(d d + d i + ∆d )
Which ∆d is the effective thickness of the
2DEG sheet charge. Solving for the free
electron concentration through the poisons
and Schrodinger equation would result:
E f − En
4πk bTme*
ne =
h2
.∑ n
ξ 2
n l ln(1 + exp
kT
)
Replacing this value in the Poisson’s
∂ 2V qρ f
equation ( 2 − = 0 ) would result the
∂z ε
potential distribution. Knowing the
potential, the other parameters can be
calculated. This is a general method of
solution for HEMTs, while in literature
different approaches are mentioned which
some of them are numerically fitted to the
observations. Here are some other
approaches an example:
cVt
n s (Vt ) = 2 3
1 + aVt + bVt
Which a, b, and c are constants and Vt is
normally the gate potential V g , but restricted
to the maximum value of VSO = 3 2 b .
In another model for small drain
currents, Weiler and Ayasli (1984) have
proposed a numerical model for the I-V
characteristic of an intrinsic MODFET, as
shown in Fig. Which is especially defined
for microwave application. In this numerical
model the saturation channel charge is given
by:
Lg
Qss (VG ) = eZ ∫ N s ( z )dz
0
Where Z and L g are the width and length of
the gate metal, and N s ( z ) is the 2DEG
density as a function of the position along
the channel. Using the saturation current
SAT
I DS (VG ) at the maximum gate voltage
VG ,max and at VG ,max − ∆V , Transconductance
and gate capacitance can be computed as:
SAT
I DS (VG ,max ) − I DS
SAT
(VG ,max − ∆V )
gm =
∆V
Qss (VG ,max ) − Qss (VG ,max − ∆V )
C gs =
∆V
The ∆V = 0.1v was used for this numerical
method.
E. Fabrication
Research into epitaxy continued to be
fueled as demand grew for multilayer
semiconductors and semi-insulators.
Increasingly precise film thickness was
required for ever-faster processors. To meet
these needs, A.Y. Cho perfected molecular
beam epitaxy, a UHV technique that could
produce single-crystal growth one atomic
layer at a time.
The MBE process frees molecules of an
element by heating it in an effusion cell, or
oven. Some of these molecules would
escape into a chamber with a vacuum so
intense that the freed molecules were drawn
into a linear "beam". A wafer is mounted in
the center of this beam and the freed
molecules could then be deposited one layer
at a time directly on top each other.
F. Noise in MODFETs
The MODFET/HEMT structure has
proved to have less noise devices, although
they are not noise free. In order to be able to
model the noise of a device, the noise
sources should be recognized. In a
MODFET four main noise sources are
recognized: 1. Johnson/Thermal noise due to
the Ohmic region of the channel (vd21 ) . 2.
Noise associated with the spontaneous
generation of dipole layers in the saturation
region, also called diffusion noise (vd22 ) . 3.
Gate noise due to the elementary voltage
fluctuation in the channel (i g21 ) . 4. Induced
gate noise in the saturation region (i g22 ) . Of
course these noise sources are correlated,
which the correlation coefficients are given
in different texts. By defining the noise
representative sources, the noise figure of
the device can be calculated.
G. Al xGa1− x As / GaAs HEMT Application
As mentioned before there are different
applications of HEMT devices, in analog,
digital, low noise and low power circuits, as
well as in microwave and millimeter wave
application. But as discussed before and
observed in the text, the use of multi-
channel HEMT, Pseudomorphic and quasi-
Pseudomorphic devices are generalized to a
great extent. As an application of a single
channel HEMT with a good noise figure the
following structure has been proposed, and
fabricated.
A low noise AlGaAs/GaAs HEMT with
0.1µm gate length and a T-shape gate
structure has been successfully developed.
This device had the noise figure of 0.51dB
and 1.9dB at 18GHz and 40GHz
respectively, and at the room temperature.
The gain of 10.8dB at 18GHz and 5.3dB at
40GHz has been reported. Table.1 below Fig.6 The noise figure and the gain of the
shows the specification of the device. HEMT vs. the gate resistance.

Table.1 The physical parameters of the low

noise single channel HEMT design.

Parameter Value
Lg 0.1µm
GaAs buffer layer thickness 0.1µm
x 0.3
n − Al x Ga1− x As Thickness 100°A
n − Al x Ga1− x As Doping 2.5 × 1018 / cm 3
n − GaAs Cap thickness 300°A
n − GaAs Doping 4 × 10 18 / cm 3
Mesa etch 0.3µm
S/D separation 3µm
Gate width 200µm
Fig.7 The noise figure and the gain of the
HEMT vs. the drain voltage.
The cross section of the HEMT is shown
in theFig.5. The test fixture has been biased
at the drain voltage of 3v, and the drain
current of 10mA. The gain and noise figure
vs. the gate resistance, gate voltage and
frequency is plotted as shown in Fig.6, 7,
and 8 respectively.

Fig.8 The noise figure and the gain of

Fig.5 The cross section of the HEMT. the HEMT vs. the frequency.
IV. Simulations
As the second phase of the project, and
based on the structures designed, fabricated GaAs GaAs
AlGaAs
and reported in the texts, a single channel
HEMT is chosen as the base design and the i-GaAs

effect of different parameter such as doping,

composition and the geometrical dimensions
are investigated, through simulations
performed. As the simulator the MEDICI
2000.4 is used.
Fig.9 shows a preliminary design based GaAs Substrate
on an investigation of different designs for a
single channel HEMT, with the modified
dimensions as specified in Hisao Kawasa et
al, [8] and shown in the Table.1. The etch Fig.9 The preliminary design of a HEMT structure.

depth is selected to be 200°A, while the

thickness of the GaAs layer beneath the gate
is 100°A. The un-doped GaAs region of the
thickness 0.1µm, followed by 0.2µm of
GaAs substrate forms the structure.
Although it seems to be an inverted HEMT
structure at the first place, but the result of
the simulations for the electron density and
the current indicates that a good sheet carrier
concentration forms in the lower un-doped
GaAs material. Increasing the gate voltage
of the device would reduce the depth of the
depletion region in to the device and result a Fig.10 The gate characteristics of the preliminary
designed structure.
parasitic channel to form through the GaAs
layer just below the gate electrode. So this
device can be considered as an inverted,
isolated gate HEMT. Since most of the
current path is through the high doped GaAs
CAP layer for positive voltages, the series
resistance contribution is very small, which
also results in the lower noise of the device.
The result of a simulation in MEDICI
for this structure, by applying a low voltage
to the drain (0.05v), while sweeping the gate
voltage from –0.5 (below the threshold) up
to 1v, and plotting the I d − V g is the gate
characteristic of the device, and is depicted Fig.11 The contours of the current flowing in
the device at VGS = 0.5v .
in Fig.10. By drawing a tangential line to the
curve as shown in the graph of Fig.10, the During this simulation the contours of
threshold voltage of the device is derived, the current flowing in the device is
which in this case is about VT = −0.25v . monitored, which provides a good
understanding of the channel conduction and
the depletion width in the device. Also in the
higher voltage levels the formation of the
parasitic channel is relatively easy to
observe.
Fig.11 demonstrates the current contours
at VGS = 0.5v . Fig.12 shows the carrier
concentration on the device and the both
sides of the wide band gap material. It is
obvious, that several parasitic current paths
are available. In this case this is not a good
design since some of the current is
conducted through the AlGaAs layer, which
is a wide band gap material, so a low
mobility path, which would reduce the
efficiency of the device. Additionally,
because of the presence of the DX trap
centers in the AlGaAs, especially with high
composition of Al, the current conduction of
this layer would increase the noise figure of
the device. On the other hand the fabrication
of the inverted HEMT, is more challenging
than the conventional HEMT and since the
channel is form deeper in the device, any
threshold voltage adjustment of the device,
by using the recess etching techniques
would be useless. So, in order to improve
the current handling of the device and get a
reliable transistor, the structure of Fig.13 is
used.
This structure has the same doping and
geometry of the previous design, with a
Fig.12 The carrier concentration or the sheet charge.
GaAs GaAs
AlGaAs
i-GaAs
GaAs Substrate
Fig.13 A new design; modified structure of the Fig.9.
300°A of n + − GaAs cap layer, 100°A of
AlGaAs barrier layer, 0.1µm i-GaAs,
followed by 0.2µm of GaAs substrate
( 1 × 1014 / cm −3 ).
Simulating this structure in MEDICI
shows a positive threshold voltage for the
device, so an enhancement transistor. To
have a depletion mode transistor, which is
desirable in most applications, several
changes can be applied. The method, which
would have the most effect would be the
change of the thickness of the AlGaAs layer,
since it controls the depth of the depletion
layer in to the device. Increasing this
thickness from 100°A to 220°A would shift
the threshold voltage of the device from 0.6v
to –0.4v, which is desired. The effect of the
gate voltage on the 2DEG modulation has to
occur through a thicker layer, but it’s a good
method to compensate for the threshold
voltage adjustment. Of course the change of
the recess etch would change the threshold
voltage, but the changes are very small and
usually used for fine tuning and final
adjustments of the threshold voltage if
necessary.
Fig.14, 15 show the energy band
diagram and the gate characteristics of the
device shown in Fig.13, respectively.
Simulating the structure shows a sheet
carrier concentration in the GaAs side of the
heterostructure. But as is depicted in the
Fig.16, still there exists some current perform, it suffice to have a feeling of the
conduction through the AlGaAs layer, which level of the break down voltage.
reduces the mobility and the frequency
response of the device.

Fig.16 The current distribution in the device

with 0.5v of gate bias.
Fig.14 The energy band diagram of the structure
of Fig.13.

Fig.17 The cut off frequency of the single channel

Fig.15 The gate characteristics and the threshold HEMT versus the drain current for 0.5v of gate bias.
voltage of the structure of Fig.13.

An AC analysis of the device of Fig.13

is done in MEDICI and the results are
shown in Fig.17, 18 as the cut-off frequency
versus the drain current and gate voltage.
This device seems to have a good response
in 100GHz frequency range. And from these
graphs the relative voltage and current for a
certain cut-off frequency can be derived.
Fig.19 demonstrates the I d − Vds
characteristics of the device for different
gate voltages. The break down voltage
happens to be much higher than 30V, but Fig.18 The cut off frequency of the single channel
due to the time required for the simulation to HEMT versus the gate voltage.
 Fig.19 The output characteristics of the device Fig.20 The gate characteristics of the device
simulated with -0.5v, 0v, 0.5v of gate bias. simulated within MEDICI.

In order to have a better carrier

confinement in the channel and increase the
current capabilities of the device, reducing
the thickness of the doped AlGaAs layer and
using a low-doped spacer layer, is
recommended. With a proper spacer layer
the carriers, electrons in this case, are more
separated from the donor layer so would
have a higher mobility, but as well the
density of the sheet charge carrier might
reduce. So there is a trade off for the
appropriate thickness of the spacer layer. Fig.21 The output characteristics of the device
simulated with -0.6v, -0.3v, 0v of gate bias.
A 50°A layer of AlGaAs, has been
defined as the spacer layer. The doping of
this layer has chosen to be 2.5 × 1015 / cm 3
while it really does not have a great impact
on the device characteristics and the
threshold voltage of the transistor. Other
parameters of the device are kept the same.
The result of a simulation in MEDICI, is
depicted in Fig.20, which shows the gate
characteristics of this device. The threshold
voltage of –0.7v is calculated. By comparing
this graph, with the one in Fig.15, it is
observed that the current level has increase,
which is due to the better confinement of the Fig.22 The cut off frequency of the single channel
electrons in the channel (2DEG). As HEMT, with the 50A of spacer layer, versus the
mentioned before the spacer would result in gate voltage.
a bit lower dense 2DEG, while the mobility
of the 2DEG carriers are much higher with
respect to the case without the spacer layer,
and this would result in the higher current
handling of the device. Further increasing
the cap layer would result in a lower
resistance path for a larger section of the
source and drain distances to the gate and so
increases the efficiency of the device.
Fig.21 show the output characteristics of
the new device, and as it is showing it has a
better current capability, of course the
threshold voltages are not equal, but for the
same situations in both devices, the former
has a better characteristics.
As another parameter, which can be
varied easily in the process would be the
thickness of the cap layer. Increasing the cap
layer thickness would result in a lower series
resistance along the device length and would
increase the intrinsic conductance and
contributes to a lower RC, time constants,
which would result in a higher gain and
power cut off frequencies. Fig.22
demonstrates the cut-off frequency of the
device versus the gate voltage. The cap layer
thickness has been increased from 300°A to
400°A in this simulation.
Fig.23 shows the g m − V gs characteristics
of the device. The values demonstrated are
the intrinsic value of g m , and the extrinsic
g m has to include the series resistances
effects. But the values calculated are quite
high relative to what we expected, which
might be resolved by changing the mobility
model or the method of calculations.
For better improvement of the sheet charge
confinement a delta doping is usually used
between the donor layer and spacer.
In the design process the implementation
of the concept has been validated in the
MEDICI, and the trends are expected. The
final results do agree with the reported
parameters and the dependences. In order to
improve the characteristics of this device
several other approaches are available, e.g.
increasing the composition of the Al in
AlGaAs material (x), would increase the
band gap of the AlGaAs layer and results in
Fig.23 The plot of the variations of the trans-
conductance of the device versus the gate voltage.
a denser electron confinement, while this
would increase the DX center in the material
and has a reverse effect on the carrier
transportation. A good value reported in the
literature is about 22%, but these values vary
between 17% and 30% in different designs.
Also for better 2DEG confinement, the
thickness of the channel should be reduced,
which leads to the novel designs namely, Q-
Well devices. The thickness of the channel
in these devices would vary between the
100°A and 30°A, so the probability of the
presence of the electrons in the channel is
quite high, otherwise a degradation of the
current due to the presence of the electron in
the AlGaAs layer would be expected. As
another factor to improve the sheet charge
density of the 2DEG is the AlGaAs layer
doping. This doping is also limited to a
level, which the leakage current is not
significant. Otherwise it would reduce the
gate break down voltage and damage the
device.
In term of the breakdown voltage, the
most attention should be toward the areas
which are facing the high voltage drop
which are experiencing high electric fields.
His happened at the drain edge of the device
with a high electric filed present in a very
short length. In order to increase the
breakdown of the device the distance
between the gate and the drain should be
increased. This is possible by offsetting the
gate, and moving it toward the source end.
In the power application which both the
high current capability and the high
breakdown voltages are expected, the multi-
channel HEMT devices play an important
role. The number of the channels of a device
would depend on the distance of each
channel to the gate. Since the 2DEG sheet
charge available in the channel has to be
modulated through the gate voltage. Another
important group of the HEMT devices, are
the Pseudomorphic devices, which the
presence of a relatively thin layer of a
narrow band material, which is not usually
lattice match with the rest base layer would
happen to be strained and the 2DEG of a
very high mobility to form. This type of
device is used in the microwave and high
frequency applications.
Conclusion
The High Electron Mobility Transistor
has demonstrated good characteristics for
microwave and high frequency application
as well as the power applications and is
widely used. In this report this type of the
transistors are investigated. The effect of
several changes of the different parameters
is studied and summarized and compared
with that of the reported in the literature.
Several families of the HEMT family and
their application are introduced.
Acknowledgment
Many thanks to Professor D. Pavlidis for
his advise and support during the whole
term. I appreciate the help and advice of
Alexander Mannason, Pouya Valizadeh and
all the classmates of the EECS521, in winter
2003.
References
1- H. Morkoc, H. Unlu, G. Ji, “Principles and
Technology of MODFETs”, Vol.1&2 Wiley,
1991
2- S. M. Sze, “Modern Semiconductor Device
Physics” Wiley Interscience, 1998
3- B. J. Kelley, B. C. Dodrill, J. R. Lindemuth
and G. Du, “Compound Semiconductor
Electronic ransport Caracterization of HEMT
Structures”
4- Robert H. Ladbreeoke, “ MMIC Design:
GaAs FETs and HEMTs”, Artech House, 1989
5- S. M. Sze, “High Speed Semiconductor
Devices”, Wiley, 1990
6- A. F. M. Anwar, and Kuo-wei Liu, “A Noise
Model for High Electron Mobility transistors”,
IEEE, Trans. Electron Devices, Vol.41, No.11,
Nov.1994
7- A. F. M. Anwar, and Kuo-wei Liu, “Noise
Properties of AlGaAs/GaAs MODFET”, IEEE,
Trans. Electron Devices, Vol.40, No.6,
June1993
8- Hisao Kawasaki, Toshio Shino, Mitsuo
Kawano, Kiyoho Kamei, “Super Low Noise
AlGaAs/GaAs HEMT with One Tenth Micron
Gate", IEEE MTTs-Digest, 1989
9- Gouli Qu and Anthony E. Parker, “Validation
of a new Nonlinear Model by Intermodulation
Characterization”, IEEE, 1998
10- Paul M. Solomon, Hadis Morkoc,
“Modulation Doped GaAs/AlGaAs Hetero-
junction Field Effect Transistors (MODFET’s),
Ultrahigh Speed Devices for Supercomputers”,
IEEE, Trans. Electron Devices, Vol.ED-31,
No.8, August1984
11- P. Saunier, Y. C. Kao, A. M. Khatibzadeh,
H. Q. Tserng, and K. Bradshaw, “Doped
Channel Hetero-junction Structure for
Millimeter-Wave Discrete Devices and
MMIC’s”, IEEE, 1989
12- Hin-Fai Chau, Dimitris Pavlidis, Kazutaka
Tomizawa, “Theoretical Analysis of HEMT
Breakdown Dependence on Device Design
Parameters”, IEEE, Trans. Electron Devices,
Vol.38, No.2, Feburary1991
13- Yi-Jen Chan, Dimitris Pavlidis, Manijeh
Razeghi, Frank Omnes, ” Ga051In0.49 P / GaAs
HEMT’s Exhibiting Good Electrical
Performance at Cryogenic Temperatures”,
IEEE, Trans. Electron Devices, Vol.37, No.10,
October1990
14- Hin-Fai Chau, Dimitris Pavlidis, Jean-Louis
Cazaux and Jaques Graffeuil, “Studies of DC,
Low Frequency, and Microwave characteristic
of uniform and step doped GaAs/AlGaAs
HEMT’s”, IEEE, Trans. Electron Devices,
Vol.36, No.10, October1989
15- Chien-Jih Han, Paul Ruden, Thomas E.
Nohava, David H. Narum, David E. Grider,
K.Newstorm, P. Joslyn, Micheal S. Shur,
“Electron Velocity Saturation in Heterostructure
Field-Effect Transistor”, IEEE, Trans. Electron
Devices, Vol.37, No.3, March1990