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1

R7X AMD SYSTEM DIAGRAM

+3V/+5V S5

01

PG.35

+1.1VS5/+2.5V

AMD

PG.36

+1.2V

SODIMM1
PG.37

Max. 4GB

CPU Core

PG.12

PG.38~39

Dd

SODIMM2

DDR3L

35mm X 35mm
TDP 35W

PG.13

DP1

DP

PG.34

Dis-Charge
3&,([

PG.41

+VGACORE
HDD

PG.42

SATA0

ODD

+1.0V/+1.8/ +3 VGA

DP2

/'

DDR3 900MHz
128Mx16x4
1GHz
or
256Mx16x4 PG.20~21

PG.2~5

UMI

eDP

AMD FCH
BOLTON M3

eDP

24.5mm X 24.5mm

DP Port B

PG.31

+1.5 VGA
PG.43

W'

PP;PP
ELW0SDFNDJH
:
PG.13~19

VRAM

Charge
B

DP0

RICHLAND 722 pin uPGA

DDR3 L
Channel B

Max. 4GB

PG.40

AMD

DDR3 L
Channel A

Sun XT

PCI-E x8

Dd

Z>d<Z
>s^/
W>s^
W'

HDMI PG.25

CRT

PG.31

LVDS PG.23

656pin FCBGA

SATA1

PG.23

CRT

TDP 4.7W

PG.24

PG.44
LANE1

LAN

WLAN
BT COMBO

RTL8166EH

10/100

PG.29

USB 3.0
USB 2.0

PORT1,2

PORT8

PG.28

PG.32

USB 2.0

3&,([

LANE0

Card Reader

PG.32

RTS5239

SMBUS

KBC
ITE8528
TPPG.30

ROM
PG.33

PG.29

PORT3

Stackup
TOP
GND
IN1
IN2
VCC
BOT

Touch Screen
(option)
PG.26

PG.6~10
PG.26

LPC

FANPG.31

Speaker

AUDIO
CODEC

PG.33

KBPG.30

PORT2

PORT11,12

USB2.0 Ports

PG.23

PORT0

LANE3

Accelerometer

USB3.0 Ports Webcam


X2

TPM
SLB9635
(option)

COMBO JACK
HP/MIC
PG.28

ALC3227-CG

PG.25

PG.27

PG.27

DIGITAL MIC

352-(&75;
4XDQWD&RPSXWHU,QF

PG.23
1%

Size
Custom

Document Number

Rev
1A

BLOCK DIAGRAM

Date: Tuesday, March 12, 2013


1

Sheet

1
8

of

43

U21F

32
32

AE5
AE6
AD8
AD7
AC9
AC8
AC5
AC6

PCIE_RXP0_WLAN
PCIE_RXN0_WLAN

7
7
7
7
7
7
7
7

P_GPP_RXP0
P_GPP_RXN0
P_GPP_RXP1
P_GPP_RXN1
P_GPP_RXP2
P_GPP_RXN2
P_GPP_RXP3
P_GPP_RXN3

AG8
AG9
AG6
AG5
AF7
AF8
AE8
AE9

UMI_RXP0
UMI_RXN0
UMI_RXP1
UMI_RXN1
UMI_RXP2
UMI_RXN2
UMI_RXP3
UMI_RXN3
R430

+1.2V_VDDP

196/F_6

P_UMI_RXP0
P_UMI_RXN0
P_UMI_RXP1
P_UMI_RXN1
P_UMI_RXP2
P_UMI_RXN2
P_UMI_RXP3
P_UMI_RXN3

P_ZVDDP AG11

GRAPHICS

PCI EXPRESS

GPP

TO WLAN

P_GFX_RXP0
P_GFX_RXN0
P_GFX_RXP1
P_GFX_RXN1
P_GFX_RXP2
P_GFX_RXN2
P_GFX_RXP3
P_GFX_RXN3
P_GFX_RXP4
P_GFX_RXN4
P_GFX_RXP5
P_GFX_RXN5
P_GFX_RXP6
P_GFX_RXN6
P_GFX_RXP7
P_GFX_RXN7
P_GFX_RXP8
P_GFX_RXN8
P_GFX_RXP9
P_GFX_RXN9
P_GFX_RXP10
P_GFX_RXN10
P_GFX_RXP11
P_GFX_RXN11
P_GFX_RXP12
P_GFX_RXN12
P_GFX_RXP13
P_GFX_RXN13
P_GFX_RXP14
P_GFX_RXN14
P_GFX_RXP15
P_GFX_RXN15

UMI-LINK

AB8
AB7
AA9
AA8
AA5
AA6
Y8
Y7
W9
W8
W5
W6
V8
V7
U9
U8
U5
U6
T8
T7
R9
R8
R5
R6
P8
P7
N9
N8
N5
N6
M8
M7

PEG_RXP0
PEG_RXN0
PEG_RXP1
PEG_RXN1
PEG_RXP2
PEG_RXN2
PEG_RXP3
PEG_RXN3
PEG_RXP4
PEG_RXN4
PEG_RXP5
PEG_RXN5
PEG_RXP6
PEG_RXN6
PEG_RXP7
PEG_RXN7

PEG_RXP0
PEG_RXN0
PEG_RXP1
PEG_RXN1
PEG_RXP2
PEG_RXN2
PEG_RXP3
PEG_RXN3
PEG_RXP4
PEG_RXN4
PEG_RXP5
PEG_RXN5
PEG_RXP6
PEG_RXN6
PEG_RXP7
PEG_RXN7

P_ZVDDP

P_GFX_TXP0
P_GFX_TXN0
P_GFX_TXP1
P_GFX_TXN1
P_GFX_TXP2
P_GFX_TXN2
P_GFX_TXP3
P_GFX_TXN3
P_GFX_TXP4
P_GFX_TXN4
P_GFX_TXP5
P_GFX_TXN5
P_GFX_TXP6
P_GFX_TXN6
P_GFX_TXP7
P_GFX_TXN7
P_GFX_TXP8
P_GFX_TXN8
P_GFX_TXP9
P_GFX_TXN9
P_GFX_TXP10
P_GFX_TXN10
P_GFX_TXP11
P_GFX_TXN11
P_GFX_TXP12
P_GFX_TXN12
P_GFX_TXP13
P_GFX_TXN13
P_GFX_TXP14
P_GFX_TXN14
P_GFX_TXP15
P_GFX_TXN15
P_GPP_TXP0
P_GPP_TXN0
P_GPP_TXP1
P_GPP_TXN1
P_GPP_TXP2
P_GPP_TXN2
P_GPP_TXP3
P_GPP_TXN3
P_UMI_TXP0
P_UMI_TXN0
P_UMI_TXP1
P_UMI_TXN1
P_UMI_TXP2
P_UMI_TXN2
P_UMI_TXP3
P_UMI_TXN3
P_ZVSS

AB2
AB1
AA3
AA2
Y5
Y4
Y2
Y1
W3
W2
V5
V4
V2
V1
U3
U2
T5
T4
T2
T1
R3
R2
P5
P4
P2
P1
N3
N2
M5
M4
M2
M1

PEG_TXP0_C
PEG_TXN0_C
PEG_TXP1_C
PEG_TXN1_C
PEG_TXP2_C
PEG_TXN2_C
PEG_TXP3_C
PEG_TXN3_C
PEG_TXP4_C
PEG_TXN4_C
PEG_TXP5_C
PEG_TXN5_C
PEG_TXP6_C
PEG_TXN6_C
PEG_TXP7_C
PEG_TXN7_C

AD5
AD4
AD2
AD1
AC3
AC2
AB5
AB4

PCIE_TXP0_C
PCIE_TXN0_C

PEG_TXP0
PEG_TXN0
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXN2
PEG_TXP3
PEG_TXN3
PEG_TXP4
PEG_TXN4
PEG_TXP5
PEG_TXN5
PEG_TXP6
PEG_TXN6
PEG_TXP7
PEG_TXN7

C681 *0.1U/10V_4
C684

*0.1U/10V_4

C682

*0.1U/10V_4

C693

*0.1U/10V_4

C689

*0.1U/10V_4

C697

*0.1U/10V_4

C696

*0.1U/10V_4

C702

*0.1U/10V_4

C701

*0.1U/10V_4

C679 *0.1U/10V_4
C687 *0.1U/10V_4
C686 *0.1U/10V_4
C695 *0.1U/10V_4
C694 *0.1U/10V_4
C700 *0.1U/10V_4
C698 *0.1U/10V_4

PEG_TXP0
PEG_TXN0
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXN2
PEG_TXP3
PEG_TXN3
PEG_TXP4
PEG_TXN4
PEG_TXP5
PEG_TXN5
PEG_TXP6
PEG_TXN6
PEG_TXP7
PEG_TXN7

13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13

02

PEG X 8

13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13

UMA can remove

AG2
AG3
AF4
AF5
AF1
AF2
AE2
AE3

UMI_TXP0_C
UMI_TXN0_C
UMI_TXP1_C
UMI_TXN1_C
UMI_TXP2_C
UMI_TXN2_C
UMI_TXP3_C
UMI_TXN3_C

AH11

P_ZVSS

R432

C110

0.1U/10V_4
C111

C117

0.1U/10V_4

C121

0.1U/10V_4

C130

0.1U/10V_4

C138

0.1U/10V_4

PCIE_TXP0_WLAN
PCIE_TXN0_WLAN

0.1U/10V_4

C115

0.1U/10V_4

C125

0.1U/10V_4

C135

0.1U/10V_4

C146

0.1U/10V_4

UMI_TXP0
UMI_TXN0
UMI_TXP1
UMI_TXN1
UMI_TXP2
UMI_TXN2
UMI_TXP3
UMI_TXN3

UMI_TXP0
UMI_TXN0
UMI_TXP1
UMI_TXN1
UMI_TXP2
UMI_TXN2
UMI_TXP3
UMI_TXN3

32
32TO

WLAN

7
7
7
7
7
7
7
7

196/F_6

4/19 For Comal.

Richland APU
+3V

HDT+ Connector for Debug only

VID Override Circuit


BOOT VOLTAGE

+1.5V
R239
*0_4/S

SVC

R241
1K/F_4

R235
1K/F_4

U8
B

4,7

APU_RST#

APU_RST#

1
2

4,7

APU_PWRGD

APU_PWRGD

A1
GND

Y1
VCC

A2

Y2

SVD

VFIX_+VDD
=VCC/GND

VFIX_+VDD
=OPEN

4/19 For Comal.


0

1.1

1.1

1.0

1.2

0.9

1.0

0.8

0.8

APU_RST_L_BUF

5
4

APU_PWROK_BUF

74LVC2G07GW

MV , remove it for cost down

J1
+1.5VSUS

close to HDT
debug HEADER
APU_TDI
APU_TCK
APU_TMS
APU_TRST#

R252
R254
R253
R251

APU_DBREQ#

1K/F_4
1K/F_4
1K/F_4
1K/F_4

R255

1K/F_4

+1.5VSUS

4
4

APU_TEST18
APU_TEST19

4
4
4
4
4
4
4

TP59
APU_DBREQ#
APU_DBRDY
APU_TCK
APU_TMS
APU_TDI
APU_TRST#
APU_TDO

APU_TEST18
APU_TEST19
APU_RST_L_BUF
CPU_LDT_RST_HTPA#
APU_DBREQ#
APU_DBRDY
APU_TCK
APU_TMS
APU_TDI
APU_TRST#
APU_TDO
APU_PWROK_BUF

4/19 For Comal.


DBRDY3
DBRDY2
DBRDY1

R575
R576
R577

DBRDY3
DBRDY2
DBRDY1

*10K_4
*10K_4
*10K_4

20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

Rd
4

SVC

SVD

SVC

R273

*0_4/S

CPU_SVC

R274

*0_4/S

CPU_SVD

R270

*0_4/S

CPU_PWRGD_SVID_REG

Re
SVD

Rf
APU_PWRGD

CPU_SVC

38

CPU_SVD

38

CPU_PWRGD_SVID_REG

352-(&75;
4XDQWD&RPSXWHU,QF

HDT CONN
88511-2001-20p-l

Reserve for debug

1%

Size
Custom

Document Number

Rev
1A

APU 1/4(PCIE/UMI/GPP/HDT)

Date: Tuesday, March 12, 2013


5

38

APU_PWRGD have pull up 300ohm


to +1.5V on page 4

Sheet

of

43

M_A_DQ[0..63]

U21A
11

M_A_A[15:0]

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

11
11
11
11

M_A_DM[7..0]

+1.5VSUS
11,12

R157

1K/F_4

G14
H14
G18
H18
J21
H21
E27
E26
AE26
AD26
AB22
AA22
AB18
AA18
AA14
AA15

M_A_DQSP0
M_A_DQSN0
M_A_DQSP1
M_A_DQSN1
M_A_DQSP2
M_A_DQSN2
M_A_DQSP3
M_A_DQSN3
M_A_DQSP4
M_A_DQSN4
M_A_DQSP5
M_A_DQSN5
M_A_DQSP6
M_A_DQSN6
M_A_DQSP7
M_A_DQSN7

11
11
11
11

M_A_CLKP0
M_A_CLKN0
M_A_CLKP1
M_A_CLKN1

11
11

M_A_CKE0
M_A_CKE1

11
11

M_A_ODT0
M_A_ODT1

11
11

M_A_CS#0
M_A_CS#1

11
11
11

M_A_RAS#
M_A_CAS#
M_A_WE#

11

M_A_RST#

T21
T22
R23
R24
H28
H27
Y25
AA27
V22
AA26
V21
W 24
W 23
H25
T24

M_A_EVENT#
+MEMVREF_CPU
+1.5VSUS

R146

U24
U21
L23
E14
J17
E21
F25
AD27
AC23
AD19
AC15

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11

M_A_BS#0
M_A_BS#1
M_A_BS#2

M_A_BS#0
M_A_BS#1
M_A_BS#2

U20
R20
R21
P22
P21
N24
N23
N20
N21
M21
U23
M22
L24
AA25
L21
L20

+MEMVREF_CPU

W 20

39.2/F_4 +M_ZVDDIO

W 21

MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15

MEMORY CHANNEL A
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7

MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15

MA_BANK0
MA_BANK1
MA_BANK2

MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23

MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7

MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31

MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7

MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47

MA_CLK_H0
MA_CLK_L0
MA_CLK_H1
MA_CLK_L1
MA_CKE0
MA_CKE1

MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55

MA_ODT0
MA_ODT1
MA_CS_L0
MA_CS_L1
MA_RAS_L
MA_CAS_L
MA_W E_L

MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63

MA_RESET_L
MA_EVENT_L
M_VREF
M_ZVDDIO

Place close to APU within 1"


C83
220P/50V_4

E13
J13
H15
J15
H13
F13
F15
E15

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7

H17
F17
E19
J19
G16
H16
H19
F19

M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15

H20
F21
J23
H23
G20
E20
G22
H22

M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23

G24
E25
G27
G26
F23
H24
E28
F27

M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31

AB28
AC27
AD25
AA24
AE28
AD28
AB26
AC25

M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39

Y23
AA23
Y21
AA20
AB24
AD24
AA21
AC21

M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47

AA19
AC19
AC17
AA17
AB20
Y19
AD18
AD17

M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55

AA16
Y15
AA13
AC13
Y17
AB16
AB14
Y13

03
M_B_A[15:0]

12
12
12

M_B_BS#0
M_B_BS#1
M_B_BS#2

M_B_DM[7..0]

M_B_CLKP0
M_B_CLKN0
M_B_CLKP1
M_B_CLKN1

12
12

M_B_CKE0
M_B_CKE1

12
12

M_B_ODT0
M_B_ODT1

12
12

M_B_CS#0
M_B_CS#1

12
12
+1.5VSUS

U27
T28
K28

C15
B15
E18
D18
E22
D22
B26
A26
AG24
AG25
AG21
AF21
AG17
AG18
AH14
AG14
R26
R27
P27
P28
J26
J27
W 27
Y28
V25
Y27
V24
V27
V28

M_B_RAS#
M_B_CAS#
M_B_WE#

J25
T25

M_B_RST#
M_B_EVENT#
R162

T27
P24
P25
N27
N26
M28
M27
M24
M25
L26
U26
L27
K27
W 26
K25
K24

D14
A18
A22
C25
AF25
AG22
AH18
AD14

M_B_DQSP0
M_B_DQSN0
M_B_DQSP1
M_B_DQSN1
M_B_DQSP2
M_B_DQSN2
M_B_DQSP3
M_B_DQSN3
M_B_DQSP4
M_B_DQSN4
M_B_DQSP5
M_B_DQSN5
M_B_DQSP6
M_B_DQSN6
M_B_DQSP7
M_B_DQSN7

12
12
12
12

12
12
12

Soldermask openings for all bottom side vias/TPs under FS1

M_B_BS#0
M_B_BS#1
M_B_BS#2

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12

M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

M_B_DQ[0..63]

U21B
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

12

11
12

Richland APU

+1.5VSUS

MEMORY CHANNEL B
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7

MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15

MB_BANK0
MB_BANK1
MB_BANK2
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7
MB_CLK_H0
MB_CLK_L0
MB_CLK_H1
MB_CLK_L1
MB_CKE0
MB_CKE1
MB_ODT0
MB_ODT1
MB_CS_L0
MB_CS_L1
MB_RAS_L
MB_CAS_L
MB_W E_L
MB_RESET_L
MB_EVENT_L

1K/F_4
220P/50V_4
C85

MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63

A14
B14
D16
E16
B13
C13
B16
A16

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7

C17
B18
B20
A20
E17
B17
B19
C19

M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15

C21
B22
C23
A24
D20
B21
E23
B23

M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23

E24
B25
B27
D28
B24
D24
D26
C27

M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31

AG26
AH26
AF23
AG23
AG27
AF27
AH24
AE24

M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39

AE22
AH22
AE20
AH20
AD23
AD22
AD21
AD20

M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47

AF19
AE18
AE16
AH16
AG20
AG19
AF17
AD16

M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55

AG15
AD15
AG13
AD13
AG16
AF15
AE14
AF13

M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

12

Richland APU

Reserved for AMD suggest

R103

+3VS5
4,6,8,9,10,25,32,33,35,36,38,41,43
+1.5VSUS
2,4,5,11,12,40,41,43

1K/F_4
+MEMVREF_CPU

R102

*0_4

DDR_VTTREF

11,12,40

Reserved
R104
1K/F_4

C128
0.1U/10V_4

C127
1000P/50V_4

C87
220P/50V_4

352-(&75;
4XDQWD&RPSXWHU,QF

4/19 For Comal.

1%

Size
Custom

Document Number

Rev
1A

APU 2/4(DDR3 MEM I/F)

Date: Tuesday, March 12, 2013


1

Sheet

of

43

Place caps with APU < 1 inch


route PCIE as 85ohm +/- 10%

K2
K1

TP107
TP108

J3
J2

DP1 output to Hudson-M2


for VGA translator interface

8
8

APU_DP_TXP0
APU_DP_TXN0

8
8

APU_DP_TXP1
APU_DP_TXN1

8
8

APU_DP_TXP2
APU_DP_TXN2

8
8

APU_DP_TXP3
APU_DP_TXN3

25
25

4/19 HDMI change to DP2 for Comal.

DP2 output to
HDMI connector
note --HDMI P&N can not swap

25
25

C_TX1_HDMI+
C_TX1_HDMI-

25
25

C_TX0_HDMI+
C_TX0_HDMI-

25
25

C_TXC_HDMI+
C_TXC_HDMI-

0.1U/10V_4
0.1U/10V_4

APU_DP_TXP0_C
APU_DP_TXN0_C

C333
C350

0.1U/10V_4
0.1U/10V_4

APU_DP_TXP1_C
APU_DP_TXN1_C

H2
H1

C366
C354

0.1U/10V_4
0.1U/10V_4

APU_DP_TXP2_C
APU_DP_TXN2_C

G3
G2

C383
C373

0.1U/10V_4
0.1U/10V_4

APU_DP_TXP3_C
APU_DP_TXN3_C

F2
F1

C295
C286

0.1U/10V_4
0.1U/10V_4

PEG_HDMI_TXDP2
PEG_HDMI_TXDN2

L9
L8

C284
C274

0.1U/10V_4
0.1U/10V_4

PEG_HDMI_TXDP1
PEG_HDMI_TXDN1

L5
L6

C299
C301

0.1U/10V_4
0.1U/10V_4

PEG_HDMI_TXDP0
PEG_HDMI_TXDN0

K8
K7

C260
C271

0.1U/10V_4
0.1U/10V_4

2
2

R461
R457

CPU_SVT

*1K/F_4
*0_4/S

4/19 For Comal.


R77

+1.5V
2,7
2,7

APU_RST#
APU_PWRGD

R275

+1.5V

R434

+1.5VSUS
2
2
2
2
2
2
2

APU_TDI
APU_TDO
APU_TCK
APU_TMS
APU_TRST#
APU_DBRDY
APU_DBREQ#

B3
A3

R264

APU_SIC
APU_SID

AG12
AH12

APU_RST#
APU_PWRGD

AF10
AB12

APU_PROCHOT#
APU_THERMTRIP#
APU_ALERT

AC10
AE12
AF12

300_4
1K/F_4

4/19 For Comal.

CPU_VDD0_RUN_FB_L
VDDP_FB_H
CPU_VDDNB_RUN_FB_H
VDDIO_FB_H
38
CPU_VDD0_RUN_FB_H

C3

APU_SVT_R

300_4

PV change to short-pad

38
37
38
40

AB11
AA11

SVC
SVD

SVC
SVD
+1.5V

38

AE11
AD11

CLK_DP_P
CLK_DP_N

CLK_DP_P
CLK_DP_N

Note: CLK_DP_NSSCP/N is 100MHZ non-SSC7

J6
J5

PEG_HDMI_TXCP
PEG_HDMI_TXCN
CLK_APU_P
CLK_APU_N

CLK_APU_P
CLK_APU_N

Note: CLK_APU_HCLKP/N is 100MHZ SSC 7


C

C_TX2_HDMI+
C_TX2_HDMI-

H5
H4

C357
C352

*0_4/S

H10
J10
F10
G10
F9
G9
H9

APU_TDI
APU_TDO
APU_TCK
APU_TMS
APU_TRST#
APU_DBRDY
APU_DBREQ#
VSS_SENSE
VDDP_FB_H
CPU_VDDNB_RUN_FB_H
VDDIO_FB_H
CPU_VDD0_RUN_FB_H
VDDP_FB_H

B4
C5
A4
A5
C4
B5

TP57
TP63
TP64
TP58

+1.5VSUS

Thermal

DP1_AUXP
DP1_AUXN

DP0_TXP2
DP0_TXN2

DP2_AUXP
DP2_AUXN

DP0_TXP3
DP0_TXN3

DP3_AUXP
DP3_AUXN
DISPLAY PORT
MISC.

TP106
TP105

DP0_TXP1
DP0_TXN1

DP1_TXP0
DP1_TXN0
DP1_TXP1
DP1_TXN1
DP1_TXP2
DP1_TXN2
DP1_TXP3
DP1_TXN3
DP2_TXP0
DP2_TXN0

DP0_HPD
DP1_HPD
DP2_HPD
DP3_HPD
DP4_HPD
DP5_HPD

DP2_TXP1
DP2_TXN1

DP_AUX_ZVSS
DP2_TXP2
DP2_TXN2
DP2_TXP3
DP2_TXN3
CLKIN_H
CLKIN_L
DISP_CLKIN_H
DISP_CLKIN_L
SVC
SVD
SVT

TEST6
TEST9
TEST10
TEST14
TEST15
TEST16
TEST17
TEST18
TEST19
TEST20
TEST24
TEST25_H
TEST25_L
TEST28_H
TEST28_L
TEST30_H
TEST30_L
TEST31
TEST32_H
TEST32_L
TEST35

SIC
SID
RESET_L
PW ROK
PROCHOT_L
THERMTRIP_L
ALERT_L
TDI
TDO
TCK
TMS
TRST_L
DBRDY
DBREQ_L
VSS_SENSE
VDDP_SENSE
VDDNB_SENSE
VDDIO_SENSE
VDD_SENSE
VDDR_SENSE

FS1R2
DMAACTIVE_L
TEST4
TEST5

D1
D2

EDP_AUXP
EDP_AUXN

E1
E2

APU_DP_AUXP_C
APU_DP_AUXN_C

D5
D6

SDVO_CLK
SDVO_DATA

C390
C395

0.1U/10V_4
0.1U/10V_4

LVDS

22
22

APU_DP_AUXP
APU_DP_AUXN
SDVO_CLK
SDVO_DATA

8
8

VGA

25
25

R210

EDP_AUXN

R215

EDP_AUXP

R204

1.8K_4

EDP_AUXN

R213

1.8K_4

APU_DP_AUXP

R247

100K/F_4

APU_DP_AUXN

R261

100K/F_4

APU_DP_AUXP_C

R245

1.8K_4

APU_DP_AUXN_C

R263

1.8K_4

04

*100K/F_4
*100K/F_4

+3V

HDMI

E5
E6
F5
F6

Display port power 1.5V min 1.2v max : 1.65v

G5
G6
D3
E3
D7
E7
F7
G7

EDP_HPD
FCH_VGA_HPD
HDMI_HPD_CON

C6
B6
A6

APU_LVDS_BLON
APU_DISP_ON
APU_DPST_PWM

C1

DP_AUX_ZVSS R455

+3V

EDP_HPD
22,23
FCH_VGA_HPD
8
HDMI_HPD_CON
25
+1.5VSUS
+1.5VSUS

AD12
M18
N18
F11
G11
H11
J11
F12
G12
J12
H12
AE10
AD10
L10
M10
P19
R19
K22
T19
N19
AA12
W 10
AC12
P18
R18

APU_LVDS_BLON
APU_DISP_ON
APU_DPST_PWM

23
23
22

150/F_4

APU_TEST9
APU_TEST10
APU_TEST14_BP0
APU_TEST15_BP1
APU_TEST16_BP2
APU_TEST17_BP3
APU_TEST18
APU_TEST19
APU_TEST20_SCANCLK2
APU_TEST24_SCANCLK1
APU_TEST25_H
APU_TEST25_L
APU_TEST28_H
APU_TEST28_L

R191
*39.2/F_4
TP10
TP8
TP41
TP36
TP18
TP25

10K/F_4

To AMD HDT

+1.2V

CPU_THERMDA
CPU_THERMDC

APU_TEST25_L

TP7
TP6

Y10
AA10
Y12
K21

R88

510/F_4

4/19 For Comal.

APU_TEST9
DMAACTIVE_L
*1K/F_4 +1.5V
1K/F_4 +1.5VSUS

TEST35 PU FOR INTERNAL


TEST35 PD FOR CUSTOMER

+3VS5
R78
R79

R201
*301/_4

2
2

DMAACTIVE_L controls
entry and exit from the
sleep and power states

FS1R2
R66
DMAACTIVE_L

7/8 For Comal.

R200
39.2/F_4

TP39
TP27
TP4
TP5
TP11
TP9

APU_TEST35

APU_TEST35

M_TEST CONNECTION TBD

APU_TEST18
APU_TEST19

M_TEST

R202
301/_4

M_TEST

R183

*0_4

R258
R257
R199
R198
R74

1K/F_4
1K/F_4
1K/F_4
1K/F_4
510/F_4

7
APU_TEST18
APU_TEST19
APU_TEST20_SCANCLK2
APU_TEST24_SCANCLK1
APU_TEST25_H

SI

AMD internal test only


RSVD_1
RSVD_2
RSVD_3
RSVD_4

EDP_AUXP

FS1R1 signals is for detect CPU TYPE and protect it.


FS1R1 CPU this pin is N.C
FS1R2 CPU this pin is LOW
can remove it at MP

Richland APU
+1.5V

+1.5VSUS

4/19 For Comal.


+1.5VSUS
R61
*1K/F_4

APU_PROCHOT# input or output


Low CPU P - STATE

R433
1K/F_4

Q25
METR3904-G

DP5_AUXP
DP5_AUXN

DP_BLON
DP_DIGON
DP_VARY_BL

4/19 For Comal,


close to APU.
R429
10K/F_4

DP4_AUXP
DP4_AUXN

TEST

Display port power 1.5V min 1.2v max : 1.65v

K5
K4

INT_eDP_TXP1_C
INT_eDP_TXN1_C

RSVD

0.1U/10V_4
0.1U/10V_4

DISPLAY
PORT 0

C725
C722

ANALOG/DISPLAY/MISC
DP0_TXP0
DP0_AUXP
DP0_TXN0
DP0_AUXN

DISPLAY
PORT 1

EDP_TXP1
EDP_TXN1

L3
L2

INT_eDP_TXP0_C
INT_eDP_TXN0_C

DISPLAY
PORT 2

22
22

0.1U/10V_4
0.1U/10V_4

CLK

C718
C717

SER.

EDP_TXP0
EDP_TXN0

CTRL

22
22

JTAG

DP0 output to
eDP to LVDS converter

U21C

SENSE

FCH_PROCHOT#

R435

*0_4/S

R62
1K/F_4

38

VRHOT

R72

+1.5VSUS

*0_4/S APU_PROCHOT#
R440
2K/F_4

APU_PROCHOT#

R437
2K/F_4

R438
1K/F_4

R439
1K/F_4

APU_THERMTRIP#

33

H_PROCHOT#

THERMTRIP# shutdown temperature 125


C

R436

*0_4/S

to EC reserve only
EC_WRST#

C662
220P/50V_4

33

reserve for leakage current verify

12,32,33

MBCLK2

MBCLK2

Q23
METR3904-G
3

3
1

1
D10

2
2
MEK500V-40
METR3904-G
Q14

1
D5

ECPWROK

R300

10K/F_4

ECPWROK

10,33
12,32,33

+3V

MBDATA2

MBDATA2

APU_SIC

2
MEK500V-40

Q24
METR3904-G
3

DGPU_OVT#

D9

14

APU_SID

2
MEK500V-40

*ME2N7002E

Q16

FCH_THERMTRIP#

Add R5043 for verify this solution


6

DGPU_PWROK
THERMTRIP#

R298

2
MEK500V-40

0_4

1
D17

+3V
2,6,8,9,10,11,12,22,23,24,25,26,27,29,30,31,32,33,41,42,43
+1.2V
5,37
+1.5V
2,22,23,27,32,38,41
+3VS5
6,8,9,10,25,32,33,35,36,38,41,43
+3VPCU
7,25,30,32,33,34,35
+1.5VSUS
2,3,5,11,12,40,41,43

THRM_ALERT_HW#1

33

SI change from 0R to Diode for solve +3VS5 leakage

ADD VGA TEMP_ FAIL function is active Hi


5

352-(&75;
4XDQWD&RPSXWHU,QF

7,33,42,43

FCH_THERMTRIP#

1%

Size
Custom

Document Number

Rev
1A

APU 3/4(Display/Misc)

Date: Tuesday, March 12, 2013


1

Sheet

of

43

APU POWER TABLE

PIN NAME

NET NAME

VDD

+VCC_CORE

VDDNB

+VDDNB_CORE

VDDIO

+1.5VSUS

+1.5V

VDDP

+1.2V_VDDP

+1.2V

VDDR

+1.2V_VDDR

+1.2V

VDDA

+2.5V_VDDA

+2.5V

EMI suggestion

VOLTAGE

??
EC19
470P/50V_4

+VDDNB_CORE

C759
22U/6.3V_8

C421
0.22U/10V_4

C753
22U/6.3V_8

C422
180P/50V_4

C411
22U/6.3V_8

C402
180P/50V_4

C393
180P/50V_4

+VDDNB_CAP

U21D

F8
H6
J1
J14
P6
P10
J16
J18
J9
K19
K3
K17
M3
K6
V10
V18
V3
F3
L18
V6
W1
T18
Y14
AA1
AB6
AC1
R1
P3
K10
H3
M19

4/19 For Comal.

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16
VDD_17
VDD_18
VDD_19
VDD_20
VDD_21
VDD_22
VDD_23
VDD_24
VDD_25
VDD_26
VDD_27
VDD_28
VDD_29
VDD_30
VDD_31

+VDDNB_CORE
C276
22U/6.3VS_8

C292
22U/6.3VS_8

C8
D10
B8
B12
C9
A9
A10
A8
A11
E10
E11
C10

C275
180P/50V_4

VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5
VDDNB_6
VDDNB_7
VDDNB_8
VDDNB_9
VDDNB_10
VDDNB_11
VDDNB_12

VDD_33
VDD_34
VDD_35
VDD_36
VDD_37
VDD_38
VDD_39
VDD_40
VDD_41
VDD_42
VDD_43
VDD_44
VDD_45
VDD_46
VDD_47
VDD_48
VDD_49
VDD_50
VDD_51
VDD_52
VDD_53
VDD_54
VDD_55
VDD_56
VDD_57
VDD_58
VDD_59
VDD_60
VDD_61
VDD_62
VDD_63
VDDNB_13
VDDNB_14
VDDNB_15
VDDNB_16
VDDNB_17
VDDNB_18
VDDNB_19
VDDNB_20
VDDNB_21
VDDNB_22
VDDNB_23
VDDNB_CAP
VDDNB_CAP

R11
T10
H8
G1
U11
W 11
W 13
W 15
W 17
W 19
AB3
AD3
AD6
AE1
L1
Y6
M6
N11
N1
T3
T6
U19
U1
Y16
Y18
Y3
D4
F4
AF6
AF3
L11

C167
0.22U/10V_4

C283
0.22U/10V_4

C150
0.22U/10V_4

C151
0.22U/10V_4

C218
0.22U/10V_4

C272
0.22U/10V_4

4/19 For Comal.

C239
180P/50V_4

+1.2V_VDDP

VDDIO_1
VDDIO_2
VDDIO_3
VDDIO_4
VDDIO_5
VDDIO_6
VDDIO_7
VDDIO_8
VDDIO_9
VDDIO_10
VDDIO_11
VDDIO_12
VDDIO_13
VDDIO_14
VDDIO_15
VDDIO_16
VDDIO_17
VDDIO_18

VDDP = 5A
+1.2V

R428

4/19 For Comal.

AH6
AH5
AH4
AH3
AH7

+1.2V_VDDP

*0_8/S
C675
22U/6.3VS_8

C670
10U/6.3V_8

C674
10U/6.3V_8

C671
10U/6.3V_8

VDDP
VDDP
VDDP
VDDP
VDDP

AB10

C665
0.22U/6.3V_4

C667
0.22U/6.3V_4

C672
180P/50V_4

C666
180P/50V_4

VDDIO_19
VDDIO_20
VDDIO_21
VDDIO_22
VDDIO_23
VDDIO_24
VDDIO_25
VDDIO_26
VDDIO_27
VDDIO_28
VDDIO_29
VDDIO_30
VDDIO_31
VDDIO_32
VDDIO_33
VDDIO_34
VDDIO_35
VDDIO_36

VDDA

VDDR
VDDR
VDDR
VDDR

C256
22U/6.3V_8

C186
22U/6.3V_8

C153
22U/6.3VS_8

C225
22U/6.3V_8

C170
22U/6.3VS_8

C224
22U/6.3V_8

C201
22U/6.3VS_8

C193
22U/6.3VS_8

C238
0.22U/10V_4

C237
0.22U/10V_4

C164
180P/50V_4

C168
180P/50V_4

C228
0.01U/25V_4

J20
L4
R7
W 18
A15
AB17
AC22
AE21
AF24
AH23
AH25
B7
C14
C16
C2
C20
C22
C24
C26
C28
D13
D15
D17
D19
D23
D25
D27
E4
E9
F14
F16
F18
F20
F22
F26
F28
G13
G15
G17
G19
G21
G23
G25
G4
J22
J24
J4
J7
K11
K14
K9
AC11
L19
L7
M11
AF11
V19
V9
W 16
W4
W7
Y11
Y20
Y22
Y9
A17
A13
K16
F24
G8
H7
J8

C200
22U/6.3VS_8

4/19 For Comal.

C236
0.01U/25V_4

C220
0.01U/25V_4

25A
Maximum IDDNBspike 33A
DECOUPLING between PROCESSOR and DIMMs
Across VDDIO and VSS split
+1.5VSUS

C264
0.22U/10V_4

C166
0.22U/10V_4

C165
180P/50V_4

C208
180P/50V_4

+VDDNB_CAP

K13
K12

T23
T26
U22
U25
U28
Y26
T20
R28
R25
R22
V20
V23
V26
W 22
W 25
W 28
Y24
G28
AG10
AH8
AH9
AH10

C187
22U/6.3VS_8

4/19 For Comal.

C289
22U/6.3VS_8

C229
22U/6.3VS_8

C230
22U/6.3VS_8

C261
4.7U/6.3V_6

C249
4.7U/6.3V_6

C207
4.7U/6.3V_6

C245
4.7U/6.3V_6

If the VSS plane is cut to create a VDDIO plane,


ceramic capacitors are connected across
the VDDIO and VSS plane split as follows

VDDR = 3.3A ( Up to DDR3-1333 @ 1.5V )


+1.2V_VDDR_B

R426

+1.2V

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_68
VSS_67
VSS_69
VSS_70
VSS_71
VSS_72

VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145

A19
A21
A23
A25
A7
AA4
AA7
AB13
AB15
AB19
AB21
AB23
AB25
AB27
AB9
AC14
AC16
AC18
AC20
AC24
AC26
AC28
AC4
AC7
AD9
AE13
AE15
AE17
M9
N10
N4
N7
R10
R4
T11
T9
U10
U18
U4
U7
V11
AE19
AE23
AE25
AE27
AE4
AE7
AF14
AF16
AF18
AF20
AF22
AF26
AF28
AF9
AG4
AG7
AH13
AH15
AH17
AH19
AH21
P9
C18
D21
W 14
P11
C7
E8
K18
W 12

*0_8/S

Richland APU
C668
10U/6.3V_8

C658
10U/6.3V_8

C657
10U/6.3V_8

Richland APU
C660
0.22U/6.3V_4

U21E

C162
22U/6.3V_8

+1.5VSUS

H26
K20
J28
K23
K26
L22
L25
L28
M20
M23
M26
N22
N25
N28
P20
P23
P26
AA28

EC18
*470P/50V_4

+VDDNB_CORE

C11
C12
D9
D8
D12
D11
B11
A12
B10
E12
B9

+1.5VSUS

2.8A Up to DDR3-1333 @ 1.50V VDDIO

EC14
*470P/50V_4

36A
Maximum IDDspike 50A

+VCC_CORE
+VCC_CORE

4/19 For Comal.

C386
0.22U/10V_4

05

+VCC_CORE

+1.1V

C669
0.22U/10V_4

C659
1000P/50V_4

C661
180P/50V_4

C663
180P/50V_4
A

VDDA= 0.75A
+2.5V

L17
PBY160808T-221Y-N(220,2A)

+2.5V_VDDA

C140
4.7U/6.3V_6

C139
0.22U/10V_4

C147
3300P/50V_4

352-(&75;
4XDQWD&RPSXWHU,QF
1%

Size
Custom

Document Number

Rev
1A

APU 4/4(POWER/GND)

Date: Tuesday, March 12, 2013


1

Sheet

of

43

06

remove PCIE_RST2# from AMD recommend

SMB_RUN_CLK

R365

2.2K_4

SMB_RUN_DAT

to DDR3 SMBUS
+3VS5
*1K_4

J2 1

GEVENT23# internal pull Hi 8.2K to +3V 33


GEVENT5# internal pull Hi 8.2K to +3VS533

SIO_EXT_SMI#
SIO_EXT_SCI#

PCIE_WAKE# no need to pull


Hi resistor from check list

SYS_RST#

*SOLDERJUMPER-2

EC_A20GATE
EC_RCIN#

29,32
4

FCH_THERMTRIP#
+3V

GEVENT2# internal pull Hi 10K to +3VS5

SYS_RST# internal
10K pull up

PCIE_WAKE#

33

CLK_REQ4# internal pull Hi 8.2K to +3V


CLK_REQ3# internal pull Hi 8.2K to +3V

26
29

RSMRST#

RSMRST#

AG24
AE24
AE26
AF22
AH17
AG18
AF24
FCH_GPIO66
*0_4/S
SMB_RUN_CLK AD26
SMB_RUN_DAT AD25
T7
SMB_PCH_CLK
R7
SMB_PCH_DAT
PCIE_CLKREQ_WLAN#AG25
AG22
CLKREQ1#
J2
LLB#
AG26
SMARTVOLT2
V8
VGA_PD
*0_4/S
W8
GBE_LED0
Y6
V10
AA8
AF25
CLK_PCIE_REQ2#
PCIE_CLKREQ_LAN#

CLK_PCIE_REQ2#
PCIE_CLKREQ_LAN#

+3VS5
R370

10K/F_4

SCL3

R371

10K/F_4

SDA3

R364

2.2K_4

SCL2

R367

2.2K_4

SDA2

CLK_REQ2# internal pull Hi 8.2K to +3V

R378

27
ACZ_SPKR
11,12,22
SMB_RUN_CLK
11,12,22
SMB_RUN_DAT
30
SMB_PCH_CLK
30
SMB_PCH_DAT
32
PCIE_CLKREQ_WLAN#

LLB# Not Implemented ,left unconnected.


C

R344
R343

C551

SMB_PCH_DAT

2.2K_4

R360

This pin is used to


power down VGA DAC
regulators when CRT
no connected

SMB_PCH_CLK

2.2K_4

VGA_POWER_DOWN
8

TP113
TP100
R358
TP81

SPI_HOLD#

FCH_THERMTRIP#

*4.7K_4

U2

TP98

Part 4 of 5
TEST0
TEST1/TMS
TEST2
GA20IN/GEVENT0#
KBRST#/GEVENT1#
PME#/GEVENT3#
LPC_SMI#/GEVENT23#
LPC_PD#/GEVENT5#
SYS_RESET#/GEVENT19#
W AKE#/GEVENT8#
IR_RX1/GEVENT20#
THRMTRIP#/SMBALERT#/GEVENT2#
W D_PW RGD

USB_FSD1P/GPIO186
USB_FSD1N

USB
MISC

BOLTON-M3

USB_FSD0P/GPIO185
USB_FSD0N
USB_HSD13P
USB_HSD13N
USB_HSD12P
USB_HSD12N
USB_HSD11P
USB_HSD11N
USB_HSD10P
USB_HSD10N

RSMRST#

USB_HSD9P
USB_HSD9N

CLK_REQ4#/SATA_IS0#/GPIO64
CLK_REQ3#/SATA_IS1#/GPIO63
SMARTVOLT1/SATA_IS2#/GPIO50
CLK_REQ0#/SATA_IS3#/GPIO60
SATA_IS4#/FANOUT3/GPIO55
SATA_IS5#/FANIN3/GPIO59
SPKR/GPIO66
SCL0/GPIO43
SDA0/GPIO47
SCL1/GPIO227
SDA1/GPIO228
CLK_REQ2#/FANIN4/GPIO62
CLK_REQ1#/FANOUT4/GPIO61
IR_LED#/LLB#/GPIO184
SMARTVOLT2/SHUTDOW N#/GPIO51
DDR3_RST#/GEVENT7#/VGA_PD
GBE_LED0/GPIO183
SPI_HOLD#/GBE_LED1/GEVENT9#
GBE_LED2/GEVENT10#
GBE_STAT0/GEVENT11#
CLK_REQG#/GPIO65/OSCIN/IDLEEXIT#

USB_HSD8P
USB_HSD8N
USB_HSD7P
USB_HSD7N

USB_HSD4P
USB_HSD4N
USB_HSD3P
USB_HSD3N
USB_HSD2P
USB_HSD2N

*0.01U/25V_4
TP115
TP110

R544

*10K/F_4 PCIE_CLKREQ_WLAN#

R494

10K/F_4

DNBSWON#

GEVENT16# internal pull Hi 8.2K to +3VS5

R570

*10K/F_4

ODD_DA#_FCH

GEVENT15# internal pull Hi 8.2K to +3VS5

31
31

ODD_PLUGIN#
ODD_DA#_FCH

ODD_PLUGIN#
ODD_DA#_FCH

4/19 For Comal.

For Zero ODD

DB reserve

TP83
TP109
TP114
TP84

FCH_JTAG_TCK
FCH_JTAG_TDI
FCH_JTAG_RST#

M7
R8
T1
P6
F5
P5
J7
T8

BLINK/USB_OC7#/GEVENT18#
USB_OC6#/IR_TX1/GEVENT6#
USB_OC5#/IR_TX0/GEVENT17#
USB_OC4#/IR_RX0/GEVENT16#
USB_OC3#/AC_PRES/TDO/GEVENT15#
USB_OC2#/TCK/GEVENT14#
USB_OC1#/TDI/GEVENT13#
USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12#

USB_HSD6P
USB_HSD6N
USB_HSD5P
USB_HSD5N

USB_HSD1P
USB_HSD1N
USB_HSD0P
USB_HSD0N
USBSS_CALRP
USBSS_CALRN

USB
OC

R508

GEVENT0# internal pull Hi 8.2K to +3V 33


GEVENT1# internal pull Hi 8.2K to +3V 33

USB_RCOMP

USB
1.1

2.2K_4

T9
T10
V9
AE22
AG19
R9
C26
T5
U4
K1
V7
R10
AF19

USBCLK/14M_25M_48M_OSC

USB
2.0

R369

TP74
TP85

PCIE_RST2#/GEVENT4#
RI#/GEVENT22#
SPI_CS3#/GBE_STAT1/GEVENT21#
SLP_S3#
SLP_S5#
PW R_BTN#
PW R_GOOD

ACPI / WAKE UP
EVENTS

FCH_TEST0
FCH_TEST1
FCH_TEST2
TP82
EC_A20GATE
EC_RCIN#
FCH_PME#
TP76
SIO_EXT_SMI#
GEVENT5#
R497
*0_4/S
SYS_RST#
PCIE_WAKE#
C827
*100P/50V_4
FCH_THERMTRIP#
R366
10K/F_4 WD_PWRGD

4/19 For Comal.

U28A

GPIO

+3V

SUSB#
SUSC#
DNBSWON#
FCH_PWRGD

33
SUSB#
33
SUSC#
DNBSWON#
FCH_PWRGD

33
10

AB6
R2
W7
T3
W2
J4
N7

PCIE_RST2#
RI#

TP78
TP112

USB_SS_TX3P
USB_SS_TX3N

33_4

ACZ_SYNC_R

R524

33_4

ACZ_BCLK_R

R495

33_4

ACZ_RST#_R

R522

33_4

ACZ_SDIN0

VGA_REQ

remove
1

D6

27

ACZ_SYNC_AUDIO

27
32

BIT_CLK_AUDIO

BT_COMBO_OFF#

27

ACZ_RST#_AUDIO
ACZ_SDIN0

Pure UMA can


43

ACZ_SDOUT_AUDIO

13
33

27

27

VGA_RSTB
VGA_ON_SB

AB3
AB1
AA2
Y5
Y3
Y1
AD6
AE4
K19
J19
J21

TP95
TP96

R496

ACZ_BCLK_R
ACZ_SDOUT_R
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2_R
ACZ_SDIN3_R
ACZ_SYNC_R
ACZ_RST#_R

BT_COMBO_OFF#
VGA_RSTB
VGA_ON_SB

D21
C20
D23
C22
F21
E20
F20
A22
E18
A20
J18
H18
G18
B21
K18
D19
A18
C18
B19
B17
A24
D17

CLK_REQ# already
internal pull up 8.2K
2
CLKREQ1#
*MEK500V-40

AZ_BITCLK
AZ_SDOUT
AZ_SDIN0/GPIO167
AZ_SDIN1/GPIO168
AZ_SDIN2/GPIO169
AZ_SDIN3/GPIO170
AZ_SYNC
AZ_RST#

USB_SS_RX3P
USB_SS_RX3N
USB_SS_TX2P
USB_SS_TX2N
USB_SS_RX2P
USB_SS_RX2N
USB
3.0

TP111
TP116
TP117

To Azalia
ACZ_SDOUT_R

*10K/F_4

TP125

HD
AUDIO

R509

HD audio
interface is
+3V_S5 voltage

PS2_DAT/SDA4/GPIO187
PS2_CLK/CEC/SCL4/GPIO188
SPI_CS2#/GBE_STAT2/GPIO166

USB_SS_RX1P
USB_SS_RX1N

PS2KB_DAT/GPIO189
PS2KB_CLK/GPIO190
PS2M_DAT/GPIO191
PS2M_CLK/GPIO192
KSO_0/GPIO209
KSO_1/GPIO210
KSO_2/GPIO211
KSO_3/GPIO212
KSO_4/GPIO213
KSO_5/GPIO214
KSO_6/GPIO215
KSO_7/GPIO216
KSO_8/GPIO217
KSO_9/GPIO218
KSO_10/GPIO219
KSO_11/GPIO220
KSO_12/GPIO221
KSO_13/GPIO222
KSO_14/XDB0/GPIO223
KSO_15/XDB1/GPIO224
KSO_16/XDB2/GPIO225
KSO_17/XDB3/GPIO226

USB_SS_TX1P
USB_SS_TX1N

USB_SS_TX0P
USB_SS_TX0N
USB_SS_RX0P
USB_SS_RX0N
SCL2/GPIO193
SDA2/GPIO194
SCL3_LV/GPIO195
SDA3_LV/GPIO196
EC_PW M0/EC_TIMER0/GPIO197
EC_PW M1/EC_TIMER1/GPIO198
EC_PW M2/EC_TIMER2/W OL_EN/GPIO199
EC_PW M3/EC_TIMER3/GPIO200
EMBEDDED
CTRL

KSI_0/GPIO201
KSI_1/GPIO202
KSI_2/GPIO203
KSI_3/GPIO204
KSI_4/GPIO205
KSI_5/GPIO206
KSI_6/GPIO207
KSI_7/GPIO208

G8
B9

USB_RCOMP_SB

R514

11.8K/F_6

H1
H3
H6
H5
D

H10
G10
K10
J12
G12
F12

USBP11+
USBP11-

K12
K13

USBP10+
USBP10-

USBP11+
USBP11-

28
28

Left side USB Combo 3.0/2.0.

USBP10+
USBP10-

28
28

Left side USB Combo 3.0/2.0.

B11
D11
E10
F10
C10
A10

USBP8+
USBP8USBP7+
USBP7-

23
23

Camera USB

TP119
TP118

H9
G9
A8
C8
F8
E8
C

C6
A6

USBP3+
USBN3-

C5
A5

26
26

USBP2+
USBP2-

32
32

WLAN Min-Card

USBP0+
USBP0-

29
29

Right side USB 2.0 Connector

C1
C3
E1
E3
C16
A16

USBSS_CALRP
USBSS_CALRN

R531
R529

1K/F_4
1K/F_4

+FCH_VDD_11_SSUSB_S

A14
C14
C12
A12
D15
B15

USB 3.0 Not Implemented: left unconnected.

E14
F14
F15
G15
H13
G13
J16
H16
J15
K15
H19
G19
G22
G21
E22
H22
J22
H21

USB30_TX1+
USB30_TX1-

28
28

USB30_RX1+
USB30_RX1-

28
28

USB30_TX0+
USB30_TX0-

28
28

USB30_RX0+
USB30_RX0-

28
28

SCL2
SDA2
SCL3
SDA3
EC_PWM2

EC_PWM2

10

SCL3 of a TSI-capable APU's


thermal bus,Pulled up to
APU_VDDIO. Resistor value
verified in the relevant APU
design guide.

No need for GPIO200

K21
K22
F22
F24
E24
B23
C24
F18

Bolton-M3

352-(&75;
4XDQWD&RPSXWHU,QF
1%

Size
Custom

Document Number

Rev
1A

FCH 1/5(GPIO/USB/AZ)

Date: Tuesday, March 12, 2013


1

Sheet

of

43

33_4
*33_4

PCIE_RST#
A_RST#

C880
C879
C891
C887
C612
C613
C890
C889

0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4

UMI_RXP0_C
UMI_RXN0_C
UMI_RXP1_C
UMI_RXN1_C
UMI_RXP2_C
UMI_RXN2_C
UMI_RXP3_C
UMI_RXN3_C

TO LAN

TO LAN

PCIE_TXP3_CARD
PCIE_TXN3_CARD
PCIE_TXP1_LAN
PCIE_TXN1_LAN

26
26
29
29

PCIE_RXP3_CARD
PCIE_RXN3_CARD
PCIE_RXP1_LAN
PCIE_RXN1_LAN

AE30
AE32
AD33
AD31
AD28
AD29
AC30
AC32
AB33
AB31
AB28
AB29
Y33
Y31
Y28
Y29

UMI_TXP0
UMI_TXN0
UMI_TXP1
UMI_TXN1
UMI_TXP2
UMI_TXN2
UMI_TXP3
UMI_TXN3
R381
R380

+1.1V_PCIE_VDDR
26
26
29
29

AE2
AD5

0.1U/10V_4

C617

0.1U/10V_4

C615

590/F_4
2K/F_4

0.1U/10V_4

C618

0.1U/10V_4

C616

PCIE_CALRP_FCH
PCIE_CALRN_FCH

AF29
AF31

PCIE_TXP3_CARD_C
PCIE_TXN3_CARD_C
PCIE_TXP1_C
PCIE_TXN1_C

V33
V31
W 30
W 32
AB26
AB27
AA24
AA23
AA27
AA26
W 27
V27
V26
W 26
W 24
W 23

PCIE_RXP3_CARD
PCIE_RXN3_CARD
PCIE_RXP1_LAN
PCIE_RXN1_LAN

R377

+1.1V_CKVDD

2K/F_4

CLK_CALRN_FCH

F27
G30
G28

4
4

CLK_DP_P
CLK_DP_N

RP4

2
4

1 *0X2/S CLK_DP_FCH_P
3
CLK_DP_FCH_N

H33
H31

PV change to shortpad

Pure UMA
can remove

R26
T26

4
2

3 *0X2/S CLK_APU_FCH_P
1
CLK_APU_FCH_N

T24
T23

4
4

CLK_APU_P
CLK_APU_N

RP5

13
13

CLK_VGA_P
CLK_VGA_N

RP8

4
2

3 *22X2 CLK_VGA_FCH_P
1
CLK_VGA_FCH_N

J30
K29

4
2

3 *0X2/S CLK_WLAN_FCH_P
1
CLK_WLAN_FCH_N

H27
H28

32
32

CLK_PCIE_WLAN
CLK_PCIE_WLAN#

RP7

26
26

CLK_PCIE_CARDP
CLK_PCIE_CARDN

RP6

2
4

1 47X2
3

CLK_PCIE_CARDP_FCH
CLK_PCIE_CARDN_FCH

J27
K26
F33
F31
E33
E31

Note: CLK_FCH_SRCP/N is 100MHZ SSC


Note: CLK_PCIE_TRAVISP/N is 100MHZ non-SSC
Note:
Note:
Note:
Note:

M23
M24

CLK_DP_NSSCP/N is 100MHZ non-SSC


CLK_APU_HCLKP/N is 100MHZ SSC
CLK_PCIE_VGAP/N is 100MHZ SSC
GPP_CLK(0:8)P/N is 100MHZ SSC capable

M27
M26
N25
N26

PV change to shortpad

29
29

CLK_PCIE_LANP
CLK_PCIE_LANN

RP3

4
2

3 *0X2/S CLK_PCIE_LANP_FCH
1
CLK_PCIE_LANN_FCH
TP101

25

PCH_XTAL25_IN
C872

R545

R23
R24

0_4

CLK_FLEX1_48M

UMI_RX0P
UMI_RX0N
UMI_RX1P
UMI_RX1N
UMI_RX2P
UMI_RX2N
UMI_RX3P
UMI_RX3N
PCIE_CALRP
PCIE_CALRN
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N

PCIRST#

GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N

CLK_CALRN
PCIE_RCLKP
PCIE_RCLKN
DISP_CLKP
DISP_CLKN
DISP2_CLKP
DISP2_CLKN
APU_CLKP
APU_CLKN
SLT_GFX_CLKP
SLT_GFX_CLKN
GPP_CLK0P
GPP_CLK0N

AD0/GPIO0
AD1/GPIO1
AD2/GPIO2
AD3/GPIO3
AD4/GPIO4
AD5/GPIO5
AD6/GPIO6
AD7/GPIO7
AD8/GPIO8
AD9/GPIO9
AD10/GPIO10
AD11/GPIO11
AD12/GPIO12
AD13/GPIO13
AD14/GPIO14
AD15/GPIO15
AD16/GPIO16
AD17/GPIO17
AD18/GPIO18
AD19/GPIO19
AD20/GPIO20
AD21/GPIO21
AD22/GPIO22
AD23/GPIO23
AD24/GPIO24
AD25/GPIO25
AD26/GPIO26
AD27/GPIO27
AD28/GPIO28
AD29/GPIO29
AD30/GPIO30
AD31/GPIO31
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
REQ1#/GPIO40
REQ2#/CLK_REQ8#/GPIO41
REQ3#/CLK_REQ5#/GPIO42
GNT0#
GNT1#/GPO44
GNT2#/SD_LED/GPO45
GNT3#/CLK_REQ7#/GPIO46
CLKRUN#
LOCK#
INTE#/GPIO32
INTF#/GPIO33
INTG#/GPIO34
INTH#/GPIO35

GPP_CLK1P
GPP_CLK1N

C31

GPP_CLK3P
GPP_CLK3N
GPP_CLK4P
GPP_CLK4N
GPP_CLK5P
GPP_CLK5N
GPP_CLK6P
GPP_CLK6N
GPP_CLK7P
GPP_CLK7N
GPP_CLK8P
GPP_CLK8N

*1M/F_4

C33

AB5

LPCCLK0
LPCCLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#/CLK_REQ6#/GPIO49
SERIRQ/GPIO48

DMA_ACTIVE#
PROCHOT#
APU_PG
LDT_STP#
APU_RST#

PCI_CLK1
PCI_CLK3
PCI_CLK4
PCIRST#_L

R510

PCI_CLK1

10

PCI_CLK3
PCI_CLK4

10
10

KBC_RST#

33_4

C828

*150P/50V_4
D

AJ3
AL5
AG4
AL6
AH3
AJ5
AL1
AN5
AN6
AJ1
AL8
AL3
AM7
AJ6
AK7
AN8
AG9
AM11
AJ10
AL12
AK11
AN12
AG12
AE12
AC12
AE13
AF13
AH13
AH14
AD15
AC15
AE16
AN3
AJ8
AN10
AD12
AG10
AK9
AL10
AF10
AE10
AH1
AM9
AH8
AG15
AG13
AF15
AM17
AD16
AD13
AD21
AK17
AD19
AH9
AF18
AE18
AC16
AD18

KBC_RST#

PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27

PCI_AD23
10
PCI_AD24
10
PCI_AD25
10
PCI_AD26
10
PCI_AD27
10
DGPU_PWROK

HUDSON_MEMHOT#_R

33

MV change to reserve

4,33,42,43

TP92
*MEK500V-40
D16

+3V_RTC

20MIL R568

20MIL
R569

*10_4

+3VRTC
D15
*MEK500V-40

PCI_SERR#
C838

C907
1U/6.3V_4

33

20MIL

100P/50V_4
R565
TP124

FCH_GPIO44

R528

*1K/F_4
*0_4

SPI_WP

TP97
TP123

CLKRUN#

CLKRUN#

20MIL

25,33

CLK_PCI_TPM

TP87

ACCEL_INTH#
LPC_CLK0
LPC_CLK1

*15P/50V_4

1
2

Add R705 for support TPM function


ACCEL_INTH#
32
LPC_CLK0
10
LPC_CLK1
10

R705
R541
R538

B25
D25
D27
C28
A26
A29
A31
B27
AE27
AE19

LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ#0
LDRQ#1
SERIRQ

G25
E28
E26
G26
F26

DMAACTIVE_L
FCH_PROCHOT#
APU_PWRGD_R
APU_STOP#
APU_RST#

G2

32K_X1

G4

32K_X2

H7
F1
F3
E6

S5_CORE_EN
CLK_RTC
INTRUDER_ALERT#
+3V_RTC

25M_X1

32K_X2

25M_X2

S5_CORE_EN
RTCCLK
INTRUDER_ALERT#
VDDBT_RTC_G

*27P/50V_4

LAD0
LAD1
LAD2
LAD3
LFRAME#
TP102
TP103
SERIRQ

CLK_PCI_TPM

25

EC51
EC50

32

15P/50V_4
15P/50V_4

25,32,33
25,32,33
25,32,33
25,32,33
25,32,33

CLK_33M_KBC

33

R338

32K_X1

25,33

FCH PROCHOT#--- (input 0.8V threshold )


When it isasserted, it can generate SCI or
SMI to OS/BIOS

PV change to short-pad
4
FCH_PROCHOT#
*0_4/S
APU_PWRGD

0_4

C527

TP99
APU_RST#

2,4

R341
*20M_4

CLKGEN_RTC_X1

25

*18P/50V_4

Y3
*32.768KHZ

32K_X2

DMAACTIVE_L
R383

88266-020L
CLK_33M_DEBUG

*22_4
33_4
33_4

C601

0.022u/16V_4

4
2,4

C532

*18P/50V_4

USE GROUND GUARD FOR 32K_X1 AND 32K_X2

LDT_STP# let is NC from schematic recommend

for AOS +3V noise issue


S5_CORE_EN is necessary to connect enable
pin of +3VPCU/+5VPCU regulator for S5+
mode implementation

TP80
CLK_RTC

10

TP77
+3V_RTC

20MIL
C833
0.1U/10V_4

352-(&75;
4XDQWD&RPSXWHU,QF

INTRUDER_ALERT# Left not connected


(FCH has 50-kohm internal pull-up to
VBAT).

1%

Size
Custom

Document Number

Rev
1A

FCH 2/5(ACPI/PCI/CLK)

Date: Tuesday, March 12, 2013


4

+BAT

CN19

TP93
TP122
TP94

TRAVIS_EN#

EC72

Bolton M3

+3VPCU

20MIL

*499/F_4 +3VRTC_1

14M_25M_48M_OSC

R550
25M_X2

AF3
AF1
AF5
AG2
AF6

GPP_CLK2P
GPP_CLK2N

TP127
C876

Part 1 of 5

UMI_TX0P
UMI_TX0N
UMI_TX1P
UMI_TX1N
UMI_TX2P
UMI_TX2N
UMI_TX3P
UMI_TX3N

PCICLK0
PCICLK1/GPO36
PCICLK2/GPO37
PCICLK3/GPO38
PCICLK4/14M_OSC/GPO39

32K_X1
25M_X1

Y5
*25MHZ

J26

BOLTON-M3

TP126

*27P/50V_4

N27
R27

PCIE_RST#
A_RST#

+VCCRTC_2

R511
R512
*150P/50V_4
UMI_RXP0
UMI_RXN0
UMI_RXP1
UMI_RXN1
UMI_RXP2
UMI_RXN2
UMI_RXP3
UMI_RXN3

07

U28E

+BAT

2
2
2
2
2
2
2
2

*33_4

1
2

Place these PICE AC


coupling cap close to FCH

4
3

2
2
2
2
2
2
2
2

R516

PCI
INTERFACE

C832

LPC

150P/50V_4

PCI
CLKS

150P/50V_4

C830

APU

LAN_PCIE_RST#
GPU_RST#

C831

33_4
33_4

S5
PLUS

29
13

CARD_PCIE_RST#
MINI_PCIE_RST#

R519
R515

PCI EXPRESS
INTERFACES

26
25,32

150P/50V_4

CLOCK
GENERATOR

C834

Sheet

of

43

VSSPL_SYS
EFUSE

Bolton M3

31
31

SATA_TXP1
SATA_TXN1

31
31

SATA_RXN1
SATA_RXP1

SATA ODD

AH24
AJ24
AN24
AL24
AL26
AN26
AJ26
AH26
AN29
AL28
AK27
AM27
AL29
AN31
AL31
AL33
AH33
AH31

PLACE SATA_CAL RES VERY


CLOSE TO BALL OF
HUDSON-M2/M3

+1.1V_AVDD_SATA

4/19 For Comal.


+3V
30

1K/F_4
931/F_4

R374

*220/F_6 SATA_LED#

GPIO52 internal pull Hi 8.2K to +3V


GPIO53 internal pull Hi 8.2K to +3V
GPIO54 internal pull Hi 8.2K to +3V 32
GPIO56 internal pull Hi 8.2K to +3V
GPIO57 internal pull Hi 8.2K to +3V 32
GPIO58 internal pull Hi 8.2K to +3V

ID2

ID1

ID0

SATA_LED#

AF21

SATA_TX1P
SATA_TX1N

Part 2 of 5
SD_CLK/SCLK_2/GPIO73
SD_CMD/SLOAD_2/GPIO74
SD_CD#/GPIO75
SD_W P/GPIO76
SD_DATA0/SDATI_2/GPIO77
SD_DATA1/SDATO_2/GPIO78
SD_DATA2/GPIO79
SD_DATA3/GPIO80

SATA_RX1N
SATA_RX1P

GBE_COL
GBE_CRS
GBE_MDCK
GBE_MDIO
GBE_RXCLK
GBE_RXD3
GBE_RXD2
GBE_RXD1
GBE_RXD0
GBE_RXCTL/RXDV
GBE_RXERR
GBE_TXCLK
GBE_TXD3
GBE_TXD2
GBE_TXD1
GBE_TXD0
GBE_TXCTL/TXEN
GBE_PHY_PD
GBE_PHY_RST#
GBE_PHY_INTR

SATA_TX2P
SATA_TX2N
SATA_RX2N
SATA_RX2P
SATA_TX3P
SATA_TX3N
SATA_RX3N
SATA_RX3P
SATA_TX4P
SATA_TX4N
SATA_RX4N
SATA_RX4P
SATA_TX5P
SATA_TX5N
SATA_RX5N
SATA_RX5P

SPI_DI/GPIO164
SPI_DO/GPIO163
SPI_CLK/GPIO162
SPI_CS1#/GPIO165
ROM_RST#/SPI_W P#/GPIO161

NC6
NC7
VGA_RED
NC8
NC9

VGA_GREEN

NC10
NC11

VGA_BLUE

NC12
NC13

VGA_HSYNC/GPO68
VGA_VSYNC/GPO69
VGA_DDC_SDA/GPO70
VGA_DDC_SCL/GPO71

SATA_CALRP
SATA_CALRN

VGA_DAC_RSET

SATA_ACT#/GPIO67

AUX_VGA_CH_P
AUX_VGA_CH_N
AUXCAL

SATA_X1
ML_VGA_L0P
ML_VGA_L0N
ML_VGA_L1P
ML_VGA_L1N
ML_VGA_L2P
ML_VGA_L2N
ML_VGA_L3P
ML_VGA_L3N

SATA_X2

31- Level BOM

ML_VGA_HPD/GPIO229
RF_OFF#
TP121
BT_COMBO_EN#
ODD_PWR
ACC_LED#

RF_OFF#
BT_OFF#
BT_COMBO_EN#

AH16
AM15
AJ16

ODD_PWR

AK15
AN16
AL16

Item
TEMPIN0
TEMPIN1
TEMPIN2
TEMPIN3

K6
K5
K3
M6

FANOUT0/GPIO52
FANOUT1/GPIO53
FANOUT2/GPIO54
FANIN0/GPIO56
FANIN1/GPIO57
FANIN2/GPIO58

VIN0/GPIO175
VIN1/GPIO176
VIN2/SDATI_1/GPIO177
VIN3/SDATO_1/GPIO178
VIN4/SLOAD_1/GPIO179
VIN5/SCLK_1/GPIO180
VIN6/GBE_STAT3/GPIO181
VIN7/GBE_LED3/GPIO182

HW
MONITOR

TEMPIN0/GPIO171
TEMPIN1/GPIO172
TEMPIN2/GPIO173
TEMPIN3/TALERT#/GPIO174

NC1
NC2
NC3
NC4
NC5

R350
10K/F_4

R506
10K/F_4

R351
10K/F_4

TEMP( 0 - 3 )
Temp Monitor Not Implemented
10-K 5% pull-up to +3VS5
or 10-K 5% pull-down

DIS

SIDE_PORT_ID2

SIDE_PORT_ID1

SIDE_PORT_ID0

AKE38ZN0801

+3VS5

08

AKE38FP0N01

Socket

DFHS08FS023

FCH SPI ROM

SPI_CLK

Reserve for support quad read


+3VS5

EC25
*22P/50V_4

AC4
AD3
AD9
W 10
AB8
AH7
AF7
AE7
AD7
AG8
AD1
AB7
AF9
AG6
AE8
AD8
AB9
AC2
AA7
W9
V6
V5
V3
T6
V1

2M
2M

R349
10K/F_4

11

12

C525

0.1U/10V_4
R574

33

33

HMISO2
FCH_SPI_WP

GBE_PHY_INTR

R357

10K/F_4

*0_4/S
*0_4/S
*0_4/S
*0_4/S

R362

*0_4/S SPI_WP

R527

*0_4/S

TP75
TP73
TP72
TP79
TP86

R389

*0_4/S

CRT_R

24

R388

*0_4/S

CRT_G

24

M29

FCH_CRT_B

R390

*0_4/S

CRT_B

24

M28
N30

HSYNC_COM
VSYNC_COM

M33
N32

DDCDATA
DDCCLK
R382

V28
V29

T31
T33
T29
T28
R32
R30
P29
P28

SIDE_PORT_ID0
SIDE_PORT_ID1
SIDE_PORT_ID2
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4

AG16
AH10
A28
G27
L4

R558

*0_4/S SPI_HOLD#

*10K/F_4

FCH_CRT_R

R387

150/F_4

FCH_CRT_G

R386

150/F_4

FCH_CRT_B

R385

150/F_4

+FCH_VDDAN_11_MLDAC
4
4
4
4
4
4
4
4

+FCH_VDDAN_33_DAC_R
FCH_VGA_HPD

R556

*0_4

VGA_HPD

Reserve for debug


+3V

VGA Hot-plug
1K/F_4

*10K/F_4

BOARD_ID0

R501

10K/F_4

R487

*10K/F_4

BOARD_ID1

R499

10K/F_4

R553
100K/F_4

FCH_VGA_HPD

FCH_VGA_HPD

R489

+5V

R559

VIN ( 0 - 7 )
Voltage Monitor Not Implemented
10-K 5% pull-up to +3VS5
or 10-K 5% pull-down

Q26B

R486

*10K/F_4

BOARD_ID2

R498

10K/F_4

R491

*10K/F_4

BOARD_ID3

R503

10K/F_4

R490

*10K/F_4

BOARD_ID4

R502

10K/F_4

R488

10K/F_4

SIDE_PORT_ID0 R500

*10K/F_4

R492

10K/F_4

SIDE_PORT_ID1 R504

*10K/F_4

R493

*10K/F_4

SIDE_PORT_ID2 R505

10K/F_4

2N7002DW-7-F

Q26A

VGA_HPD

2N7002DW-7-F
R555
100K/F_4

Hynix

NC

352-(&75;
4XDQWD&RPSXWHU,QF
1%

no supprot side port

Size
Custom

Document Number

Rev
1A

FCH 3/5(SATA/VGA/GND/SPI)

Date: Tuesday, March 12, 2013


5

VSS

R place close to PCH

4
4

100/F_4
APU_DP_TXP0
APU_DP_TXN0
APU_DP_TXP1
APU_DP_TXN1
APU_DP_TXP2
APU_DP_TXN2
APU_DP_TXP3
APU_DP_TXN3

VGA_HPD

W P#

7
4

*MX25L1605DM2I-12G
R361
+3V

R339

24
24

715/F_4

R557

C29

10K/F_4

HOLD#

24
24

APU_DP_AUXP
APU_DP_AUXN

N2
M3
L2
N4
P1
P3
M1
M5

SPI_HOLD#

FCH_CRT_G

AUXCAL

VDD

ICT need TP2675 size


test point

FCH_CRT_R

U28

CE#
SCK
SI
SO

SPI_WP

L32

VGA_DAC_REST

*10K/F_4

HMISO3

L30

K31

1
6
5
2

+3VS5
33

SPI_SI
SPI_SO
SPI_CLK
SPI_CS0#
FCH_SPI_WP

SPI_CS0#
SPI_CLK
SPI_SO
SPI_SI

R355
R342
R345
R346

Samsung

+3VS5

U17
33
EC_BIOS_CS#
EC_BIOS_SPI_CLK_I
33
EC_BIOS_WR#
33
EC_BIOS_RD#

10
0

Change U17 VDD


from +3V to +3VS5
for AMD DG.

EMI

WINBOND

AL14
AN14
AJ12
AH12
AK13
AM13
AH15
AJ14

Bolton M3
R353
10K/F_4

AD22

AG21

AF28
AF27

SATA_CALRP
SATA_CALRN

R379
R375

SATA_RX0N
SATA_RX0P

Add GPIO for G-sensor LED control

ID3

AJ33
AJ31

BOLTON-M3

Integrated Clock Mode:


Leave unconnected.

AH20
AJ20

AM23
AK23

ID4

UMA

AN22
AL22

AJ22
AH22

31
30

CONFIG

AL20
AN20
SATA_TXP1
SATA_TXN1

SATA_TX0P
SATA_TX0N

SD
CARD

SATA_RXN0
SATA_RXP0

AMIC
AK19
AM19

GBE
LAN

31
31

SATA_TXP0
SATA_TXN0

SPI
ROM

SATA_TXP0
SATA_TXN0

SATA HDD

T21
L28
K33
N28
R6

31
31

VSSPL_DAC
VSSAN_DAC
VSSANQ_DAC
VSSIO_DAC

VSSXL

T25
T27
U6
U14
U17
U20
U21
U30
U32
V11
V16
V18
W4
W6
W 25
W 28
Y14
Y16
Y18
AA6
AA12
AA13
AA14
AA16
AA17
AA25
AA28
AA30
AA32
AB25
AC6
AC18
AC28
AD27
AE6
AE15
AE21
AE28
AF8
AF12
AF16
AF33
AG30
AG32
AH5
AH11
AH18
AH19
AH21
AH23
AH25
AH27
AJ18
AJ28
AJ29
AK21
AK25
AL18
AM21
AM25
AN1
AN18
AN28
AN33

P/N

H25

VSSAN_HW M

VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128

Size

N8
K25

Part 5 of 5

VGA
DAC

BOLTON-M3

Vender

U28B

VGA
MAINLINK

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64

GROUND

A3
A33
B7
B13
D9
D13
E5
E12
E16
E29
F7
F9
F11
F13
F16
F17
F19
F23
F25
F29
G6
G16
G32
H12
H15
H29
J6
J9
J10
J13
J28
J32
K7
K16
K27
K28
L6
L12
L13
L15
L16
L21
M13
M16
M21
M25
N6
N11
N13
N23
N24
P12
P18
P20
P21
P31
P33
R4
R11
R25
R28
T11
T16
T18

PLACE SATA AC COUPLING


CAPS CLOSE TO HUDSON-M2/M3

SERIAL
ATA

U28D

Sheet

of

43

102mA

C606
2.2U/6.3V_4

+VDDPL_3.3V

C607
*0.1U/10V_4

+FCH_VDDPL_33_MLDAC

47mA
20mA
20mA
30mA
11mA
14mA
11mA
12mA

+VDDPL_33_SYS
+VDDPL_33_DAC
L47

TRACE WIDTH >=15mil


+FCH_VDDPL_33_SSUSB_S
*0_4
+FCH_VDDPL_33_SUSB_S
+FCH_VDDPL_33_PCIE
+FCH_VDDPL_33_SATA

R368

PBY160808T-221Y-N(220,2A)
C611
2.2U/6.3V_4

NOTE : LDO_CAP
A11 stepping : C will
install 1nf cap
A12 stepping : C will
let it to NC

C610
*0.1U/10V_4

+FCH_VDDAN_11_DAC
VDDAN_11_ML -- UMI 1.1V analog power
+FCH_VDDAN_11_ML

C580
0.1U/10V_4
+3V

*1000P/50V_4 +LDO_CAP M31

C605
+FCH_VDDAN_11_MLDAC

H24
V22
U22
T22
L18
D7
AH29
AG28

C594
C602
1U/6.3V_4 4.7U/6.3V_6

7mA
226mA
C586
0.1U/10V_4

+VDDPL_3.3V

V21
Y22
V23
V24
V25
AB10

L50
PBY160808T-221Y-N(220,2A)

VDDPL_33_USB_S : USB PHY PLL analog power


+3V_AVDD_USB

C609
2.2U/6.3V_4

C590
0.1U/10V_4

+FCH_VDDPL_33_SUSB_S

L40
PBY160808T-221Y-N(220,2A)

AB11
AA11
AA9
AA10

C534
2.2U/6.3V_4

C538
1U/6.3V_4

VDDPL_33_SYS
VDDPL_33_DAC
VDDPL_33_ML
VDDAN_33_DAC
VDDPL_33_SSUSB_S
VDDPL_33_USB_S
VDDPL_33_PCIE
VDDPL_33_SATA

CORE
S0

PCI/GPIO I/O

+FCH_VDDAN_33_DAC_R

BOLTON-M3

VDDIO_33_PCIGP_1
VDDIO_33_PCIGP_2
VDDIO_33_PCIGP_3
VDDIO_33_PCIGP_4
VDDIO_33_PCIGP_5
VDDIO_33_PCIGP_6
VDDIO_33_PCIGP_7
VDDIO_33_PCIGP_8
VDDIO_33_PCIGP_9
VDDIO_33_PCIGP_10

VDDAN_11_CLK_1
VDDAN_11_CLK_2
VDDAN_11_CLK_3
VDDAN_11_CLK_4
VDDAN_11_CLK_5
VDDAN_11_CLK_6
VDDAN_11_CLK_7
VDDAN_11_CLK_8

LDO_CAP

VDDAN_11_PCIE_1
VDDAN_11_PCIE_2
VDDAN_11_PCIE_3
VDDAN_11_PCIE_4
VDDAN_11_PCIE_5
VDDAN_11_PCIE_6
VDDAN_11_PCIE_7
VDDAN_11_PCIE_8

VDDPL_11_DAC
VDDAN_11_ML_1
VDDAN_11_ML_2
VDDAN_11_ML_3
VDDAN_11_ML_4

Part 3 of 5
VDDCR_11_1
VDDCR_11_2
VDDCR_11_3
VDDCR_11_4
VDDCR_11_5
VDDCR_11_6
VDDCR_11_7
VDDCR_11_8
VDDCR_11_9

CLKGEN
I/O

M2 chipset need to connect to GND


M3 remove

TRACE WIDTH >=15mil

PBY160808T-221Y-N(220,2A)

+3V

AB17
AB18
AE9
AD10
AG7
AC13
AB12
AB13
AB14
AB16

C557
0.1U/10V_4

MAIN
LINK
PCI
EXPRESS

L48

C550
0.1U/10V_4

VDDIO_33_GBE_S

VDDAN_11_SATA_1
VDDAN_11_SATA_4
VDDAN_11_SATA_2
VDDAN_11_SATA_3
VDDAN_11_SATA_5
VDDAN_11_SATA_6
VDDAN_11_SATA_7
VDDAN_11_SATA_8
VDDAN_11_SATA_9
VDDAN_11_SATA_10

GBE
LAN

C563
C540
C558
0.1U/10V_4 22U/6.3VS_8 0.1U/10V_4

1007mA for M3
902mA for M2

U28C

VDDCR_11_GBE_S_1
VDDCR_11_GBE_S_2

SERIAL
ATA

VDDQ--3.3V I/O power


+3V

+3V

09

PLACE ALL THE DECOUPLING CAPS ON


THIS SHEET CLOSE TO SB AS POSSIBLE.

+3.3V_VDDIO

VDDIO_GBE_S_1
VDDIO_GBE_S_2

T14
T17
T20
U16
U18
V14
V17
V20
Y17
H26
J25
K24
L22
M22
N21
N22
P22

+1.1V_VDDCR

VDDCR-- S/B CORE power

TRACE WIDTH >=100mil


C562
0.1U/10V_4

C570
0.1U/10V_4

+1.1V
C571
1U/6.3V_4

C564
1U/6.3V_4

C565
10U/6.3V_8

Reserve for VDDAN_11_CL


leakage current issue

340mA
TRACE WIDTH >=30mil
C600
1U/6.3V_4

C596
1U/6.3V_4

VDDAN_11_CLK-- Internal
Generator I/O power

C598
0.1U/10V_4

C599
0.1U/10V_4

clock
L49
HCB1608KF-181T15

+1.1V

TRACE WIDTH >=100mil


L46
HCB1608KF-181T15

+1.1V

C608
22U/6.3VS_8

+1.1V_PCIE_VDDR

AB24
Y21
AE25
AD24
AB23
AA22
AF26
AG27
AA21
Y20
AB21
AB22
AC22
AC21
AA20
AA18
AB20
AC19

VDDPL_11_SYS_S : System Clock Gen


PLLs analog power

VDDAN_11_PCIE --PCIE/UMI analog power

1088mA
C581
0.1U/10V_4

C585
0.1U/10V_4

C597
1U/6.3V_4

C595
1U/6.3V_4

C603
22U/6.3VS_8

+VDDPL_1.1V
+1.1VS5

L44
PBY160808T-221Y-N(220,2A)

+1.1V_AVDD_SATA

C579
2.2U/6.3V_4

C569
1U/6.3V_4

C583
1U/6.3V_4

C573
0.1U/10V_4

C568
0.1U/10V_4

C574
22U/6.3VS_8

if support USB
3.0 wake up
should be
change pull hi
to S5 power

+VDDAN_3.3V_HWM
L58
PBY160808T-221Y-N(220,2A)
C829
2.2U/6.3V_4

C554
10U/6.3V_8

C548
10U/6.3V_8

C537
1U/6.3V_4

C541
1U/6.3V_4

+1.1VS5

+FCH_VDDAN_11_USB_S

L66

PBY160808T-221Y-N(220,2A)

C861

0.1U/10V_4

C542

2.2U/6.3V_4

140mA
TRACE WIDTH >=20mil

C545

VDDCR_11_USB_S : USB PHY core power


+1.1VS5

0.1U/10V_4

42mA

+FCH_VDDCR_11_USB_S
TRACE WIDTH >=15mil

L65

U12
U13
T12
T13

PBY160808T-221Y-N(220,2A)
B

C544
0.1U/10V_4

M3 chipset need
to stuff for
support USB3.0

R525

282mA

VDDAN_11_SSUSB_S : USB3.0 PHY PLL analog power

*0_4

R526

424mA

+FCH_VDDCR_11_SSUSB_S

*0_8/S

P16
M14
N14
P13
P14
N16
N17
P17
M17

VDDIO_33_S_1
VDDIO_33_S_2
VDDIO_33_S_3
VDDIO_33_S_4
VDDIO_33_S_5
VDDIO_33_S_6
VDDIO_33_S_7
VDDIO_33_S_8
VDDXL_33_S

VDDAN_11_USB_S_1
VDDAN_11_USB_S_2

VDDCR_11_S_1
VDDCR_11_S_2

VDDCR_11_USB_S_1
VDDCR_11_USB_S_2

VDDPL_11_SYS_S
VDDAN_33_HW M_S

VDDAN_11_SSUSB_S_1
VDDAN_11_SSUSB_S_2
VDDAN_11_SSUSB_S_3
VDDAN_11_SSUSB_S_4
VDDAN_11_SSUSB_S_5
VDDCR_11_SSUSB_S_1
VDDCR_11_SSUSB_S_2
VDDCR_11_SSUSB_S_3
VDDCR_11_SSUSB_S_4

N18
L19
M18
V12
V13
Y12
Y13
W 11
G24

TRACE WIDTH >=20mil


C561
*0.1U/10V_4

C567
1U/6.3V_4

C556
1U/6.3V_4

C559
C549
1U/6.3V_4 1U/6.3V_4

VDDXL_33_S-- 25MHZ XTAL IO power

5mA

+VDDXL_3.3V

L45
PBY160808T-221Y-N(220,2A)

VDDCR_1.1_S-- 1.1V S5 Core power


N20
M20
J24
M8

if support USB
3.0 wake up
should be
change pull hi
to S5 power

+3VS5
C546
2.2U/6.3V_4

187mA

+VDDCR_1.1V
TRACE WIDTH >=15mil

70mA

C575
1U/6.3V_4

+VDDPL_1.1V

12mA

C588
*0.1U/10V_4

+1.1VS5

+3VS5

C587
2.2U/6.3V_4

C842
2.2U/6.3V_4
B

+VDDAN_3.3V_HWM

AA4 26mA
VDDIO_AZ_S Trace width >=20 mil

+3V

This circuit is
for switch DAC and
UMI analog power

+VDDIO_AZ

Q17
PMV45EN

C840
1U/6.3V_4

C849
10U/6.3V_8

C854
1U/6.3V_4

C853
0.1U/10V_4

C888
2.2U/6.3V_4

+3VS5

+FCH_VDDPL_33_SSUSB_S

M3 chipset need
to stuff for
support USB3.0

L43
PBY160808T-221Y-N(220,2A)
C572
2.2U/6.3V_6

R384
2.2K_4

+1.1V

+FCH_VDDAN_33_DAC_R

R561

+FCH_VDDPL_33_MLDAC

*0_8/S

C614
1U/6.3V_4

C582
2.2U/6.3V_4

Q28
PMV45EN

C620
0.022U/25V_4

+VDDAN_11_MLDAC

L67

+FCH_VDDAN_11_MLDAC

*0_4/S

PBY160808T-221Y-N(220,2A)

VDDIO_AZ_S -- HD Audio
Interface I/O power

C533
2.2U/6.3V_4

C578
0.1U/10V_4

+3V
2,4,6,8,10,11,12,22,23,24,25,26,27,29,30,31,32,33,41,42,43
+1.1V
41
+3VS5
4,6,8,10,25,32,33,35,36,38,41,43
+1.1VS5
36,41
Size
+12VALW
34,41,43
Custom

1%

352-(&75;
4XDQWD&RPSXWHU,QF
Document Number

Rev
1A

FCH 4/5(POWER)

Date: Tuesday, March 12, 2013


5

C894
0.1U/10V_4

233 mA Max
1

+VDDIO_AZ
R356

VGA_POWER_DOWN

VGA_PD is
generated
from FCH

+3V

VGA_POWER_DOWN

+FCH_VGA_PWR_EN
Q18
ME2N7002E

VGA will power down


when CRT no insert

Bolton-M3

M3 chipset need to stuff for support USB3.0


if support
Modem wake
up should be
change pull hi to
S5 power

C892
0.1U/10V_4

+FCH_VDDAN_33_DAC
L70
PBY160808T-221Y-N(220,2A)

POWER

VDDCR_11_SSUSB_S : USB3.0 PHY core power

R392
330K_6

C855
0.1U/10V_4

C839
0.1U/10V_4

C836
0.1U/10V_4

C837
1U/6.3V_4

32 mA Max
+FCH_VDDAN_33_DAC_R

2
+12VALW

R530

+FCH_VDDAN_11_SSUSB_S_R

*0_8/S

PBY160808T-221Y-N(220,2A)

M2 chipset
need to
connect to GND
M3 remove

C860
10U/6.3V_8

+FCH_VDD_11_SSUSB_S

L60

+1.1VS5

C543
0.1U/10V_4

VDDAN_33_USB_S_1
VDDAN_33_USB_S_2
VDDAN_33_USB_S_3
VDDAN_33_USB_S_4
VDDAN_33_USB_S_5
VDDAN_33_USB_S_6
VDDAN_33_USB_S_7
VDDAN_33_USB_S_8
VDDAN_33_USB_S_9
VDDAN_33_USB_S_10
VDDAN_33_USB_S_11
VDDAN_33_USB_S_12

C547
0.1U/10V_4

VDDAN_11_USB_S : USB PHY PLL analog power

G7
H8
J8
K8
K9
M9
M10
N9
N10
M12
N12
M11

3.3V_S5 I/O

PBY160808T-221Y-N(220,2A)

USB

L41

C536
0.1U/10V_4

VDDIO_33_S-- 3.3v S5 I/O power

USB
SS

+3VS5

VDDAN_33_HWM_S -- Hardware
monitor interface I/O power

+3VS5

59mA

C589
0.1U/10V_4

TRACE WIDTH >=50mil


L42
+1.1V
HCB1608KF-181T15

VDDAN_11_SATA--SATA PHY analog/IO power

1337mA

+VDDIO_3.3V
+3V_AVDD_USB
TRACE WIDTH >=50mil
470mA

VDDAN_33_USB_S : USB PHY I/O analog power

+1.1V_CKVDD

Sheet

of

43

STRAPS PINS

+3VS5

+3VS5

DEBUG STRAPS

OVERLAP COMMON PADS WHERE


POSSIBLE FOR DUAL-OP RESISTORS.

+3V

10

+3VS5

FCH has 15K Internal Pull Up for PCI_AD[27:23]


R517
10K/F_4

PCI_CLK1

PCI_CLK1

PCI_CLK3

PCI_CLK3

PCI_CLK4

LPC_CLK0

LPC_CLK1

EC_PWM2

CLK_RTC

R540
10K/F_4

R373
*10K/F_4

R507
10K/F_4

PCI_CLK4
LPC_CLK0

PCI_AD27

PCI_AD26

PCI_AD25

PCI_AD24

PCI_AD23

PCI_AD27

TP120

PCI_AD26

TP90

PCI_AD25

TP89

PCI_AD24

remove reserve pull low resistor


reserve test point only.

TP88

PCI_AD23

TP91

LPC_CLK1
EC_PWM2
CLK_RTC

R520
*10K_4

R521
10K/F_4

R523
10K/F_4

R543
10K/F_4

R372
2.2K_4

PULL
HIGH

R513
*2.2K_4

PCI_AD27

PCI_AD26

PCI_AD25

PCI_AD24

PCI_AD23

USE PCI
PLL

DISABLE ILA
AUTORUN

USE FC
PLL

USE DEFAULT
PCIE STRAPS

DISABLE PCI
MEM BOOT

DEFAULT

DEFAULT

DEFAULT

DEFAULT

DEFAULT

BYPASS
PCI PLL

ENABLE ILA
AUTORUN

BYPASS FC
PLL

USE EEPROM
PCIE STRAPS

PULL
LOW

ENABLE PCI
MEM BOOT

REQUIRED STRAPS
-------PULL
HIGH

PCI_CLK1
ALLOW
PCIE Gen2

--------

--------

PCI_CLK3 PCI_CLK4

--------

USE
DEBUG
STRAP

non_Fusion
CLOCK MODE

LPC_CLK0

IGNORE
DEBUG
STRAP

FUSION
CLOCK MODE

EC
DISABLED

DEFAULT

DEFAULT

DEFAULT

AMD internal EC
ENABLED

LPC_CLK1

EC_PWM2

CLKGEN
ENABLED

LPC ROM

DEFAULT

CLK_RTC
S5 PLUS MODE
DISABLED
DEFAULT

DEFAULT

PULL
LOW

FORCE
PCIE Gen1

--------

--------

CLKGEN
DISABLED

SPI ROM

S5 PLUS MODE
ENABLED

DEFAULT

FCH PWRGD

+3VS5

+3V

SI reserve for AMD DG


R584
*10K/F_4
38

CPU_VRM8380_PG

D12
2

3
4,33

R485
10K/F_4

BAT54A

FCH_PWRGD

ECPWROK

C826
*2.2U/6.3V_4

352-(&75;
4XDQWD&RPSXWHU,QF
1%

Size
Custom

Document Number

Rev
1A

FCH 5/5(Strap &PWRGD)

Date: Tuesday, March 12, 2013


1

Sheet

10

of

43

R427
R37

10K_4
10K_4

3
3
3
3
3
3
3
3
3
3
3
3
3
3

6,12,22
6,12,22

M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CS#0
M_A_CS#1
M_A_CLKP0
M_A_CLKN0
M_A_CLKP1
M_A_CLKN1
M_A_CKE0
M_A_CKE1
M_A_CAS#
M_A_RAS#
M_A_WE#
SMB_RUN_CLK
SMB_RUN_DAT

3
3

M_A_DM[7..0]

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

DIMM0_SA0
DIMM0_SA1
SMB_RUN_CLK
SMB_RUN_DAT

109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200
116
120

M_A_ODT0
M_A_ODT1

11
28
46
63
136
153
170
187

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQ[63:0]

JDIM2A

M_A_A[15:0]

M_A_DQSP[7:0]

M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7

M_A_DQSN[7:0]

12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
W E#
SA0
SA1
SCL
SDA
ODT0
ODT1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

PC2100 DDR3 SDRAM SO-DIMM


(204P)

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

2.48A

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

JDIM2B

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
199

+3V

+3V
3

3,12
M_A_EVENT#
M_A_RST#
R277

+VREF_DQ

*0_6/S

+VREF_CA0

R38

11

+1.5VSUS

*10K_4
M_A_EVENT#

+VREF_DQ0
+VREF_CA0

77
122
125
198
30
1
126
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDDSPD
NC1
NC2
NCTEST
EVENT#
RESET#
VREF_DQ
VREF_CA
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

PC2100 DDR3 SDRAM SO-DIMM


(204P)

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

VTT1
VTT2
GND
GND

203
204

+0.75V_DDR_VTT

205
206

DDR3-DIMM0_H=9.2_STD

DDR3-DIMM0_H=9.2_STD

Place these Caps near So-Dimm0.


+1.5VSUS

+3V
2,4,6,8,9,10,12,22,23,24,25,26,27,29,30,31,32,33,41,42,43
+1.5V
2,4,22,23,27,32,38,41
+3VPCU
7,25,30,32,33,34,35
+1.5VSUS
2,3,4,5,12,40,41,43
+0.75V_DDR_VTT
12,40

+0.75V_DDR_VTT

C210
C188
C282
C144
C258
C209
C189
C246
C198
C262
C197

10U/6.3VS_6
10U/6.3VS_6
10U/6.3VS_6
10U/6.3VS_6
10U/6.3VS_6
10U/6.3VS_6
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4

EC12
EC8

150P/50V_4
150P/50V_4

C287

0.1U/10V_4

C37
C38
C39
C40
C33
C35
C36
C41
C42

1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
*10U/6.3V_6
10U/6.3VS_6
10U/6.3VS_6
*0.047U/10V_4
*0.047U/10V_4
+VREF_CA0

EMI

EC1

0.1U/10V_4

EC2

0.1U/10V_4

SI change from short pad to *0R


R93

EMI request

R105

+VREF_CA0
C126

+3V

C64
C63
C65

1K_4

R121

*0_4
1K_4

DDR_VTTREF

3,12,40

+1.5VSUS

0.1U/10V_4

SI stuff
2.2U/6.3V_4
*0.1U/10V_4
*0.047U/10V_4

C131

1000P/50V_4

EC7

*0.047U/10V_4

C417

0.1U/10V_4

C425

1000P/50V_4

+VREF_DQ0

352-(&75;
4XDQWD&RPSXWHU,QF
1%

Size
Custom

Document Number

Rev
1A

DDR3 DIMM0-STD (9.2H)

Date: Tuesday, March 12, 2013


1

Sheet

11

of

43

+3V

R39
R40

3
3
3
3
3
3
3
3
3
3
3
3
3
3

4.7K_4
10K_4
6,11,22
6,11,22

M_B_BS#0
M_B_BS#1
M_B_BS#2
M_B_CS#0
M_B_CS#1
M_B_CLKP0
M_B_CLKN0
M_B_CLKP1
M_B_CLKN1
M_B_CKE0
M_B_CKE1
M_B_CAS#
M_B_RAS#
M_B_WE#
SMB_RUN_CLK
SMB_RUN_DAT
3
3

M_B_DM[7..0]

DIMM1_SA0
DIMM1_SA1

109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200
116
120

M_B_ODT0
M_B_ODT1

11
28
46
63
136
153
170
187

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
3

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

M_B_DQSP[7:0]

M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7
M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7

M_B_DQSN[7:0]

12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
W E#
SA0
SA1
SCL
SDA
ODT0
ODT1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

JDIM1B

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

2.48A

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

199

+3V

VDDSPD

77
122
125
3
3

M_B_EVENT#

M_B_EVENT#
M_B_RST#
R279

+VREF_DQ

NC1
NC2
NCTEST

198
30

EVENT#
RESET#

1
126

+VREF_DQ1
+VREF_CA1

*0_6/S

+VREF_CA1

VREF_DQ
VREF_CA

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

+3V

VTT1
VTT2
GND
GND

4,32,33

MBCLK2

4
*4.7K_4

4,32,33

C61

2.2U/6.3V_4

C62

*0.1U/10V_4

SI change from short pad to *0R

C424

0.1U/10V_4

C423

1000P/50V_4

R95

*0_4

R283

*4.7K_4

MBDATA2

SDA_G780

DDR_VTTREF

1K_4

R118

1K_4

SDA_G780

7
6

M_A_EVENT#

M_A_EVENT#

PM_EXTTS#0_EC

SCLK

VCC

*0.01U/25V_4

SDA

DXP

ALERT#

DXN

OVERT#

GND

+3V

DDR_THERMDA

3
C389
*2200P/50V_4

3,11,40

R281

*10K_4

Q10
*METR3904-G

*G780P81U

+1.5VSUS

for WiMAX
+1.5VSUS

1000P/50V_4

C118

*0.047U/10V_4

150P/50V_4

150P/50V_4

C285 *100P/50V_4

C122

C227 *100P/50V_4

0.1U/10V_4

EC22

C116

EC16

+VREF_CA1

+VREF_DQ

R267
1K/F_4

+0.75V_DDR_VTT
11,40
+1.5VSUS
2,3,4,5,11,40,41,43
+3VPCU
7,25,30,32,33,34,35
+3V
2,4,6,8,9,10,11,22,23,24,25,26,27,29,30,31,32,33,41,42,43

+VREF_DQ

R276

C414

1K/F_4

*0.47U/6.3V_4

352-(&75;
4XDQWD&RPSXWHU,QF

EMI

1%

Size
Custom

Document Number

Rev
1A

DDR3 DIMM1-STD (5.2H)

Date: Tuesday, March 12, 2013


5

DDR_THERMDC

+1.5VSUS
+VREF_DQ1

150P/50V_4

*0.047U/10V_4

SCLK_G780

SI stuff

EC23

C60

3,11

C429

+3V
R111

EMI

+3V

+VREF_CA1
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
*10U/6.3V_6
*10U/6.3V_6
10U/6.3VS_6
*0.047U/10V_4
*0.047U/10V_4

205
206

+3V

Place these Caps near So-Dimm1.

C46
C45
C52
C44
C43
C34
C47
C54
C53

+0.75V_DDR_VTT

SCLK_G780
R289

U11

10U/6.3VS_6
10U/6.3VS_6
10U/6.3VS_6
10U/6.3VS_6
10U/6.3VS_6
10U/6.3VS_6
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
150P/50V_4
150P/50V_4
150P/50V_4
150P/50V_4

203
204

DDR3 Thermal Sensor

Q13

*2N7002DW

C129
C134
C157
C219
C244
C265
C259
C216
C206
C288
C263
EC11
EC9
EC13
EC10

+0.75V_DDR_VTT

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

DDR3-DIMM1_H=5.2_STD

DDR3-DIMM1_H=5.2_STD

+1.5VSUS

12

+1.5VSUS

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_DQ[63:0]

JDIM1A

M_B_A[15:0]

PC2100 DDR3 SDRAM SO-DIMM


(204P)

PC2100 DDR3 SDRAM SO-DIMM


(204P)

Sheet

12

of

43

13

U23A

PART 1 0F 9

2
2

PEG_TXP0
PEG_TXN0

2
2

PEG_TXP1
PEG_TXN1

2
2

PEG_TXP2
PEG_TXN2

2
2

PEG_TXP3
PEG_TXN3

2
2

PEG_TXP4
PEG_TXN4

2
2

PEG_TXP5
PEG_TXN5

2
2

PEG_TXP6
PEG_TXN6

2
2

PEG_TXP7
PEG_TXN7

For Mars /Sun

NC pin :

AA38
Y37

PCIE_RX0P

PCIE_TX0P

PCIE_RX0N

PCIE_TX0N

Y35
W 36

PCIE_RX1P

PCIE_TX1P

PCIE_RX1N

PCIE_TX1N

W 38
V37

PCIE_RX2P

PCIE_TX2P

PCIE_RX2N

PCIE_TX2N

V35
U36

PCIE_RX3P

PCIE_TX3P

PCIE_RX3N

PCIE_TX3N

U38
T37

PCIE_RX4P

PCIE_TX4P

PCIE_RX4N

PCIE_TX4N

T35
R36

PCIE_RX5P

PCIE_TX5P

PCIE_RX5N

PCIE_TX5N

R38
P37

PCIE_RX6P

PCIE_TX6P

PCIE_RX6N

PCIE_TX6N

P35
N36

PCIE_RX7P

PCIE_TX7P

PCIE_RX7N

PCIE_TX7N

N38
M37

PCIE_RX8P

PCIE_TX8P

PCIE_RX8N

PCIE_TX8N

M35
L36

PCIE_RX9P

L38
K37

PCIE_RX10P

K35
J36

PCIE_RX11P

PCIE_TX11P

PCIE_RX11N

PCIE_TX11N

J38
H37

PCIE_RX12P

PCIE_TX12P

PCIE_RX12N

PCIE_TX12N

H35
G36

PCIE_RX13P

PCIE_TX13P

PCIE_RX13N

PCIE_TX13N

G38
F37

PCIE_RX14P

PCIE_TX14P

PCIE_RX14N

PCIE_TX14N

F35
E37

PCIE_RX15P

PCIE_TX15P

PCIE_RX15N

PCIE_TX15N

Y33
Y32

C_PEG_RXP0
C_PEG_RXN0

C736
C733

*0.1U/10V_4
*0.1U/10V_4

W 33
W 32

C_PEG_RXP1
C_PEG_RXN1

C744
C740

*0.1U/10V_4
*0.1U/10V_4

U33
U32

C_PEG_RXP2
C_PEG_RXN2

C731
C728

*0.1U/10V_4
*0.1U/10V_4

U30
U29

C_PEG_RXP3
C_PEG_RXN3

C715
C709

*0.1U/10V_4
*0.1U/10V_4

T33
T32

C_PEG_RXP4
C_PEG_RXN4

C749
C747

*0.1U/10V_4
*0.1U/10V_4

T30
T29

C_PEG_RXP5
C_PEG_RXN5

C726
C723

*0.1U/10V_4
*0.1U/10V_4

P33
P32

C_PEG_RXP6
C_PEG_RXN6

C730
C735

*0.1U/10V_4
*0.1U/10V_4

P30
P29

C_PEG_RXP7
C_PEG_RXN7

C739
C743

*0.1U/10V_4
*0.1U/10V_4

PEG_RXP0
PEG_RXN0

2
2

PEG_RXP1
PEG_RXN1

2
2

PEG_RXP2
PEG_RXN2

2
2

PEG_RXP3
PEG_RXN3

2
2

PEG_RXP4
PEG_RXN4

2
2

PEG_RXP5
PEG_RXN5

2
2

PEG_RXP6
PEG_RXN6

2
2

PEG_RXP7
PEG_RXN7

2
2

N33
N32

H37,H35,G36,G38,F37,F35,E37

PCI EXPRESS INTERFACE

N38,M37,M35,L36,L38,K37,K35,J36,J38
PCIE_RX9N

PCIE_RX10N

PCIE_TX9P
PCIE_TX9N

N30
N29

FOR Mars

/ Sun NC pin :

N33,N32,N30,N29,L33,L32,L30,L29,K33,K32
PCIE_TX10P
PCIE_TX10N

L33
L32

J33,J32,K30,K29,H33,H32

L30
L29
K33
K32
J33
J32
K30
K29
H33
H32

Mars/ Sun Only : Stuff Ra

R230

Ra

*1.69K/F_4

+1.0V_VGA

CLOCK

7
7

AB35
AA36

CLK_VGA_P
CLK_VGA_N

PCIE_REFCLKP
PCIE_REFCLKN

Do not
CALIBRATION

R176

Ra

*1K/F_4 AH16

TEST_PG

PCIE_CALR_TX

Y30

PCIE_CALRP

PCIE_CALR_RX

Y29

PCIE_CALRN

R233

install for Mars/ Sun, check AMD can del?

Rb

R234

*1.27K/F_4
*1K/F_4

Rc
AA30

PEGX_RST#

100MHz (+/-300ppm) input frequency,


0-0.7V single-ended swing

+1.0V_VGA

Install 1k for Mars / Sun

PERSTB

SUN_M2_XT

*SUN_M2_XT
+3V_DELAY

MARS/SUN
DB change for leakage issue

C374
*0.1U/10V_4

*U74AHC1G08G-AL5-R
U7
7

GPU_RST#

VGA_RSTB

2
*330_4

DGPU_HIN_RST#

1.69K

Rb

n/a

Rc

1K
A

4
R243

PEGX_RST#

2,4,6,8,9,10,11,12,22,23,24,25,26,27,29,30,31,32,33,41,42,43
15,17,18,43

1
3

Ra

+3V
+1.0V_VGA

+3V
+1.0V_VGA

R238

352-(&75;
4XDQWD&RPSXWHU,QF

*100K_4

1%

Size
Custom

Document Number

Rev
1A

SUN_PCIE_Interface

Date: Tuesday, March 12, 2013


1

Sheet

13

of

43

For Mars / Sun

PS3 BIT3=>BIT1
[3:0]

Vendor

011
100
101

Hynix
Micron
Samsung

128Mx16 *4
128Mx16 *4
128Mx16 *4

: AR1/AW8/AR3/AR8/AU8:

H5TC2G63FFR-11C
MT41J128M16JT-093G:K
K4W2G1646E-BC1A

For

AKD5MZDTW02
AKD5MGSTL16
AKD5MGGT534

14

NC pin

QCI P/N (TOP B/S)

Vendor P/N

Mars / Sun

: DP A to D Port:

all NC pin

U23B

For Sun only : AD29 /AC29 /AJ21 /AK21: NC pin

PART 2 0F 9
MUTI GFX

Only for Test


PS3 BIT3=>BIT1
[3:0]

Vendor

000
001
010

QCI P/N

Vendor P/N

Hynix
Micron
Samsung

256Mx16 *4
256Mx16 *4
256Mx16 *4

GENLK_CLK
GENLK_VSYNC

DP46
DP50

SWAPLOCKA

GENLK_VSYNC

TXCAM_DPA3N

TX0M_DPA2N

DPA

SWAPLOCKB

TX1P_DPA1P

AR8
AU8
AP8
AW8
AR3
AR1
AU1
AU3
AW3
AP6
AW5
AU5
AR6
AW6
AU6
AT7
AV7
AN7
AV9
AT9
AR10
AW10
AU10
AP10
AV11
AT11
AR12
AW12
AU12
AP12

Sun only

AP10 /AV11 /AT11 /AR12 /AW12 / AU12 /AP12 : NC pin

+3V_DELAY

14,33
14,33

AJ21
AK21

TXCAP_DPA3P

TX1M_DPA1N

For

GENLK_CLK

TX0P_DPA2P

AKD5PGWTW07
AKD5PZSTL00
AKD5PZDT500

H5TC4G63AFR-11C
MT41J256M16HA-093G:E
K4W4G1646B-HC1A

AD29
AC29

R166

*4.7K_4

R152

*4.7K_4

SI stuff
R161
R156

DGPUT_CLK
DGPUT_DATA

R442
R441

+3V_DELAY

TX2P_DPA0P

DVPCNTL_MVP_1

TX2M_DPA0N

DVPCNTL_1

TXCBP_DPB3P

DVPCNTL_2

TXCBM_DPB3N
TX3P_DPB2P

DVPDATA_1

TX3M_DPB2N

DPB

DVPDATA_2
DVPDATA_3

TX4P_DPB1P

DVPDATA_4

TX4M_DPB1N

DVPDATA_6

TX5P_DPB0P

DVPDATA_7

TX5M_DPB0N

DVPDATA_9

TXCCP_DPC3P

DVPDATA_10

TXCCM_DPC3N

DVPDATA_12

TX0P_DPC2P

DVPDATA_13

TX0M_DPC2N

DVPDATA_14

DPC

DVPDATA_15

TX1P_DPC1P

DVPDATA_16

TX1M_DPC1N

R214

*10K/F_4

DVPDATA_18

TX2P_DPC0P

DVPDATA_19

TX2M_DPC0N

R159

*100K_4

DVPDATA_21

TXCDP_DPD3P

DVPDATA_22

TXCDM_DPD3N

DPD

SMBCLK

TX4P_DPD1P

SMBus

SMBDATA

TX4M_DPD1N

SCL

16

R171

*10K/F_4

GPIO0

PV change to shortpad

R174

*10K/F_4

DGPU_TMS

R177

*10K/F_4

DGPU_TCK

42

42

42
42
33
42

SI stuff

AH20
AH18
AN16

*0_4/S

GPIO5

AH17
AJ17
AK17
AJ13
AH15
AJ16
AK16
AL16
AM16
AM14
AM13
AK14
AG30
AN14
AM17
AL13
AJ14
AK13
AN13

GPIO8
GPIO9
GPIO11
GPIO12
GPIO13
HDMI_HP2
GFX_CORE_CNTRL1
GFX_CORE_CNTRL3
VGA_ALERT_1
HPD3
TEMP_FAIL
GFX_CORE_CNTRL2
GPIO21
GPIO22
GPIO_23_CLKREQb

GFX_CORE_CNTRL1
GFX_CORE_CNTRL3
DP35
DP21

SI add TEMP FAIL circuit for SUN XT

GPIO0
GPIO1
GPIO2

AVSSN#1

GPIO_1

GPIO_2

AVSSN#2

GPIO_5_AC_BATT

AVSSN#3

TEMP_FAIL
GFX_CORE_CNTRL2
DP32
DP12

GPIO_6
GPIO_7_BLON

DAC1

GPIO_8_ROMSO

R150

+3V_DELAY

*10K/F_4

42

R209

DGPU_PROCHOT#
DP43

*0_4

AG32
AG33
AJ19
AK19
AJ20
AK20
AJ24
AH26
AH24

GENERICC

DP29

*10K/F_4 VGA_ALERT_1

AT21
AR20
AU22
AV21
AT23
AR22

FOR MARS: AD37/ AE38 / AD35


FOR SUN : AD37/ AE38 / AD35

FOR SUN GPIO NC PIN : AJ19/ AK19 / AK24 / AM14 / AN14 / AJ24/ AH26 / AH24 / AJ20

AD39
AD37

AVSSN to GND
NC pin

*0_4

R222

AE36
AD35

*0_4

R224

AF37
AE38

*0_4

R225

DP51

VSYNC

AC36
AC38

RSET

AB34

AVDD

AD34
AE34

*0_4
*0_4

R216
R448

AC33
AC34

*0_4
*0_4

R184
R219

HSYNC

DP48
C

DP38

GPU_HSYNC_COM
GPU_VSYNC_COM

DP49
DP52

GPIO_10_ROMSCK
GPIO_11

R226

*499/F_4

GPIO_12
GPIO_13
GPIO_14_HPD2

AVSSQ

+1.8V_AVDD_Q

GPIO_15_PWRCNTL_0
GPIO_16

VDD1DI

GPIO_17_THERMAL_INT

VSS1DI

+VDDD1

GPIO_18_HPD3

FOR SUN : R226/R216/R448/R184/R219 -->NC

GPIO_19_CTF

NC#9

V13
U13
AC31
AD30
AC32
AD32
AF32
AA29
AG21

NC_TSVSSQ

AF33

PS_0

AM34

PS_0

TP104

PS_1

AD31

PS_1

TP53

PS_2

AG31

PS_2

DP33

PS_3

AD33

PS_3

DP45

DDC1CLK

AM26
AN26

GPIO_20_PWRCNTL_1

NC#1

GPIO_21

NC#2

GPIO_22_ROMCSB

NC#3

CLKREQB

NC#4
NC#6

TEMP_FAIL

AU20
AT19

GPIO_9_ROMSI

NC#5

R132

AT17
AR16

GPIO_0

R154

33
GPU_AC_BATT
GFX_CORE_CNTRL4
DP28
DP40
DP44
GFX_CORE_CNTRL5
DP23
DP15
DP14
DP20

AU16
AV15

FOR SUN : R222/R224/R225 -->NC

DP34
DP17

DGPU_TDI

AT15
AR14

I2C

SDA

GENERAL PURPOSE I/O

*511/F_4

R148

GPIO5

*10K/F_4 DGPU_TRSTB

AU14
AV13

DVPDATA_23

Base on AMD check list


R175

AT33
AU32

DVPDATA_20

DGPU_PROCHOT#

AR32
AT31

DVPDATA_17

TX5P_DPD0P

AK26
AJ26

AV31
AU30

DVPDATA_11

*4.7K_4
*4.7K_4

DP30
DP37

*10K/F_4 GPIO_23_CLKREQb

AR30
AT29

DVPDATA_8

TX5M_DPD0N

R127

AT27
AR26

DVPDATA_5

TX3M_DPD2N

AJ23
AH23

AU26
AV25

DVPCLK
DVPDATA_0

TX3P_DPD2P

DGPUT_CLK_1
DGPUT_DATA_1

AT25
AR24

DVPCNTL_0

*0_4
*0_4

Access to SMBBus ans SDA/SCL is mandatory on all designs


Add test points on SMBBus and SDA/SCL for debug
+3V_DELAY

DVPCNTL_MVP_0

AU24
AV23

GPIO_29

NC#7

GPIO_30

NC#8

FOR SUN NC PIN : AD34/ AE34 / AC33 / AC34 / AD39 / AE36


AF37/ AC36 / AC38 / AB34 /

GENERICA
GENERICB
GENERICC
GENERICD
GENERICE_HPD4

DP47

GENERICF_HPD5
GENERICG_HPD6

AK20/ AH18 / AN16 / AK17 / AK16 / AL16/ AM16

+1.8V_VGA

AC30

CEC_1

AK24

HPD1

MLPS

Mars: stuff
B

For Sun Nc: R140, R124, C148

R140

*499/F_4

R124

*249/F_4

+0.6V_VREFG

AH13

VREFG

AL21

PX_EN

AD28

TESTEN

Thermal Solution(Close to GPU)


C318

BIT5 => BIT1

*0.1U/10V_4

DP24

DGPUT_CLK

14,33

DGPUT_DATA

VGA_ALERT_1
+3V_DELAY
4

*0_4
R165

R149 VGA_ALERT_2 6
*10K/F_4

SCLK

VCC

SDA

DXP

ALERT#

DXN

OVERT#

GND

+3V_DELAY

R217

TESTEN

DP54

GPU_THERMDA
C254
*2200P/50V_4

'W

>

D>dZ

DGPU_TRSTB
DGPU_TDI
DGPU_TCK
DGPU_TMS
DGPU_TDO

DP26
DP13
DP19
DP16
DP22

*3.01K/F_4

GFX_CORE_CNTRL3

R131

GFX_CORE_CNTRL4

R144

*3.01K/F_4

GFX_CORE_CNTRL5

R143

*3.01K/F_4

GFX_CORE_CNTRL5

R141

GFX_CORE_CNTRL3

R120

GFX_CORE_CNTRL4

R706

*10K_4

DDC2CLK

JTAG_TDI

=>

+1.8V_VGA

11001

PS1

=> 11001

PS2

=>

00000

DAC1 Analog Power


AVDD : 1.8V @ 18mA

DDC2DATA

GPU_THERMDA
GPU_THERMDC

1.8V(8mA TSVDD)

JTAG_TMS

AUX2P

JTAG_TDO

AUX2N

AF29
AG29

DPLUS

AK32

GPIO_28_FDO

AL31

TS_A

AJ32
AJ33

TSVDD

DDCCLK_AUX4P

L30

GPIO28

GPIO28

DDCDATA_AUX4N

C308

DP31

C300

DDCDATA_AUX6N
DDCVGACLK

*10U/6.3V_8 *1U/10V_4

*0.1U/10V_4

+1.8V_TSVDD

L27

PS3

=>

11011

R221
*8.45K_4
PS_1

R445
*2K_4

C699
*0.01U/50V_4

DB no stuff

R220
*2K_4

C332
*0.68U/6.3V_4

*0_6/S

AN20
AM20
AL30
AM30

C304
*10U/6.3VS_6

PV change to shortpad

DAC1 Digital Power.


VDD1DI : 1.8V @ 117mA

AL29
AM29
L26

DDCCLK_AUX6P

C298

+1.8V_VGA

DMINUS
DDCDATA_AUX5N

16

AM19
AL19

+1.8V_AVDD_Q

R444
*8.45K_4
PS_0

JTAG_TCK

DDCCLK_AUX5P

*HCB1608KF121T30

*3.01K/F_4

Rb

JTAG_TRSTB

THERMAL

+1.8V_VGA

Rc

Ra

AM23
AN23
AK23
AL24
AM24

DDCCLK_AUX3P

+1.8V_TSVDD
*3.01K/F_4

R133

AUX1N

DDCDATA_AUX3N

Reserve for Power Play


R130

*1K/F_4

AM27
AL27

3
5

*G781-1P8(9Ah)

GFX_CORE_CNTRL2

DDC/AUX

AUX1P

R229

D>

GFX_CORE_CNTRL1

DEBUG

*5.1K/F_4

DDC1DATA

+3V_DELAY

GPU_THERMDC

DGPU_OVT#

PS0

*0.1U/10V_4

U5
14,33

+1.8V_VGA

BACO

C148

DDCVGADATA

C307
C306
*1U/6.3V_4 *0.1U/10V_4

+1.8V_VGA

R195
*0_4

*0_6/S

AN21
AM21

R211
*6.98K/F_4

PS_2
C268
*10U/6.3VS_6

AK30
AK29

+1.8V_VGA

+VDDD1

PS_3

C269
C270
*1U/6.3V_4 *0.1U/10V_4
R194
*4.75K/F_4

AJ30
AJ31

C294
*0.68U/6.3V_4

R212
*4.99K/F_4

C319
*0.01U/50V_4

TSVSS

+3V_DELAY
SUN_M2_XT

*10K_4

For Mars: Stuff Ra, Rc=> VDDC 1.1V

*10K_4

For Thems: Stuff Ra, Rb, Na Rc=> VDDC 1.0V

*SUN_M2_XT

For Mars / Sun:NC pin


AL30, AM30, AL29, AM29, AN21, AM21, AK30, AK29

For Sun Only :NC pin


AL27, AM27, AM20, AN20, AN26, AM26, AL19, ,
AM19, AJ30, AJ31

13,15,17,18,43

+1.0V_VGA

15,17,18,25,43

+1.8V_VGA

13,16,17

+3V_DELAY

352-(&75;
4XDQWD&RPSXWHU,QF

+1.0V_VGA
+1.8V_VGA
+3V_DELAY

1%

Size
Custom

Document Number

Rev
1A

SUN_Main & GND

Date: Tuesday, March 12, 2013


5

Sheet

14

of

43

1
U23F

15

PART 6 0F 9

For Mars/ Sun


Change La, Lb
Bead to 0 ohm

Memory Type
27-MHz ( 30 ppm) crystal connected to XTALIN/XTALOUT, or
27-MHz (1.8 V) oscillator connected to XTALIN.

DDR3

+1.8V_DPLL_PVDD

La
+1.8V_VGA

AB39
E39
F34
F39
G33
G34
H31
H34
H39
J31
J34
K31
K34
K39
L31
L34
M34
M39
N31
N34
P31
P34
P39
R34
T31
T34
T39
U31
U34
V34
V39
W31
W34
Y34
Y39

L25

Display Phase Lock Loop Power


DPLL_PVDD : 1.8V @ 75mA

*0_6/S

27-MHz (3.3 V) oscillator connected to XO_IN, and


100-MHz (3.3 V) oscillator connected to XO_IN2. (By default, this clock should not be
spread since internal spreading is used.)

GDDR5

+1.8V_DPLL_PVDD
C277
C273
*10U/6.3V_8

C278
*0.1U/10V_4

*1U/6.3V_4

DB change from X0_IN for AMD suggestion

U23I

R443

*0_4

GPU_XTAL27_IN

PART 9 0F 9

25

PV change to shortpad
+1.0V_DPLL_VDDC

+1.0V_DPLL_VDDC

*0_6/S
C267
C280
*10U/6.3V_8 *1U/6.3V_4

1.0V(125mA DPLL_VDDC)

XTALIN

AV33

EVGA-XTALI

*22P/50V_4

DPLL_VDDC

R181
*10M_6

C279
*0.1U/10V_4

AN32

Y2
*7A27000010

DPLL_PVSS

DPLL_PVSS

AU34

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

PCIE_VSS

GND

GND
GND

GND
MPLL_PVDD

*1U/6.3V_4

C447
*0.1U/10V_4

XO_IN

AM10
C

SPLL_PVDD

+1.8V_SPLL_PVDD

AN9

SPLL_PVDD : 1.8V @ 75mA

AN10

C172
C160
*10U/6.3V_8

SPLL_VDDC

AW34

DP55

DB change to XTAI_IN for AMD suggestion


XO_IN2

AW35

R446

*0_4

+1.8V_SPLL_PVDD

*TB160808U121N005(120,0.4A)

*1U/6.3V_4

SPLL_PVSS

C190
*0.1U/10V_4
CLKTESTA

AF30
AF31

NC_XTAL_PVDD

CLKTESTB

AK10 CLKTESTA
AL10 CLKTESTB

NC_XTAL_PVSS

+1.0V_SPLL_VDDC

SPLL_VDDC : 0.935V @ 150mA

C178
C242
*10U/6.3V_8 *1U/6.3V_4

C192
*0.1U/10V_4

+1.0V_SPLL_VDDC

*HCB1608KF-471T10
C232
*0.1U/10V_4

SUN_M2_XT

*SUN_M2_XT
SPLL_PVSS

+1.8V_DPLL_PVDD

Debug only,
for clock observation,
if not needed, DNI

R145
*51.1/F_4

R188
R192

Ra
Rb

C248
*0.1U/10V_4

R163
*51.1/F_4

*0_4
*0_4

reserve Ra, Rb

for future ASIC

GND
GND

F15
F17
F19
F21
F23
F25
F27
F29
F31
F33
F7
F9
G2
G6
H9
J2
J27
J6
J8
K14
K7
L11
L17
L2
L22
L24
L6
M17
M22
M24
N16
N18
N2
N21
N23
N26
N6
R15
R17
R2
R20
R22
R24
R27
R6
T11
T13
T16
T18
T21
T23
T26
U15
U17
U2
U20
U22
U24
U27
U6
V11
V16
V18
V21
V23
V26
W2
W6
Y15
Y17
Y20
Y22
Y24
Y27

MPLL_PVDD

PLLS/XTAL

C449
*10U/6.3V_8

1.0V(125mA DPLL_VDDC)

PCIE_VSS

C251

EVGA-XTALO

C446

+1.0V_VGA

GND

GND

H7
H8

L36

L22

GND

PCIE_VSS

*22P/50V_4
+1.8V_MPLL_PVDD

L19

GND

PCIE_VSS

MPLL_PVDD : 1.8V @ 150mA

*HCB1608KF-471T10

+1.8V_VGA

GND

PCIE_VSS

GND
XTALOUT

+1.8V_MPLL_PVDD

+1.8V_VGA

C250

AN31

DPLL_PVDD

L24

+1.0V_VGA

AM32

DPLL_VDDC : 0.935V @ 140mA

Lb

PCIE_VSS

route 50ohms
single-ended/
100ohms diff and keep short

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

A3
A37
AA16
AA18
AA2
AA21
AA23
AA26
AA28
AA6
AB12
AB15
AB17
AB20
AB22
AB24
AB27
AC11
AC13
AC16
AC18
AC2
AC21
AC23
AC26
AC28
AC6
AD15
AD17
AD20
AD22
AD24
AD27
AD9
AE2
AE6
AF10
AF16
AF18
AF21
AG17
AG2
AG20
AG22
AG6
AG9
AH21
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20

Mars/Sun AG22 is nc pin

GND
GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

AL23
AL26
AL32
AL6
AL8
AM11
AM31
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B7
B9
C1
C39
E35
E5
F11
F13

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

VSS_MECH

GND

VSS_MECH

GND

VSS_MECH

A39
AW1
AW39

A
SUN_M2_XT

13,17,18,43

+1.0V_VGA

14,17,18,25,43

+1.8V_VGA

352-(&75;
4XDQWD&RPSXWHU,QF

+1.0V_VGA

1%

+1.8V_VGA

Size
Custom

Document Number

Rev
1A

SUN_XTAL

Date: Tuesday, March 12, 2013


5

Sheet
1

15

of

43

U23G

Fo Mars only:

AF35, AG36: NC pin

Fo Mars only:

AN36, AP37: NC pin

16

PART 7 0F 9

VARY_BL

LVDS CONTROL

DIGON

TXCLK_UP_DPF3P
TXCLK_UN_DPF3N

TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N

TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N

TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N

TXOUT_U3P

LVTMDP

TXOUT_U3N

TXCLK_LP_DPE3P
TXCLK_LN_DPE3N

TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N

TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N

TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N

TXOUT_L3P
TXOUT_L3N

AK27
AJ27

CONFIGURATION STRAPS -- SEE EACH DATABOOK FOR STRAP DETAILS


ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET

AK35
AL36

STRAPS

MLPS

GPIO PIN

DESCRIPTION OF DEFAULT SETTINGS

AH35
AJ36

MLPS_DISABLE

NA

GPIO_28_FDO

Enable MLPS, NA for Thames/Whistler/Seymour


0: Enable MLPS, disable GPIO PINSTRAP
1: Disable MLPS, enable GPIO PINSTRAP

TX_PWRS_ENB

PS_1[4]

GPIO0

Transmitter Power Savings Enable


0: 50% Tx output swing
1: Full Tx output swing

TX_DEEMPH_EN

PS_1[5]

GPIO1

PCIE Transmitter De-emphasis Enable


0: Tx de-emphasis disabled
1: Tx de-emphasis enabled

BIF_GEN3_EN_A

PS_1[1]

GPIO2

PCIE Gen3 Enable


(NOTE: RESERVED for Thames/Whistler/Seymour)
0: GEN3 not supported at power-on
1: GEN3 supported at power-on

BIF_VGA DIS

PS_2[4]

GPIO9

VGA Control
0: VGA controller capacity enabled
1: VGA controller capacity disabled (for multi-GPU)

ROMIDCFG[2:0]

PS_0[3..1]

GPIO[13:11]

AG38
AH37
AF35
AG36

AP34
AR34
AW37
AU35
AR37
AU39
AP35
AR35
AN36
AP37

Fo Sun Only : All

NC pin

SUN_M2_XT

+3V_DELAY

14

GPIO0

GPIO0

R119

Default Setting

AJ38
AK37

*10K_4

Serial ROM type or Memory Aperture Size Select


If GPIO22 = 0, defines memory aperture size
If GPIO22 = 1, defines ROM type
100 - 512Kbit M25P05A
(ST)
101 - 1Mbit M25P10A
(ST)
101 - 2Mbit M25P20
(ST)
101 - 4Mbit M25P40
(ST)
101 - 8Mbit M25P80
(ST)
100 - 512Kbit Pm25LV512 (Chingis)
101 - 1Mbit Pm25LV010 (Chingis)

001

BIOS_ROM_EN

PS_2[3]

GPIO22

Enable external BIOS ROM device


0: Disabled
1: Enabled

AUD[1]
AUD[0]

NA
NA

HSYNC
VSYNC

00 - No audio function
01 - Audio for DP only
10 - Audio for DP and HDMI if dongle is detected
11 - Audio for both DP and HDMI
HDMI must only be enabled on systems that are legally entitled. It is the
responsibility of the system designer to ensure that the system is entitled to
support this feature.

XX

CEC_DIS

PS_0[4]

GENLK_VSYNC Enable CEC function. Reserved for Thames/Whistler/Seymour


0: Disabled
1: Enabled

Reserve for future ASIC


NOTE: ALLOW FOR PULLUP PADS FOR THE RESERVED STRAPS BUT DO NOT INSTALL RESISTOR
IF THESE GPIOS ARE USEED, THEY MUST KEEP LOW AND NOT CONFLICT DURING RESET
RESERVED
RESERVED
RESERVED
RESERVED

AUD_PORT_CONN_PINSTRAP[2]
AUD_PORT_CONN_PINSTRAP[1]
AUD_PORT_CONN_PINSTRAP[0]

PS_1[3]
PS_1[2]
NA
NA

PS_3[5]
PS_3[4]
PS_0[5]

GENLK_CLK
GPIO8
GPIO21
GENERICC

NA
NA
NA

14

GPIO28

GPIO28

Ra R196

*10K_4

R197

*10K_4

Rb

0
0
0
0

Reserved
Reserved
Reserved
Reserved (for Thames/Whistler/Seymour only)

STRAPS TO INDICATE THE NUMBER OF AUDIO CAPABLE DISPLAY OUTPUTS


111 = 0 usable endpoints
110 = 1 usable endpoints
101 = 2 usable endpoints
100 = 3 usable endpoints
011 = 4 usable endpoints
010 = 5 usable endpoints
001 = 6 usable endpoints
000 = all endpoints are usable

111

Thems : stuff Ra=> disable MLPS , support GPIO only


Mars : stuff Rb=> enable MLPS, support MLPS only

Power Up/Down Sequence

+VGA_CORE

VDDC

+VGA_CORE

VDDCI

+1.5V_VGA

VDDR1

+3.3V_VGA

VDDR3

+1.8V_VGA

VDDR4

+1.8V_VGA

VDD_CT

20ms

352-(&75;
4XDQWD&RPSXWHU,QF

20ms

1%

Size
Custom

Document Number

Rev
1A

SUN_LVDS / STRAP

Date: Tuesday, March 12, 2013


1

Sheet

16

of

43

U23E

PART 5 0F 9

+1.8V_VGA

MEM I/O

C484
*10U/6.3VS_6

C794
*10U/6.3VS_6

C778
*10U/6.3VS_6

C714
*10U/6.3VS_6

C518
*10U/6.3VS_6

Reserve for Drop


C825
*22U/6.3VS_8

C214
DISCRETE: Reserve 22U/6.3VS_8
UMA: Stuff 0_8

C214
0_8

C257
*22U/6.3VS_8

C199
*22U/6.3VS_8

C468
*22U/6.3VS_8

C174
*22U/6.3VS_8

C465
0_8

C783
*22U/6.3VS_8

VDDR1

NC_PCIE_VDDR

VDDR1

NC_PCIE_VDDR

VDDR1

NC_PCIE_VDDR

VDDR1

NC_PCIE_VDDR

VDDR1

NC_PCIE_VDDR

VDDR1

NC_PCIE_VDDR

VDDR1

NC_BIF_VDDC

VDDR1

NC_BIF_VDDC

VDDR1

PCIE_PVDD

VDDR1
VDDR1

PCIE_VDDC

VDDR1

PCIE_VDDC

VDDR1

PCIE_VDDC

VDDR1

PCIE_VDDC

VDDR1

PCIE_VDDC

VDDR1

PCIE_VDDC

VDDR1

PCIE_VDDC

VDDR1

PCIE_VDDC

VDDR1

PCIE_VDDC

VDDR1

PCIE_VDDC

VDDR1

PCIE_VDDC

BACO

VDDR1

VDDR1

CORE

VDDR1

L20

VDDR3 : 3.3V @ 60mA

*0_6/S

AA15
AA17
AA20
AA22
AA24
AA27
AB16
AB18
AB21
AB23
AB26
AB28
AC17
AC20
AC22
AC24
AC27
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18

VDDC
VDDC

VDDR1

VDDC

VDDR1

VDDC

VDDR1

VDDC

VDDR1

VDDC

LEVEL
TRANSLATION

VDDC

VDD_CT

VDDC

VDD_CT

VDDC

VDD_CT

VDDC

VDD_CT

VDDC

VDDC

VDDC
VDDC

I/O

+3V_VGA

BIF_VDDC

VDDC

+3V_DELAY

AF23
AF24
AG23
AG24

VDDC

VDDR3

VDDC

VDDR3

VDDC

VDDR3

VDDC

VDDR3

VDDC
VDDC

DVP

C692
*10U/6.3VS_6

C690
*1U/6.3V_4

C243
*1U/6.3V_4

AD12
AF11
AF12
AF13

C691
*1U/6.3V_4

VDDC

VDDR4

L21

VDDC

VDDR4

VDDC

VDDR4

VDDC

AH22
AH27
AH28
M26
N24
R18
R21
R23
R26
T17
T20
T22
T24
U16
U18
U21
U23
U26
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28

VDDC
VDDC

AF15
AG11
AG13
AG15

VDDR4 : 1.8V @ 300mA

*0_6

VDDR4

VDDC

VDDR4

VDDC

VDDR4

VDDC

VDDR4

VDDC

For Sun: NC L21, C213, C222,C240, C231, C323, C322

VDDC

C213
*10U/6.3VS_6

C222
C240
*10U/6.3VS_6 *1U/6.3V_4

C231
C323
C322
*1U/6.3V_4*0.1U/10V_4 *0.1U/10V_4

VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC

AA13
AB13
AC12
AC15
AD13
AD16
M15
M16
M18
M23
N13
N15
N17
N20
N22
R12
R13
R16
T12
T15
V15
Y13

VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI

Zs^EZdEsZ

AF28
42

VGPU_CORE_SENSE
TP42

VDDCI

VOLTAGE
SENESE

VDDCI

ISOLATED
CORE I/O

FB_VDDC

AG28

FB_VDDCI

AH29

FB_GND

VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI

42

VSS_GPU_SENSE

R269

C369
*10U/6.3VS_6

C368
*10U/6.3VS_6

*0_8
*0_8

+VGA_CORE

+VGA_CORE

C169
C380
C365
C379
C363
C205
C362
C163
C396
C378
*1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4

C325
C680
C676
C364
C377
C348
C326
C327
C226
C361
*1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4

VDDR4

+VDDR4

For Mars: stuff

Rb

VDDR1

C688
C683
C685
C678
C677
*10U/6.3VS_6 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4*0.1U/10V_4

PV change to shortpad

Ra

+1.0V_VGA

VDDR1

VDDC

AF26
AF27
AG26
AG27

C385
C400
C371
C388
*1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4

BIF_VDDC

N27
T27

BIF_VDDC

+1.0V_VGA

C394
C381
C409
C375
C405
C387
C399
C382
C370
*0.1U/10V_4*0.1U/10V_4*0.1U/10V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4

R248

VDDR1

C320
*10U/6.3VS_6

PCIe Digital Power Supply


PCIE_VDDC : 0.935V @ 1.88A (GEN2.0)
PCIE_VDDC : 0.935V @ 2.5A (GEN3.0)

VDDR1

VDDC

*0_6/S

C137
C255
C136
*0.01U/16V_4 *0.1U/10V_4 *1U/6.3V_4

VDDR1

VDDC

VDDC_CT: 1.8V @250mA +1.8V_VDD_CT


L55

G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28

PCIE_VDDC

VDDR1

C465
DISCRETE: Reserve 22U/6.3VS_8
UMA: Stuff 0_8

+1.8V_VGA

AA31
AA32
AA33
AA34
W30
Y31
V28
W29
AB37

VDDCI
VDDCI
VDDCI
VDDCI
VDDCI

C204
C329
C359
C330
C328
C203
C347
C241
C349
C233
*1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4

C215
*10U/6.3VS_6

C331
*10U/6.3VS_6

C223
*10U/6.3VS_6

C194
*10U/6.3VS_6

C202
0_6

Reserve for Drop

C410
0_6

AC7
AD11
AF7
AG10
AJ7
AK8
AL9
G11
G14
G17
G20
G23
G26
G29
H10
J7
J9
K11
K13
K8
L12
L16
L21
L23
L26
L7
M11
N11
P7
R11
U11
U7
Y11
Y7

C247
*10U/6.3VS_6

C321
*10U/6.3VS_6

C234
*10U/6.3VS_6

C345
*10U/6.3VS_6

+
C360
2

C401
DISCRETE: Stuff 10U/6.3VS_6
UMA: Stuff 0_6

C408
C493
C711
C474
C504
C751
C344
C503
C716
C477
*1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4

PCIE

I/O power for the


memory interface.

17

VDDR1 , 1.5V @ 2A, GDDR5 900MHz

C202
DISCRETE: Stuff 10U/6.3VS_6
UMA: Stuff 0_6

*330u_2.5V_3528

+1.5V_VGA

+VGA_CORE

VDDCI 0.8-1.15V @ 6A
BIF_VDDC

C324
C384
C351
C340
C346
C391
C376
C398
*1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4 *1U/6.3V_4
C413
C401
C412
*22U/6.3VS_8 *1U/6.3V_4 *1U/6.3V_4

C392
0_6

C397
*10U/6.3VS_6

C407
C372
C356
*1U/6.3V_4 *1U/6.3V_4
*10U/6.3VS_6

C392
DISCRETE: Stuff 10U/6.3VS_6
UMA: Stuff 0_6

19,20,21,43
13,15,18,43
14,15,18,25,43
43
42,43

SUN_M2_XT

*SUN_M2_XT

^KD

C403
*10U/6.3VS_6

+1.5V_VGA
+1.0V_VGA
+1.8V_VGA
+3V_VGA
+VGA_CORE

+1.5V_VGA
+1.0V_VGA
+1.8V_VGA
+3V_VGA
+VGA_CORE

Note1. 1. No BACO Support :BIF_VDDC shorts with VDDC (Install Ra)

PX_EN = 0, for Normal Operation


PX_EN = 1, for BACO MODE

2. BACO Support: Refer to the BACO reference


schematics/Application note for detail about BIF_VDDC Rail
if BACO is Supported (Uninstall Ra)

352-(&75;
4XDQWD&RPSXWHU,QF
1%

Size
Custom

Document Number

Rev
1A

SUN_Power & BACO

Date: Tuesday, March 12, 2013


1

Sheet

17

of

43

For Mars : L23, C253, C252

sutff

For Sun: L23 , C247 , C266 , C252

18

NC
+1.0V_VGA

U23H

DPAB_VDD10

PART 8 0F 9

DP_VDDR

L23

D
DP_VDDC
DP_VDDC
DP_VDDC
DP_VDDC

AN24
AP24
AP25
AP26
AU28
AV29

DP_VDDR

DP_VDDC

DP_VDDR

DP_VDDC

DP_VDDR

DP_VDDC

DP_VDDR

NC

+1.8V_VGA

DP_VDDC

DP_VDDR

DP_VDDC

DP_VDDR

L29

DP_VDDC

C293
C297
C296
*10U/6.3VS_6 *1U/6.3V_4 *0.1U/10V_4

DP_VDDR

L28

DP_VDDR

DP_VDDR

DP_VSSR

DP_VDDR

DP_VSSR

DP_VDDR

DP_VSSR

DP_VDDR

DP_VSSR

DP_VDDR

DP_VSSR

DP_VDDR

DP_VSSR

DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR

CALIBRATION

DP_VSSR
DP_VSSR

DP_VSSR
DPAB_CALR

DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR

DPCD_CALR

DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR

R447

*150/F_4 AM39

*0_6

DP GND

DP_VSSR

AW18

+1.0V_VGA

DP_VDDR

DP_VSSR

AW28

AL33
AM33
AK33
AK34
DPEF_VDD10

DP_VSSR

AH34
AJ34
AF34
AG34
AM37
AL38

*0_6

AP13
AT13
AP14
AP15

DP_VDDR

DPEF_VDD18

C253
C252
C266
*0.1U/10V_4 *1U/6.3V_4 *10U/6.3VS_6

DP_VDDR
DP_VDDC

AP20
AP21
AP22
AP23
AU18
AV19

AP31
AP32
AN33
AP33

DP_VDDR

DP_VDDC

For Mars : L29, C297, C296 sutff


For Sun: L29 , C293 , C297 , C296

*0_6

DP_VDDC

DPEF_CALR

DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR

AN27
AP27
AP28
AW24
AW26
AN29
AP29
AP30
AW30
AW32
AN17
AP16
AP17
AW14
AW16
AN19
AP18
AP19
AW20
AW22
AN34
AP39
AR39
AU37
AF39
AH39
AK39
AL34
AV27
AR28
AV17
AR18
AN38
AM35

C303
C302
C305
*0.1U/10V_4 *1U/6.3V_4 *10U/6.3VS_6

For Mars : L28, C303, C302 sutff


For Sun : L28/ C302/C305/C303 NC

For Mars : R447 sutff


For Sun : R447 NC
DB Del R180 and connect to GND directly, for AMD suggestion
13,15,17,43
14,15,17,25,43

+1.0V_VGA
+1.8V_VGA

+1.0V_VGA
+1.8V_VGA

SUN_M2_XT

352-(&75;
4XDQWD&RPSXWHU,QF
1%

Size
Custom

Document Number

Date: Tuesday, March 12, 2013


5

Rev
1A

SUN_DP Powers
Sheet
1

18

of

43

20
20

VMA_RAS0#
VMA_RAS1#

VMA_RAS0#
VMA_RAS1#

20
20

VMA_CAS0#
VMA_CAS1#

VMA_CAS0#
VMA_CAS1#

VMA_WE0#
VMA_WE1#

VMA_WE0#
VMA_WE1#

20
20
20
20

20
20

20
20
20

VMA_CLK0
VMA_CLK0#

VMA_CLK1
VMA_CLK1#

VMA_CLK1
VMA_CLK1#
VMA_WDQS[7..0]

VMA_WDQS[7..0]

20

VMA_RDQS[7..0]

VMA_RDQS[7..0]
20

VMA_DM[7..0]

VMA_DM[7..0]

20

VMA_DQ[63..0]

VMA_DQ[63..0]

20

VMA_MA[14..0]

VMA_MA[14..0]
20
20
20

VMA_BA0
VMA_BA1
VMA_BA2

VMA_BA0
VMA_BA1
VMA_BA2

+1.5V_VGA
C

R324
*40.2/F_4

R323
C473
*1U/6.3V_4

21
21

*100/F_4

PLACE MVREFD DIVIDERS


AND CAPS CLOSE TO ASIC
+1.5V_VGA

R320

C37
C35
A35
E34
G32
D33
F32
E32
D31
F30
C30
A30
F28
C28
A28
E28
D27
F26
C26
A26
F24
C24
A24
E24
C22
A22
F22
D21
A20
F20
D19
E18
C18
A18
F18
D17
A16
F16
D15
E14
F14
D13
F12
A12
D11
F10
A10
C10
G13
H13
J13
H11
G10
G8
K9
K10
G9
A8
C8
E8
A6
C6
E6
A5

DQA0_0

MAA0_0/MAA_0

DQA0_1

MAA0_1/MAA_1

DQA0_2

MAA0_2/MAA_2

DQA0_3

MAA0_3/MAA_3

DQA0_4

MAA0_4/MAA_4

DQA0_5

MAA0_5/MAA_5

DQA0_6

MAA0_6/MAA_6

DQA0_7

MAA0_7/MAA_7

DQA0_8
DQA0_9
DQA0_10
DQA0_11
DQA0_12
DQA0_13
DQA0_14
DQA0_15

MAA1_0/MAA_8
MAA1_1/MAA_9
MAA1_2/MAA_10
MAA1_3/MAA_11
MAA1_4/MAA_12
MAA1_5/MAA_BA2
MAA1_6/MAA_BA0
MAA1_7/MAA_BA1

G24
J23
H24
J24
H26
J26
H21
G21
H19
H20
L13
G16
J16
H16
J17
H17

VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_BA2
VMA_BA0
VMA_BA1

21
21

VMB_RAS0#
VMB_RAS1#

VMB_RAS0#
VMB_RAS1#

21
21

VMB_CAS0#
VMB_CAS1#

VMB_CAS0#
VMB_CAS1#

VMB_WE0#
VMB_WE1#

VMB_WE0#
VMB_WE1#

21
21
21
21

DQA0_16
DQA0_17

WCKA0_0/DQMA_0

DQA0_18

WCKA0B_0/DQMA_1

DQA0_19

WCKA0_1/DQMA_2

DQA0_20

WCKA0B_1/DQMA_3

DQA0_21

WCKA1_0/DQMA_4

DQA0_22

WCKA1B_0/DQMA_5

DQA0_23

WCKA1_1/DQMA_6

DQA0_24

WCKA1B_1/DQMA_7

A32
C32
D23
E22
C14
A14
E10
D9

VMA_DM0
VMA_DM1
VMA_DM2
VMA_DM3
VMA_DM4
VMA_DM5
VMA_DM6
VMA_DM7

DQA0_25
DQA0_26

EDCA0_0/QSA_0

DQA0_27

EDCA0_1/QSA_1

DQA0_28

EDCA0_2/QSA_2

DQA0_29

EDCA0_3/QSA_3

DQA0_30

EDCA1_0/QSA_4

DQA0_31

EDCA1_1/QSA_5

DQA1_0

EDCA1_2/QSA_6

DQA1_1

EDCA1_3/QSA_7

C34
D29
D25
E20
E16
E12
J10
D7

VMA_RDQS0
VMA_RDQS1
VMA_RDQS2
VMA_RDQS3
VMA_RDQS4
VMA_RDQS5
VMA_RDQS6
VMA_RDQS7

VMB_CS0#

VMB_CS0#

VMB_CS1#

VMB_CS1#

21
21

VMB_CKE0
VMB_CKE1

VMB_CKE0
VMB_CKE1

21
21

VMB_CLK0
VMB_CLK0#

VMB_CLK0
VMB_CLK0#

21
21

VMB_WDQS[7..0]

21

VMB_RDQS[7..0]
21

VMB_CLK1
VMB_CLK1#

VMB_CLK1
VMB_CLK1#

21

VMB_WDQS[7..0]
VMB_RDQS[7..0]
VMB_DM[7..0]

VMB_DM[7..0]

21

VMB_DQ[63..0]

21

VMB_MA[14..0]
21
21
21

VMB_DQ[63..0]
VMB_MA[14..0]

VMB_BA0
VMB_BA1
VMB_BA2

VMB_BA0
VMB_BA1
VMB_BA2

DQA1_2
DQA1_3

DDBIA0_0/QSA_0B

DQA1_4

DDBIA0_1/QSA_1B

DQA1_5

DDBIA0_2/QSA_2B

DQA1_6

DDBIA0_3/QSA_3B

DQA1_7

DDBIA1_0/QSA_4B

DQA1_8

DDBIA1_1/QSA_5B

DQA1_9

DDBIA1_2/QSA_6B

DQA1_10

DDBIA1_3/QSA_7B

A34
E30
E26
C20
C16
C12
J11
F8

VMA_WDQS0
VMA_WDQS1
VMA_WDQS2
VMA_WDQS3
VMA_WDQS4
VMA_WDQS5
VMA_WDQS6
VMA_WDQS7

+1.5V_VGA

R304
*40.2/F_4

DQA1_11
DQA1_12

ADBIA0/ODTA0

DQA1_13

ADBIA1/ODTA1

J21 VMA_ODT0
G19 VMA_ODT1

DQA1_14
DQA1_15

CLKA0

DQA1_16

CLKA0B

H27 VMA_CLK0
G27 VMA_CLK0#
R306

DQA1_17
DQA1_18

CLKA1

DQA1_19

CLKA1B

J14 VMA_CLK1
H14 VMA_CLK1#

C448
*1U/6.3V_4

*100/F_4

DQA1_20
DQA1_21

RASA0B

DQA1_22

RASA1B

K23
K19

VMA_RAS0#
VMA_RAS1#

DQA1_23
DQA1_24

CASA0B

DQA1_25

CASA1B

K20
K17

VMA_CAS0#
VMA_CAS1#

K24
K27

VMA_CS0#

PLACE MVREFD DIVIDERS


AND CAPS CLOSE TO ASIC
+1.5V_VGA

DQA1_26
DQA1_27

CSA0B_0

DQA1_28

CSA0B_1

DQA1_29
DQA1_30

CSA1B_0

DQA1_31

CSA1B_1

VMB_ODT0
VMB_ODT1

VMB_ODT0
VMB_ODT1

GDDR5/DDR3

VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ6
VMA_DQ7
VMA_DQ8
VMA_DQ9
VMA_DQ10
VMA_DQ11
VMA_DQ12
VMA_DQ13
VMA_DQ14
VMA_DQ15
VMA_DQ16
VMA_DQ17
VMA_DQ18
VMA_DQ19
VMA_DQ20
VMA_DQ21
VMA_DQ22
VMA_DQ23
VMA_DQ24
VMA_DQ25
VMA_DQ26
VMA_DQ27
VMA_DQ28
VMA_DQ29
VMA_DQ30
VMA_DQ31
VMA_DQ32
VMA_DQ33
VMA_DQ34
VMA_DQ35
VMA_DQ36
VMA_DQ37
VMA_DQ38
VMA_DQ39
VMA_DQ40
VMA_DQ41
VMA_DQ42
VMA_DQ43
VMA_DQ44
VMA_DQ45
VMA_DQ46
VMA_DQ47
VMA_DQ48
VMA_DQ49
VMA_DQ50
VMA_DQ51
VMA_DQ52
VMA_DQ53
VMA_DQ54
VMA_DQ55
VMA_DQ56
VMA_DQ57
VMA_DQ58
VMA_DQ59
VMA_DQ60
VMA_DQ61
VMA_DQ62
VMA_DQ63

VMA_CKE0
VMA_CKE1

VMA_CLK0
VMA_CLK0#

PIN

U23C

VMA_CS1#

VMA_CS1#

For Sun : ALL NC

PIN

PART 3 0F 9

VMA_CS0#

VMA_CS0#

VMA_CKE0
VMA_CKE1

20
20

For Sun : ALL NC

MEMORY INTERFACE A

VMA_ODT0
VMA_ODT1

VMA_ODT0
VMA_ODT1

M13 VMA_CS1#
K16

R135

*40.2/F_4

VMB_DQ0
VMB_DQ1
VMB_DQ2
VMB_DQ3
VMB_DQ4
VMB_DQ5
VMB_DQ6
VMB_DQ7
VMB_DQ8
VMB_DQ9
VMB_DQ10
VMB_DQ11
VMB_DQ12
VMB_DQ13
VMB_DQ14
VMB_DQ15
VMB_DQ16
VMB_DQ17
VMB_DQ18
VMB_DQ19
VMB_DQ20
VMB_DQ21
VMB_DQ22
VMB_DQ23
VMB_DQ24
VMB_DQ25
VMB_DQ26
VMB_DQ27
VMB_DQ28
VMB_DQ29
VMB_DQ30
VMB_DQ31
VMB_DQ32
VMB_DQ33
VMB_DQ34
VMB_DQ35
VMB_DQ36
VMB_DQ37
VMB_DQ38
VMB_DQ39
VMB_DQ40
VMB_DQ41
VMB_DQ42
VMB_DQ43
VMB_DQ44
VMB_DQ45
VMB_DQ46
VMB_DQ47
VMB_DQ48
VMB_DQ49
VMB_DQ50
VMB_DQ51
VMB_DQ52
VMB_DQ53
VMB_DQ54
VMB_DQ55
VMB_DQ56
VMB_DQ57
VMB_DQ58
VMB_DQ59
VMB_DQ60
VMB_DQ61
VMB_DQ62
VMB_DQ63

C5
C3
E3
E1
F1
F3
F5
G4
H5
H6
J4
K6
K5
L4
M6
M1
M3
M5
N4
P6
P5
R4
T6
T1
U4
V6
V1
V3
Y6
Y1
Y3
Y5
AA4
AB6
AB1
AB3
AD6
AD1
AD3
AD5
AF1
AF3
AF6
AG4
AH5
AH6
AJ4
AK3
AF8
AF9
AG8
AG7
AK9
AL7
AM8
AM7
AK1
AL4
AM6
AM1
AN4
AP3
AP1
AP5

DQB0_0

GDDR5/DDR3

L18
L20

MVREFDA

CKEA0

MVREFSA

CKEA1

K21
J20

MAB0_1/MAB_1

DQB0_2

MAB0_2/MAB_2

DQB0_3

MAB0_3/MAB_3

DQB0_4

MAB0_4/MAB_4

DQB0_5

MAB0_5/MAB_5

DQB0_6

MAB0_6/MAB_6

DQB0_7

MAB0_7/MAB_7

DQB0_8

MAB1_0/MAB_8

DQB0_9

MAB1_1/MAB_9

DQB0_10

MAB1_2/MAB_10

DQB0_11

MAB1_3/MAB_11

DQB0_12

MAB1_4/MAB_12

DQB0_13

MAB1_5/BA2

DQB0_14

MAB1_6/BA0

DQB0_15

MAB1_7/BA1

DQB0_16
DQB0_17
DQB0_18
DQB0_19
DQB0_20
DQB0_21
DQB0_22
DQB0_23
DQB0_24

WCKB0_0/DQMB_0
WCKB0B_0/DQMB_1
WCKB0_1/DQMB_2
WCKB0B_1/DQMB_3
WCKB1_0/DQMB_4
WCKB1B_0/DQMB_5
WCKB1_1/DQMB_6
WCKB1B_1/DQMB_7

DQB0_26

EDCB0_0/QSB_0

DQB0_27

EDCB0_1/QSB_1

DQB0_28

EDCB0_2/QSB_2

DQB0_29

EDCB0_3/QSB_3

DQB0_30

EDCB1_0/QSB_4

DQB0_31

EDCB1_1/QSB_5

DQB1_0

EDCB1_2/QSB_6

DQB1_1

L27
N12
AG12

C469
*1U/6.3V_4

*100/F_4

Re R266

*120/F_4

M12
M27
AH12

NC_MEM_CALRN0

WEA0B

NC_MEM_CALRN1

WEA1B

K26
L15

VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_BA2
VMB_BA0
VMB_BA1

H3
H1
T3
T5
AE4
AF5
AK6
AK5

VMB_DM0
VMB_DM1
VMB_DM2
VMB_DM3
VMB_DM4
VMB_DM5
VMB_DM6
VMB_DM7

F6
K3
P3
V5
AB5
AH1
AJ9
AM5

VMB_RDQS0
VMB_RDQS1
VMB_RDQS2
VMB_RDQS3
VMB_RDQS4
VMB_RDQS5
VMB_RDQS6
VMB_RDQS7

G7
K1
P1
W4
AC4
AH3
AJ8
AM3

VMB_WDQS0
VMB_WDQS1
VMB_WDQS2
VMB_WDQS3
VMB_WDQS4
VMB_WDQS5
VMB_WDQS6
VMB_WDQS7

T7
W7

VMB_ODT0
VMB_ODT1

L9
L8

VMB_CLK0
VMB_CLK0#

EDCB1_3/QSB_7

DQB1_2
DQB1_3

DDBIB0_0/QSB_0B

DQB1_4

DDBIB0_1/QSB_1B

DQB1_5

DDBIB0_2/QSB_2B

DQB1_6

DDBIB0_3/QSB_3B

DQB1_7

DDBIB1_0/QSB_4B

DQB1_8

DDBIB1_1/QSB_5B

DQB1_9

DDBIB1_2/QSB_6B

DQB1_10

DDBIB1_3/QSB_7B

DQB1_11
DQB1_12

ADBIB0/ODTB0

DQB1_13

ADBIB1/ODTB1

DQB1_14
DQB1_15

CLKB0

DQB1_16

CLKB0B

DQB1_17
DQB1_18

CLKB1

DQB1_19

CLKB1B

AD8 VMB_CLK1
AD7 VMB_CLK1#

DQB1_20
DQB1_21

RASB0B

DQB1_22

RASB1B

T10
Y10

VMB_RAS0#
VMB_RAS1#

DQB1_23
DQB1_24

CASB0B

DQB1_25

CASB1B

W10 VMB_CAS0#
AA10 VMB_CAS1#

DQB1_26
DQB1_27

CSB0B_0

DQB1_28

CSB0B_1

P10
L10

VMB_CS0#

DQB1_29
DQB1_30

CSB1B_0

DQB1_31

CSB1B_1

MVREFDB

CKEB1

AD10 VMB_CS1#
AC10
U10 VMB_CKE0
AA11 VMB_CKE1

MVREFSB
WEB0B

R321

P8
T9
P9
N7
N8
N9
U9
U8
Y9
W9
AC8
AC9
AA7
AA8
Y8
AA9

DQB0_25

CKEB0

Y12
MVREFDB
MVREFSB AA12

VMA_CKE0
VMA_CKE1

MAB0_0/MAB_0

DQB0_1

*40.2/F_4
MVREFDA
MVREFSA

19

U23D

PART 4 0F 9

MEMORY INTERFACE B

20
20

VMA_WE0#
VMA_WE1#

WEB1B

N10 VMB_WE0#
AB11 VMB_WE1#
need check

R128

NC_MEM_CALRN2
NC_MEM_CALRP1

MAA0_8/MAA_13

MEM_CALRP0

MAA1_8/MAA_14

MEM_CALRP2

MAA0_9/MAA_15
MAA1_9/RSVD

H23 VMA_MA13
J19 VMA_MA14
M21
TP62
M20
TP61

C149
*1U/6.3V_4

MAB0_8/MAB_13

*100/F_4

MAB1_8/MAB_14
MAB0_9/MAB_15
MAB1_9/RSVD
DRAM_RST

For MARS / SUN


Re stuff 120 ohm 1%

T8
VMB_MA13
W8 VMB_MA14
U12
TP56
V12
TP55
AH11

DRAM_RST

J19
For Mars : MAA_14
For Sun : NC
SUN_M2_XT
SUN_M2_XT

*SUN_M2_XT

M21
For Mars : MAA_15
For Sun : NC
M20
For Mars : RSVD
For Sun : NC

DRAM_RST

R136

*10/F_4
R142

R137
*4.99K/F_4

DRAM_RST_M
*51_4

DRAM_RST_M

20,21

C173
*120P/50V_4

17,20,21,43

+1.5V_VGA

352-(&75;
4XDQWD&RPSXWHU,QF

+1.5V_VGA

1%

Size
Custom

Document Number

Rev
1A

SUN_MEM_Interface

Date: Tuesday, March 12, 2013


1

Sheet

19

of

43

20

CHANNEL A: 256MB/512MB DDR3


19,20
19

VMA_MA[14..0]

VMA_MA[14..0]
VMA_DM[7..0]

19
19
19

VMA_DQ[63..0]
VMA_WDQS[7..0]
VMA_RDQS[7..0]
U15

U26

19,20
19,20
19,20
19,20
19,20
19,20
19,20
19,20
19,20
19,20
19,20
19,20
19,20
19,20
19,20

VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14

19
19
19

19
19
19

19
19
19
19
19

VREFC_VMA1
VREFD_VMA1

M9
H2

VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14

N4
P8
P4
N3
P9
P3
R9
R3
T9
R4
L8
R8
N8
T4
T8
M8

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15/BA3

M3
N9
M4

VMA_BA0
VMA_BA1
VMA_BA2

BA0
BA1
BA2

J8
K8
K10

VMA_CLK0
VMA_CLK0#
VMA_CKE0

CK
CK
CKE/CKE0

K2
L3
J4
K4
L4

VMA_ODT0
VMA_CS0#
VMA_RAS0#
VMA_CAS0#
VMA_WE0#

VMA_DM0
VMA_DM2

E8
D4

VMA_WDQS0
VMA_WDQS2

G4
B8

DML
DMU
DQSL
DQSU

T3

DRAM_RST_M
VMA_ZQ1

L9

R477
*243/F_4

A1
T1
A11
T11

Should be 240
Ohms +-1%

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

RESET
ZQ/ZQ0

VDD#B3
VDD#D10
VDD#G8
VDD#K3
VDD#K9
VDD#N2
VDD#N10
VDD#R2
VDD#R10

VSS#A10
VSS#B4
VSS#E2
VSS#G9
VSS#J3
VSS#J9
VSS#M2
VSS#M10
VSS#P2
VSS#P10
VSS#T2
VSS#T10

NC
NC
NC
NC

VSSQ#B2
VSSQ#B10
VSSQ#D2
VSSQ#D9
VSSQ#E3
NC/ODT1
VSSQ#E9
NC/CS1
VSSQ#F10
NC/CE1
VSSQ#G2
NC/ZQ1
VSSQ#G10

J2
L2
J10
L10

D8
C4
C9
C3
A8
A3
B9
A4

VREFC_VMA2
VREFD_VMA2

M9
H2

VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14

N4
P8
P4
N3
P9
P3
R9
R3
T9
R4
L8
R8
N8
T4
T8
M8

VMA_BA0
VMA_BA1
VMA_BA2

M3
N9
M4

VMA_DQ20
VMA_DQ19
VMA_DQ23
VMA_DQ17
VMA_DQ22
VMA_DQ16
VMA_DQ21
VMA_DQ18
+1.5V_VGA

ODT/ODT0 VDDQ#A2
CS /CS0
VDDQ#A9
RAS
VDDQ#C2
CAS
VDDQ#C10
WE
VDDQ#D3
VDDQ#E10
VDDQ#F2
DQSL
VDDQ#H3
DQSU
VDDQ#H10

F4
C8

VMA_RDQS0
VMA_RDQS2

19,21

VREFCA
VREFDQ

VMA_DQ0
VMA_DQ6
VMA_DQ2
VMA_DQ7
VMA_DQ3
VMA_DQ4
VMA_DQ1
VMA_DQ5

B3
D10
G8
K3
K9
N2
N10
R2
R10

VMA_CLK0
VMA_CLK0#
VMA_CKE0

+1.5V_VGA

A2
A9
C2
C10
D3
E10
F2
H3
H10
A10
B4
E2
G9
J3
J9
M2
M10
P2
P10
T2
T10

J8
K8
K10

VMA_ODT0
VMA_CS0#
VMA_RAS0#
VMA_CAS0#
VMA_WE0#

K2
L3
J4
K4
L4

VMA_RDQS1
VMA_RDQS3

F4
C8

VMA_DM1
VMA_DM3

E8
D4

VMA_WDQS1
VMA_WDQS3

G4
B8

T3

DRAM_RST_M

B2
B10
D2
D9
E3
E9
F10
G2
G10

VMA_ZQ2

L9

R334
*243/F_4

A1
T1
A11
T11

Should be 240
Ohms +-1%

J2
L2
J10
L10

100-BALL
SDRAM DDR3
*H5TC2G63FFR-11C

VREFCA
VREFDQ

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15/BA3

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

CK
CK
CKE/CKE0

VDD#B3
VDD#D10
VDD#G8
VDD#K3
VDD#K9
VDD#N2
VDD#N10
VDD#R2
VDD#R10

ODT/ODT0 VDDQ#A2
CS /CS0
VDDQ#A9
RAS
VDDQ#C2
CAS
VDDQ#C10
WE
VDDQ#D3
VDDQ#E10
VDDQ#F2
DQSL
VDDQ#H3
DQSU
VDDQ#H10

DQSL
DQSU

RESET
ZQ/ZQ0

E4
F8
F3
F9
H4
H9
G3
H8

VMA_DQ11
VMA_DQ12
VMA_DQ15
VMA_DQ10
VMA_DQ14
VMA_DQ8
VMA_DQ13
VMA_DQ9

D8
C4
C9
C3
A8
A3
B9
A4

VMA_DQ27
VMA_DQ29
VMA_DQ26
VMA_DQ28
VMA_DQ25
VMA_DQ30
VMA_DQ24
VMA_DQ31

VSS#A10
VSS#B4
VSS#E2
VSS#G9
VSS#J3
VSS#J9
VSS#M2
VSS#M10
VSS#P2
VSS#P10
VSS#T2
VSS#T10

NC
NC
NC
NC

VSSQ#B2
VSSQ#B10
VSSQ#D2
VSSQ#D9
VSSQ#E3
NC/ODT1
VSSQ#E9
NC/CS1
VSSQ#F10
NC/CE1
VSSQ#G2
NC/ZQ1
VSSQ#G10

B3
D10
G8
K3
K9
N2
N10
R2
R10

R331
*40.2/F_4

+1.5V_VGA

VMA_BA0
VMA_BA1
VMA_BA2

M3
N9
M4

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15/BA3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

E4
F8
F3
F9
H4
H9
G3
H8

VMA_DQ47
VMA_DQ44
VMA_DQ45
VMA_DQ43
VMA_DQ46
VMA_DQ41
VMA_DQ40
VMA_DQ42

D8
C4
C9
C3
A8
A3
B9
A4

VMA_DQ32
VMA_DQ36
VMA_DQ33
VMA_DQ38
VMA_DQ34
VMA_DQ39
VMA_DQ35
VMA_DQ37

U25

+1.5V_VGA

19
19
19

*40.2/F_4

A2
A9
C2
C10
D3
E10
F2
H3
H10

19
19
19
19
19

VMA_CLK0#
VMA_CLK1

J8
K8
K10

VMA_CLK1
VMA_CLK1#
VMA_CKE1

K2
L3
J4
K4
L4

VMA_ODT1
VMA_CS1#
VMA_RAS1#
VMA_CAS1#
VMA_WE1#

R471
*40.2/F_4

BA0
BA1
BA2

VMA_BA0
VMA_BA1
VMA_BA2

M3
N9
M4

+1.5V_VGA

C782

VMA_RDQS5
VMA_RDQS4

F4
C8

VMA_DM5
VMA_DM4

E8
D4

VMA_WDQS5
VMA_WDQS4

G4
B8

CK
CK
CKE/CKE0

B3
D10
G8
K3
K9
N2
N10
R2
R10

VDD#B3
VDD#D10
VDD#G8
VDD#K3
VDD#K9
VDD#N2
VDD#N10
VDD#R2
VDD#R10

+1.5V_VGA

A2
A9
C2
C10
D3
E10
F2
H3
H10

ODT/ODT0 VDDQ#A2
CS /CS0
VDDQ#A9
RAS
VDDQ#C2
CAS
VDDQ#C10
WE
VDDQ#D3
VDDQ#E10
VDDQ#F2
DQSL
VDDQ#H3
DQSU
VDDQ#H10

A10
B4
E2
G9
J3
J9
M2
M10
P2
P10
T2
T10

*0.01U/16V_4

R472
*40.2/F_4
VMA_CLK1#

Vendor

B2
B10
D2
D9
E3
E9
F10
G2
G10

QCI PN

B/S PN

Hynix

(2G)

AKD5MZDTW03

AKD5MZDTW02

Micron

(2G)

AKD5MGSTL17

AKD5MGSTL16

SAMSUNG (2G)

AKD5MGGT535

AKD5MGGT534

Should be 240
Ohms +-1%

DRAM_RST_M

T3

VMA_ZQ3

L9

R326
*243/F_4

A1
T1
A11
T11
J2
L2
J10
L10

DML
DMU
DQSL
DQSU

RESET
ZQ/ZQ0

A10
B4
E2
G9
J3
J9
M2
M10
P2
P10
T2
T10

VSS#A10
VSS#B4
VSS#E2
VSS#G9
VSS#J3
VSS#J9
VSS#M2
VSS#M10
VSS#P2
VSS#P10
VSS#T2
VSS#T10

B2
B10
D2
D9
E3
E9
F10
G2
G10

NC
NC
NC
NC

VSSQ#B2
VSSQ#B10
VSSQ#D2
VSSQ#D9
VSSQ#E3
NC/ODT1
VSSQ#E9
NC/CS1
VSSQ#F10
NC/CE1
VSSQ#G2
NC/ZQ1
VSSQ#G10

VMA_CLK1
VMA_CLK1#
VMA_CKE1

J8
K8
K10

VMA_ODT1
VMA_CS1#
VMA_RAS1#
VMA_CAS1#
VMA_WE1#

K2
L3
J4
K4
L4

VMA_RDQS6
VMA_RDQS7

F4
C8

VMA_DM6
VMA_DM7

E8
D4

VMA_WDQS6
VMA_WDQS7

G4
B8

T3

DRAM_RST_M

Should be 240
Ohms +-1%

VMA_ZQ4

L9

R476
*243/F_4

A1
T1
A11
T11
J2
L2
J10
L10

100-BALL
SDRAM DDR3
*H5TC2G63FFR-11C

QCI PN

AKD5PGWTW07

(4G)

AKD5PZSTL01

AKD5PZSTL00

SAMSUNG (4G)

AKD5PZDT501

AKD5PZDT500

(4G)

Micron

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15/BA3

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D8
C4
C9
C3
A8
A3
B9
A4

VMA_DQ60
VMA_DQ59
VMA_DQ63
VMA_DQ58
VMA_DQ61
VMA_DQ56
VMA_DQ62
VMA_DQ57
+1.5V_VGA

BA0
BA1
BA2

CK
CK
CKE/CKE0

VDD#B3
VDD#D10
VDD#G8
VDD#K3
VDD#K9
VDD#N2
VDD#N10
VDD#R2
VDD#R10

ODT/ODT0 VDDQ#A2
CS /CS0
VDDQ#A9
RAS
VDDQ#C2
CAS
VDDQ#C10
WE
VDDQ#D3
VDDQ#E10
VDDQ#F2
DQSL
VDDQ#H3
DQSU
VDDQ#H10
DML
DMU

VSS#A10
VSS#B4
VSS#E2
VSS#G9
VSS#J3
VSS#J9
VSS#M2
VSS#M10
VSS#P2
VSS#P10
VSS#T2
VSS#T10

DQSL
DQSU

RESET
ZQ/ZQ0
NC
NC
NC
NC

VSSQ#B2
VSSQ#B10
VSSQ#D2
VSSQ#D9
VSSQ#E3
VSSQ#E9
VSSQ#F10
VSSQ#G2
VSSQ#G10

NC/ODT1
NC/CS1
NC/CE1
NC/ZQ1

B3
D10
G8
K3
K9
N2
N10
R2
R10
+1.5V_VGA

A2
A9
C2
C10
D3
E10
F2
H3
H10

A10
B4
E2
G9
J3
J9
M2
M10
P2
P10
T2
T10
B2
B10
D2
D9
E3
E9
F10
G2
G10

B/S PN

AKD5PGWTW08

Hynix

VREFCA
VREFDQ

VMA_DQ49
VMA_DQ52
VMA_DQ50
VMA_DQ54
VMA_DQ51
VMA_DQ53
VMA_DQ48
VMA_DQ55

100-BALL
SDRAM DDR3
*H5TC2G63FFR-11C

+1.5V_VGA

+1.5V_VGA

+1.5V_VGA

R325
*4.99K/F_4

C797
*0.1U/10V_4

R484
*4.99K/F_4

VREFD_VMA2

R319
*4.99K/F_4

+1.5V_VGA

R474
*4.99K/F_4

VREFC_VMA3

VREFD_VMA3

R475
*4.99K/F_4

VREFC_VMA4

R482
*4.99K/F_4

R333
*4.99K/F_4

C517
*0.1U/10V_4

C815
*0.1U/10V_4

R327
*4.99K/F_4

R481
*4.99K/F_4

C482
*0.1U/10V_4

C800
*0.1U/10V_4

R322
*4.99K/F_4

R473
*4.99K/F_4

C472
*0.1U/10V_4

VREFD_VMA4

R479
*4.99K/F_4

C787
*0.1U/10V_4

C792
*0.1U/10V_4

+1.5V_VGA
+1.5V_VGA

C823
*1U/6.3V_4

C822
*1U/6.3V_4

C802
*1U/6.3V_4

C806
*1U/6.3V_4

C816
*1U/6.3V_4

C818
*1U/6.3V_4

+1.5V_VGA

C817
*1U/6.3V_4

C522
*10U/6.3VS_6

C509
*1U/6.3V_4

C470
*1U/6.3V_4

C507
*1U/6.3V_4

C508
*1U/6.3V_4

C511
*1U/6.3V_4

C471
*1U/6.3V_4

C510
*1U/6.3V_4

C520
*1U/6.3V_4

C487
*10U/6.3VS_6

C466
*1U/6.3V_4

+1.5V_VGA

C461
*1U/6.3V_4

C490
*1U/6.3V_4

C491
*1U/6.3V_4

C506
*1U/6.3V_4

C475
*1U/6.3V_4

C478
*1U/6.3V_4

C496
*1U/6.3V_4

C796
*10U/6.3VS_6

C812
*1U/6.3V_4

C807
*1U/6.3V_4

C501
*1U/6.3V_4

C814
*1U/6.3V_4

C809
*1U/6.3V_4

C810
*1U/6.3V_4

C811
*1U/6.3V_4

C500
*0.1U/10V_4

C808
*0.1U/10V_4

C499
*0.1U/10V_4

C483
*0.1U/10V_4

C781
C784
*0.1U/10V_4 *0.1U/10V_4

C805
*1U/6.3V_4

+1.5V_VGA
+1.5V_VGA

C801
*0.1U/10V_4

N4
P8
P4
N3
P9
P3
R9
R3
T9
R4
L8
R8
N8
T4
T8
M8

E4
F8
F3
F9
H4
H9
G3
H8

VREFD_VMA1

+1.5V_VGA

C798
*0.1U/10V_4

VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14

VMA_CLK1_COMM

+1.5V_VGA

R332
*4.99K/F_4

R483
*4.99K/F_4

VREFC_VMA1

C821
*1U/6.3V_4

M9
H2

For Test

VREFC_VMA2

C793
*10U/6.3VS_6

VREFC_VMA4
VREFD_VMA4

+1.5V_VGA

R478
*4.99K/F_4

R480
*4.99K/F_4

*0.01U/16V_4

R330

Vendor

+1.5V_VGA

N4
P8
P4
N3
P9
P3
R9
R3
T9
R4
L8
R8
N8
T4
T8
M8

C516

VMA_CLK0_COMM

100-BALL
SDRAM DDR3
*H5TC2G63FFR-11C

VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_MA13
VMA_MA14

VREFCA
VREFDQ

VMA_CLK0
+1.5V_VGA

BA0
BA1
BA2

DML
DMU

M9
H2

VREFC_VMA3
VREFD_VMA3

U16

E4
F8
F3
F9
H4
H9
G3
H8

C819
*0.1U/10V_4

C820
*0.1U/10V_4

C804
*0.1U/10V_4

C799
*0.1U/10V_4

C824
C803
*0.1U/10V_4 *0.1U/10V_4

C512
*0.1U/10V_4

C514
*0.1U/10V_4

C479
*0.1U/10V_4

C505
*0.1U/10V_4

C498
*0.1U/10V_4

C513
*0.1U/10V_4

C494
C515
*0.1U/10V_4 *0.1U/10V_4

C492
*0.1U/10V_4

C486
*0.1U/10V_4

+1.5V_VGA

C495
*0.1U/10V_4

C467
*0.1U/10V_4

C463
*0.1U/10V_4

C497
*0.1U/10V_4

C502
C480
*0.1U/10V_4 *0.1U/10V_4

C813
*0.1U/10V_4

C786
*0.1U/10V_4

17,19,21,43

+1.5V_VGA

352-(&75;
4XDQWD&RPSXWHU,QF

+1.5V_VGA

1%

Size
Custom

Document Number

Rev
3A

VRAM-A (DDR3 BGA96)

Date: Tuesday, March 12, 2013


5

Sheet

20

of

43

21
19,21
19

VMB_MA[14..0]

VMB_MA[14..0]
VMB_DM[7..0]

19
19
19

VMB_DQ[63..0]
VMB_WDQS[7..0]
VMB_RDQS[7..0]

CHANNEL B: 256MB/512MB DDR3

U6

U22

U10
VREFC_VMB1
VREFD_VMB1
19,21
19,21
19,21
19,21
19,21
19,21
19,21
19,21
19,21
19,21
19,21
19,21
19,21
19,21
19,21

VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_MA13
VMB_MA14

19
19
19

VMB_BA0
VMB_BA1
VMB_BA2

19
19
19

VMB_CLK0
VMB_CLK0#
VMB_CKE0

19
19
19
19
19

VMB_ODT0
VMB_CS0#
VMB_RAS0#
VMB_CAS0#
VMB_WE0#

M9
H2

VREFCA
VREFDQ

N4
P8
P4
N3
P9
P3
R9
R3
T9
R4
L8
R8
N8
T4
T8
M8

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15/BA3

M3
N9
M4

VMB_ODT0

K2
L3
J4
K4
L4

VMB_DM0
VMB_DM2

VMB_WDQS0
VMB_WDQS2

19,20,21

E8
D4

DML
DMU

G4
B8

VMB_ZQ1

Should be 240
Ohms +-1%
R296
*243/F_4

VSS#A10
VSS#B4
VSS#E2
VSS#G9
VSS#J3
VSS#J9
VSS#M2
VSS#M10
VSS#P2
VSS#P10
VSS#T2
VSS#T10

DQSL
DQSU

T3

DRAM_RST_M

VDD#B3
VDD#D10
VDD#G8
VDD#K3
VDD#K9
VDD#N2
VDD#N10
VDD#R2
VDD#R10

ODT/ODT0 VDDQ#A2
CS /CS0
VDDQ#A9
RAS
VDDQ#C2
CAS
VDDQ#C10
WE
VDDQ#D3
VDDQ#E10
VDDQ#F2
DQSL
VDDQ#H3
DQSU
VDDQ#H10

F4
C8

RESET

L9

ZQ/ZQ0

A1
T1
A11
T11

NC
NC
NC
NC

J2
L2
J10
L10

E4
F8
F3
F9
H4
H9
G3
H8

VMB_DQ4
VMB_DQ0
VMB_DQ6
VMB_DQ1
VMB_DQ5
VMB_DQ3
VMB_DQ7
VMB_DQ2

D8
C4
C9
C3
A8
A3
B9
A4

VMB_DQ21
VMB_DQ23
VMB_DQ17
VMB_DQ22
VMB_DQ16
VMB_DQ19
VMB_DQ18
VMB_DQ20

U24

+1.5V_VGA

CK
CK
CKE/CKE0

VMB_RDQS0
VMB_RDQS2

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

BA0
BA1
BA2

J8
K8
K10

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

NC/ODT1
NC/CS1
NC/CE1
NC/ZQ1

VSSQ#B2
VSSQ#B10
VSSQ#D2
VSSQ#D9
VSSQ#E3
VSSQ#E9
VSSQ#F10
VSSQ#G2
VSSQ#G10

B3
D10
G8
K3
K9
N2
N10
R2
R10

VREFC_VMB2
VREFD_VMB2

M9
H2

VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_MA13
VMB_MA14

N4
P8
P4
N3
P9
P3
R9
R3
T9
R4
L8
R8
N8
T4
T8
M8
M3
N9
M4

VMB_BA0
VMB_BA1
VMB_BA2

J8
K8
K10

VMB_CLK0
VMB_CLK0#
VMB_CKE0

+1.5V_VGA

A2
A9
C2
C10
D3
E10
F2
H3
H10
A10
B4
E2
G9
J3
J9
M2
M10
P2
P10
T2
T10

19,20,21

B2
B10
D2
D9
E3
E9
F10
G2
G10

VMB_ODT0
VMB_CS0#
VMB_RAS0#
VMB_CAS0#
VMB_WE0#

K2
L3
J4
K4
L4

VMB_RDQS1
VMB_RDQS3

F4
C8

VMB_DM1
VMB_DM3

E8
D4

VMB_WDQS1
VMB_WDQS3

G4
B8

T3

DRAM_RST_M
VMB_ZQ2

L9

R451
*243/F_4

A1
T1
A11
T11

VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15/BA3
BA0
BA1
BA2

CK
CK
CKE/CKE0

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

DQSL
DQSU

RESET
ZQ/ZQ0

VMB_DQ11
VMB_DQ14
VMB_DQ9
VMB_DQ12
VMB_DQ10
VMB_DQ15
VMB_DQ8
VMB_DQ13

D8
C4
C9
C3
A8
A3
B9
A4

VMB_DQ31
VMB_DQ26
VMB_DQ30
VMB_DQ27
VMB_DQ28
VMB_DQ24
VMB_DQ29
VMB_DQ25
+1.5V_VGA

VDD#B3
VDD#D10
VDD#G8
VDD#K3
VDD#K9
VDD#N2
VDD#N10
VDD#R2
VDD#R10

ODT/ODT0 VDDQ#A2
CS /CS0
VDDQ#A9
RAS
VDDQ#C2
CAS
VDDQ#C10
WE
VDDQ#D3
VDDQ#E10
VDDQ#F2
DQSL
VDDQ#H3
DQSU
VDDQ#H10
DML
DMU

E4
F8
F3
F9
H4
H9
G3
H8

VSS#A10
VSS#B4
VSS#E2
VSS#G9
VSS#J3
VSS#J9
VSS#M2
VSS#M10
VSS#P2
VSS#P10
VSS#T2
VSS#T10

B3
D10
G8
K3
K9
N2
N10
R2
R10

VMB_CLK0
+1.5V_VGA

R292

A2
A9
C2
C10
D3
E10
F2
H3
H10

*40.2/F_4

C442

VMB_CLK0_COMM

19
19
19

VMB_CLK1
VMB_CLK1#
VMB_CKE1

19
19
19
19
19

VMB_ODT1
VMB_CS1#
VMB_RAS1#
VMB_CAS1#
VMB_WE1#

M9
H2

VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_MA13
VMB_MA14

N4
P8
P4
N3
P9
P3
R9
R3
T9
R4
L8
R8
N8
T4
T8
M8

VMB_BA0
VMB_BA1
VMB_BA2

M3
N9
M4

J2
L2
J10
L10

100-BALL
SDRAM DDR3
*H5TC2G63FFR-11C

NC
NC
NC
NC
NC/ODT1
NC/CS1
NC/CE1
NC/ZQ1

VSSQ#B2
VSSQ#B10
VSSQ#D2
VSSQ#D9
VSSQ#E3
VSSQ#E9
VSSQ#F10
VSSQ#G2
VSSQ#G10

BA0
BA1
BA2

CK
CK
CKE/CKE0

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

E4
F8
F3
F9
H4
H9
G3
H8

VMB_DQ63
VMB_DQ57
VMB_DQ61
VMB_DQ58
VMB_DQ62
VMB_DQ56
VMB_DQ60
VMB_DQ59

D8
C4
C9
C3
A8
A3
B9
A4

VMB_DQ40
VMB_DQ46
VMB_DQ41
VMB_DQ47
VMB_DQ44
VMB_DQ45
VMB_DQ43
VMB_DQ42

VREFC_VMB4
VREFD_VMB4

M9
H2

VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_MA13
VMB_MA14

N4
P8
P4
N3
P9
P3
R9
R3
T9
R4
L8
R8
N8
T4
T8
M8

VMB_BA0
VMB_BA1
VMB_BA2

M3
N9
M4

VREFCA
VREFDQ

B3
D10
G8
K3
K9
N2
N10
R2
R10

VMB_CLK1
VMB_CLK1#
VMB_CKE1

J8
K8
K10

A2
A9
C2
C10
D3
E10
F2
H3
H10

VMB_ODT1
VMB_CS1#
VMB_RAS1#
VMB_CAS1#
VMB_WE1#

K2
L3
J4
K4
L4

VMB_RDQS6
VMB_RDQS4

F4
C8

A10
B4
E2
G9
J3
J9
M2
M10
P2
P10
T2
T10

VMB_DM6
VMB_DM4

E8
D4

VMB_WDQS6
VMB_WDQS4

G4
B8

+1.5V_VGA

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15/BA3

+1.5V_VGA

VDD#B3
VDD#D10
VDD#G8
VDD#K3
VDD#K9
VDD#N2
VDD#N10
VDD#R2
VDD#R10

ODT/ODT0 VDDQ#A2
CS /CS0
VDDQ#A9
RAS
VDDQ#C2
CAS
VDDQ#C10
WE
VDDQ#D3
VDDQ#E10
VDDQ#F2
DQSL
VDDQ#H3
DQSU
VDDQ#H10

F4
C8

VMB_RDQS7
VMB_RDQS5

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15/BA3

K2
L3
J4
K4
L4

VMB_ODT1

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

E4
F8
F3
F9
H4
H9
G3
H8

VMB_DQ50
VMB_DQ53
VMB_DQ49
VMB_DQ52
VMB_DQ51
VMB_DQ55
VMB_DQ48
VMB_DQ54

D8
C4
C9
C3
A8
A3
B9
A4

VMB_DQ36
VMB_DQ33
VMB_DQ38
VMB_DQ32
VMB_DQ39
VMB_DQ35
VMB_DQ37
VMB_DQ34
+1.5V_VGA

BA0
BA1
BA2

CK
CK
CKE/CKE0

VDD#B3
VDD#D10
VDD#G8
VDD#K3
VDD#K9
VDD#N2
VDD#N10
VDD#R2
VDD#R10

ODT/ODT0 VDDQ#A2
CS /CS0
VDDQ#A9
RAS
VDDQ#C2
CAS
VDDQ#C10
WE
VDDQ#D3
VDDQ#E10
VDDQ#F2
DQSL
VDDQ#H3
DQSU
VDDQ#H10

B3
D10
G8
K3
K9
N2
N10
R2
R10
+1.5V_VGA

A2
A9
C2
C10
D3
E10
F2
H3
H10

*40.2/F_4
VMB_CLK0#
VMB_CLK1

A10
B4
E2
G9
J3
J9
M2
M10
P2
P10
T2
T10

R139
*40.2/F_4

VMB_DM7
VMB_DM5

E8
D4

VMB_WDQS7
VMB_WDQS5

G4
B8

DML
DMU

VSS#A10
VSS#B4
VSS#E2
VSS#G9
VSS#J3
VSS#J9
VSS#M2
VSS#M10
VSS#P2
VSS#P10
VSS#T2
VSS#T10

DQSL
DQSU

C161

VMB_CLK1_COMM

19,20,21

T3

DRAM_RST_M

*0.01U/16V_4

R138

VMB_ZQ3

L9

R208
*243/F_4

A1
T1
A11
T11

Should be 240
Ohms +-1%

*40.2/F_4
VMB_CLK1#

Should be 240
Ohms +-1%

VREFCA
VREFDQ

J8
K8
K10

*0.01U/16V_4

R291

VREFC_VMB3
VREFD_VMB3

B2
B10
D2
D9
E3
E9
F10
G2
G10

RESET
ZQ/ZQ0
NC
NC
NC
NC

J2
L2
J10
L10

NC/ODT1
NC/CS1
NC/CE1
NC/ZQ1

VSSQ#B2
VSSQ#B10
VSSQ#D2
VSSQ#D9
VSSQ#E3
VSSQ#E9
VSSQ#F10
VSSQ#G2
VSSQ#G10

19,20,21

DRAM_RST_M
VMB_ZQ4

L9

R123
*243/F_4

A1
T1
A11
T11

RESET
ZQ/ZQ0
NC
NC
NC
NC

J2
L2
J10
L10

100-BALL
SDRAM DDR3
*H5TC2G63FFR-11C

VSS#A10
VSS#B4
VSS#E2
VSS#G9
VSS#J3
VSS#J9
VSS#M2
VSS#M10
VSS#P2
VSS#P10
VSS#T2
VSS#T10

DQSL
DQSU

T3

Should be 240
Ohms +-1%

B2
B10
D2
D9
E3
E9
F10
G2
G10

DML
DMU

VSSQ#B2
VSSQ#B10
VSSQ#D2
VSSQ#D9
VSSQ#E3
VSSQ#E9
VSSQ#F10
VSSQ#G2
VSSQ#G10

NC/ODT1
NC/CS1
NC/CE1
NC/ZQ1

A10
B4
E2
G9
J3
J9
M2
M10
P2
P10
T2
T10
B2
B10
D2
D9
E3
E9
F10
G2
G10

100-BALL
SDRAM DDR3
*H5TC2G63FFR-11C

100-BALL
SDRAM DDR3
*H5TC2G63FFR-11C

+1.5V_VGA
+1.5V_VGA
+1.5V_VGA

+1.5V_VGA

+1.5V_VGA

+1.5V_VGA

R294
*4.99K/F_4

+1.5V_VGA

R453
*4.99K/F_4

R228
*4.99K/F_4

R206
*4.99K/F_4

R470
*4.99K/F_4

R126
*4.99K/F_4
VREFC_VMB3

VREFC_VMB2
VREFC_VMB1

R295
*4.99K/F_4

C438
*0.1U/10V_4

VREFC_VMB4
R452
*4.99K/F_4

C339
*1U/6.3V_4

C432
*0.1U/10V_4

C341
*0.1U/10V_4

R207
*4.99K/F_4

R469
*4.99K/F_4

C768
*0.1U/10V_4

+1.5V_VGA

C338
*1U/6.3V_4

C336
*1U/6.3V_4

C435
*1U/6.3V_4

C335
*1U/6.3V_4

C343
*1U/6.3V_4

C281
*1U/6.3V_4

+1.5V_VGA

C719
*0.1U/10V_4

C334
*0.1U/10V_4

+1.5V_VGA

C445
*10U/6.3VS_6

C290
*1U/6.3V_4

C779
*10U/6.3VS_6

C720
*1U/6.3V_4

C431
*0.1U/10V_4

C433
*0.1U/10V_4

C342
*0.1U/10V_4

C313
C441
*0.1U/10V_4 *0.1U/10V_4

C721
*0.1U/10V_4

C703
*0.1U/10V_4

C314
*0.1U/10V_4

R129
*4.99K/F_4

C152
*0.1U/10V_4

R122
*4.99K/F_4

+1.5V_VGA

C770
*1U/6.3V_4

C776
*1U/6.3V_4

C416
*1U/6.3V_4

C777
*1U/6.3V_4

C775
*1U/6.3V_4

C773
*1U/6.3V_4

C771
*1U/6.3V_4

C177
*10U/6.3VS_6

+1.5V_VGA

C337
*0.1U/10V_4

R449
*4.99K/F_4

VREFD_VMB3

VREFD_VMB2

VREFD_VMB1

R227
*4.99K/F_4

+1.5V_VGA

R125
*4.99K/F_4

C171
*1U/6.3V_4

C774
*0.1U/10V_4

C772
*0.1U/10V_4

C419
*0.1U/10V_4

C754
C769
*0.1U/10V_4 *0.1U/10V_4

C217
*0.1U/10V_4

C156
*0.1U/10V_4

VREFD_VMB4

R450
*4.99K/F_4

C317
*1U/6.3V_4

C311
*1U/6.3V_4

C182
*1U/6.3V_4

C191
*1U/6.3V_4

C316
*1U/6.3V_4

C404
*1U/6.3V_4

C310
*1U/6.3V_4

C713
*10U/6.3VS_6

C704
*1U/6.3V_4

C712
*1U/6.3V_4

C706
*1U/6.3V_4

C707
*1U/6.3V_4

C185
*1U/6.3V_4

C761
*1U/6.3V_4

C315
*0.1U/10V_4

C309
*0.1U/10V_4

C312
*0.1U/10V_4

C179
*0.1U/10V_4

C181
C180
*0.1U/10V_4 *0.1U/10V_4

C748
*0.1U/10V_4

17,19,20,21,43

+1.5V_VGA

17,19,20,21,43

+1.5V_VGA

C745
*0.1U/10V_4

C758
*0.1U/10V_4

C741
*0.1U/10V_4

C154
*0.1U/10V_4

C184
*0.1U/10V_4

C183
C729
*0.1U/10V_4 *0.1U/10V_4

C155
*1U/6.3V_4

352-(&75;
4XDQWD&RPSXWHU,QF

+1.5V_VGA

+1.5V_VGA
Size
Custom

Document Number

Rev
1A

VRAM-B (DDR3 BGA96)

Date: Tuesday, March 12, 2013


4

C734
*1U/6.3V_4

+1.5V_VGA

1%
5

C710
*0.1U/10V_4

+1.5V_VGA

+1.5V_VGA

C737
*0.1U/10V_4

C145
*0.1U/10V_4

Sheet

21

of

43

22

RTD2136S Power Up Sequence


+3.3V_2136_A

WDd

+1.2V_2136

+3.3V_2136_D

RTD2136 Dual Channel only


23
23
23
23
23
23

R97

1M/F_4
R69
R70
R75
R76

0_4
0_4
0_4
0_4

EDP_TXP0_2136
EDP_TXN0_2136
EDP_TXP1_2136
EDP_TXN1_2136

13
14

SCL1_2136
SDA1_2136

33,34
33,34

MBCLK
MBDATA

MBCLK
MBDATA

R100
R80

7
8
9
10

23
23

*0_4
*0_4

EDIDDATA_2136
EDIDCLK_2136

EDIDDATA_2136
EDIDCLK_2136
SDAT_2136
SCLK_2136

EC

45
46
47
48
49

18
22

LANE0P
LANE0N
LANE1P
LANE1N

RTD2136R
CIICSCL1
CIICSDA1
MIICSDA1
MIICSCL1
MIICSDA0
MIICSCL0
GND

IC
GND VIA*9

PWMOUT
PANEL_VCC
PWMIN

+3V

DP_HPD
TESTMODE
AUX-CH_N
AUX-CH_P

HPD
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23

TXO0TXO0+
TXO1TXO1+
TXO2TXO2+
TXOCTXOC+
TXO3TXO3+
TXE0TXE0+
TXE1TXE1+
TXE2TXE2+
TXECTXEC+
TXE3TXE3+

44

BL_EN

TXOOUT0-_2136
23
TXOOUT0+_2136
23
TXOOUT1-_2136
23
TXOOUT1+_2136
23
TXOOUT223
TXOOUT2+
23
TXOCLKOUT23
TXOCLKOUT+
23
TXEOUT0TXEOUT0+
TXEOUT1TXEOUT1+
TXEOUT2TXEOUT2+
TXECLKOUTTXECLKOUT+

R56

6,11,12

SMB_RUN_DAT

R579

DISP_ON_2136
DPST_PWM_2136

R63

DISP_ON_2136
DPST_PWM_2136

SDA1_2136

R44

R108
R116

*0_4
*0_4

5
6

SDA
SCL

A2
A1
A0

4
8
3
2
1

EDIDDATA_2136
EDIDCLK_2136

23

C141
*0.1U/10V_4

PWM_VADJ

23

Q2
3 *METR3904-G
1

0_4

33

0_4

DPST_PWM

APU_DPST_PWM

R46
100K/F_4

DB change from SMB_PCH_CLK/DAT to SMB_RUN_CLK/DAT

*0_4
*0_4

GND
VCC

23

0_4 12K/F_4

Ws
*0_4/S

R109
R112

WP

23
*0_4

R71

R578

SDAT_2136
SCLK_2136

23
23

LVDS_BLON_2136

R43

SCL1_2136

*0_4/S

+3V

U4

*M24C02
Should be using M24C64
LVDS_BLON_2136

Use 1% Res on R5553


SMB_RUN_CLK

Reserve

23
23
23
23
23
23

WDd

SMBUS
6,11,12

<=100ms

19
20
21

EDP_TXP0
EDP_TXN0
EDP_TXP1
EDP_TXN1

EDP_AUXN_2136
EDP_AUXP_2136

DP_REXT

EDP_TXP0
EDP_TXN0
EDP_TXP1
EDP_TXN1

0.1U/10V/X7R_4
0.1U/10V/X7R_4

12

EDP_AUXN
EDP_AUXP

4
4
4
4

C97
C98

DP_GND

4
4

1
2
3
4

1M/F_4

R98

DP_V33

EDP_HPD_2136

SWR_VDD
PVCC

U3

DP_V12
SWR_VCCK
VCCK

17

100k/F_4

11
15
43

DP2LVDS VCC

R67

EDP_AUXN
EDP_AUXP

EDDID EEPROM
VCC

+SWR_LX

SWR_LX

EDP_AUXN_R
EDP_AUXP_R
EDP_TXP0_R
EDP_TXN0_R
EDP_TXP1_R
EDP_TXN1_R

GND

EDP_AUXN_R
EDP_AUXP_R
EDP_TXP0_R
EDP_TXN0_R
EDP_TXP1_R
EDP_TXN1_R

*0_4
*0_4
*0_4
*0_4
*0_4
*0_4

16

R91
R92
R83
R84
R86
R87

*10K/F_4
R90

*2.2k_4
R94

+3V

+1.5V

RTD2136R combined level shift already


B

L69: need use CV-4709MN00


+3V

R115

4.7K_4

SCLK_2136

R107

*4.7K_4

SDAT_2136

+SWR_LX

for Vendor suggestion

+1.2V_2136
L16

Close to Pin11
4.7UH_1A
4,23

EDP_HPD

EDP_HPD

R60

1K/F_4 EDP_HPD_2136

R114

*4.7K_4

R12
100k/F_4

R106

RTD2136R
R107;R114: NA
R106;R115: Stuff

R58

C104

C91

C90

C84

22U/6.3VS_6

0.1U/10V/X7R_4 0.1U/10V/X7R_4 0.1U/10V/X7R_4

*0_8

4.7K_4

Close to Pin17

Close to Pin43

SWR: Stuff L5066


LDO: Stuff R9098

Dd
+3V

+3.3V_2136_D
+3.3V_2136_D

L10

+3V

+3.3V_2136_A
L18

PBY160808T-600Y-N(60,3A)
C66
USING 60R 1A

C72

C81

PBY160808T-600Y-N(60,3A)
C74

C77

C94

10U/6.3V_6 0.1U/10V/X7R_4 0.1U/10V/X7R_4


0.1U/10V/X7R_4

CLOSE TO Pin22

C114
10U/6.3V_6

22U/6.3VS_6

C106

0.1U/10V/X7R_4 0.1U/10V/X7R_4

352-(&75;
4XDQWD&RPSXWHU,QF

Close to Pin18
C2142 close to IC side
Close to Pin5

1%

Size
Custom

Document Number

Rev
1A

LVDS converter RTD2136

Date: Tuesday, March 12, 2013

Sheet
1

22

of

43

*0_4/S PN_BLON
D1

R59

EMU_LID

LVDS_BLON1

C2

R54

BLON_CON
MEK500V-40

22P/50V_4

R1

100K/F_4

22
22

1K/F_4

R47

R23
R24

23

EDIDCLK
EDIDDATA

4.7K_4
4.7K_4

RF

TXOCLKOUT+
TXOCLKOUTTXOOUT2+
TXOOUT2-

22
TXOCLKOUT+
22
TXOCLKOUTTXOOUT2+
TXOOUT2-

+3V

TXECLKOUTTXECLKOUT+
TXEOUT0+
TXEOUT0TXEOUT1+
TXEOUT1TXEOUT2+
TXEOUT2-

22
TXECLKOUT22
TXECLKOUT+
22
TXEOUT0+
22
TXEOUT022
TXEOUT1+
22
TXEOUT122
TXEOUT2+
22
TXEOUT2-

LVDS_BLON1

C26
*10P/50V_4

C27
*10P/50V_4

+3VLCD_CON

100K/F_4

USBP8-

+VIN_BLIGHT

R41

R42

+3V

*0_6

0_6
EDIDCLK
EDIDDATA
C28
TXOOUT01000P/50V_4TXOOUT0+
TXOOUT1TXOOUT1+

&WK^Z

R3
301/F_4

TXOOUT2TXOOUT2+

&>s^K^Z

TXOCLKOUTTXOCLKOUT+

C8
15P/50V_4

TXEOUT0TXEOUT0+

&WK^Z
&>s^K^Z

100mA

+VIN_BLIGHT

R8
4,22

+VIN

L3

0_8

L1

0_8

+3V

R5

C3

0.01U/25V_4

TXEOUT2TXEOUT2+

C6
*0.01U/16V_4

+VIN

TXECLKOUTTXECLKOUT+

+3V_CAM

*0_4/S

27
27

0.1U/25V_4

0_4

+VIN_BLIGHT

C1

*0_4 EDP_HPD_R

R9

EDP_HPD

TXEOUT1TXEOUT1+

DIGITAL_D1
DIGITAL_CLK

C9
*4.7U/6.3V_6

DIGITAL_CLK_L
+3V_CAM
1
2
USBP8-_R
USBP84
3
USBP8+_R
USBP8+
L2
VADJ1
MCM2012B900GBE-90
BLON_CON
+VIN_BLIGHT

L4
TB160808U301N000
C12
*10P/50V_4

6
C13
6
*10P/50V_4

Please note that 2011 camera is +3V a We do not need to use 5V -> 3.95V regulator!

C7
4.7U/25V_8

C16
0.1U/25V_4

C21
0.1U/25V_4

C11
0.1U/25V_4

C15
0.1U/25V_4

22
22
22
22

C24

EDP_TXP0_R
TXOOUT0+_2136
TXOOUT0-_2136
EDP_TXN0_R

R15
R18

TXOOUT0+
TXOOUT0C25

*0.1U/10V_4

C17

*0.1U/10V_4

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

G_1

G_2

G_3

G_4

CN1
GS12401-1011-9H
DFHS40FS088
GS12407-11141-9H-40P-R

*0.1U/10V_4

0_4
0_4

G_0

33



G_5

LID Switch

C51*0.047U/10V_4
1
2

C50*0.047U/10V_4
1
2

&WK
+3V

22

EDP_TXP1_R
22
TXOOUT1+_2136
22
TXOOUT1-_2136
22
EDP_TXN1_R

R11
R14

TXOOUT1+
TXOOUT1-

0_4
0_4
C22

*0.1U/10V_4

C48

*0.1U/10V_4

R36
R35

*100K_4
*100K_4

EDIDDATA
EDIDCLK

R6
R48

*1K_4
*1K_4

BRIGHT
LVDS_BLON1

+VIN
+3V
C

C5
4.7U/25V_8

R2

BRIGHT

C10
0.1U/25V_4

22
22
22
22

VADJ1

1K/F_4

R4
100K/F_4

EDP_AUXP_R
EDIDCLK_2136
EDIDDATA_2136
EDP_AUXN_R

R33
R34

C49

C4
33P/50V_4

+1.5V

C86
4.7U/6.3V_6

+3VLCD_CON


0_8

+3V

APU_LVDS_BLON

R45
1K/F_4

C73

R89
*2.2K_4

C68
C67
0.01U/16V_4 0.1U/10V_4

ON/OFF

*TI160808U600

GND

1
2

IN

OUT

DISP_ON_L

IN

Q4
*METR3904-G
APU_DISP_ON

C71
10U/6.3V_8

LVDS_BLON

*0_4
+1.5V

+3VLCD_CON
L11

*1U/6.3V_4

1
R101

U2

&>s^KZZZ

+3V
R110
*10K/F_4

R96
*2.2K_4
Q3
*METR3904-G

1
R117

0_4

BRIGHT

0_4

LVDS_BLON1

0_8

DISP_ON_L

DPST_PWM_2136

R32

22

LVDS_BLON_2136

R50

22

DISP_ON_2136

R55

22

R28

*10_4

BRIGHT

LVDS_BLON

R49

*0_4

LVDS_BLON1

DISP_ON

R57

*0_4

DISP_ON_L

DPST_PWM

*0_4

2,4,6,8,9,10,11,12,22,24,25,26,27,29,30,31,32,33,41,42,43
+3V
8,24,25,26,27,30,31,32,41
+5V
34,35,36,37,39,40,41,42,43
+VIN
7,25,30,32,33,34,35
+3VPCU

352-(&75;
4XDQWD&RPSXWHU,QF
1%

Size
Custom

Document Number

Rev
1A

LCD CONN/LID/CAM

Date: Tuesday, March 12, 2013


1

DISP_ON

*IC(5P) G5243AT11U
AL005243001 GMT:G5243AT11U
AL002821000 BCD:AP2821KTR-G1

22

&WKZZZ

+3V
R113
*10K/F_4

R51

*0.1U/10V_4

&WKK
&>s^Z

&WK
W^Z

EDIDCLK
EDIDDATA

0_4
0_4

Sheet

23
8

of

43

CRT PORT

CRT_R

CRT_G

CRT_B

L52

BLM18BA470SN1D

CRT_R1

CRT_G

L51

BLM18BA470SN1D

CRT_G1

L53

BLM18BA470SN1D

CRT_B1

R416R415R417
EC34

EC31

5.6P/16V_4

5.6P/16V_4

EC32

EC33

5.6P/16V_4 5.6P/16V_4

5.6P/16V_4

11

12

CRTDDCDAT2

13

CRTHSYNC

C644

10P/50V_4

14

CRTVSYNC

C641

10P/50V_4

15

CRTDDCCLK2

C646 *470P/50V_4

C642 *470P/50V_4

5.6P/16V_4

17

150/F_4
150/F_4
150/F_4
HSYNC_COM
VSYNC_COM
DDCCLK
DDCDATA

HSYNC_COM
VSYNC_COM
DDCCLK
DDCDATA

6
1
7
2
8
3
+5V_HDMIC 9
4
10
5

EC36
EC35

16

CRT_R

CRT_B

24

^/>D^E
Zd

8
8
8
8

CRT CONN
CN9

EMI

DFDS15FR362
dsub-dsd-15atxb-15p

+5V
U20

C645

0.22U/25V_6

+5V_CRT2

CRT_BYP

7
8
2

+3V

+5V_HDMIC

+5V_HDMIC

MEK500V-40

+5V_CRT2

3
4
5

CRT_R1
CRT_G1
CRT_B1

D7

6
EC30
0.1U/10V_4

VCC_SYNC SYNC_OUT2
SYNC_OUT1
VCC_DDC
BYP
SYNC_IN2
VCC_VIDEO
SYNC_IN1
VIDEO_1
VIDEO_2
VIDEO_3

DDC_IN1
DDC_IN2
DDC_OUT1
DDC_OUT2

GND

16
14

CRT_VSYNC1
CRT_HSYNC1

R414
R413

CRTVSYNC
CRTHSYNC

22_4
22_4

15
13

VSYNC_COM
HSYNC_COM

10
11

+5V_CRT2

R409
2.2K_4

DDCCLK
DDCDATA

9
12

R410
2.2K_4

VGA_DDC_CLK_RT
VGA_DDC_DAT_RT

CRTDDCCLK2
CRTDDCDAT2

TPD7S019-15DBQR
+3V
DDCCLK
DDCDATA

9/27 EMI request

&E

HOLE

HOLE

H2
*O-LX9-1

W,<d

R411
R412

2.7K_4
2.7K_4

CPU BKT

H18
H20
H-TC276BC177IC162D122P2 H-TC276BC177IC162D122P2

VGA BKT

H12
*intel-cpu-bkt2

H15
*H-TC248BC197D150P2

H16
*H-TC248BC197D150P2

H11
*H-TC248BC197D150P2

H24
*H-C87D87N

SPAD1
*SPAD-C236

^/

Ds

352-(&75;
4XDQWD&RPSXWHU,QF

H6
*h-e315x278d110p2

H8
*H-TC354BC315IC150D110P2

1
D

H13
*H-TC354BC315IC150D110P2

H19
*h-tc276bc315d236p2

H3
*H-C197D110P2

H21
*h-c315ic150d110p2

<

d,ZD><d

H23
*h-c197d110p2

EWEDh

H10
H1
H-TC276BC177IC162D122P2 *h-tc256bc276d168x155p2
H22
*H-C315IC150D110P2

H4
*h-c354ic150d110p2

H7
*h-c354ic150d110p2

H5
*h-c354ic150d110p2

H17
*h-tc354bc315ic150d110p2

4
3

1%

Size
Custom

Document Number

Rev
1A

CRT,Hole

Date: Tuesday, March 12, 2013

Sheet

24
8

of

43

'><

PV add

&,

TPM (1.2)

sZdsZdZsZd
+3VS5

25

+3VS5


+3VPCU

+3V

C912
*0.1U/10V_4

+BAT

+3V

U41
29
7

7
15

C531
C560

0.1U/10V_4

R354
R352
R347
R359

LAN_XTAL25_IN
PCH_XTAL25_IN
CLKGEN_RTC_X1
GPU_XTAL27_IN

0.1U/10V_4

+3VLANVCC

+3VS5

R607
R608

+1.8V_VGA
C539

6
5
9
12

33_4
33_4
0_4
*10/F_4

8
3
11

*0_6/S
*0_6/S

GEN_XTAL25_IN 16
GEN_XTAL25_OUT 1

*0.1U/10V_4



U18

25M_A
25M_B
32Khz
27Mhz/NC

+V3.3A
VDD
VBAT

15
2
10

C566

0.1U/10V_4

+3V_RTC_R R348
C535

VDD_RTC_OUT
VDDIO_25M_A
VDDIO_25M_B
GND
VDDIO_27/NC
GND
GND
XTAL_IN
GND
XTAL_OUT

+BAT

360/F_4

22U/6.3VS_6

14

+3V_RTC
7,32

7
13
4
17

R363
*1M/F_4

7,32,33
LAD0
7,32,33
LAD1
7,32,33
LAD2
7,32,33
LAD3
CLK_PCI_TPM

LPCPD#_TPM
SERIRQ

SERIRQ

9
7,33

SLG3NB242

CLKRUN#

+3V

hY/WE

15P/50V_4

2
1

GEN_XTAL25_OUT
C528

*10P/50V_4

LAN_XTAL25_IN

hD

>E

C529

*10P/50V_4

PCH_XTAL25_IN

/^Zd

>

GND
GND
GND
GND

TEST/BADD
CLKRUN#

1
3
12

NC
NC
NC

GPIO
GPIO2
PP
TESTI

XTALI/32K IN
XTALO

10
19
24
5

C916
*0.1U/10V_4

4
11
18
25

LPCPD#_TPM

UHVHUYH
TPM_PP *4.7K/F_4

7
8

TPM_PP

13
14

TPM_XIN
TPM_XOUT

4
3

1
2

4
3

C_TX2_HDMI+ R265

120/F_4

C_TX2_HDMI-

C_TX1_HDMI+ R249

120/F_4

C_TX1_HDMI-

C_TX0_HDMI+ R272

120/F_4

C_TX0_HDMI-

120/F_4

C_TXC_HDMI-

R242

5
4

SDVO_CLK

CN13

HDMI_SCLK
+5V_HDMIC

+5V_HDMIC

4
4
4
4
4
4

2
+3V

EC17
220P/50V_4

SDVO_DATA
+3V

EC15
0.1U/10V_4

R155

HDMI_SDATA

D3
MEK500V-40

2.2K_4

D2
MEK500V-40

R189
2.2K_4

4
4

R185
2.2K_4

C_TXC_HDMI+ 10
C_TXC_HDMI- 12

C_TXC_HDMI+
C_TXC_HDMI-

HDMI_SCLK
R182
100K/F_4

C_TX2_HDMI-

R256

560_4/F

C_TX1_HDMI+

R246

560_4/F

C_TX1_HDMI-

R278

560_4/F

C_TX0_HDMI+

R271

560_4/F

C_TX0_HDMI-

R293

R244

560_4/F

C_TXC_HDMI+

R240

560_4/F

C_TXC_HDMI-

18

VC1
TVM0G5R5M220R

2N7002KDW

2KV ESD protection

100K_4
C428

HDMI_DET

19

HDMI_HPD_L

L56

Q5B



C705
220P/50V_4

Q5A

DDC CLK CE Remote


DDC DATA
NC

2
5
8
11
17

13
14

+5V

HDMI_DET_R

R169

200K/F_4

HP DET

HDMI CONN
VC3
*TVM0G5R5M220R
DFHD19MR283
hdmi-2he1624-000111f-19p

HDMI_DET
D

2N7002KDW

R173
200K/F_4

352-(&75;
4XDQWD&RPSXWHU,QF

0.1U/10V_4

1%

Size
Custom

Document Number

Rev
1A

HDMI

Date: Tuesday, March 12, 2013


1

D2 Shield
D1 Shield
D0 Shield
CK Shield
GND

20
21
22
23

+5V_HDMIC

FUSE1.1A6V_POLY
2
1
F1

+5V

C_TX2_HDMI+

560_4/F

Q11
2N7002K
2

560_4/F

R262

*0_4/S

R268

1A

CK+
CK-

SHELL1
SHELL2
SHELL2
SHELL2

*0_6/S

R282

HDMI_SDATA

HDMI_HPD_CON

*TVM0G5R5M220R

R153
1K/F_4

Check list recommend 604 ohm


4

15
16

HDMI_SCLK
HDMI_SDATA

+5V

HDMI HPD SENSE


VC2

D2+
D2D1+
D1D0+
D0-

2N7002DW

+3V

+5V

1
3
4
6
7
9

C_TX2_HDMI+
C_TX2_HDMIC_TX1_HDMI+
C_TX1_HDMIC_TX0_HDMI+
C_TX0_HDMI-

C_TX2_HDMI+
C_TX2_HDMIC_TX1_HDMI+
C_TX1_HDMIC_TX0_HDMI+
C_TX0_HDMI-

+5V_HDMIC

C914
*12p

*32.768KHZ

Q6

2.2K_4

EMI
request

GHIDXOW

EMI request

C_TXC_HDMI+

R170

C917
*12p

+3V

+3V

%$''
(+)

+,*+

12P/50V_4

DISCRETE HDMI I2C SELECT


Close to HDMI Connector

EC20
0.1U/10V_4

*10M_4

Y6

$GGUHVV

C918
*10P/50V_4

)25(0,

+5V_HDMIC

+3V

R702

GEN_XTAL25_IN

R701

*0_4

R703

^>'&
C553

R700
*4.7K/F_4

C915
*0.1U/10V_4

6
2

Y4
25MHZ +-10PPM

C913
*0.1U/10V_4

*SLB9635TT1.2-FW3.17

R609
*4.7K/F_4

R704
*33_4

VDD
VDD
VDD
VSB

LFRAME#
LRESET#
LPCPD#
SERIRQ

15

CLKRUN#

CLK_PCI_TPM
C552

LAD0
LAD1
LAD2
LAD3
LCLK

22
16
28
27

LFRAME#

7,32,33
LFRAME#
MINI_PCIE_RST#
7,33

C555
2.2U/6.3V_6

26
23
20
17
21

LAD0
LAD1
LAD2
LAD3
CLK_PCI_TPM

Sheet

25
8

of

43

26
6

CLK_PCIE_REQ2#

CLK_PCIE_REQ2#

*0_4/S CLK_PCIE_REQ2#_R

R402

R403

10K_4

+3V

SD_CD#
SD_WP
RTS5227_GPIO

Ws
7

R404

CARD_PCIE_RST#

*0_4/S

Zdiff = 100 ohm

PCIE_TXP3_CARD
PCIE_TXN3_CARD
CLK_PCIE_CARDP
CLK_PCIE_CARDN
PCIE_RXP3_CARD
PCIE_RXN3_CARD

C636
C633

0.1U/10V_4
0.1U/10V_4

PCIE_RXP3_CARD_C
PCIE_RXN3_CARD_C

W'Es/
W

1
2
3
4
5
6

GND

SP6
SP5
SP4
RTS5239 DV33_18
SP3
SP2

7
8
9
10
11
12

25

HSIP
HSIN
REFCLKP
REFCLKN
HSOP
HSON

MS_D1
MS_D0
MS_D2
MS_D3
MS_CLK

SP7

SD_WP

MS_BS

Ws
18
17
16
15
14
13

SD_D2_R
SD_D3_R
SD_CMD_R
DV33_18
SD_CLK_R
SD_D0_R

AV12
RREF
3V3_IN
CARD_3V3
DV12S
SP1

7
7
7
7
7
7

SD_D1
SD_D0
SD_CLK
SD_CMD
SD_D3
SD_D2

Share Pin

Close to chip pin

CLKREQ#
PERST#
MS_INS#
SD_CD#
SP7
GPIO

U19

24
23
22
21
20
19

CLK_PCIE_REQ2#_R

SP1
SP2
SP3
SP4
SP5
SP6

*0_4/S SD_D2
*0_4/S SD_D3
*0_4/S SD_CMD
1U/10V_4
SD_CLK C635
22_4
SD_D0
*0_4/S

R401
R400
R399
R397
R395

Reserve for EMI


SD_D0
SD_D1
SD_D2
SD_D3

C639
5.6P/16V_4

EC27
EC26
EC29
EC28

*5.6P/16V_4
*5.6P/16V_4
*5.6P/16V_4
*5.6P/16V_4

Ws
RTS5239
C

SD_D1_R

R393

*0_4/S

SD / MMC
CARD READER

SD_D1
+3VCARD

C593

C622

SD_D3
SD_CMD

RTS5239_RREF
1
2
C621 *100P/50V_4

Close to chip pin

C627

C628

0.1U/10V_4

4.7U/6.3V_6

*0.1U/10V_4

6.2K/F_4

0.1U/10V_4

C591


R391

CN7

CLOSE CONN
C604

4.7U/6.3V_6

C631

Ws

RTS5239_DV12S

0.1U/10V_4

RTS5239_AV12

+3VCARD

SD_CLK

10U/6.3V_6
SD_D0
SD_D1
SD_D2
SD_WP
SD_CD#

+3V

C619

C625

10U/6.3V_6

0.1U/10V_4

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

DAT3
CMD
VSS1
VDD
CLK
VSS2
DAT0
DAT1
DAT2
W /P
C/D
GND
GND
GND
GND
CARDREADER CONN

+3VCARD

Change footprint to
sdcard-psdbtc-09glbs1nn4h3-11p
B

Touch Screen Connector


+5V

+3V

close to TS connector

Reserve

R602
*0_6

+5V_TS

R605

R603

*0_6

6
6

U31
R600
*0_6

C910
*1U/10V_4

5
4

33
A

TS_ON

*0_4
EC70

TS_ON_R

R601
*0_6

IN

OUT

IN

GND

C911
*1U/10V_4

USBN3USBP3+

USBN3USBP3+

*DLP11SN900HL2L
4
3
1
2

*0.1U/10V_4

+5V_TS

USBN3-_R
USBP3+_R

1
2
3
4
5
6

TS_ON_R
RP20
R606

*0_4

CN21

EC71
*100P/50V_4

*HOUSING 6P

ON/OFF

Touch screen Conn

*IC(5P) G5243AT11U
R604
*100K/F_4

352-(&75;
4XDQWD&RPSXWHU,QF
1%

Size
Custom

Document Number

Rev
1A

RTS5229 & CR SOCKET

Date: Tuesday, March 12, 2013


1

Sheet

26

of

43

+5V_AVDD

C850
1U/6.3V_4

C856
10U/6.3VS_6

8,24,25,26,30,31,32,41
2,4,6,8,9,10,11,12,22,23,24,25,26,29,30,31,32,33,41,42,43
2,4,22,23,32,38,41

HCB1608KF-181T15_6
C886
0.1U/10V_4

C873
10U/6.3VS_6

*AZ2015-01H
C898

AGND
L68
+1.5V_AVDD

+3V
*HCB1608KF-181T15_6

L62

+1.5V

+5V

HCB1608KF-181T15_6
C843
10U/6.3VS_6

U29

+5V_AVDD
U30

5
10P/50V_4

R535

*0_4/S

23

DIGITAL_CLK

R537

100_4

C862

DMIC0

DMIC_CLK_R

DVDD

GPIO1 / DMIC-CLK

10P/50V_4

4
ACZ_SDOUT_AUDIO

ACZ_SDOUT_AUDIO

SDATA-OUT

BIT_CLK_AUDIO
10U/6.3VS_6
R542

ACZ_SDIN0

C866

Close to Pin 9
0.1U/10V_4

SDATA-IN

SYNC
RESETB

*10P/50V_4

12

PCBEEP

34

CPVEE

AMP_BEEP
1U/6.3V_4

35

CAP-

37

MIC1-VREFO-L
MIC1-VREFO-R

CBP
CPVDD

CAP+

MIC2-R (PORTF)
MIC2-L (PORTF)

+3V_DVDD

42

49

+5V_DVDD

25
38
27
39

C884
*0.1U/10V_4

10U/6.3VS_6
10U/6.3VS_6

C846

10U/6.3VS_6

C844

0.1U/10V_4

C845

C869

0.1U/10V_4

AGND

C868

2.2U/6.3V_6

33

HPOUT_R

32

HPOUT_L

10U/6.3VS_6

C848

C897
1U/6.3V_4

AGND

R562

*10K_4 +5V

Close to PIN28
AGND
HPOUT_R

28

AGND SHIELD 72+HDGSKRQHMDFN

HPOUT_L

28

AGND SHIELD

R539

VREFOUT_C

EXT_MIC_R

2.2K_4

C865
1U/6.3V_4

AGND SHIELD

24
23

AGND

DB swap HPOUT_R/L

22
21
20
19
31
30

R560

18
17

MIC_L1

29

VREFOUT_C

*0_4/S

C874

2.2U/6.3V_6

MUTE_LED_CNTL

R549 1K/F_4

30

72$XGLR-DFN0,&
EXT_MIC_R

28

72,QWHUQDO6SHDNHUV

16

AMP_BEEP

C878
0.1U/10V_4

check value
R552

100K/F_4

AMP_BEEP_R2

ALC3227 x QFN48

R546

R547
10K_4
C877
0.1U/10V_4
AMP_BEEP_L

R554
10K_4

C881
0.01U/25V_4

Close to Pin 41

20K/F_4

39.2K/F_4

SENSE_A

28

AGND

Check layout
mount location
COMBO_GPI

ACZ_SPKR

ME2N7002E
Q27

AGND

Close to Pin 13

Close to Pin 46

C882
0.047U/10V_4

Vset=1.242V
28

SENSE_A_1 R548
+5V_DVDD

C896
0.1U/10V_4

EN

0.1U/10V_4

GND

*TPS793475DBVR
HPA01091DBVR

AGND

AGND

+5V_DVDD

L61
HCB1608KF-181T15_6

Vin

BYP

2
C885
*1U/6.3V_4

AGND
C871
C847

Vout

4
C883
*2.2U/6.3V_4

JDREF

SenseB

NC

R_SPK+

15

SPK-R+

MONO-OUT
SenseA

SPK-R-

14

SPK-L-

45

13

44

MIC2-VREFO

SPDIF-OUT/GPIO2

L_SPKR_SPK-

PDB

43

48

Close to Pin 34,35,36

L_SPK+

Close to PIN40

+5V_AVDD

SPK-L+

C851

PVDD2

4.7U/6.3V_6

47

+3V_DVDD

+5V

LINE1-L (PORTC)
LINE1-R (PORTC)
MIC1-R (PORTB)
MIC1-L (PORTB)

36

LINE2-L
LINE2-R

CBN

C852
1U/6.3V_4

AGND

DVDD-IO

11

ACZ_RST#_AUDIO

C859

VREF

HPOUT-R (PORT I)

Digital

ACZ_SYNC_AUDIO
C870

LDO1-CAP
LDO2-CAP

C858

10
6

AVSS1
AVSS2

HPOUT-L (PORT I)

+3V_DVDD

26
40

LDO3-CAP

HD_SDIN0

33_4

BCLK

PVDD1

DVSS

*10P/50V_4

46

C864

41

AVDD1
AVDD2

GPIO0/ DMIC-DATA

C857

DIGITAL_D1

Analog

72'LJLWDO0,&

+5V
+3V
+1.5V

Close to PIN26

C867
0.1U/10V_4

23

27

+5V

>40mils trace

Close to PIN1
+3V_DVDD
L64
HCB1608KF-181T15_6

+3V

L69

AGND

28

PD#

+3V_DVDD

D14

ACZ_RST#_AUDIO

Close to CODEC

R532
1K/F_4

*MEK500V-40
2

L_SPK+
L_SPKR_SPKR_SPK+

PD#
33

VOLMUTE#
D13

2
MEK500V-40

^

<>^W<Z^W<


R533
10K_4

L15
L13
L12
L9

TI160808U600
TI160808U600
TI160808U600
TI160808U600

L_SPK+_R
L_SPK-_R
R_SPK-_R
R_SPK+_R

C75

100P/50V_4
100P/50V_4

ACZ_SDIN0

EC45
*33P/50V_4

0.1U/25V_4

EC47

0.1U/25V_4

EC53

*0.1U/25V_4

EC52

0.1U/25V_4

EC49

0.1U/25V_4

INT SPEAKER CONN

C82

BIT_CLK_AUDIO

EC48

C70

C59

1
2
3
4
CN3
DFHD04MR211
3800-X04N-00X-4P-L

AGND

Close to CODEC
hh
R376

100P/50V_4
100P/50V_4

*0_8/S

AGND

352-(&75;
4XDQWD&RPSXWHU,QF

EC46
*33P/50V_4

1%

FOR EMI

Size
Custom

Document Number

Rev
1A

Azalia ALC3227

Date: Tuesday, March 12, 2013


E

Sheet

27

of

43

28

USB3.0 X 2/USB2.0 COMBO

USB30_TX0-_C C481

C488

USB 3.0

*Clamp-Diode

1A

*Clamp-Diode

USBP10+_C C521

6
6

*Clamp-Diode

USBP10USBP10+

3
2

USB30_RX0-_C
USB30_RX0+_C

MCM2012B900GBE-90
*Clamp-Diode

USB30_RX0-_C C524

USB30_TX0-_C
USB30_TX0+_C

*Clamp-Diode
6
6

R337
R336

USB30_RX0USB30_RX0+

1
2
3
4
5
6
7
8
9

VBUS
DD+
GND
SSRXSSRX+
GND
SSTXSSTX+

*0_4/S
*0_4/S

29,33

USB30_RX0+_C C523

6
6

C519
*15P/50V_4

USBP11-_C

USB30_TX1-_C C450
B

C452

VC4
TVM0G5R5M220R

C489
C485

USB30_TX0USB30_TX0+

0.1U/10V_4
0.1U/10V_4

USB30_TX0-_R
USB30_TX0+_R

R329
R328

6
6

*Clamp-Diode

4
1

USBP11USBP11+

1
2
3
4
5
6
7
8
9

USB30_RX1-_C
USB30_RX1+_C

*Clamp-Diode
USB30_RX1-_C C464

USB30_TX1-_C
USB30_TX1+_C

*Clamp-Diode

6
6

USBP11USB30_RX1+_C C460
R312
*301/F_4

C795

G547N2P81U
C785
1U/6.3V_4
AL0547N2000 GMT:G547N2P81U
AL002820002 BCD:AP2820GMMTR-G1

470P/50V_4
0.1U/10V_4
470P/50V_4

VC5

330U/6.3V
TVM0G5R5M220R

USB30_RX1USB30_RX1+

R315
R314

*0_4/S
*0_4/S

R310
R308

*0_4/S
*0_4/S

CN14
USB3.0 CONN

1
2
3
4
5
6
7
8
9

VBUS
DD+
GND
SSRXSSRX+
GND
SSTXSSTX+

*Clamp-Diode

6
6

C455
*15P/50V_4

C790
C788
C791

13
12
11
10

+5V_USBP0

13
12
11
10

C789
1000P/50V_4

+5V_USBP0
USBP11-_C
USBP11+_C

3
2

MCM2012B900GBE-90
USB30_TX1+_C C443

8
7
6
5

USB 3.0
L37

OUT3
OUT2
OUT1
OC

*0_4/S
*0_4/S

1A

*Clamp-Diode
USBP11+_C C456

VIN1
VIN2
EN
GND

+5V_USBP0

*Clamp-Diode

*Clamp-Diode

U27

2
3
4
1

USBPW_ON#

USBP10R335
*301/F_4

160 mils (Iout=3.7A)

+5VS5

13
12
11
10

CN15
USB3.0 CONN

13
12
11
10

USB30_TX0+_C C476

1
2
3
4
5
6
7
8
9

+5V_USBP0
USBP10-_C
USBP10+_C

L38

4
1

C780
1000P/50V_4

USBP10-_C

C453
C451

USB30_TX1USB30_TX1+

0.1U/10V_4
0.1U/10V_4

USB30_TX1-_R
USB30_TX1+_R

COMBO JACK

L63
27

27

EXT_MIC_R

EXT_MIC_R

EXT_MIC_1
HCB1608KF-601T10

COMBO_GPI

R551

22K/F_4

C875

10U/6.3VS_6

R534
22K/F_4

C841
100P/50V_4

AGND
AGND

AGND SHIELD
AGND SHIELD
AGND SHIELD

27

HPOUT_L

27

HPOUT_R

AGND

AGND

100P/50V_4

AGND

R518

30/F_4

HPOUT_L1

L59

TB160808U301N000

EARP_L1

HPOUT_R

R536

30/F_4

HPOUT_R1

L39

TB160808U301N000

EARP_R1

AGND

AGND

C530

HPOUT_L

C835

*1000P/50V_4

C863

*1000P/50V_4

C526

3
6
1
2
4
5

CN16
AJAK0017-P001A

100P/50V_4

EXT_MIC_1

AGND

SENSE_A

C909
*Clamp-Diode

352-(&75;
4XDQWD&RPSXWHU,QF

27

1%

SI reserve for ESD

Size
Custom

Document Number

Rev
1A

USB/Audio JacK

Date: Tuesday, March 12, 2013

Sheet

28
8

of

43

TP3

For EMI 0 ~ 22 ohm

LAN_YLED#
+1.05V_LAN

LAN_XTAL25_IN

25

'^,

E

'^,

E

* Place Cc,Cd,Ce,Cf

C58
*33P/50V_4

U1

close to each VDD10 pin-- 3, 8, 22, 30


33

For 10/100 NA Ce,Cf


Trace<30 mil
Width > 60 mil

Power trace Layout > 60mil


R418

>60mil
+1.05V_LAN_REGOUT

L54

close to each VDD10 pin-- 8, 30 only,

0_8

+1.05V_LAN

>

+1.05V_LAN

>60mil

*4.7UH,+-20%,650MA_1210
+1.05V_LAN


C654
*4.7U/6.3V_6

C651
0.1U/10V_4

C648
0.1U/10V_4

C18
*0.1U/10V_4


C650
*0.1U/10V_4

C19
*1U/6.3V_4

C649
*1U/6.3V_4

MDI0+
MDI0VDD10
MDI1+
MDI1MDI2+
MDI2VDD10

1
2
3
4
5
6
7
8

ISOLATEB

MDIP0
MDIN0
AVDD10(NC)
MDIP1
RTL
MDIN1
MDIP2(NC) RTL
MDIN2(NC)
AVDD10

REGOUT(NC)
VDDREG(VDD33)
DVDD10(NC)
AKEB
8161GSH/ LANW
ISOLATEB
8166GSH
PERSTB
HSON
HSOP

24
23
22
21
20
19
18
17

MDIP3(NC)
MDIN3(NC)
AVDD33(NC)
CLKREQB
HSIP
HSIN
REFCLK_P
REFCLK_N

C647
0.1U/10V_4
C652
*0.1U/10V_4

GND

W'Es/
W

* Place Cc , Cd

9
10
11
12
13
14
15
16

RTL8166EH-CG

For GbE

MDI3+
MDI3-

Stuff La, Ca ,Cb

For GbE

+3V_LAN

* Place Cg close to each VDD10 pin-- 22 (reserve)

For 10/100
NA: La, Ca ,Cb

PCIE_CLKREQ_LAN#

PCIE_CLKREQ_LAN# R7

0_4

LAN_CLKRQ



29
D

R17
15K/F_4

AVDD33
RSET
AVDD10
CKXTAL2
CKXTAL1
LED0
LED1/GPO
LED2(LED1)

For GbE

C57
*33P/50V_4

R20
1K_4

XTAL2

*25MHz

0_4

RSET
VDD10
XTAL2
XTAL1
LED0
LAN_GLED#_R
LAN_GLED#_R1

R573

>

Y1

if ISOLATEB pin
pull-low,the LAN
chip will not drive
it's PCI-E outputs
( excluding
PCIE_WAKE# pin )

LAN_GLED#

32
31
30
29
28
27
26
25

+3V_LAN

*0_4

+1.05V_LAN_REGOUT
DVDDL
R25
VDD10
PCIE_WAKE#
ISOLATEB
/
C23
$PCIE_RXN1_LAN_L
PCIE_RXP1_LAN_L
C20
1
3
&
, &KZ'/''^,
(
&KZ,
5
6
7


0_4

+1.05V_LAN_REGOUT
+3V_LAN
+1.05V_LAN
PCIE_WAKE#

6,32

LAN_PCIE_RST#
PCIE_RXN1_LAN
PCIE_RXP1_LAN

0.1U/10V_4
0.1U/10V_4

7
7
7

0_4

R572

R30

LANRSET

2.49K/F_4

R26

+3V

DB add for LAN co-lay.

XTAL1

R29
*10_4

LAN_XTAL1

CLK_PCIE_LANN
CLK_PCIE_LANP
PCIE_TXN1_LAN
PCIE_TXP1_LAN

CLK_PCIE_LANN
CLK_PCIE_LANP
PCIE_TXN1_LAN
PCIE_TXP1_LAN

7
7
7
7

For 10/100
* Place Cf close to each VDD10 pin-- 30 (reserve)

LAN conn & Right SIDE USBX1


For 10/100

For 10/100 only

* Stuff Ce and Cf only, close to each VDD33 pin-- 23, 32

MDI0+
L8 4
1
MDI0*MCM2012B900GBE

For GIGA
* Stuff Ca and Cb only, close to each VDD33 pin-- 11, 32

3
2

MDI3MDI3+
MDI2MDI2+

MDI0+
MDI0-

MDI1MDI1+
MDI0MDI0+

SI remove co-lay 0R

LAN CONN
CN2

+3V_LAN
LAN_YLED#
MDI1+
L7 4
1
MDI1*MCM2012B900GBE

+3VLANVCC

3
2

MDI1+
MDI1-

+3VLANVCC
28,33

C69
C31

C14

C29

C30

*0.1U/10V_4

*0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

C76

MDI2+
L6 4
1
MDI2*MCM2012B900GBE

3
2

MDI2+
MDI2-

* Place Cc and Cd close to each VDD33 pin-- 23, 32

C32
*0.1U/10V_4

Remove For Not Using SWR mode

MDI3+
L5 4
1
MDI3*MCM2012B900GBE

For GIGA

3
2

0.1U/10V_4
R582

SI co-lay
6
6

C55

USBPW_ON#

220P/50V_4
+5VS5



*4.7U/6.3V_6

LAN_GLED#

USBPW_ON#

MDI3+
MDI3-

2
3

USBP0-_R
USBP0+_R

MCM2012B900GBE-90

C56

R583

EC3

*0_4

LAN_YLED#
1000P/50V_4
LAN_GLED#
1000P/50V_4

EMI request

Stuff Cc ,Cd

NA:

C80

SI remove co-lay 0R

For 10/100

*10P/50V_4
R52

USBP0*301/F_4

Cc, Cd

2,4,6,8,9,10,11,12,22,23,24,25,26,27,30,31,32,33,41,42,43
25,41

352-(&75;
4XDQWD&RPSXWHU,QF

+3V
+3VLANVCC

1%

Size
Custom

Document Number

Rev
1A

RTL 8105E/RJ45

Date: Tuesday, March 12, 2013


5

L14

1
4

USBP0USBP0+

SI co-lay

*0_4

20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

Sheet

29

of

43

KEYBOARD Con.
33

MX1
MX7
MX6
MY9
MX4
MX5
MY0
MX2
MX3
MY5
MY1
MX0
MY2
MY4
MY7
MY8
MY6
MY3
MY12
MY13
MY14
MY11
MY10
MY15
MY16
MY17

MY[0..17]

MY[0..17]
33

MX[0..7]

MX[0..7]

SATA_LED
A

SATA_LED#

ACC_LED#

R394
1
SATA_R_LED1
LED1
LED 3P WHITE/AMBER

39_6
2

+3V

R396 200/F_6

(Amber)

PV remove C626,C634

33

R172 2
R179 2

CAPSLED#

+3V
1 200/F_6
1 200/F_6

CAPSLED#_R
MUTE_LED_CNTL_R
WIRELESS_ON_R
WIRELESS_OFF_R

+3V

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

+3VPCU

MY6
MY3
MY12
MY13

10
9
8
7
6

RP2

10
9
8
7
6

MY9
MY0
MY5
MY1

RP1

*220P/50V_4
*220P/50V_4
*220P/50V_4
*220P/50V_4

MY8
MY9
MY10
MY11

C143
C92
C211
C196

*220P/50V_4
*220P/50V_4
*220P/50V_4
*220P/50V_4

MY1
MY2
MY4
MY0

C124
C132
C133
C112

*220P/50V_4
*220P/50V_4
*220P/50V_4
*220P/50V_4

MX4
MX6
MX3
MX2

C109
C93
C120
C113

*220P/50V_4
*220P/50V_4
*220P/50V_4
*220P/50V_4

MX7
MX0
MX5
MX1

C88
C123
C108
C89

*220P/50V_4
*220P/50V_4
*220P/50V_4
*220P/50V_4

MY12
MY13
MY14
MY15
MY16
MY17

C175
C176
C195
C212
C221
C235

*220P/50V_4
*220P/50V_4
*220P/50V_4
*220P/50V_4
*220P/50V_4
*220P/50V_4

30
A

1
2
3
4
5

MY15
MY10
MY11
MY14

*10P8R-8.2K

+3VPCU

C119
C158
C159
C142

1
2
3
4
5

MY8
MY7
MY4
MY2

*10P8R-8.2K

+3VPCU

*8.2K_4 MY16
*8.2K_4 MY17

R167
R168
KB CONN
DFFC32FR038
50698-03201-001-32p-l

MUTE_LED_CNTL

.(<%2$5'38//83

MY5
MY6
MY3
MY7

Q7
2N7002K
R158
10K/F_4

27

CN5

+5V

+3V

R178

SI, add Mute LED feature

1K/F_4

+5V

R187
*200_4

R193
1K/F_4

LED2

R186 2
Q8
DRC5144E0L
PWRLED_RIGHT#

33
33

PV remove C638
C632
C637

SATA_LED#
1000P/50V_4
PWRLED_RIGHT#
1000P/50V_4

PV change from

POWER BOTTON CONNECT

33

100mA
1U/10V_4

C101

0.1U/10V_4

1. +3VPCU(LIDSWITCH PWR)
CN4

+3VPCU

33

LID_EC#
NBSWON1#

33

PWR_LED#

PWR_LED_R#
R85

*0_4/S

pv change to shortpad

C100

C99

NBSWON1#
0.1U/10V_4

R290
R297

4.7K_4
4.7K_4

TP_SMB_CLK
TP_SMB_DATA

+3VSUS

1
2
3
4
5
6

close conn

3. LIDSWITCH
+3VSUS

4.POWERON#

R285
R284

TP_SMB_CLK

4.7K_4
4.7K_4

SMB_PCH_CLK

TPCLK
TPDATA

C430

6. GND
33
33

TPCLK
TPDATA

10P/50V_4

L35
L34

CN6

TB160808B470N001(47,300MA)
TB160808B470N001(47,300MA)
C440

25 mils

C439

+3VSUS

C426
*10P/50V_4

TP_SMB_DATA

6
5
4
3
2
1

TPCLK-1
TPDATA-1
TP_SMB_DATA
TP_SMB_CLK

10P/50V_4

C427
*10P/50V_4

TOUCH PAD CONN


DFFC06FR062
88513-0601-6P-L-SMT

SMB_PCH_DAT

PV , HP request Image sensor


SMBUS reserve to PCH

352-(&75;
4XDQWD&RPSXWHU,QF
1%

Size
Custom

Document Number

Rev
1A

LED/KB/SW/TP

Date: Tuesday, March 12, 2013


2

2N7002DW

0.1U/10V_4

7,25,32,33,34,35
+3VPCU
8,24,25,26,27,31,32,41
+5V
41
+3VSUS
2,4,6,8,9,10,11,12,22,23,24,25,26,27,29,31,32,33,41,42,43
+3V

5. PWRLED#

PWR BTN CONN

Q12

change to +3VSUS

2. +3VPCU(LIDSWITCH PWR)

DFFC06FR062
88513-0601-6P-L-SMT
PWR_LED#
0.1U/10V_4
LID_EC#
0.1U/10V_4

C103

WIRELESS_OFF

TOUCH PAD Con.


+3VSUS

33

WIRELESS_OFF_R

*4.7U/6.3V_6

C102

1 *200/F_6

Q9
DRC5144E0L

WIRELESS_ON

from PWR_LED# to PWRLED_RIGHT#

C95

R190 2

PWR_LED

1 *200/F_6
WIRELESS_ON_R

3P WHITE LED

39_4

R398

+3VPCU

Sheet

30
8

of

43

CPU FAN

31

Bypass CAP close conn

CN17

CN8

15
2
3
46

FAN_PWM

FAN_PWM

+5V

5
6

Main HDD

FAN Connect
+3V

DFHD04MR155

R408
4.7K/F_4

FAN1SIG

FAN1SIG

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

SATA_TXP0_C
SATA_TXN0_C

C576
C577

0.01U/25V_4
0.01U/25V_4

SATA_RXN0_C
SATA_RXP0_C

C584
C592

0.01U/25V_4
0.01U/25V_4

SATA_TXP0
SATA_TXN0

C643
*0.1U/10V_4

8
8
SATA_RXN0
SATA_RXP0

8
8

+3V

+5V

+5V

19

33

C291
0.1U/10V_4

33

SATA HDD CONNECTOR

+5V

C640
*2.2U/6.3V_4

SATA HDD(1ST)
DFHS13FS019
sata-ah534-00-13p-r
C895
10U/6.3V_8

C899
4.7U/6.3V_6

C900
0.1U/10V_4

C893
10U/6.3V_8

SATA ODD CONNECTOR


Bypass CAP close conn
CN18

C624
C623

0.01U/25V_4
0.01U/25V_4

SATA_RXN1_C
SATA_RXP1_C

C630
C629

0.01U/25V_4
0.01U/25V_4

SATA_TXP1
SATA_TXN1

Reserve for AMD

8
8

+5V
SATA_RXN1
SATA_RXP1

8
8

ZERO_ODD_DP#
+5V_ODD

R407
*10K/F_4

ZERO_ODD_DA#

ODD_PLUGIN#

Q19
*ME2N7002E

*ME2N7002E
Q31
3

R571

0_4

C906

+3V

R567
1M/F_4

R405
*10K/F_4

Q29
1000P/50V_4

SATA_TXP1_C
SATA_TXN1_C

1
C

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

High : ODD power on


Low : ODD power down

SI reserve

R566

10K/F_4

AO3413
R563
*0_8

19

ODD_DA#_FCH

6
8

DB change

ODD_PWR

R406

*0_4/S

C908

DFHS13FS019
sata-ah534-00-13p-r

SATA ODD

.027U/25V_6

+5V_ODD

ME2N7002E
Q30

DB change from dual-ch to one-ch

120 mils
+5V_ODD
D

C903
10U/6.3V_8

C905
0.1U/10V_4

C901
0.1U/10V_4

C902
0.1U/10V_4

C904
0.1U/10V_4

352-(&75;
4XDQWD&RPSXWHU,QF
1%

Size
Custom

Document Number

Rev
1A

HDD/ODD/FAN

Date: Tuesday, March 12, 2013

Sheet

31
8

of

43

1
D8

9/6 SI for HW.

C105
0.01U/16V_4

R421

7
7
6

51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17

+MINIEC_5V

EC_DEBUG1

PCIE_TXP0_WLAN
PCIE_TXN0_WLAN

PCIE_TXP0_WLAN
PCIE_TXN0_WLAN

PCIE_RXP0_WLAN
PCIE_RXN0_WLAN

PCIE_RXP0_WLAN
PCIE_RXN0_WLAN
CLK_33M_DEBUG

MINI_PCIE_RST#

15
13
11
9
7
5
3
1

CLK_PCIE_WLAN
CLK_PCIE_WLAN#

CLK_PCIE_WLAN
CLK_PCIE_WLAN#
PCIE_CLKREQ_WLAN#
8
BT_COMBO_EN#

C78
0.1U/10V_4

C79
0.1U/10V_4

C673
0.1U/10V_4

C664
10U/6.3VS_6

*0_6

33

C107
10U/6.3VS_6

+3V_AOAC

CN11

2
2

C96
0.1U/10V_4

+1.5V

EC debug pin

2
2

32

+3V

4.7K_4

FOR KBC DEBUG

+5V

0_6

+3V_AOAC

2
MEK500V-40

R422

+3V_AOAC

R431

R424

*0_4

BT_COMBO_EN_R#
MINICAR_PME#

BT_DATA,BT_CHCLK,CLKREQ#
internal pull-DOWN 100k
ohm

Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
Reserved
Reserved

R64

+3.3V
GND
+1.5V
LED_W PAN#
LED_W LAN#
LED_W W AN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W _DISABLE#
GND

GND
REFCLK+
REFCLKGND
CLKREQ#
BT_CHCLK
BT_DATA
W AKE#

Reserved
Reserved
Reserved
Reserved
Reserved
+1.5V
GND
+3.3V

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

*4.7K_4

+3V_AOAC

+3V_AOAC

*0_4/S RF_LINK#

R82

R425
MINI_BLED
RF_LINK#

R81

*0_4

R65

BLUELED
RF_LINK#

Q22
*DRC5144E0L

4.7K_4

+3V_AOAC
USBP2+
6
USBP26

MINI_PCIE_RST#
RF_OFF#
8

16
14
12
10
8
6
4
2

33
33

LAD0
LAD1
LAD2
LAD3
LFRAME#

6,29

INTEL WLAN
CARD PIN 20
W_DISABLE#
have
internal
pull-up 110k
ohm

7,25

33

PCIE_WAKE#

10K/F_4

BT_COMBO_OFF#

+1.5V

Mini PCI-E Card 1


WLAN
6

MINICAR_PME#

EC_PCIE_WAKE#

LAD0
7,25,33
LAD1
7,25,33
LAD2
7,25,33
LAD3
7,25,33
LFRAME#
7,25,33
B

Reserve for IOIC function

MINI PCIE H=11


DFHS52FR098
MIPCI-C-1759513-52P-LDV-SMT

+3VPCU

+3VS5

+3V_AOAC

R419
*100K/F_4

Q20
*ME2303T1
R420

*0_4

EC4

24mil

*33P/50V_4

R53

CLK_33M_DEBUG

*100K/F_4

+3V_AOAC

Q21

for EMI request


33

R423

EC_AOCS

*0_4

C655

C653

C656

*1U/6.3V_4

*10U/6.3V_8

*.1U/10V_4

2
*ME2N7002E

2,4,22,23,27,38,41
+1.5V
2,4,6,8,9,10,11,12,22,23,24,25,26,27,29,30,31,33,41,42,43
+3V
7,25,30,33,34,35
+3VPCU
8,24,25,26,27,30,31,41
+5V

Accelerometer Sensor
PV change to shortpad
R313

*0_6/S

+3V

G_SENSOR_PWR
R311
+3V

Q15

4.7K_4

R309

4.7K_4

C459
0.1U/10V_4

5
4,12,33

MBDATA2

4,12,33

MBCLK2

SDA_HP3D

SCL_HP3D

U12
HP3DC2TR

G_SENSOR_PWR
C458
0.1U/10V_4

1
14

Vdd_IO
VDD

2
6

ACCEL_INTH#

2
D4

1
ACCEL_INTH#1
MEK500V-40 TP68
R307

2N7002DW C457
33P/50V_4
D

C454
33P/50V_4

G_SENSOR_PWR

R305

11
9

*0_4/S
SDA_HP3D
SCL_HP3D

7
6
4

*0_4/S

NC
NC

RESERVED
RESERVED
RESERVED
RESERVED

INT1
INT2
SDO
SDA
SCL

GND
GND

2
3

10
13
15
16
5
12
D

CS

ACCEL_INTH#
AL003DC2A00

352-(&75;
4XDQWD&RPSXWHU,QF

C444
22P/50V_4

1%

Size
Custom

Document Number

Rev
1A

MINI PCIE CONN & G-sensor

Date: Tuesday, March 12, 2013

Sheet

32
8

of

43

*0_4/S KBC_P+3V

R286

+3VPCU

EC_A20GATE
SERIRQ
SIO_EXT_SMI#
SIO_EXT_SCI#

EC_A20GATE
7,25
SERIRQ
6
SIO_EXT_SMI#
6
SIO_EXT_SCI#
4
EC_WRST#
6
EC_RCIN#
EC_PCIE_WAKE#

32

EC_RCIN#

126
5
15
23
14
4
16

SBUSY/GPG1/ID7
HMOSIGPH6/ID6
HMISO/GPH5/ID5
HSCK/GPH4/ID4
HSCE#/W UI19/GPH3/ID3
CTX1/W UI18/GPH2/SMDAT3/ID2
CRX1/W UI17/GPH1/SMCLK3/ID1
CLKRUN#/W UI16/GPH0/ID0

C764

R250
FDIO3

THRM_ALERT_HW#1

30

WIRELESS_OFF
35,36,37,40
HWPG
23
EMU_LID
32
EC_AOCS
30
WIRELESS_ON
32
EC_DEBUG1

28,29
*22P/50V_4

14

USBPW_ON#

BLM15AG700SS1_4
GPU_AC_BATT
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30

IO Thrm Protect
+3VPCU

R223
16.5K/F_4

2
1

BIOS_SPI_CLK
BIOS_RD#
BIOS_WR#
BIOS_CS#
GPU_AC_BATT

103
102
101
100
36
37
38
39
40
41
42
43
44
45
46
51
52
53
54
55
58
59
60
61
62
63
64
65

33

For 65 degree, 1.8v limit, (SW)

C353
0.1U/10V_4

128
2

PS2DAT0/TMB1/GPF1
PS2CLK0/TMB0/GPF0
PS2DAT2/W UI21/GPF5
PS2CLK2/W UI20/GPF4
DAC4/DCD0#/GPJ4
DSR0#/GPG6
GINT/CTS0#/GPD5
PS2DAT1/RTS0#/GPF3
DAC5/RIG0#/GPJ5
PS2CLK1/DTR0#/GPF2
RXD/SIN0/GPB0
TXD/SOUT0/GPB1

SMCLK2/W UI22/GPF6/PECI
SMDAT2/W UI23/GPF7
SMCLK0/GPB3
SMDAT0/GPB4
SM_BUS
SMCLK1/GPC1
SMDAT1/GPC2

PS/2

TB160808U121N005(120,0.4A)

33

DGPU Thermal protect

100/F_4

AD_ID

EC_WRST#

34

R460

C742

R459
12K/F_4

C738
100P/50V_4

Q32
14

TEMP_FAIL

PW M0/GPA0
PW M1/GPA1
PW M2/GPA2
PW M3/GPA3
PW M4/GPA4
PW M5/GPA5
PW M6/SSCK/GPA6
PW M7/GPA7

3.3K/F_4

IT8528E/EX

PWM

TACH0/GPD6
TACH1/TMA1/GPD7
TMR0/W UI2/GPC4
TMR1/W UI3/GPC6

KSO0/PD0
KSO1/PD1
KSO2/PD2
KSO3/PD3
KSO4/PD4
KSO5/PD5
KSO6/PD6
KSO7/PD7
KSO8/ACK#
KSO9/BUSY
KSO10/PE
KSO11/ERR#
KSO12/SLCT
KSO13
KSO14
KSO15
KSI0/STB#
KSI1/AFD#
KSI2/INIT#
KSI3/SLIN#
KSI4
KSI5
KSI6
KSI7

AJ085280F01

TP_LED#
VRON

82

ECPWROK

56
57

MY16
MY17

19
20

SUSON
CAPSLED#

107
99
98
97
96
95
94
93

TP60
VRON

37,38

ECPWROK
MY16
MY17

30
30

117
118
110
111
115
116

*0.1U/10V_4

C708

*0.1U/10V_4

C765
DGPU_PR_EN

*0.1U/10V_4

FAN1SIG
R458

SUSON
40,41
CAPSLED#
30

FDIO2
EC_BIOS_WR#
EC_BIOS_RD#
EC_BIOS_SPI_CLK_I
EC_BIOS_CS#
MAINON
RF_LINK#
CLKRUN#

C418
HWPG

4,10

For +VIN noise


EC_BIOS_WR#
8
EC_BIOS_RD#
8
EC_BIOS_SPI_CLK_I
EC_BIOS_CS#
8
MAINON
36,40,41
RF_LINK#
32
CLKRUN#
7,25

100P/50V_4

R260

10K/F_4 THRM_ALERT_HW#1
10K/F_4

NBSWON1#

AKE39ZN0800

R287

4.7K_4

MBCLK

C436

*0.1U/10V_4

AKE39ZN0Q03

R288

4.7K_4

MBDATA

C437

*0.1U/10V_4

Socket

DFHS08FS023

Size

P/N

AMIC

+3VPCU

R463

AKE39FN0N01

+3VS5

R464

4.7K_4

MBCLK2

C756

*0.1U/10V_4

R468

4.7K_4

MBDATA2

C763

*0.1U/10V_4

C755
220P/50V_4

For GPU thermal


DGPUT_CLK
14
DGPUT_DATA
14
for Battery
MBCLK
22,34
MBDATA
22,34 charge/discharge
MBCLK2
4,12,32
MBDATA2
4,12,32for CPU themal

MBCLK
MBDATA
MBCLK2
MBDATA2

C746

PWR_LED#

10K/F_4

4M
EON
4M
WINBOND 4M

Vender

LID_EC#

47K_4

R454

RSMRST#

RSMRST#

C760 2.2U/6.3V_4
R465

+3VS5

*8.2K_4
EC_WRST#

4M SPI EC ROM

+3VPCU

+3VPCU

R462

470K_4

C750 0.1U/10V_4

PV , change to short pad

UART

FLASH

FMISO
FMOSI
FSCE#
SSCE0#/GPG2

CK32K
CK32KE

84
83

Add G-sensor SMBUS signal

GPG0
FSCK

R237

24
25
28
29
30
31
32
34

PWR_LED#
30
PWRLED_RIGHT#
AC_LED_ON#
34

R231

*0_4/S

FAN_PWM
31
MBATLED0#
34
VOLMUTE#
27
PWM_VADJ
22

VOLMUTE#
PWM_VADJ

47
48

FAN1SIG
TS_ON

120
124

SUSC#

R466

FAN1SIG
TS_ON
SUSC#
S5_ON

BIOS_CS#
BIOS_SPI_CLK_I
BIOS_WR#
BIOS_RD#

1
6
5
2

SPI_3P

CE#
SCK
SI
SO

VDD
HOLD#

W P#

VSS

EC21

WAKE UP
KBMX

W UI5/GPE5
RING#/PW RFAIL#/CK32KOUT/LPCRST#/GPB7

NBSWON1#
LID_EC#
ACIN

35
112

SUSB#
6
LAN_POWER

128K byte SPI EC ROM

A/D D/A

CLOCK

DAC0/GPJ0
DAC1/GPJ1
DAC2/GPJ2
DAC3/GPJ3

66
67
68
69
70
71
72
73

R203
R205

0_4
*0_4/S

from power button

2
C358

ICT need TP2675 size


test point

R316
33_4

+3VPCU

EMI
EC24
22P/50V_4

41

76
77
78
79

R580

THRM_MONITOR1

1
0.1U/10V_4

SI

R302

10K/F_4 SPI_3P

R303

*100K/F_4

1
6
5
2

R581

*0_4

C462

0.1U/10V_4

CE#
SCK
SI
SO

HOLD#

VDD

W P#

VSS

8
C

SPI_7P
R317

10K/F_4

4
TP70

*DFHS08FS023
SOIC8-6-1_27

TP place on top
lay for ICT
request FDIO2

R301

*0_4/S
R318

*0_4/S

pv change to shortpad

Adapter select

33

HMISO2
8
HMISO3
8
DGPU_PR_EN
42,43
DNBSWON#
6

*0_4

+3V

TP66

VGA_ON_SB
6,33
DGPU_PWROK
4,7,42,43
SYS_I
34
AD_AIR
34
TEMP_MBAT
34

SYS_I
AD_AIR
TEMP_MBAT
AD_TYPE
GPIO42

10K/F_4

CLK_33M_KBC

U13
BIOS_CS#
BIOS_SPI_CLK_I
BIOS_WR#
BIOS_RD#

TP67

FDIO3

ADC0/GPI0
ADC1/GPI1
ADC2/GPI2
ADC3/GPI3
ADC4/W UI28/GPI4
ADC5/W UI29/GPI5
ADC6/W UI30/GPI6
ADC7/W UI31/GPI7

R467

33_4

+3VPCU

6
35,36

NBSWON1#
30
LID_EC#
30
ACIN
34,41

SUSB#

R259

SPI_7P

A25QE32M-F/Q
AKE39FN0N01
SOIC8-8-1_27

31
26

15P/50V_4

TP69
TP65

125
18
21

BLUELED

TP71

PW RSW /GPE4
RI1#/W UI0/GPD0
RI2#/W UI1/GPD1

*100K/F_4

U14

30

PV add for control PWR_LED

DB Change

+3VPCU

R232

10K/F_4 GPIO42 R218

Hi ==> DIS/SG
Low ==>UMA

VGA_ON_SB

adapter

Platform model GPIO42


SG/DIS
High
UMA
Low

*10K/F_4

90W
65W
D

6,33

DB reserve for BIOS test


33

IT8518_AGND

R236

*0_4

THRM_MONITOR

352-(&75;
4XDQWD&RPSXWHU,QF

33

For 75 degree, 1.2v limit, (HW)

C406
0.1U/10V_4
GPIO42

C367
0.1U/10V_4

L32

FCM1608KF-121T02

R68

THRM_MONITOR1

100K_4 NTC

80
104
33
88
81
87
108
109
106
105

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

THRM_MONITOR

0_4

HWPG
EMU_LID

BIOS_SPI_CLK_I
L57

90
89

75

TPDATA
TPCLK

86
85

TPDATA
TPCLK

10K/F_4

0.1U/10V_4

IT8528E/HX

VSS
VSS
VSS
VSS
VSS

30
30

H_PROCHOT#
BLUELED

L33

GPIO

VSS

H_PROCHOT#
BLUELED

GPC0
TMA0/GPB2

VSTBY

L80HLAT/BAO/W UI24/GPE0
L80LLAT/W UI7/GPE7

GA20/GPB5
SERIRQ
ECSMI#/GPD4
ECSCI#/GPD3
W RST#
KBRST#/GPB6
PW UREQ#/BBO/GPC7

32

119
123

RSMRST#

EGCLK/W UI27/GPE3
EGCS#/W UI26/GPE2

KSO16/SMOSI/GPC3
KSO17/SMISO/GPC5

LPC

LPCPD#/W UI6/GPE6

27
49
91
113
122

BATSHIP

TB160808U121N005(120,0.4A)

+3VPCU_EC

*ME2N7002E

EGAD/W UI25/GPE1

34

L31

127

3
74
VBAT
AVCC

VCC
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY

LAD0
LAD1
LAD2
LAD3
LPCRST#/W UI4/GPD2
LPCCLK
LFRAME#

VCORE

17

R456

C434
0.1U/10V_4

AVSS

LFRAME#

PCI_SERR#

Change to 1SS355 as Current loss

+3VPCU_AC

D11
1SS355

+3VPCU CAP close to EC pin

11
26
50
92
114
121

U9

10
9
8
7
22
13
6

LAD0
LAD1
LAD2
LAD3

+3VPCU_EC

R280
*0_4/S

C415
0.1U/10V_4

+3VPCU

+3VPCU

AD_TYPE

ITE pin 100 , 104 , 106 default


can not pull up to +3VPCU it
will cause chip into test mode

7,25,32
LAD0
7,25,32
LAD1
7,25,32
LAD2
7,25,32
LAD3
7
KBC_RST#
7
CLK_33M_KBC
7,25,32
LFRAME#

+3VPCU_AC

12

500mA

0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4

C724
C752
C762
C767
C420
C727
C732
C766
C757

+3VPCU

+3V

Smart adapter Type check

+3V
+3VPCU
+5VPCU

2,4,6,8,9,10,11,12,22,23,24,25,26,27,29,30,31,32,41,42,43
7,25,30,32,34,35
34,35,36

C355
*0.1U/10V_4

1%

IT8518_AGND

Size
Custom

Document Number

Rev
1A

EC ( IT8518E/HX)/ROM

Date: Tuesday, March 12, 2013

Sheet

33
8

of

43

EC38
1000P/50V_4

PC57
0.47U/25V_6

PR118
75K/F_4

PR32

MBDATA

AD_AIR

BQDATA

*0_4/S
PR31

MBCLK

BQCLK

8
9

*0_4/S

PC286
0.1U/10V_4

SDA

SRP

SCL

SRN

Place this cap


close to EC

15

BQLODRV

PDZ5.6B

0.01U/25V_4

*100P/50V_4

0.1U/25V_4

EC44

EC5

EC6

EC43

*10U/25V_8

*10U/25V_8

*10U/25V_8

PR224
RC1206-R020
F3_2X1_65-2_8

TEMP_MBAT

33

PC285

Place this cap


close to EC

EC42

PL10
8681LR
4.7uH/5.5A(EM-47AM05V08)

+BATCHG

PR223
*0_2/S

4
PC39

12 BQSRN

0.01U/25V_4

PC16

*100P/50V_4

PDZ5.6B
PC15

PR91
*2.2_6

14
21
22
23
24
25
13 BQSRP

1K/F_4
PC20

1000P/50V_4

PC95

PD2

*10U/25V_8

PC87

3
2
1

PC222
0.047U/25V_4

PR45
PR38

0_4

PC74
*2200P/50V_4

PC26

PC227

PC228

PC225

PC226

PD7
SX34
CSOP
CSON

PC36

11 BQBATDRV

PR222
*0_2/S

PQ8
EMB20N03V

0.1U/25V_4
0_4

0.1U/25V_4

BQIOUT

PR115
12.4K/F_4

BATDRV

BQPHASE

0.1U/25V_4

VCC

IOUT

20

19

BQVCC

22_8

ILIM

PR220

1N4448WS-7-F

GND
GND
GND
GND
GND
GND

10

LODRV

BQ24728

100K/F_4

ACDET

+VAD

PC92

REGN6V

RB501V-40

MBCLK

PU4

ACPRES

PD6
BQB_1

PR216
17
BQB_2
0_6

PMPCR2-08MNBS2ZZ4H0
DFHD08MR155

PR29
330_4

2200P/50V_4

BTST

10U/25V_8

ACIN

B_TEMP_MBAT6

PR20

4.7U/25V_8

8
7
6
5

ACDRV

PHASE
ACIN

10

PR19
200K_4

PD1

4
1

PR40
+VA

PD3

0.1U/25V_4

4
2
HIDRV

BQHIDRV

3 10

+3VPCU

MBDATA

22,33

PQ9
EMB20N03V

18

10U/25V_8

33,41

+VA_AIR

0.1U/25V_4

*10U/25V_8

CMSRC

PR37
100K/F_4

SI

PR61

PR30
SYS_I

10/F_4
PC25

PC153

33

+BATCHG

PR230
470_8

Place this cap


close to EC

1M_4

33

PQ1
2N7002K

BATSHIP

PR62
1M_4

PR35

+3VPCU

MIN. BATV=7.2V
+PRWSRC

+VA
+VH28
+VAD
41
+3VPCU
7,25,30,32,33,35
+5VPCU
35,36
+BATCHG

PR22

PC27

0.01U/50V_4

PR24
88.7K/F_4

100P/50V_4

PR23
69.8K/F_4

ACDET=13V

100K/F_4

430K/F_4

*100K/F_4

PR21
+VAD

*0.1U/50V_6

33

*10U/25V_8

1U/10V_4

REGN6V

*10U/25V_8

PC56

SMC

CN10

8
7
6
5

BQACDRV

PQ14
LTC044

PC53

3
2
1

33

ACN

3
1

ACP

0.1U/25V_4 0.1U/25V_4

+5VPCU

MBATLED0#

PC43

PR141

BQCMSRC

PC103

REGN6V

2.43K/F_6

PC123
*0.1U/25V_4

*10U/25V_8

+VA

bat-bp02081-b82d5-7h-8p-l-v
22,33

PC98

1
1K_6

SMD

SI

PR140

16

SI

1M_4

REGN

MMDT2907A

PR145

0.1U/25V_4

PR135
220K_4

PR75
4.02K/F4

PC45

PR28
330_4

PR235
*0_2/S
CSIP

220K_4

PR227
2K/F_4

PC231

CSIN

PR139
1M_4

PR233
*0_2/S

PQ15
2N7002K
3

+VIN

BATT+

80/5A

PC240
2200P/50V_4

Place this ZVS close to


Far-Far away +VIN

PC42

1M_4

80/5A
PL8

BQACN

2
3

PR143

Q1

33

Q2

PQ17

+12VALW

PL9

BATDIS_ID_DOD

2K/F_4

SI
PR234
RC1206-R010
1

+VAD

PQ16
LTC044

+BATCHG

3
2
1

0.1U/25V_4

BATDIS_G

PR231

PD8
P4SMAJ20A

MBATLED0#

PR150

BQBATDRV

PC234
0.022U/50V_6

PC233
*2200P/50V_4

+5VPCU

AC_LED_ON#

PQ12
LTC044

PR117

PQ39
TPCA8064-H

2.43K/F_6

PC97

PC243

BQACP

EC40

0.1U/25V_4

3
PQ11
2N7002K

1M_4

*0.1U/25V_4

PC250

PQ13
LTC044
PR121

+12VALW

PQ40
EMB04N03A
4
3

EC37

P4SMAJ20A

0.1U/25V_4

To PWR LED

+VAD

EC41

SI
PC252
AC_LED_ON#

DC-IN CONN

EC39

*10U/25V_8

80/5A

1
2
3

0.1U/25V_4

3
4

LED2 GND
GND
LED1

PD9

PC251

GND

5
6
7
8

80/5A
PL17

0.1U/25V_4

PQ42
EMB20P03V

PL18

0.1U/25V_4

Place this ZVS close to


Diode away +VIN

+VA

1
2

VDD
VDD

34

Do Not add test pad on BATDIS_G signal

33

+VA_AC

CN12

AD_ID

SI

+PRWSRC
AD_ID

IDEA_G

DC_JACK
90W

0.1U/25V_4

PQ10
2N7002K
A

AD_AIR

PR73

PQ5
METR3904-G

1M_4

352-(&75;
4XDQWD&RPSXWHU,QF
1%

Size
Custom
Date:

Document Number

Rev
1A

Charger (BQ24728)
Tuesday, March 12, 2013
1

Sheet

34

of

43

DC/DC +3VS5/+5VS5

35
+3VPCU

+VIN_3VS5
PU12

13

EN

VOUT

PC279

PC150

PC151

*22U/6.3V_8

*22U/6.3V_8

PV

*0.1U/10V_4

+VIN_5VS5

+5 Volt +/- 5%
Countinue current:4A
Peak current:6A
OCP minimum:7.5A

BST

10 NB671BST

SW
SW
SW
SW

PC253

PR246

PC271

8 NB671SW
9
15
16

NB671EN

1.5uH/9A(EM-15AM05V03)
+
PR259
*0_2/S
PC266
*2200P/50V_4

VOUT
13

EN
FB

NB671VOUT

12 NB671FB

PC125
*0.1U/10V_4

PJP5
*POWER_JP/S

+5VS5_S

VCC

1U/6.3V_4

PV

PL21

0.1U/25V_4

PR247
*2.2_6

PC131

S5_ON PR151
*0_4/S

+5VS5

NB671BST_S

0_6

PGOOD

PR157
*0_4/S

PC120

NC

PV
11

PC254

NB671PG

PGND

PC259

HWPG

NC

PC119

0.1U/25V_4

Reserve for NB670 5V version.

*0_8/S

14

2200P/50V_4

10U/6.3V_6

AGND

4.7U/25V_8

VIN

PL16

4.7U/25V_8

NC

PC133
B

+VIN

PU13

PV
C

PV
PR163
*0_4/S

S5_ON

PC278

PC270
NB670

33,35,36

PC280

7 NB670VOUT

PC265
*0.1U/10V_4

+5VPCU

PC281

PC283

PC284
0.1U/10V_4

NB670EN

0.1U/25V_4

S5_ON PR241
*0_4/S

PC274

*22U/6.3V_8

PC129
*BAT54C

PC272

*22U/6.3V_8

+5VS5

*22U/6.3V_8

ENLDO

PV
S5_ON

+
PR178
*0_2/S

+5VPCU
PC132
1U/6.3V_4

33,35,36

2
1

PR158
*2.2_6

PD5

11

*330K/F_4

1.5uH/9A(EM-15AM05V03)

330U/6.3V_6X5.8

NB670ENLDO 12

VCC

PL20

0.1U/25V_4

*22U/6.3V_8

PR142
*665K/F_4
PR152

0_6

8 NB670SW
9
15
16
+5VALW

PJP3
*POWER_JP/S

+3.3VS5_S

NB670BST_S

0.1U/10V_4

SW
SW
SW
SW

+3VS5

PC268

PR244

PGOOD

PV

+VIN

10 NB670BST

PC248

4,6,8,9,10,25,32,33,36,38,41,43
28,29,36,37,38,39,40,41,42,43

HWPG

BST

PC256

NB670PG

CLK

PC258

+3VS5
+5VS5

330U/6.3V_6X5.8

PGND

PC262

0.1U/25V_4

NC

PR238
*0_4/S

HWPG
33,36,37,40

PC263

*2200P/50V_4

PR236
10K/F_4

+3VS5

*0_8/S

14

2200P/50V_4

10U/6.3V_6

AGND

4.7U/25V_8

VIN

4.7U/25V_8

LDO

PC267

PL15

0.1U/25V_4

6
D

+3.3 Volt +/- 5%


Countinue current:4A
Peak current:6A
OCP minimum:7.5A

+VIN

PR239
*82K/F_4
PR242
*330K/F_4

NB669
A

+VIN

PR237
*665K/F_4

352-(&75;
4XDQWD&RPSXWHU,QF

Reserve for NB670 5V version.

1%

Size
Custom
Date:

Document Number

Rev
1A

3/5VS5 (NB670/NB671)
Tuesday, March 12, 2013
1

Sheet

35

of

43

36
D

PR203
+VIN_1.1V

6
PU11
AOZ1237

EN

PC207
*0.1U/10V_4

23
1237SSPCH

SS

PC196
*2200P/50V_4

PR205

5 1237FBPCH

FB

1237FBPCH_S

PC300

PC195

PC188

PC192

PC191

PC190

PC193

PC189
*22U/6.3V_8

2
1237ENPCH

PR208
*0_4/S

S5_ON

PR272
*0_2/S

12
13
14
15
19
4

PGND
PGND
PGND
PGND
PGND
AGND

*22U/6.3V_8

33,35

PFM

*22U/6.3V_8

3
*0_2/S 1237PFMPCH

1uH/11A(EM-10AM05V06)
PR196
*2.2_6

22U/6.3V_8

PR207

PV

LX
LX
LX
LX
LX

PGOOD

PJP7
*POWER_JP/S

PL27

0.1U/25V_4

10 1237LX
11
16
17
18

22U/6.3V_8

1
1237PGPCH

PR202
*0_4/S

+1.1VS5_S2

PC198
1237BSTPCH_S

0_6

22U/6.3V_8

HWPG

PR199

+1.1VS5

0.1U/10V_4

HWPG

PC197

33,35,37,40

PC199

PV

20 1237BSTPCH

BST

PC201

*390U/2.5V_5X5.8ESR10

PV

PC206

PC203
1U/6.3V_4

PC200

0.1U/25V_4

*0_8/S

VCC

2200P/50V_4

21

*0_6

4.7U/25V_8

*0_2/S
PR209
+5VS5

+1.1V Volt +/- 5%


Countinue current:5A
Peak current: 6.5A
OCP minimum:7.5A

+VIN
PL5

8
9
22

IN
IN
IN

4.7U/25V_8

AIN

0.1U/25V_4

TON

PR200

0_6

100K/F_4
PR201
+5VPCU

3.83K/F_4

0.1U/10V_4

PC204

PV

PR206
10.2K/F_4

PR57
*0_6/S

+2.5V +/- 5%
Countinue current:0.3A
Peak current:0.75A

+3VS5

PV

+2.5V

PU1

PR53
*0_4/S

VIN

HWPG

4.7U/6.3V_6

PC47

PG

LX

PL1
8008LX2.5V
2.2uH/1.3A_2520
PR56

GND

*0_2/S

APW8824CTI-TRG

R1
DB

8008VFB2.5V

0.1U/10V_4

PC23

PR55

PC49

PC48
0.1U/10V_4

EN

10U/6.3V_6

MAINON

10K/F_4

FB

33,40,41

PR25

31.6K/F_4

R2

PR54
10K/F_4

PV

+VIN
23,34,35,37,39,40,41,42,43
+2.5V
5
+3VS5
4,6,8,9,10,25,32,33,35,38,41,43
+5VS5
28,29,35,37,38,39,40,41,42,43
+1.1VS5
9,41
+5VPCU
34,35

VO=(0.6(R1+R2)/R2)
A

352-(&75;
4XDQWD&RPSXWHU,QF
1%

Size
Custom

Document Number

Rev
1A

+1.1VS5 (AOZ1237)/2.5V

Date: Tuesday, March 12, 2013


1

Sheet

36

of

43

37
D

PR77
100K/F_4

+VIN_1.2V

PL13

0.1U/25V_4

10 1237LX1.2V
11
16
17
18

PR46
*2.2_6

PFM

1237EN1.2V2

EN

PC41
*0.1U/10V_4

PGND
PGND
PGND
PGND
PGND
AGND

1uH/11A(EM-10AM05V06)

PR232
*0_2/S

12
13
14
15
19
4

PC30
*2200P/50V_4

PV
23
1237SS1.2V

SS

FB

5 1237FB1.2V

PR70
*0_4/S

PR68

1237FB1.2V_S

PC245

PC61

PC99

PC104

PC111

PC93

PC83

PC75
*22U/6.3V_8

VRON

3
*0_2/S 1237PFM1.2V

LX
LX
LX
LX
LX

*22U/6.3V_8

33,38

PR58
*0_4/S

PGOOD

*22U/6.3V_8

PR59

PV

1
1237PG1.2V

*22U/6.3V_8

PR47
*0_4/S

22U/6.3V_8

PV

PJP2
*POWER_JP/S

22U/6.3V_8

HWPG

+1.2V_S2

PC38
1237BST1.2V_S

0_6

0.1U/10V_4

HWPG

PR44

+1.2V

33,35,36,40

20 1237BST1.2V

PC91

BST

PC62

*390U/2.5V_5X5.8ESR10

PV

PC81

PU5
AOZ1237

PC69

PC34
1U/6.3V_4

PC88

0.1U/25V_4

*0_8/S

VCC

2200P/50V_4

21

+1.2V Volt +/- 5%


Countinue current:4A
Peak current:6A
OCP minimum:7.5A

+VIN
PL2

8
9
22
4.7U/25V_8

*0_2/S

IN
IN
IN

4.7U/25V_8

AIN

0.1U/25V_4

TON

PR78
+5VS5

5.11K/F_4
PR71

PC35
0.1U/10V_4

PR69
10.2K/F_4

VDDP_FB_H

*0_4

PV

352-(&75;
4XDQWD&RPSXWHU,QF
1%

Size
Custom

Document Number

Rev
1A

+1.2V (AOZ1237)

Date: Tuesday, March 12, 2013


1

Sheet

37

of

43

PR112
100/F_4

2K/F_4

*32.4K/F_4

ISENS1_NB

*1K/F_4

*0.1U/10V_4

SI

*0_4/S

PR42

*0_4/S

6277SVT

*0_4/S

PR39

*0_4/S 6277PWROK 10

SI-2
PR27
*10K/F_4

6277NTC

PC217

PR17

39

VSUMP_2

VSUMP_2

1/F_4
PR9
10K/F_4
PR12
3.65K/F_4

PWM2_NB

40

38

FCCM_NB_1

BOOTX

PWM2_NB

37

SW2 0.22U/25V_6

SW2

31

LG2

LG2

30
PR50

1_6

PC221

1U/6.3V_4

39

39
39

+5VS5

29
28

PC219 1U/6.3V_4
6277_PWMY

25

HG1

6277_PWMY

PC37

24

SW1_B

26

SW1 0.22U/25V_6

HG1

39

SW1

39

39

LG1

PR214
+3VS5
*10K/F_4
CPU_VRM8380_PG

39

PC13

301/F_4

PR6

1000P/50V_4

PR211
2.43K/F_4

137K/F_4
PR13
2K/F_4

PR179
100/F_4
+VCC_CORE

PR210
11.5K/F_4

ISENS1

PC5

VSUMN
ISENS2
VSUMP

PR215
10K/F_4 NTC

PUT COLSE
TO VCORE
Inductor
PC208
0.1U/10V_4

PC213
330P/50V_4

PC209

VSUMN

0.068U/16V_4

VSUMN_2

32

PC3
470P/50V_4

0.22U/10V_4

39

PHASEX

PGOOD_NB

41

0.22U/10V_4
PR2
2.05K/F_4

VSUMP

PR1
10K/F_4
PR3

UGATEX

VSEN_NB

42
PGOOD_NB

36

FB_NB

45

FCCM

COMP_NB

44

VSEN_NB

VSUMP_NB

43

FB_NB

ISUMN_NB

47

390P/50V_4
PR5
*32.4K/F_4

3.65K/F_4

VSUMN_2

HG2

100P/50V_4

ISENS2

ISENS1

+VIN_VCC_CORE

SI

PC10

PC4

0.22U/10V_4
PC14

1_6

34

PR7

PC6

VSUMN

PR226

PC223 0.22U/25V_6
HG2
PC59
SW2_B

33

LG1

*0_4/S

6277FB

6277COMP

PR15

6277FB2
PC11
6277VSEN

1/F_4
PR4
10K/F_4
PR10

PHASE1

6277RTN

VSUMP_1

BOOT1

NTC

6277ISUMN

VSUMP_1

IMON

VSUMP

39

UGATE1

ISENS1

VSUMN_1

10K/F_4
PR11

PW MY

PW ROK

ISENS2

39

VSUMN_1

VR_HOT_L

ISENS3

+5VS5

VDD

PV

PC31
1000P/50V_4

18.2K/F_4

VDDP

ISL6277A

SVT

PUT COLSE
TO VCORE
HOT SPOT

Reserve for noise


filter on R7x

PR16

12

VDDIO

PR34
100K/F_4 NTC
PR26
27.4K/F_4

1000P/50V_4

PR217
137K/F_4
PC220
*100P/50V_4

6277VRHOT 5

PR51

6277IMON 11

+1.5V

VRON

LGATE1

CPU_PWRGD_SVID_REG

PR48

LGATE2

PU3

PGOOD

CPU_SVT

SVD

39
35

27

+1.5V
4

6277VDDIO 7

PHASE2

23

CPU_SVD

BOOT2

ENABLE

FB

SVC

COMP

21

6277SVD

22

6277EN

*0_4/S

FB2

*0_4/S

PR49

20

VRON PR41

10P/50V_4

VRON

33,37

VSEN

18

VRHOT

6277SVC

GND

4
2

PR52
VRHOT *1K/F_4

*0_4/S

49

+1.5V

PR60

UGATE2

RTN

18.2K/F_4

CPU_SVC

IMON_NB

19

1000P/50V_4

PC224
PR219
137K/F_4

PR74

VIN

17

6277IMON_NB 3

LGATEX

NTC_NB

ISUMP

ISEN2_NB

16

ISEN1

0.22U/10V_4 6277NTC_NB

15

ISENS2_NB 1

PR181
100K/F_4 NTC
PR72
27.4K/F_4

ISEN1_NB

PC60

ISEN3

PC55
1000P/50V_4

13

PUT COLSE
TO VDDNB
HOT SPOT

ISUMP_NB

0.22U/10V_4
VSUMP_NB

COMP_NB

ISENS1_NB

48

PC63

3.65K/F_4

PC302
*1000P/50V_4

VSUMN_NB
ISENS2_NB

10K/F_4
PR84

39

39
PR85
34K/F_4

46

VSUMP_NB_Y2

VSUMP_NB_Y2

PC68

PR108

VSUMN_NB

PC64
0.1U/10V_4

1/F_4
PR83

10
FCCM_NB

PWM2_NB

ISUMN_NB

39

VSUMN_NBY2

VSUMN_NBY2

CPU_VRM8380_PG

PR96

ISENS1_NB

10K/F_4
PR81

499/F_4

ISEN2

39

PC77

14

PR82

PC70
PR264
10K/F_4 NTC

PUT COLSE
TO VDDNB
Inductor

PC67
330P/50V_4

PR95

PR86
*0_4/S

VSUMP_NB

3.65K/F_4

137K/F_4

CPU_VDDNB_RUN_FB_H

0_4

3.01K/F_4

0.1U/10V_4

10K/F_4
PR100

PR107

1000P/50V_4

PR94

390P/50V_4
PR101
11.5K/F_4

ISUMN

1/F_4
PR99

VSUMP_NB_Y

PC66

0.1U/10V_4

VSUMP_NB_Y

301/F_4

100P/50V_4
VSUMN_NB

PC89

PR104

PR103
2.05K/F_4

VSUMN_NBY

39

ISENS2_NB

39

VSUMN_NBY

+VDDNB_CORE

PC80

PR98
10K/F_4
PR97

38

PC79
330P/50V_4

PR93
PR87

0_4

PR212
CPU_VDD0_RUN_FB_H
CPU_VDD0_RUN_FB_L

PR14
619/F_4
PR8
*1K/F_4

0_4
PC1

4
4

PR213

PC12
2
1

*0.1U/10V_4

0.01U/25V_4
PR180
100/F_4

352-(&75;
4XDQWD&RPSXWHU,QF
1%

Size
Custom

Document Number

Rev
1A

CPU Core1 (ISL6277)

Date: Tuesday, March 12, 2013


1

Sheet

38

of

43

+VIN_VCC_CORE
+VIN

39

PL6

1
2
3

PC210

0.1U/25V_4

PQ3
TPCA8064-H

1
+ PC246
470U/25V_EC_10H

PC24
2200P/50V_4

PC7
0.1U/25V_4

1_6

PC216
*4.7U/25V_8

HG1_G

4.7U/25V_8

PR33

HG1

HG1

PC9

4.7U/25V_8

D
38

PC215

4.7U/25V_8

*0_8/S
PC212

+VCC_CORE

PL11

SW1

38

LG1

SW1
0.36uH

38

PR43
*2.2_6

D
4

LG1

G
S

PR221
*0_2/S

1
2
3

PQ6
TPCA8A10-H

PR228
*0_2/S

PC22
*2200P/50V_4

VSUMN_1
VSUMP_1

VSUMN_1

38

VSUMP_1

38

PC29
2200P/50V_4

PC2
0.1U/25V_4

PC214
*4.7U/25V_8

HG2_G

PC211
4.7U/25V_8

PR66

HG2

HG2

PC8
4.7U/25V_8

D
38

PC17
4.7U/25V_8

+VIN_VCC_CORE

CPU CORE Volt


Countinue current:36A
Peak current:50A
OCP minimum:60A

S
PQ4
TPCA8064-H

1
2
3

1_6

+VCC_CORE
PL12

VSUMN_2
VSUMP_2

+VIN_VCC_GT

VSUMN_2

38

VSUMP_2

38

+
PC85

PC102

1
2

1
2

PV

*330U_2V_7343

PC218
*2200P/50V_4

330U_2V_7343

1
2
3

PQ7
TPCA8A10-H

PR229
*0_2/S

PC237
*330U/2.5V_6X4.5ESR12

PR225
*0_2/S

PC238
330U/2.5V_6X4.5ESR12

+
PC244

PC239
330U/2.5V_6X4.5ESR12

PR218
*2.2_6

0.1U/10V_4

LG2

LG2

PC232
330U/2.5V_6X4.5ESR12

0.36uH

D
38

SW2

SW2

38

PV

SI

+VIN
PL4
*0_8/S

2BOOTY

PC178

PC179

4.7U/25V_8

0.1U/25V_4

2200P/50V_4

0.1U/25V_4

PC170

VSUMP_NB_Y

22U/6.3V_8

22U/6.3V_8

2
38

9
4

PQ28
RJK03S3DPA

PC180

0.1U/25V_4

2200P/50V_4

4.7U/25V_8

PC181

PL25

LGNB2

PC177

0.36uH/24A_7X7X3

PAD
GND

38

PC287

SWNB2
S2

S2

LGATE

SWNB2

PC176
4.7U/25V_8

1
UGATE

D1

PC160
1U/6.3V_4

VCC

S2

PC156
0.22U/25V_6

FCCM

G2

+5VS5

D1

PWM

PHASE
A

2BOOTY2

S1/D2

1_6

D1

VSUMP_NB_Y

PC288

PR184

G1

PWM2_NB

VSUMN_NBY

PC154
330U_2V_7343

VSUMN_NBY

+VIN_VCC_GT

BOOT

+
PC290
390U/2.5V_5X5.8ESR10

PC162
*2200P/50V_4

HGNB2

+
PC289

PR261
*0_2/S

PR262
*0_2/S

PU9
ISL6208BCRZ

PR182
*2.2_6

390U/2.5V_5X5.8ESR10

9
4

PQ29
RJK03S3DPA

0.36uH/24A_7X7X3

PAD
GND

LGNBY

S2

+VDDNB_CORE
PL24
SWNBY
S2

LGATE

S2

VCC

SWNBY

G2

PC157
0.22U/25V_6

FCCM

PC163
1U/6.3V_4

38

VDDNB Volt
Countinue current:25A
Peak current:33A
OCP minimum:40A

PWM

PHASE
+5VS5

UGATE

BOOT

PC169

D1

FCCM_NB

S1/D2

FCCM_NB

D1

6277_PWMY
38

D1

38

G1

1_6

PU10
ISL6208BCRZ

PR187

4.7U/25V_8

PC182

HNBY

PR183
*2.2_6
PR263
*0_2/S
PC165
*2200P/50V_4

PR260
*0_2/S
VSUMN_NBY2

VSUMN_NBY2

VSUMP_NB_Y2

VSUMP_NB_Y2

352-(&75;
4XDQWD&RPSXWHU,QF

38
38

1%

Size
Custom

Document Number

Rev
1A

CPU Core2 (ISL6208)

Date: Tuesday, March 12, 2013

Sheet
1

39

of

43

+1.5VSUS

+VIN_DDR
+0.75V_DDR_VTT

*0_8/S

HWPG

PC96
*0.1U/10V_4

*0_4/S 51216PG 20
PR105

51216TRIP 18

100K/F_4
PR90
51216MODE19

VDDQSNS
S5

12

SUSON

PGOOD

1U/6.3V_4

PC109
*100P/50V_4

51216VDDQSNS

4.7U/25V_8

4.7U/25V_8

2200P/50V_4

0.1U/25V_4

MODE
REFIN

2
1
1

PC273
*2200P/50V_4

+
PR258
*0_2/S

Rds(on) 5.2m ohm


PC84
0.1U/10V_4

PJP4
*POWER_JP/S

+1.5VSUS_S

PR251
*2.2_6

TRIP

PC282

PC277

PV
PR109
10K/F_4

PR116
*0_4/S

51216REFIN
PR111
*0_4

V5IN
APW8819QAI

PC107

+1.5VSUS

PL22
0.82uH/13A(EM-82BM05V04)

PQ43
RJK03S3DPA

10

+1.8VREF

47K/F_4
+5VS5

PC249

S3

VREF

DB

PC264

51216SW

*0_4/S 51216S5 16

HWPG

PC255

0.1U/10V_4

33,35,36,37

SUSON PR119
PR79

11 51216DRVL

PC94
0.01U/16V_4

SUSON

0.1U/25V_4

13 51216SW

S2

PV

PGND

PC260

PC106
51216VBST_S

2.2_6

S2

51216S3 17

MAINON

33,41

SW
DRVL

PC257

D1

MAINON

VTTREF

PC78
0.22U/10V_4

PR122

S2

PR120
*0_4/S

15 51216VBST

G2

PC301
*0.1U/10V_4

VBST
GND

D1

DDR_VTTREF

PV

33,36,41

GND

S1/D2

3,11,12

21

PR273
*100/F_4

D1

SI

( 3mA )

14 51216DRVH

G1

DRVH

VTTGND

*10U/6.3V_6

VTTSNS

PC71
10U/6.3V_6

VLDOIN

PC72

VTT

0.1U/25V_4

PU7

40

+1.5V +/- 5%
Countinue current:10A
Peak current:12A
OCP minimum:15A

+VIN
PL14

+1.5VSUS

390U/2.5V_5X5.8ESR10

( VTT/2A )

2,3,4,5,11,12,41,43

VDDIO_FB_H

PR114
53.6K/F_4

Reserve for noise


filter on R7x

352-(&75;
4XDQWD&RPSXWHU,QF
1%

Size
Custom
Date:

Document Number

Rev
1A

DDR3L(TPS51216)
Tuesday, March 12, 2013
5

Sheet

40

of

43

+3V
2,4,6,8,9,10,11,12,22,23,24,25,26,27,29,30,31,32,33,42,43
+5V
8,24,25,26,27,30,31,32
+VIN
23,34,35,36,37,39,40,42,43
+1.1V
9
+VAD
34
+3VS5
4,6,8,9,10,25,32,33,35,36,38,43
+5VS5
28,29,35,36,37,38,39,40,42,43
+1.1VS5
9,36
+3VSUS
30
+12VALW
9,34,43
+1.5VSUS
2,3,4,5,11,12,40,43
+3VLANVCC
25,29

+VAD

PR113
22_6
PC86
0.1U/25V_4

LAN_POWER

1U/35V_6

33,34

0.47U/25V_6

16

17

ACIN

PC76

PR88
*0_4

D_CAP

VOUT

CN

18

19
G5934CN

20
VIN

33

PC82
G5934CP

0.1U/25V_4

PC90

CP

41

ON1

+VAD

15 G5934PG

PG

PR80
*750K/F_4
33,36,40

MAINON

MAINON

ON2

14 G5934VSENSE

VSENSE

+12VALW
33,40

SUSON

PU6
SLG55448VTR

ON3

PR89
*100K/F_4

13

REG

PC65
1U/16V_4

ON4

*0_4/S

+5V

8
7
6
5
PQ33
EMB20N03V

+1.1VS5

PC185
0.1U/10V_4

PQ18
EMB20N03V

PC126
0.1U/10V_4

PC194

D
4

MAIND

$
3
2
1

$

+5V

+1.5V

+1.1V

+VIN

0.1U/10V_4

GND
21

+1.5VSUS

G
S

PR204
*22_8

$

PQ34
MDU1512RH +1.1V

PR197
*1M_4

+3VS5

PV
PC187
*10U/6.3V_6

PC110
0.1U/10V_4

PC112
*10U/6.3V_6

PC202
0.1U/10V_4

PC205
*10U/6.3V_6

PC186
0.1U/10V_4

+3V

PC50
0.1U/10V_4

$

PC19

PR198
*22_8

PQ38
EMB32N03K

SUSD

+1.5V
PC33

*10U/6.3V_6

6
5
2
1
3

+3VSUS

0.1U/10V_4

PC229

$

PR195
*1M_4

PQ37
*2N7002K

+3VLANVCC
PQ2
EMB32N03K

0.1U/10V_4

PC46
2200P/50V_4

+3VS5

*10U/6.3V_6

PC241

LAN_ON 3

PC242
0.1U/10V_4

PQ35
*2N7002K

MAIND3.3V

PC247
2200P/50V_4

5
6
7
8

+5VS5

DRIVER2
10

DRIVER1

DISC4

PR106

1
2
5
6

+3V

+3VSUS

6 G5934DISC2

PV

PR92
*0_4/S

1
2
3

$

*0_4/S

PC73
2200P/50V_4
PQ41
EMB20N03V

0.1U/10V_4

PC261

PR102

1
2
3

+3VS5

12

PV

G5934DISC4 8

PR110
*0_4/S

DRIVER3

DISC2

11

DISC1
DRIVER4

G5934DISC1 5

+3VLANVCC

7 G5934DISC3

8
7
6
5

DISC3

3
2
1

MAINON

PC236
2200P/50V_4

PQ36
*2N7002K

PC230
*10U/6.3V_6

PC235
0.1U/10V_4

352-(&75;
4XDQWD&RPSXWHU,QF
1%

Size
Custom

Document Number

Rev
1A

Dis-charge IC (SLG55448V)

Date: Tuesday, March 12, 2013


1

Sheet

41

of

43

VGA Core
V-CORE

1.125V

1.100V

1.075V

1.050V

1.025V

1.000V

0.975V

0.950V

Default

+VIN_GPU

0.850V

0.825V

0.800V

0.1U/25V_4

2200P/50V_4

*4.7U/25V_8

*4.7U/25V_8
1

+VGA_CORE

3212_VCC

PV
PC105
*4.7U/6.3V_6
12

PR248
*0_4/S

49

DGPU_PROCHOT#

DGPU_PWROK

PQ19
*RJK03P3DPA

4,7,33,43

PR161
*2.2_6

PR254
*0_2/S

AGND

DRVH1

AGND

BST1

PR257
*0_2/S

PC152

PC140

PC130
*2200P/50V_4

DB

PR256
*0_4/S

PR255
*10/F_4

PC269

35 3212_DRVH1

36 3212_BS1

14

//P9$

2&3PLQLPXP$

DCR_1.4m ohm

S2

S2

PR138
*10K/F_4

S2

PR166
*649K/F_4

G2

PR128
*10_6

0.875V

3HDNFXUUHQW$

*0.36uH/24A_7X7X3

&RXQWLQXHFXUUHQW$

PC100

3212_SW1

PC101

PL23

PC116

PWRGD

PC115

+3V

PR126
*0_4/S

38 3212_PH1

PC143
*1000P/50V_4

39 3212_PH0

0.900V

PH1

PH0

PR127
*0_4

RAMP

37

+5VS5

16

PR176
*1K/F_4

VCC

0.925V

*1_6

PC114

D1

3212_DRVH1S1

D1

PR162

+5VS5

D1

+VIN_GPU

S1/D2

0DUV :

+VIN

9*$B&25(
PC117

G1

PL3
*0_8/S

*390U/2.5V_5X5.8ESR10

PWRCNTL3 PWRCNTL2 PWRCNTL1

PWRCNTL4

PWRCNTL5

42

17,43

GPIO15 Mars XT

*330u_2.5V_7343

GPIO16 GPIO20

*0.1U/10V_4

GPIO12

2200P/50V_4

GPIO10

0.1U/25V_4

+VGA_CORE

PSI#

38

SW1

27 3212_SW2

22
23
24

EN

DRVL2

DPRSLPVR
PGND

PC121
*150P/50V_4

SWFB2
PWM3

SWFB1

SWFB3

3212_CS_PH1

17

IMON

13
3218_IREF

CSREF

FBRTN

PR136
*0_4

PR137
*100/F_4

20 3212_CSCOMP

ILIM

21

PR174
PC137

PR175
*73.2K/F_4

*4.7U/25V_8

*4.7U/25V_8

2200P/50V_4

0.1U/25V_4

VGPU_CORE_SENSE

PR172
*20K/F_4
PR168
*1K/F_4

PR173

3218_CSREF

*0_4/S

17

*162K/F_4

*47.5K/F_4

PR169
*80.6K/F_4
VSS_GPU_SENSE

352-(&75;
4XDQWD&RPSXWHU,QF

PC141
*1U/6.3V_4

1%

17

Size
Custom
Date:

PR250
*220K_6 NTC

PR164 PR165

+VGA_CORE

PR177
*226K/F_4

*165K/F_4

PR167
*20K/F_4

18

RT

CSCOMP
LLINE

IREF

PC122
*1000P/50V_4

COMP

RPM

PR171
*226K/F_4

PC128
*22P/50V_4

PR156
*39.2K/F_4

PC276

6KRUWHVWWKH
QHWWUDFH

19 3218_CCSUM

PC142
*470P/50V_4

3212_IMON

PR133
*100/F_4

3212_CS_PH2

PR144
*100/F_4

&ORVHWR
3KDVH,QGXFWRU

3218_RT15

PC127
*150P/50V_4

PR147

PR148
*4.7K/F_4
PR134
*0_4

PR154
*100/F_4

33 3218_SWFB1

SI

*1.65K/F_4

28 3218_SWFB2

FB

14
3218_RPM

PR149
*100K/F_4

30

OD3#

CSSUM
3212_FB

PR253
*10/F_4

PC139

CLK_EN#

PR252
*0_4/S

+
PC149

DPRSLPVR_R 40

*0_2/S

29 3212_DRVL2

*1000P/50V_4

PR130
PC108
*0.33U/6.3V_4

PR249
*0_2/S

PC113
*2200P/50V_4

DB

*20K/F_4

DB

PQ20
*RJK03P3DPA

PR240
*0_2/S

PR129
*2.2_6

*390U/2.5V_5X5.8ESR10

9
PC134
*0.22U/25V_6

25 3212_BS2

*330u_2.5V_7343

1
DGPU_PR_EN

+VGA_CORE

*0.36uH/24A_7X7X3

S2

33,43

DCR_1.4m ohm
3212_SW2

S2

SW2

PC148

*0.1U/10V_4

BOOT2

26 3212_DRVH2

*1N4448WS-7-F
PR131

PC135

D1

DRVH2

S2

PC138

PL19

VID0
VID1
VID2
VID3
VID4
VID5
VID6

G2

PV

PD4
C

*0_4/S GPU_VID6

48
47
46
45
44
43
42

PC144

S1/D2

PR124

*0_4/S

32

D1

PVCC

D1

GFX_CORE_CNTRL1
GFX_CORE_CNTRL2
GFX_CORE_CNTRL3
GFX_CORE_CNTRL4
GFX_CORE_CNTRL5

*1_6

PC124
*4.7U/6.3V_6

VARFR

3212_DRVH2S1

G1

7KLV17&&ORVH
WR3KDVH026)(7

PR132
+5VS5

PV
PR123

14
14
14
14
14

31 3212_DRVL1

TRDET#

PC136
*0.01U/25V_4

DRVL1
TTSNS

PR153
*220K_6 NTC

PR155
*5.1K/F_4

+5VS5

3212_TTSNS 11
*7.32K/F_4

+VIN_GPU

1&3*
VR_TT

PR160
+5VS5

PC118
*0.22U/25V_6

34 3212_SW1

3212_VRTT 10

PQ25
*2N7002K

41

*10K/F_4

PR125
+3V

Document Number

Rev
1A

+VGACORE (NCP3218G)
Tuesday, March 12, 2013

42

Sheet
8

of

43

43

+0.95V +/- 3%
Countinue current:2A
Peak current:3A
OCP minimum:4A
+1.0V_VGA
PC293

+0.95V_VGA

PR265

554PVIN_1.0V 9

10

PJP6
*POWER_JP/S

PG

NC

PVIN

LX

PVIN

PR267

554SVIN_1.0V 8

PC294

PC292

0.01U/50V_4

*10U/6.3V_6

*10_6

11

NC

SVIN

FB

GND

EN

PC297
*22P/50V_4

LX
*RT8068A

R1

554NC_1.0V PC296
*68P/50V_4
554FB_1.0V

R2

DGPU_PR_EN

DGPU_PR_EN

PR269
*0_2/S

PR270
*6.65K/F_4

PC303

SI

PC295
*1U/6.3V_4
33,42

PL26
554LX_1.0V
*1uH/11A(EM-10AM05V06) 554FB_1.0V_S

1
2

PC299

PC298

R2 Value

*10U/6.3V_6

PR266
*POWER_JP/S

*22U/6.3V_8

554PG_1.0V 4

DGPU_PWROK
+3V

+1.0V_VGA_S2

PU14

*0.1U/10V_4

PR191
*0_4/S
4,7,33,42

*2.2_6

*2200P/50V_4

PV

V0=0.6*(R1+R2)/R2

PR268
*11.3K/F_4

P/N

1.0V_VGA

10K

CS31002FB26

1.0V

11.3K

CS31132FB07

0.95V

PR192
*10K/F_4
PC184
*0.47U/6.3V_4

DB

1.8V +/- 3%
Countinue current:2A
Peak current:3A
OCP minimum:4A
+1.8V_VGA

PC58

SVIN

FB

GND

EN

554EN_1.8V

PR65
*20K/F_4

PC51

PR67
*69.8K/F_4

DB

R2

PC52
*0.47U/6.3V_4

PC21

PC32

PR64
*10K/F_4

PC166

PC167

PC171

PC173

PC155

PC158

PC159

PC161
*1U/6.3V_4

11
PC40
*1U/6.3V_4

*10U/6.3V_6

V0=0.6*(R1+R2)/R2
DGPU_PR_EN

PQ32
*LTC044

*0.47U/6.3V_4

PC275

PR189
*1M_4

$
+1.5V_VGA

PQ30
*2N7002K

PQ27
*MDU1512RH

PC174

PC175

PC172 +

2
PC183

*10U/6.3V_6

3VGFX_ONG

+3V_VGA

PC147
*0.1U/10V_4

PR190
*30K/F_4

PC146
*2200P/50V_4

DB

1.5V_ONG

VGA_REQ

DGPU_PR_EN

$

PQ26
*EMB32N03K

PC145
0.1U/10V_4

PQ22
*2N7002K

PQ21
*2N7002K

PQ24
*2N7002K
PR146
*1M_4

PQ23
*2N7002K

DGPU_PR_EN

PR243
*22_8

3VGFX_OND

PR159
*1M_4

1
2
5
6

PR170
*22_8

PR245
*1M_4

*0.01U/16V_4

PC168

*10U/6.3V_6

*10U/6.3V_6

PQ31
*2N7002K

1
2
3

PR188
*1M_4

+3VS5

1.5V_OND

+VGA_CORE

0.1U/10V_4

PR185
*1M_4

+12VALW
+3V_VGA
+VIN

PC164

+VIN
PR186
*22_8

+1.5VSUS

+12VALW

+1.5V_VGA

*0.1U/10V_4

0.01U/50V_4

PC18

R1

*0.1U/10V_4

*10_6
PC28

554NC_1.8V PC44
*68P/50V_4
554FB_1.8V

*0.01U/25V_4

554SVIN_1.8V 8

NC

*1000P/50V_4

PR36

PC54
*22P/50V_4

*1U/6.3V_4

LX
*RT8068A

*0.1U/10V_4

LX

PVIN

+1.5V_VGA
PR18
*0_2/S

*0.01U/25V_4

PVIN

*1000P/50V_4

NC

PL7
554LX_1.8V
*1uH/11A(EM-10AM05V06) 554FB_1.8V_S

*10U/6.3V_6

10

PJP1
*POWER_JP/S

PG

*22U/6.3V_8

+5VS5

554PVIN_1.8V 9

+1.8V_L

PU2
554PG_1.8V 4

*0.1U/10V_4

PR76
*0_4/S
DGPU_PWROK

*2.2_6

*2200P/50V_4

PV

PR63

PC291
*390U/2.5V_5X5.8ESR10

+3V_VGA
+1.0V_VGA
+12VALW
+1.8V_VGA

17
13,15,17,18
9,34,41
14,15,17,18,25

352-(&75;
4XDQWD&RPSXWHU,QF
1%

Size
Custom

Document Number

Rev
1A

+1.0V_VGA/1.8V_VGA/3V_VGA

Date: Tuesday, March 12, 2013

Sheet

43
8

of

43

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