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A

Calado Block Diagram

Project code: 91.4X401.001


PCB P/N
: 07227
REVISION
: -1
SYSTEM DC/DC

Mobile CPU

CLK GEN. 3

2.0G : 71.MEROM.A0U
2.33G : 71.MEROM.B0U

DDR2
533/667 MHz

533/667MHz

G792

533/667 MHz

LVDS

71.GL960.00U, SLA5V

AZALIA

26

MIC In

6,7,8,9,10,11 GM965 : KI.96501.008

C-Link0

25

ACPI 1.1

INT.MIC(Digital)

3 SATA

abgn/bg

PCIex1

APL5913

RJ45

23

23

1D8V_S3

G909

28

1D8V_S3

1D5V_S0
(1.5A)

MAX8731
INPUTS

Active Managemnet Technology(DO)

KBC
Winbond

SPI I/F

DCBATOUT

DEBUG
CONN. 36

29

28

HDD
21

36

OUTPUTS
CHG_PWR

LPC

BIOS
W25X80-VSS

18V

4.0A

UP+5V
5V
100mA

71.ICH8M.C0U, SLA5Q, B3

CPU DC/DC
USB

16,17,18,19

PATA

21

35

CHARGER
LPC BUS

ICH8 : 71.80101.024

3D3V_AUX_S5
(100mA)

APL5915

PWR SW
P2231NFC
24

New card
24

WPC8763L

MODEM
MDC Card

35
1D25V_S0
(1.5A)

5V_AUX_S5

24

Serial Peripheral I/F

27

DDR_VREF_S0
(1.5A)

Matrix Storage Technology(DO)

SATA
1

TXFM

High Definition Audio


LPC I/F

OP AMP
G1412

RJ1122

TPS51100(G2997) 35

Mini Card

10 USB 2.0/1.1 ports

INT.SPKR

Line Out
(No-SPDIF)

DCBATOUT

ETHERNET (10/100/1000MbE)

APA203127

OUTPUTS
1D05V_S0(8A)

1D8V_S3

22

1 PATA 66/100

INPUTS

15

BCM5787MKMLG

6 PCIe ports

OP AMP

BOTTOM

DDR_VREF_S3

PCI/PCI BRIDGE

25

14" WXGA
LCD
14

GL960 :KI.96501.010

ICH8M

ALC268

GND

CRT

GIGA LAN

Codec

34

TPS51124

TVOUT 15

1D8V_S3(12A)

RGB CRT

LVDS, CRT I/F

X4 DMI
400MHz

SYSTEM DC/DC

SVIDEO/COMP

DDR Memory I/F

12,13

3D3V_S5(6A)

AGTL+ CPU I/F

533/667MHz

5V_S5(6A)
DCBATOUT

VCC

INTEGRATED GRAHPICS

DDR2

OUTPUTS

TOP

4, 5

Intel GM965/GL960

12,13

INPUTS

PCB STACKUP

20

667/800MHz@1.05V

HOST BUS

33

TPS51120

Merom 479
Celeron M

RTM875T-605 71.00875.C0W
(ICS 9LPRS502 71.09502.B0W)

Touch
Pad 29

INT.
KB 29

MAX8770

PWR BD
07563

INPUTS

32

OUTPUTS

VCC_CORE_S0
DCBATOUT

CDROM
21

USB
3 PORT
21

USB 5in1
Cardreader
RTS5158

0~1.3V
47A

25

<Core Design>

BT

Wistron Corporation

24

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

BLOCK DIAGRAM
Size
A3

Document Number

Rev

-1

Calado

Date: Thursday, September 13, 2007

Sheet

of

39

ICH8M Functional Strap Definitions


ICH8-M EDS 21762
Usage/When Sampled

Signal
HDA_SDOUT

XOR Chain Entrance/


PCIE Port Config1 bit1,
Rising Edge of PWROK

2.0V1

C
page 16

Comment
Allows entrance to XOR Chain testing when TP3
pulled low.When TP3 not pulled low at rising edge
of PWROK,sets bit1 of RPC.PC(Config Registers:
offset 224h)

PCIE config1 bit0,


Rising Edge of PWROK.

This signal has a weak internal pull-down.


Sets bit0 of RPC.PC(Config Registers:Offset 224h)

GNT2#

PCIE config2 bit0,


Rising Edge of PWROK.

GPIO20

Reserved

This signal has a weak internal pull-up.


Sets bit2 of RPC.PC2(Config Registers:Offset 0224h)
This signal should not be pulled high.

HDA_SYNC

GNT1#/
GPIO51

ESI Strap (Server Only)


Rising Edge of PWROK

Top-Block
Swap Override.
Rising Edge of PWROK.

GNT3#

GNT0#/
SPI_CS1#

INTVRMEN

3
LAN100_SLP

ESI compatible mode is for server platforms only.


This signal should not be pulled low for desttop
and mobile.
Sampled low:Top-Block Swap mode(inverts A16 for
all cycles targeting FWH BIOS space).
Note: Software will not be able to clear the
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.

Boot BIOS Destination


Selection.
Rising Edge of PWROK.
Integrated VccSus1_05,
VccSus1_5 and VccCL1_5
VRM Enable/Disable.
Always sampled.

Controllable via Boot BIOS Destination bit


(Config Registers:Offset 3410h:bit 11:10).
GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.
Enables integrated VccSus1_05, VccSus1_5 and
VccCL1_5 VRM's when sampled high

Integrated VccLAN1_05
and VccCL1_05 VRM
Enable/Disable.
Always sampled.

Enables integrated VccLAN1_05 and VccCL1_05 VRM's


when sampled high

PCI Express Lane


Reversal. Rising Edge
of PWROK.

Signal has weak internal pull-up. Sets bit 27


of MPC.LR(Device 28:Function 0:Offset D8)

No Reboot.
Rising Edge of PWROK.

If sampled high, the system is strapped to the


"No Reboot" mode(ICH8 will disable the TCO Timer
system reboot feature). The status is readable
via the NO REBOOT bit.

TP3

XOR Chain Entrance.


Rising Edge of PWROK.

This signal should not be pull low unless using


XOR Chain testing.

GPIO33/
HDA_DOCK
_EN#

Flash Descriptor
Security Override Strap
Rising Edge of PWROK

This signal has a weak internal pull-up.


Sampled low:the Flash Descriptor Security will be
overridden. If high,the security measures will be
in effect.This should only be used in manufacturing
environments.

SATALED#
SPKR

ICH8M Integrated Pull-up


and Pull-down Resistors
ICH8-M EDS 21762

SIGNAL

Crestline Strapping Signals and


Crestline EDS 20954
Configuration
page 7
2.0V1

Resistor Type/Value

Pin Name

Strap Description

CFG[2:0]

FSB Frequency Select

HDA_BIT_CLK

PULL-DOWN 20K

HDA_RST#

NONE

HDA_SDIN[3:0]

PULL-DOWN 20K

CFG[4:3]

Reserved

HDA_SDOUT

PULL-DOWN 20K

CFG5

DMI x2 Select

HDA_SYNC

PULL-DOWN 20K

CFG[8:6]

Reserved

GNT[3:0]

PULL-UP 20K

GPIO[20]

PULL-DOWN 20K ?

LDA[3:0]#/FHW[3:0]#

PULL-UP 20K

LAN_RXD[2:0]

PULL-UP 10K

LDRQ[0]

PULL-UP 20K

LDRQ[1]/GPIO23

PULL-UP 20K

PME#

PULL-UP 20K

PWRBTN#

PULL-UP 20K

SATALED#

PULL-UP 15K

SPI_CS1#

PULL-UP 20K

SPI_CLK

PULL-UP 20K

SPI_MOSI

PULL-UP 20K

SPI_MISO

PULL-UP 20K

TACH_[3:0]

PULL-UP 20K ?

SPKR

PULL-DOWN 20K

TP[3]

PULL-UP 20K

USB[9:0][P,N]

PULL-DOWN 15K

CL_RST#

PULL-UP 13K

1.0

Configuration
001 = FSB533
011 = FSB667
010 = FSB800
others = Reserved

0 = DMI x2
1 = DMI x4

(Default)

Low Power PCI Express

0 = Normal mode
1 = Low Power mode

CFG9

PCI Express Graphics


Lane Reversal

0 = Reverse Lanes,15->0,14->1 ect..


1= Normal operation(Default):Lane
Numbered in order

CFG[11:10]

Reserved

CFG[13:12]

XOR/ALL Z test
straps

CFG[15:14]

Reserved

CFG16

FSB Dynamic ODT

CFG[18:17]

Reserved

CFG19

DMI Lane Reversal

00
01
10
11

=
=
=
=

(Default)

Reserved
XOR mode enabled
All Z mode enabled
Normal Operation (Default)

Reserved
0 = Dynamic ODT Disabled
1 = Dynamic ODT Enabled (Default)

0 = Normal operation (Default):lane


Numbered in order
1 =Reverse Lane,4->0,3->1 ect...

CFG20

SDVO/PCIE
Concurrent

0 = Only SDVO or PCIE x1 is


operational (Default)
1 =SDVO and PCIE x1 are operating
simultaneously via the PEG port

SDVOCRTL
_DATA

SDVO Present

0 = No SDVO Card present (Default)


1= SDVO Card present

NOTE: All strap signals are sampled with respect to the leading
edge of the Crestline GMCH PWORK in signal.

History

ICH8M IDE Integrated Series


Termination Resistors
DD[15:0], DIOW#, DIOR#, DREQ,
approximately 33 ohm
DDACK#,

IORDY, DA[2:0], DCS1#,

DCS3#, IDEIRQ

USB Table
PCIE Routing

USB

LANE1

LAN Marvell

LANE2

MiniCard WLAN

USB1

LANE3

NewCard WLAN

NC

USB2

Pair

Device

NC

USB3

BT

Cardreader

MINICARD

CCD

NEW1

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Reference
Size
A3

Document Number

Rev

-1

Volvi2

Date: Monday, September 10, 2007

Sheet

of

39

3D3V_S0
3D3V_S0

C490
SCD1U16V2ZY-2GP

C496
SCD1U16V2ZY-2GP

C506
SCD1U16V2ZY-2GP

SC4D7U10V5ZY-3GP

DY

C488
SCD1U16V2ZY-2GP

3D3V_CLKGEN_S0
C507

1
C491
SCD1U16V2ZY-2GP

R339
0R0603-PAD
1
2

1
C492
SCD1U16V2ZY-2GP

1
C498
SCD1U16V2ZY-2GP

C493
C495
SCD1U16V2ZY-2GP SC4D7U10V5ZY-3GP

SC1U16V3ZY-GP

C218

DY

SC4D7U6D3V3KX-GP

3D3V_CLKPLL_S0

C223

3D3V_48MPWR_S0

0R0603-PAD
1
2
R72

R71
0R0603-PAD
1
2

3D3V_S0

C500
SCD1U16V2ZY-2GP

3D3V_S0

DY

DY

DY
R321
10KR2J-3-GP

R325
10KR2J-3-GP

R336
10KR2J-3-GP

R334
10KR2J-3-GP

3D3V_CLKGEN_S0
3D3V_48MPWR_S0

U15

PCLKCLK2
PCLKCLK3
PCLKCLK4
PCLKCLK5

RTM
R322
10KR2J-3-GP

R326
10KR2J-3-GP

R333
10KR2J-3-GP

R331
10KR2J-3-GP

DY

3D3V_CLKPLL_S0

CL=20pF0.2pF
C236
SC27P50V2JN-2-GP
1
2

GEN_XTAL_IN

28

PCLK_KBC

R320 2

17

PCLK_ICH

R323 2

R91
R90

X4
X-14D31818M-44GP 17
82.30005.951 4,7
4,7
GEN_XTAL_OUT_R

2
1

4,7

C235
SC27P50V2JN-2-GP

17

DY

1 10MR2J-L-GP
2 0R0402-PAD

2
9
16
53

VDDPCI
VDD48
VDD
VDDREF

31
47

VDDSRC
VDDCPU

12
20
26
37
41

VDD96I/O
VDDPLL3I/O
VDDSRCI/O
VDDSRCI/O
VDDCPUI/O

TPAD30 TP142

PCLKCLK0

PCICLK0/CR#_A

TPAD30 TP141

PCLKCLK1

PCICLK1/CR#_B

TPAD30 TP169

PCLKCLK2

PCICLK2/LTE
PCICLK3

PCLKCLK3

1 22R2J-2-GP

PCLKCLK4

PCICLK4/SRC5_EN

1 22R2J-2-GP

PCLKCLK5

PCI_F5/ITP_EN

GEN_XTAL_OUT

X2
X1

10

USB_48MHZ/FSLA

CLK48_ICH
CPU_SEL0
CPU_SEL1

R327 2
R324 2

1 22R2J-2-GP
1 2K2R2J-2-GP

49

FSLB/TEST_MODE

CPU_SEL2

R332 2

1 2K2R2J-2-GP CPU_SEL2_R

54

FSLC/TEST_SEL/REF0

R335 2

1 22R2J-2-GP

8
11
15
19
23
34
44
50

GNDPCI
GND48
GND
GND
GNDSRC
GNDSRC
GNDCPU
GNDREF

CLK_ICH14

CLK48

51
52

SDATA
SCLK

55
56

DOTT_96/SRCCLKT0
DOTC_96/SRCCLKC0

13
14

SRCCLKT1/SE1
SRCCLKC1/SE2

17
18

CLK_PCIE_NEW 24
CLK_PCIE_NEW# 24

SRCCLKT2/SATACLKT
SRCCLKC2/SATACLKC

21
22

CLK_PCIE_SATA 16
CLK_PCIE_SATA# 16

SRCCLKT3/CR#_C
SRCCLKC3/CR#_D

24
25

CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7

SRCCLKT4
SRCCLKC4

27
28

CLK_PCIE_MINI1 24
CLK_PCIE_MINI1# 24

SMBD_ICH 12,19
SMBC_ICH 12,19
DREFCLK 7
DREFCLK# 7

PCI_STOP#/SRCCLKT5
CPU_STOP#/SRCCLKC5

30
29

SRCCLKT6
SRCCLKC6

33
32

CLK_PCIE_ICH 17
CLK_PCIE_ICH# 17

SRCCLKT7/CR#_F
SRCCLKC7/CR#_E

36
35

DREFSSCLK 7
DREFSSCLK# 7

CPUCLKT2_ITP/SRCCLKT8
CPUCLKC2_ITP/SRCCLKC8

39
38

CLK_PCIE_LAN 22
CLK_PCIE_LAN# 22

CPUCLKT1
CPUCLKC1

43
42

CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6

CPUCLKT0
CPUCLKC0

46
45

CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4

CK_PWRGD/PD#

48

NC#40

40

PM_STPPCI# 17
PM_STPCPU# 17

3D3V_CLKGEN_S0

CLK_PWRGD 17
R330
1 DY

10KR2J-3-GP

ICS9LPRS502PGLFT-GP

71.09502.B0W

RTM:71.00875.C0W
PCLK_KBC

2 EC105

2 EC106

DY SC22P50V3JN-GP

CLK48_ICH

DY SC22P50V3JN-GP

EMI capacitor

RTM875T-605 setting table


PIN NAME
DESCRIPTION

ICS9LPR502HGLFT-GP setting table


PIN NAME
DESCRIPTION
PCI0/CR#_A

Byte 5, bit 7
0 = PCI0 enabled (default)
1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair
Byte 5, bit 6
0 = CR#_A controls SRC0 pair (default),
1= CR#_A controls SRC2 pair

PCI0/CR#_A

Byte 5, bit 7
0 = PCI0 enabled (default)
1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair
Byte 5, bit 6
0 = CR#_A controls SRC0 pair (default),
1= CR#_A controls SRC2 pair

PCI1/CR#_B

Byte 5, bit 5
0 = PCI1 enabled (default)
1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair
Byte 5, bit 4
0 = CR#_B controls SRC1 pair (default)
1= CR#_B controls SRC4 pair

PCI1/CR#_B

Byte 5, bit 5
0 = PCI1 enabled (default)
1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair
Byte 5, bit 4
0 = CR#_B controls SRC1 pair (default)
1= CR#_B controls SRC4 pair

PCI2/TME

0 = Overclocking of CPU and SRC Allowed


1 = Overclocking of CPU and SRC NOT allowed

PCI2/TME

0 = Overclocking of CPU and SRC Allowed


1 = Overclocking of CPU and SRC NOT allowed

PCI3/SRC-5_EN

0 = Pin29 as CPU_STOP# , pin 30 as PCI_STOP#.


1 = Pins29,30 as SRC-5 differential pair.

PCI4/SRC5_EN

0 = Pin29 as CPU_STOP# , pin 30 as PCI_STOP#.


1 = Pins29,30 as SRC-5 differential pair.

PCI4/27M_SEL

0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96#


1 = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0#

Title

PCI_F5/ITP_EN

0 =SRC8/SRC8#
1 = ITP/ITP#

PCI_F5/ITP_EN

0 =SRC8/SRC8#
1 = ITP/ITP#

Size

SEL2 SEL1 SEL0


FSC FSB FSA
0
0
1
1

1
0
0
0

1
1
1
0

CPU

FSB

100M
133M
166M
200M

X
X
667M
800M

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Clock Generator
Document Number

Rev

Calado
Date: Wednesday, September 12, 2007
A

-1

Sheet
E

of

39

H_A#[35..3]

H_A#[35..3]

H_DINV#[3..0]
U44A 1 OF 4

M4
N5
T2
V3
B2
C3
D2
D22
D3
F6

TPAD30

TP76

RSVD_CPU_B1

B1

RSVD#M4
RSVD#N5
RSVD#T2
RSVD#V3
RSVD#B2
RSVD#C3
RSVD#D2
RSVD#D22
RSVD#D3
RSVD#F6

H_DSTBP#[3..0]

6
4

H_D#[63..0]

C1
F3
F4
G3
G2

HIT#
HITM#

G6
E4

CONTROL

BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#

H_LOCK# 6
H_CPURST# 6,38
H_RS#[2..0]

H_RS#0
H_RS#1
H_RS#2

PROCHOT#
THRMDA
THRMDC
THERMTRIP#

HCLK

BCLK0
BCLK1

U44B 2 OF 4
6

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

H_TRDY# 6
H_HIT#
H_HITM#

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20

H_THERMDA

6
6

H_THERMDC
XDP_BPM#5
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#

TP72
TP65
TP61
TP70
TP64
TP62
TP37

TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30

C443
SC2200P50V2KX-2GP

1D05V_S0

D21
A24
B25

H_THERMDA 20
H_THERMDC 20

C7

PM_THRMTRIP-A# 7,16,30

A22
A21

CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3
1D05V_S0

PM_THRMTRIP#
should connect to
ICH8 and MCH
without T-ing
( No stub)

R279
1KR2F-3-GP

Layout Note:
"CPU_GTLREF0"
0.5" max length.

R280
2KR2F-3-GP

KEY_NC
BGA479-SKT6-GPU3

6
6
6

62.10079.001
2nd source: 62.10053.401
1D05V_S0

R58

2 39R2F-GP

XDP_TDI

R56

2 150R2F-1-GP

H_D#16 N22
H_D#17 K25
H_D#18 P26
H_D#19 R23
H_D#20 L23
H_D#21 M24
H_D#22 L22
H_D#23 M23
H_D#24 P25
H_D#25 P23
H_D#26 P22
H_D#27 T24
H_D#28 R24
H_D#29 L25
H_D#30 T25
H_D#31 N25
L26
M26
N24

D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
DSTBN1#
DSTBP1#
DINV1#

H_DSTBN#1
H_DSTBP#1
H_DINV#1

CPU_GTLREF0

TPAD30 TP24
TPAD30 TP77
TPAD30 TP23
3,7
3,7
3,7

XDP_TMS

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
DSTBN0#
DSTBP0#
DINV0#

6 H_DSTBN#0
6 H_DSTBP#0
6 H_DINV#0
R33
56R2J-4-GP

CPU_PROCHOT#_R

E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25

CPU_SEL0
CPU_SEL1
CPU_SEL2

TEST4
TEST5
TEST6

AD26
C23
D25
C24
AF26
AF1
A26
B22
B23
C21

GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6

DATA GRP2

H4

16

LOCK#
RESET#
RS0#
RS1#
RS2#
TRDY#

Place testpoint on
H_IERR# with a GND
0.1" away

H_IERR#

STPCLK#
LINT0
LINT1
SMI#

H_INIT#

DATA GRP3

16
16
16
16

H_BREQ#0 6

D20
B3

BR0#

H_STPCLK#
H_INTR
H_NMI
H_SMI#

D5
C6
B4
A3

F1

IERR#
INIT#

1 1

A20M#
FERR#
IGNNE#

H_DSTBN#[3..0]

R34
56R2J-4-GP

THERMAL

ICH

16
16
16

H_D#[63..0]

H_A20M#
H_FERR#
H_IGNNE#

A6
A5
C4

H_DEFER# 6
H_DRDY# 6
H_DBSY# 6

H_DSTBP#[3..0]

1D05V_S0

A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#
ADSTB1#

H5
F21
E1

6
6
6

DATA GRP1

H_ADSTB#1

Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1

DEFER#
DRDY#
DBSY#

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

ADDR GROUP 1

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_ADS#
H_BNR#
H_BPRI#

DATA GRP0

H_REQ#0 K3
H_REQ#1 H2
H_REQ#2 K2
H_REQ#3 J3
H_REQ#4 L1

H1
E2
G5

H_ADSTB#0
H_REQ#[4..0]

ADS#
BNR#
BPRI#

XDP/ITP SIGNALS

6
6

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
ADSTB0#

RESERVED

J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1

ADDR GROUP 0

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

H_DINV#[3..0]

H_DSTBN#[3..0]

TP35 TPAD30

MISC

BSEL0
BSEL1
BSEL2

D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
DSTBN2#
DSTBP2#
DINV2#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47

D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN3#
DSTBP3#
DINV3#

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

COMP0
COMP1
COMP2
COMP3

R26
U26
AA1
Y1

DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#

E5
B5
D24
D6
D7
AE6

H_DSTBN#2 6
H_DSTBP#2 6
H_DINV#2 6

H_DSTBN#3 6
H_DSTBP#3 6
H_DINV#3 6
COMP0
COMP1
COMP2
COMP3

R277
R278
R64
R65

1
1
1
1

2
2
2
2

27D4R2F-L1-GP
54D9R2F-L1-GP
27D4R2F-L1-GP
54D9R2F-L1-GP

H_DPRSTP# 7,16,32
H_DPSLP# 16
H_DPWR# 6
H_PWRGD 16,30,38
H_CPUSLP# 6
PSI#
32

BGA479-SKT6-GPU3
Layout Note:
Comp0, 2 connect with Zo=27.4 ohm, make
trace length shorter than 0.5" .
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5" .

Net "TEST4" as short as possible,


make sure "TEST4" routing is
reference to GND and away other
noisy signals

<Core Design>

XDP_TCK

R59

2 27D4R2F-L1-GP

XDP_TRST#

R57

2 649R2F-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

All place within 2" to CPU

CPU (1 of 2)
Size

Document Number

Rev

-1

Calado
Date: Wednesday, September 12, 2007
A

Sheet
E

of

39

U44D

4 OF 4

VCC_CORE_S0
VCC_CORE_S0

VCC_CORE_S0

1
4

CPU_AF2

TPAD30 TP69

ST900U2D5VM-GP

2
3

1
2

1
2

TC6

965
77.E9071.001

1
2

1
2

1
2

1
2

1
2

DY

DY

C172
SC10U6D3V5MX-3GP

DY

C168
SC10U6D3V5MX-3GP

DY

C415
SC10U6D3V5MX-3GP

DY

C133
SC10U6D3V5MX-3GP

DY

C138
SC10U6D3V5MX-3GP

DY

C21
SC10U6D3V5MX-3GP

DY

C140
SC10U6D3V5MX-3GP

C126
SC10U6D3V5MX-3GP

C179
SC10U6D3V5MX-3GP

960

C149

960

C146

960

C178

960

C165

960

SC10U6D3V5MX-3GP

C194
SCD1U10V2KX-4GP
1D05V_S0

1
2

1
2

1
2

1
2

C195

C99
SC4D7U6D3V3KX-GP

C92

SC4D7U6D3V3KX-GP

C111

SCD1U10V2KX-4GP

C428
SC4D7U6D3V3KX-GP

C433

32 VCC_CORE_S0
32
32
32
32
R52
32
100R2F-L1-GP-U
32

C98

SCD1U10V2KX-4GP

L19
1
2
0R3-0-U-GP

C196

SCD1U10V2KX-4GP

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6

1D5V_S0

1D5V_VCCA_S0

layout note: "1D5V_VCCA_S0"


as short as possible

C197

1D05V_S0

SCD1U10V2KX-4GP

AE7

SCD1U10V2KX-4GP

VSSSENSE

C163

SC10U6D3V5MX-3GP

AF7

SCD1U10V2KX-4GP

VCCSENSE

DY

C156

960

SC10U6D3V5MX-3GP

AD6
AF5
AE5
AF4
AE3
AF3
AE2

SCD1U10V2KX-4GP

VID0
VID1
VID2
VID3
VID4
VID5
VID6

960

C155

VCC_CORE_S0

SCD01U16V2KX-3GP

B26
C26

C157

960

SC10U6D3V5MX-3GP

VCCA
VCCA

C122
SCD1U10V2KX-4GP

VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

960

SCD1U10V2KX-4GP

VCC_SENSE 32
VSS_SENSE 32

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

SC10U6D3V5MX-3GP

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

U44C 3 OF 4

A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18

ENG

VCC_CORE_S0

Layout Note:
R53
100R2F-L1-GP-U

VCCSENSE and VSSSENSE lines


should be of equal length.

BGA479-SKT6-GPU3

Layout Note:
Provide a test point (with
no stub) to connect a
differential probe
between VCCSENSE and
VSSSENSE at the location
where the two 54.9ohm
resistors terminate the
55 ohm transmission line.

A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

CPU_AE1

TP78 TPAD30

CPU_AE26
CPU_A2

TP25 TPAD30
TP71 TPAD30

CPU_A25
CPU_AF25

TP30 TPAD30
TP29 TPAD30

BGA479-SKT6-GPU3

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CPU (2 of 2)
Size

Document Number

Rev

-1

Calado
Date: Wednesday, September 12, 2007
A

Sheet
E

of

39

U43A 1 OF 10
H_D#[63..0]

H_D#[63..0]

H_A#[35..3]
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

1D05V_S0

H_SWING routing Trace width and


Spacing use 10 / 20 mil

R285
221R2F-2-GP

H_SWING Resistors and


Capacitors close MCH
500 mil ( MAX )

R284
100R2F-L1-GP-U
C437
SCD1U10V2KX-4GP

H_SWING

H_SCOMP and H_SCOMP# Resistors and


Capacitors close MCH 500 mil ( MAX )
3

1D05V_S0

1
R276
1D05V_S0
1
R275

2 H_SCOMP
54D9R2F-L1-GP

2 H_SCOMP#
54D9R2F-L1-GP

H_RCOMP routing Trace width and


Spacing use 10 / 20 mil
1
R282

2 H_RCOMP
24D9R2F-L-GP

Place them near to the chip ( < 0.5")


2

H_REF Decoupling Crestline


close Crestline 100 mil

H_SWING
H_RCOMP

H_SCOMP
H_SCOMP#

W1
W2

H_SCOMP
H_SCOMP#

B6
E5

H_CPURST#
H_CPUSLP#

B9
A9

H_AVREF
H_DVREF

2
1

J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19

H_ADS#
H_ADSTB#0
H_ADSTB#1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#

G12
H17
G20
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_A#[35..3]

4
4

H_ADS#
4
H_ADSTB#0 4
H_ADSTB#1 4
H_BNR#
4
H_BPRI# 4
H_BREQ#0 4
H_DEFER# 4
H_DBSY# 4
CLK_MCH_BCLK 3
CLK_MCH_BCLK# 3
H_DPWR# 4
H_DRDY# 4
H_HIT#
4
H_HITM# 4
H_LOCK# 4
H_TRDY# 4

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

K5
L2
AD13
AE13

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

M7
K3
AD2
AH11

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

L7
K2
AC2
AJ10

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

M14
E13
A11
H13
B12

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

E12
D7
D8

H_RS#0
H_RS#1
H_RS#2

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBN#[3..0]

4
2

H_DSTBP#[3..0]

H_DSTBP#[3..0]

H_REQ#[4..0]

H_RS#[2..0]

H_AVREF

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_DINV#[3..0]

B3
C2

4,38 H_CPURST#
4
H_CPUSLP#

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_SWING
H_RCOMP
1D05V_S0

R287
1KR2F-3-GP

E2
G2
G7
M6
H7
H3
G4
F3
N8
H2
M10
N12
N9
H5
P13
K9
M2
W10
Y8
V4
M3
J1
N5
N3
W6
W9
N2
Y7
Y9
P4
W3
N1
AD12
AE3
AD9
AC9
AC7
AC14
AD11
AC11
AB2
AD7
AB1
Y3
AC6
AE2
AC5
AG3
AJ9
AH8
AJ14
AE9
AE11
AH12
AJ5
AH5
AJ6
AE7
AJ7
AJ2
AE5
AJ3
AH2
AH13

HOST

C446
SCD1U16V2ZY-2GP

R286
2KR2F-3-GP

CRB v0.9 REQUEST

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

Document Number

GMCH (1 of 6)

Rev

-1

Calado

Date: Wednesday, September 12, 2007

Sheet
E

of

39

3D3V_S0

BH18
BJ15
BJ14
BE16

M_ODT0
M_ODT1
M_ODT2
M_ODT3

12,13
12,13
12,13
12,13

SM_RCOMP_VOH
SM_RCOMP_VOL

BK31
BL31

SM_RCOMP_VOH
SM_RCOMP_VOL

SM_RCOMP
SM_RCOMP#

BL15
BK14

M_RCOMPP
M_RCOMPN

SM_VREF#AR49
SM_VREF#AW4

AR49
AW4

DREFCLK
DREFCLK#
DREFSSCLK
DREFSSCLK#

B42
C42
H48
H47

PEG_CLK
PEG_CLK#

K44
K45

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

AN47
AJ38
AN42
AN46

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

AM47
AJ39
AN41
AN45

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

TPAD30 TP66

C82
SCD1U10V2KX-4GP
2

TPAD30 TP67

DREFCLK 3
DREFCLK# 3
DREFSSCLK 3
DREFSSCLK# 3

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

AJ46
AJ41
AM40
AM44

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

AJ47
AJ42
AM39
AM43

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

M_RCOMPP
2
20R2F-GP
M_RCOMPN
2
20R2F-GP

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

17
17
17
17

R39
2 150R2F-1-GP
1

TV_DACB

RN31

1
2
3
4

PM_EXTTS#1
PM_EXTTS#0
TV_DCONSEL0
TV_DCONSEL1

L41
L43
N41
N40
D46
C45
D44
E42

LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK

G51
E51
F49
C48

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

G50
E50
F48
D47

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

G44
B47
B45

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2

E44
A47
A45

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2

E27
G27
K27

TVA_DAC
TVB_DAC
TVC_DAC

F27
J27
L27

TVA_RTN
TVB_RTN
TVC_RTN

M35
P33

TV_DCONSEL0
TV_DCONSEL1

H32
G32
K29
J29
F29
E29

CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#

PEG_COMPI
PEG_COMPO

SRN10KJ-6-GP
TV_DACC

15 GMCH_BLUE
R47
GMCH_GREEN 15 GMCH_GREEN
2 150R2F-1-GP
1

GMCH_BLUE

R38
GMCH_RED
2 150R2F-1-GP
1

GMCH_RED

15

GMCH_GREEN

GMCH_RED

15 GMCH_DDCCLK
15 GMCH_DDCDATA
15 GMCH_VSYNC

1
R49
1
R46

15 GMCH_HSYNC

1
R36
R309
1KR2F-3-GP

GMCH_DDCCLK
K33
GMCH_DDCDATA G35
GMCH_VS
2
E33
33R2F-3-GP
C32
GMCH_HS
2
F33
33R2F-3-GP

N43 PEG_CMP
M43

PEG_RX#0
PEG_RX#1
PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
PEG_RX#7
PEG_RX#8
PEG_RX#9
PEG_RX#10
PEG_RX#11
PEG_RX#12
PEG_RX#13
PEG_RX#14
PEG_RX#15

J51
L51
N47
T45
T50
U40
Y44
Y40
AB51
W49
AD44
AD40
AG46
AH49
AG45
AG41

PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7
PEG_RX8
PEG_RX9
PEG_RX10
PEG_RX11
PEG_RX12
PEG_RX13
PEG_RX14
PEG_RX15

J50
L50
M47
U44
T49
T41
W45
W41
AB50
Y48
AC45
AC41
AH47
AG49
AH45
AG42

PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7
PEG_TX#8
PEG_TX#9
PEG_TX#10
PEG_TX#11
PEG_TX#12
PEG_TX#13
PEG_TX#14
PEG_TX#15

N45
U39
U47
N51
R50
T42
Y43
W46
W38
AD39
AC46
AC49
AC42
AH39
AE49
AH44

PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
PEG_TX8
PEG_TX9
PEG_TX10
PEG_TX11
PEG_TX12
PEG_TX13
PEG_TX14
PEG_TX15

M45
T38
T46
N50
R51
U43
W42
Y47
Y39
AC38
AD47
AC50
AD43
AG39
AE50
AH43

CRT_DDC_CLK
CRT_DDC_DATA
CRT_VSYNC
CRT_TVO_IREF
CRT_HSYNC

CRT_IREF
2
1K3R2F-1-GP

17

A37
R32 TEST2_GMCH

1
C465

C466
SC2D2U6D3V3MX-1-GP

SCD01U16V2KX-3GP
SM_RCOMP_VOL

R292
1KR2F-3-GP

C462

C461
SC2D2U6D3V3MX-1-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

SCD01U16V2KX-3GP

R50
20KR2J-L2-GP

1
R295
3K01R2F-3-GP

TEST1
TEST2

SM_RCOMP_VOH

R55
10KR2J-3-GP

MCH_ICH_SYNC#

CRT_IREF routing Trace


width use 20 mil

CLK_3GPLLREQ#

R311
392R2F-GP

C480

H35
K36
G39
G40

1D8V_S3
R298 1KR2F-3-GP
2
1

MCH_CLVREF

FOR Calero: 255 ohm


Crestline: 1.3k ohm

CL_CLK0 17
CL_DATA0 17
PWROK
17,20
CL_RST#0
17

AM49
AK50
AT43
AN49
AM50

CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF

ME

TV_DACA
TV_DACB
TV_DACC

8
7
6
5

1D25V_S0

SDVO_CTRL_CLK
SDVO_CTRL_DATA
CLKREQ#
ICH_SYNC#

MISC

TV_DACA

E35
A39
C38
B39
E36

SCD1U10V2KX-4GP

15
15
15

R44
GMCH_BLUE
2 150R2F-1-GP
1

3D3V_S0

NC

4,16,30 PM_THRMTRIP-A#
17,32 PM_DPRSLPVR

NC#BJ51
NC#BK51
NC#BK50
NC#BL50
NC#BL49
NC#BL3
NC#BL2
NC#BK1
NC#BJ1
NC#E1
NC#A5
NC#C51
NC#B50
NC#A50
NC#A49
NC#BK2

R288
1

R37
2 150R2F-1-GP
1

R40
2 150R2F-1-GP
1

100R2J-2-GP

BJ51
BK51
BK50
BL50
BL49
BL3
BL2
BK1
BJ1
E1
A5
C51
B50
A50
A49
BK2

R289
1

3D3V_S0

17
17
17
17
17
17
17
17

GMCH_TXAOUT3+

1D8V_S3

17
17
17
17

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

GMCH_TXAOUT3-

14 GMCH_TXAOUT0+
14 GMCH_TXAOUT1+
14 GMCH_TXAOUT2+

CLK_MCH_3GPLL 3
CLK_MCH_3GPLL# 3

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VR_EN

14 GMCH_TXACLK14 GMCH_TXACLK+

14 GMCH_TXAOUT014 GMCH_TXAOUT114 GMCH_TXAOUT2-

DDR_VREF_S3

DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#

LIBG
L_LVBG

L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN

SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3

R51 1
2
2K4R2F-GP
TPAD30 TP63

J40
H39
E39
E40
C37
D35
K40

PCI_EXPRESS GRAPHICS

12,13
12,13
12,13
12,13

8
7
6
5

M_CS0#
M_CS1#
M_CS2#
M_CS3#

1
2
3
4

BG20
BK16
BG16
BE13

LCTLA_CLK
LCTLB_DATA

SM_CS#0
SM_CS#1
SM_CS#2
SM_CS#3

U43C 3 OF 10

L_BKLTCTL

14 CLK_DDC_EDID
14 DAT_DDC_EDID
14 GMCH_LCDVDD_ON

2
R35

PLT_RST1#

12,13
12,13
12,13
12,13

17,28

PWROK

PM_BM_BUSY#
PM_DPRSTP#
PM_EXT_TS#0
PM_EXT_TS#1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR

PM

17,20

G41
L39
PM_EXTTS#0 L36
PM_EXTTS#1 J36
AW49
RSTIN#
AV20
N20
G36

M_CKE0
M_CKE1
M_CKE2
M_CKE3

GMCH_BL_ON

17 PM_BMBUSY#
4,16,32 H_DPRSTP#

BE29
AY32
BD39
BG37

28

14

VGA

SM_CKE0
SM_CKE1
SM_CKE3
SM_CKE4

RSVD#B44
RSVD#C44
RSVD#A35
RSVD#B37
RSVD#B36
RSVD#B34
RSVD#C34

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

12
12
12
12

CFG

P27
N27
N24
C21
C23
F23
N23
G23
J20
C20
R24
L23
J23
E23
E20
K23
M20
M24
L32
N33
L35

CPU_SEL0
CPU_SEL1
CPU_SEL2

M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3

R54
24D9R2F-L-GP

TV

3,4
3,4
3,4

AW30
BA23
AW25
AW23

1D05V_S0

RN32
SRN10KJ-6-GP

SM_CK#0
SM_CK#1
SM_CK#3
SM_CK#4

CLK

B44
C44
A35
B37
B36
B34
C34

12
12
12
12

RSVD#BH39
RSVD#AW20
RSVD#BK20

M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3

DDR MUXING

BH39
AW20
BK20

AV29
BB23
BA25
AV23

LVDS

RSVD#H10
RSVD#B51
RSVD#BJ20
RSVD#BK22
RSVD#BF19
RSVD#BH20
RSVD#BK18
RSVD#BJ18
RSVD#BF23
RSVD#BG23
RSVD#BC23
RSVD#BD24

RSVD

H10
B51
BJ20
BK22
BF19
BH20
BK18
BJ18
BF23
BG23
BC23
BD24

SM_CK0
SM_CK1
SM_CK3
SM_CK4

DMI

RSVD#P36
RSVD#P37
RSVD#R35
RSVD#N35
RSVD#AR12
RSVD#AR13
RSVD#AM12
RSVD#AN13
RSVD#J12
RSVD#AR37
RSVD#AM36
RSVD#AL36
RSVD#AM37
RSVD#D20

GRAPHICS VID

P36
P37
R35
N35
AR12
AR13
AM12
AN13
J12
AR37
AM36
AL36
AM37
D20

U43B 2 OF 10

Title

GMCH (2 of 6)
Size

Document Number

Rev

-1

Calado
Date: Wednesday, September 12, 2007
A

Sheet
E

of

39

U43D 4 OF 10

AR43
AW44
BA45
AY46
AR41
AR45
AT42
AW47
BB45
BF48
BG47
BJ45
BB47
BG50
BH49
BE45
AW43
BE44
BG42
BE40
BF44
BH45
BG40
BF40
AR40
AW40
AT39
AW36
AW41
AY41
AV38
AT38
AV13
AT13
AW11
AV11
AU15
AT11
BA13
BA11
BE10
BD10
BD8
AY9
BG10
AW9
BD7
BB9
BB5
AY7
AT5
AT7
AY6
BB7
AR5
AR8
AR9
AN3
AM8
AN10
AT9
AN9
AM9
AN11

SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

SA_BS0
SA_BS1
SA_BS2

BB19
BK19
BF29

SA_CAS#

BL17

SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7

AT45
BD44
BD42
AW38
AW13
BG8
AY5
AN6

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
SA_DQS#0
SA_DQS#1
SA_DQS#2
SA_DQS#3
SA_DQS#4
SA_DQS#5
SA_DQS#6
SA_DQS#7

AT46
BE48
BB43
BC37
BB16
BH6
BB2
AP3
AT47
BD47
BC41
BA37
BA16
BH7
BC1
AP2

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14

BJ19
BD20
BK27
BH28
BL24
BK28
BJ27
BJ25
BL28
BA28
BC19
BE28
BG30
BJ16
BJ29

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

SA_RAS#
SA_RCVEN#

BE18
AY20

SA_WE#

BA19

M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CAS#
M_A_DM[7..0]

M_A_DQS[7..0]

M_A_DQS#[7..0]

M_A_A[14..0]

12,13
12,13
12,13
12,13

12 M_B_DQ[63..0]

M_A_DM[7..0] 12

M_A_DQS[7..0] 12

M_A_DQS#[7..0] 12

M_A_A[14..0] 12,13

M_A_RAS# 12,13

SA_RCVEN#
TP47 TPAD30

M_A_WE# 12,13

Place Test PAD Near to Chip


as could as possible

M_B_DQ[63..0]
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

AP49
AR51
AW50
AW51
AN51
AN50
AV50
AV49
BA50
BB50
BA49
BE50
BA51
AY49
BF50
BF49
BJ50
BJ44
BJ43
BL43
BK47
BK49
BK43
BK42
BJ41
BL41
BJ37
BJ36
BK41
BJ40
BL35
BK37
BK13
BE11
BK11
BC11
BC13
BE12
BC12
BG12
BJ10
BL9
BK5
BL5
BK9
BK10
BJ8
BJ6
BF4
BH5
BG1
BC2
BK3
BE4
BD3
BJ2
BA3
BB3
AR1
AT3
AY2
AY3
AU2
AT2

SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63

SB_BS0
SB_BS1
SB_BS2

AY17
BG18
BG36

SB_CAS#

BE17

SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7

AR50
BD49
BK45
BL39
BH12
BJ7
BF3
AW2

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
SB_DQS#0
SB_DQS#1
SB_DQS#2
SB_DQS#3
SB_DQS#4
SB_DQS#5
SB_DQS#6
SB_DQS#7

AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14

BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13
BE24

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14

SB_RAS#
SB_RCVEN#

AV16
AY18

SB_RCVEN#

SB_WE#

BC17

DDR SYSTEM MEMORY B

12 M_A_DQ[63..0]

U43E 5 OF 10

DDR SYSTEM MEMORRY A

M_A_DQ[63..0]
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

M_B_BS#0
M_B_BS#1
M_B_BS#2
M_B_CAS#
M_B_DM[7..0]

M_B_DQS[7..0]

M_B_DQS#[7..0]

12,13
12,13
12,13
12,13

M_B_DM[7..0] 12

M_B_DQS[7..0] 12

M_B_DQS#[7..0] 12
3

M_B_A[14..0]

M_B_A[14..0] 12,13

M_B_RAS# 12,13
TP44 TPAD30
M_B_WE# 12,13
2

Place Test PAD Near to Chip


ascould as possible

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

GMCH (3 of 6)
Size

Document Number

Rev

-1

Calado
Date: Wednesday, September 12, 2007
A

Sheet
E

of

39

VCC_NCTF + VCC=1573mA
1D05V_S0

VSS NCTF
VCC NCTF

1
2

1
2

1
2

1
2

1
2

VSS SCB

VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB

NB_A3
NB_B2
NB_C1
NB_BL1
NB_BL51
NB_A51

A3
B2
C1
BL1
BL51
A51

VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF

VCC_AXM
VCC_AXM
VCC_AXM
VCC_AXM
VCC_AXM
VCC_AXM
VCC_AXM

AT33
AT31
AK29
AK24
AK23
AJ26
AJ23

1
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

GMCH (4 of 6)
Size

Document Number

Rev

-1

Calado
B

TP136TPAD30
TP135TPAD30
TP134TPAD30
TP20 TPAD30
TP74 TPAD30
TP75 TPAD30

1D05V_S0

Date: Monday, September 10, 2007


A

C193

1
2

1
2

1
2

C192

T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28

POWER

VSS AXM

1
2

1
2

1
2

1
2

2
1

C125 C189

SC1U10V3KX-3GP

C79

C93

AL24
AL26
AL28
AM26
AM28
AM29
AM31
AM32
AM33
AP29
AP31
AP32
AP33
AL29
AL31
AL32
AR31
AR32
AR33

VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF

VSS AXM NCTF

1
2

2
1

1
2

C83

DY

Coupling CAP

VCC_AXM_NCTF + VCC_AXM=540mA

AW45SM_LF1_GMCH
BC39 SM_LF2_GMCH
BE39 SM_LF3_GMCH
BD17 SM_LF4_GMCH
BD4 SM_LF5_GMCH
AW8 SM_LF6_GMCH
AT6 SM_LF7_GMCH

SCD1U10V2KX-4GP

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

Place on the Edge

C162 C167 C174

SCD1U10V2KX-4GP

DY

C154 C177 C181


SCD1U10V2KX-4GP

R48
0R6J-3-GP
2
1

SC1U10V3KX-3GP

DY

VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF

VCC_AXM_S0
R42
0R0603-PAD
1
2

SCD47U16V3ZY-3GP

1D05V_S0

SCD22U10V2KX-1GP

C97

FOR VCC AXM NCTF AND VCC AXM

SCD22U10V2KX-1GP

C136

C187

SCD1U10V2KX-4GP

C482
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C481

VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF

C175

C176
SC4D7U10V5ZY-3GP

1D25V_S0

SCD1U10V2KX-4GP

VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG

C131

C117

SC10U6D3V5MX-3GP

1D05V_S0

R20
T14
W13
W14
Y12
AA20
AA23
AA26
AA28
AB21
AB24
AB29
AC20
AC21
AC23
AC24
AC26
AC28
AC29
AD20
AD23
AD24
AD28
AF21
AF26
AA31
AH20
AH21
AH23
AH24
AH26
AD31
AJ20
AN14

C147

SC10U6D3V5MX-3GP

C128

VCC_AXG_NCTF + VCC_AXG=7700mA

SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP

DY

VCC GFX NCTF

1
2
1

1
2
1

C458

C150

Coupling CAP

SCD1U10V2KX-4GP

C471
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

TC7
ST220U2D5VBM-5GP

C470

Place on the Edge

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

DY

C170

C173

C180
SCD1U10V2KX-4GP

Place CAP where


LVDS and DDR2 taps

VCC SM LF

FOR VCC SM

VCC GFX

3138mA

VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM

308 mils from


the Edge

SCD1U10V2KX-4GP

AU32
AU33
AU35
AV33
AW33
AW35
AY35
BA32
BA33
BA35
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35
BF33
BF34
BG32
BG33
BG35
BH32
BH34
BH35
BJ32
BJ33
BJ34
BK32
BK33
BK34
BK35
BL33
AU30

VCC SM

POWER

1D8V_S3

DY

ST220U2D5VBM-5GP

VCC CORE

1
2

1
2

2
1
2

1
2

2
1
2

Coupling CAP 370 mils from the Edge

TC18

AB33
AB36
AB37
AC33
AC35
AC36
AD35
AD36
AF33
AF36
AH33
AH35
AH36
AH37
AJ33
AJ35
AK33
AK35
AK36
AK37
AD33
AJ36
AM35
AL33
AL35
AA33
AA35
AA36
AP35
AP36
AR35
AR36
Y32
Y33
Y35
Y36
Y37
T30
T34
T35
U29
U31
U32
U33
U35
U36
V32
V33
V36
V37

SCD1U10V2KX-4GP

DY

U43G 7 OF 10

1D05V_S0

SCD1U10V2KX-4GP

VCC

C185

VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF

SCD1U10V2KX-4GP

R43
1
2VCC_GMCH1R30
0R0402-PAD

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

1D05V_S0

SC10U6D3V5MX-3GP

C184

AT34
AH28
AC32
AC31
AK32
AJ31
AJ28
AH32
AH31
AH29
AF32

C169

T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31

SC10U6D3V5MX-3GP

C110

1573mA AT35
SCD1U10V2KX-4GP

DY

C104
SCD1U10V2KX-4GP

C160
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C186

FOR VCC CORE AND VCC NCTF

U43F 6 OF 10

FOR VCC CORE

Sheet
E

of

39

1D05V_S0

Place on the edge

80mA

1
2

HV

1
2

C182
SC10U6D3V5MX-3GP

1D8V_S3

100mA

3D3V_S0

A43
C40
B40
Tahoe

C473
SC1KP50V2KX-1GP

100mA

R304 1
2
0R0603-PAD

SM CK

1D8V_TXLVDS_S3

AD51
W50
W51
V49
V50

C132

AH50
AH51

VTTLF1
VTTLF2
VTTLF3

5V_S0

C426

SC10U6D3V5MX-3GP

C69

C432

C75

SC10U6D3V5MX-3GP

A7
F2
AH1

VTTLF
VTTLF
VTTLF

1D05V_S0

250mA
1

VCC_RXR_DMI
VCC_RXR_DMI

DY

SC10U6D3V5MX-3GP

C151
SC10U6D3V5MX-3GP

1200mA
2

PEG

VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG

ENG
C191
SC10U6D3V5MX-3GP

1
2

C166

BK24
BK23
BJ24
BJ23

VCCD_LVDS
VCCD_LVDS

VCCD_PEG_PLL

J41
H42

1
2

1
2
1

C158
SCD1U10V2KX-4GP

VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK

AJ50

VCCD_HPLL

SC10U6D3V5MX-3GP

1D8V_S3

VCCD_QDAC

C106

1D25V_S0

A CK

VCCD_CRT
VCCD_TVDAC

DMI

M32
L29

C444
SCD1U10V2KX-4GP
1D05V_S0
D22

3D3V_S0
R310

1
BAS16-1-GP
83.00016.B11
2

1D05V_HV_S0 2
1
10R3J-3-GP

3D3V_S0_DIS_LDO
U42

1
2

G913CF-GP
74.00913.A3F

I max = 300 mA

SET

DY

DY

R418
DY
16K5R2F-1-GP

R419
10KR2F-2-GP

C455

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

GMCH (5 of 6)
Size

Document Number

Rev

-1

Calado

C148
SCD1U10V2KX-4GP

DY

OUT

SC1U16V3ZY-GP

1D5VRUN_QDAC

IN
GND DY
SHDN#

3
2
1

SCD1U10V2KX-4GP

Date: Monday, September 10, 2007


A

1D05V_S0

TV

VCCA_TVA_DAC
VCCA_TVA_DAC
VCCA_TVB_DAC
VCCA_TVB_DAC
VCCA_TVC_DAC
VCCA_TVC_DAC

1
2

1
1
2

VCC_DMI

VCC_HV
VCC_HV

1D25V_S0

C139
SC10U6D3V5MX-3GP

1
1
2

B23
B21
A21

VCC_TX_LVDS

SCD1U10V2KX-4GP

200mA

VCC_AXF
VCC_AXF
VCC_AXF

AXF

VCCA_SM_CK
VCCA_SM_CK

SC1U16V3ZY-GP

VTT
PLL
A PEG
A SM

BC29
BB29

C449

180ohm 100MHz

CRT

1
2

1
2

VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM_NCTF
VCCA_SM_NCTF

850mA
C143

DY

150mA

1
2

AT22
AT21
AT19
AT18
AT17
AR17
AR16

1D5V_S0
L6
1
2
FCM1608CF-1-GP

AR29

VTTLF

C483

1
2

1
2

VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM

5mA
N28
250mA
AN2
1D25V_RUN_PEGPLL 100mAU48

C198
SCD1U10V2KX-4GP

C164

VCC_AXD_NCTF

SCD1U10V2KX-4GP

C142
DY
SCD1U10V2KX-4GP SCD1U10V2KX-4GP

AW18
AV19
AU19
AU18
AU17

C25
B25
C27
B27
B28
A28

C141

100mA

SCD1U10V2KX-4GP

VCCD_CRT

AT23
AU28
AU24
AT29
AT25
AT30

VCCA_PEG_PLL

1D8V_S3
R60
0R0603-PAD
2
11D8V_SUS_DLVDS

R41
0R0603-PAD
1
2

C152

VSSA_PEG_BG

1D5VRUN_QDAC

C463
SC2D2U6D3V3MX-1-GP

SCD1U10V2KX-4GP

1D5V_S0

M_VCCA_TVDACA

40mA M_VCCA_TVDACB
40mA M_VCCA_TVDACC
40mA
1D5V_S0
60mA VCCD_CRT

SCD1U10V2KX-4GP

M_VCCA_TVDACC

DY

1
2

C459
SC2D2U6D3V3MX-1-GP

SCD1U10V2KX-4GP

C464

VCCA_PEG_BG

K49

VCC_AXD
VCC_AXD
VCC_AXD
VCC_AXD
VCC_AXD
VCC_AXD

SCD1U10V2KX-4GP

1D25V_S0

M_VCCA_TVDACB

C73
SCD1U10V2KX-4GP

2 R294
1
0R0402-PAD

K50

POWER

TV/CRT

SCD1U10V2KX-4GP

C460

VSSA_LVDS

LVDS

C456
SC2D2U6D3V3MX-1-GP

C429

C159

60mA
2 R293
1
0R0402-PAD

VCCA_LVDS

B41

C457

A41

A LVDS

2
1
2

ST330U6D3VDM-21GP

M_VCCA_TVDACA

SC1U10V3KX-3GP

DY TC5

SC10U6D3V5MX-3GP

C161

C145

R416
0R3-0-U-GP

DY

3D3V_S0_DIS_LDO

2nd source:68.00206.041

1
2

1
2

3D3V_S0

R417
0R3-0-U-GP

2 R291
1
0R0402-PAD

VCCA_MPLL

1D25V_S0

350mA

SCD1U10V2KX-4GP

1D25V_S0

180ohm 100MHz

VCCA_HPLL

U51

SC1U10V3KX-3GP

1D25V_RUN_PEGPLL

C425
SC1U10V3KX-3GP

DY

C109
SC10U6D3V5MX-3GP

220ohm 100MHz

L22
1
2
FCM1608CF-1-GP

AL2
AM2

1D25V_RUN_PEGPLL

1D25V_S0

C430
SCD1U10V2KX-4GP

C190
SCD1U10V2KX-4GP

400uA

C135
SC10U6D3V5MX-3GP

3D3VTVDAC

3D3V_S0

VCCA_DPLLB

AXD

1
2

1
2

M_VCCA_MPLL

1D25V_S0

C199
SCD1U10V2KX-4GP

10mA

R301 21D8V_TXLVDS
1
0R0402-PAD

VCCA_DPLLA

1 2

1
1
2

1
2
1
2

C472
SC1KP50V2KX-1GP

C431
SCD1U10V2KX-4GP

B49
H49

1
2

1
2
1
2

1
2

1D8V_TXLVDS_S3

5mA
80mA M_VCCA_DPLLA
80mA M_VCCA_DPLLB
50mA M_VCCA_HPLL
150mA M_VCCA_MPLL

C123

C188
SC10U6D3V5MX-3GP

C115

SC1U10V3KX-3GP

C423

2nd source:68.00206.021

L23
0R0603-PAD
1
2

VSSA_DAC_BG

M_VCCA_HPLL
SC10U6D3V5MX-3GP

1
2
L18
FCM1608KF-121-GP

B32

VCCA_CRT_DAC
VCCA_CRT_DAC

200mA

SCD1U10V2KX-4GP

1M_VCCA_DAC_BG

2nd source:68.00206.021

SC10U6D3V5MX-3GP

DY
120ohm 100MHz

VCCA_DAC_BG

180ohm 100MHz

120ohm 100MHz

C424

M_VCCA_DAC_BG A30

C468
SC2D2U6D3V3MX-1-GP

C467
SCD1U10V2KX-4GP
SC2D2U6D3V3MX-1-GP
L17
FCM1608KF-121-GP
1
2

A33
B33

U13
U12
U11
U9
U8
U7
U5
U3
U2
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1

C119

DY

SC1U10V3KX-3GP

C484
SCD1U10V2KX-4GP

2 R296

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

VCC_SYNC

C108
SC4D7U6D3V3KX-GP

C171
SCD1U10V2KX-4GP

3D3VTVDAC

J32

C427
SC2D2U6D3V3MX-1-GP

C485
SC10U6D3V5MX-3GP

U43H 8 OF 10

3D3V_SYNC_S0

C114
SC4D7U6D3V3KX-GP

C200
SCD1U10V2KX-4GP

C112

BLM18HG102SN-1GP
R45
0R0603-PAD

10mA
M_VCCA_DPLLB

1
DY

SC4D7U6D3V3KX-GP

M_VCCA_DPLLA

R312
0R0603-PAD
1
2

1D25V_S0

R300

C475
SC10U6D3V5MX-3GP
4

180ohm 100MHz

3D3V_S0
1D25V_S0
R308
0R0603-PAD
1
2

3D3VTVDAC

Sheet
E

10

of

39

U43I

A13
A15
A17
A24
AA21
AA24
AA29
AB20
AB23
AB26
AB28
AB31
AC10
AC13
AC3
AC39
AC43
AC47
AD1
AD21
AD26
AD29
AD3
AD41
AD45
AD49
AD5
AD50
AD8
AE10
AE14
AE6
AF20
AF23
AF24
AF31
AG2
AG38
AG43
AG47
AG50
AH3
AH40
AH41
AH7
AH9
AJ11
AJ13
AJ21
AJ24
AJ29
AJ32
AJ43
AJ45
AJ49
AK20
AK21
AK26
AK28
AK31
AK51
AL1
AM11
AM13
AM3
AM4
AM41
AM45
AN1
AN38
AN39
AN43
AN5
AN7
AP4
AP48
AP50
AR11
AR2
AR39
AR44
AR47
AR7
AT10
AT14
AT41
AT49
AU1
AU23
AU29
AU3
AU36
AU49
AU51
AV39
AV48
AW1
AW12
AW16

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

9 OF 10

VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41

U43J10 OF 10
U43J10

C46
C50
C7
D13
D24
D3
D32
D39
D45
D49
E10
E16
E24
E28
E32
E47
F19
F36
F4
F40
F50
G1
G13
G16
G19
G24
G28
G29
G33
G42
G45
G48
G8
H24
H28
H4
H45
J11
J16
J2
J24
J28
J33
J35
J39
K12
K47
K8
L1
L17
L20
L24
L28
L3
L33
L49
M28
M42
M46
M49
M5
M50
M9
N11
N14
N17
N29
N32
N36
N39
N44
N49
N7
P19
P2
P23
P3
P50
R49
T39
T43
T47
U41
U45
U50
V2
V3

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

W11
W39
W43
W47
W5
W7
Y13
Y2
Y41
Y45
Y49
Y5
Y50
Y11
P29
T29
T31
T33
R28

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AA32
AB32
AD32
AF28
AF29
AT27
AV25
H50

VSS

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

GMCH (6 of 6)
Size

Document Number

Rev

-1

Calado
Date: Monday, September 10, 2007
5

Sheet
1

11

of

39

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

11
29
49
68
129
146
167
186

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

13
31
51
70
131
148
169
188

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

114
119

OTD0
OTD1

1
2

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

8 M_B_DQ[63..0]

8 M_B_DQS#[7..0]

8 M_B_DQS[7..0]

DDR_VREF_S3

C212

M_CS2# 7,13
M_CS3# 7,13

CKE0
CKE1

79
80

M_CKE2 7,13
M_CKE3 7,13

CK0
CK0#

30
32

M_CLK_DDR2 7
M_CLK_DDR#2 7

CK1
CK1#

164
166

M_CLK_DDR3 7
M_CLK_DDR#3 7
M_B_DM[7..0] 8

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

10
26
52
67
130
147
170
185

SDA
SCL

195
197

VDDSPD

199

SA0
SA1

198
200

NC#50
NC#69
NC#83
NC#120
NC#163/TEST

50
69
83
120
163
81
82
87
88
95
96
103
104
111
112
117
118

VREF
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196

202

GND

GND

201

MH1

MH1

MH2

MH2

8,13
8,13

M_A_BS#0
M_A_BS#1

107
106

BA0
BA1

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

50
69
83
120
163

NC#50
NC#69
NC#83
NC#120
NC#163/TEST

110
115
79
80
108
113
109

CS0#
CS1#
CKE0
CKE1
RAS#
CAS#
WE#

197
195

SCL
SDA

114
119

ODT0
ODT1

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

3D3V_S0

C397
SCD1U16V2ZY-2GP

1D8V_S3

7,13
7,13
7,13
7,13
8,13
8,13
8,13

M_CS0#
M_CS1#
M_CKE0
M_CKE1
M_A_RAS#
M_A_CAS#
M_A_WE#
SMBC_ICH
SMBD_ICH

DDR_VREF_S3
7,13
7,13

DY

M_ODT0
M_ODT1

C211

C207

DDR2-200P-23-GP-U1

62.10017.A71

High 9.2mm

SCD1U16V2ZY-2GP

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

M_A_BS#2

8 M_A_DQ[63..0]

DDRB_SA02
R245
10KR2J-3-GP

MH2

8,13

TPAD30 TP43

SMBD_ICH 3,19
SMBC_ICH 3,19

MH1

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85

SC4D7U6D3V3KX-GP

SCD1U16V2ZY-2GP

SC4D7U6D3V3KX-GP

DY

C208

M_ODT2
M_ODT3

7,13
7,13

110
115

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

201

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16_BA2

MH2

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

13
31
51
70
131
148
169
188
11
29
49
68
129
146
167
186

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

10
26
52
67
130
147
170
185

CK0
CK0#
CK1
CK1#

30
32
164
166

SA0
SA1

198
200

VDD_SPD

199

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

81
82
87
88
95
96
103
104
111
112
117
118

VREF

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

2
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196

GND

GND

202

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_DQS[7..0]

M_A_DQS#[7..0]

8
4

M_A_DM[7..0] 8

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR1
M_CLK_DDR#1

7
7
7
7

3D3V_S0

BA0
BA1

CS0#
CS1#

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

MH1
8,13 M_A_A[14..0]

M_B_BS#0
M_B_BS#1

M_B_RAS# 8,13
M_B_WE# 8,13
M_B_CAS# 8,13

8,13
8,13

REVERSE TYPE

8,13

TPAD30 TP42
M_B_BS#2

108
109
113

REVERSE TYPE

107
106

RAS#
WE#
CAS#

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

8,13 M_B_A[14..0]

DM2

DM1

C23
SCD1U16V2ZY-2GP
3

1D8V_S3

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

SKT-SODIMM20022U2GP

62.10017.691

Title

High 5.2mm

Size

Document Number

DDR2 Socket
Calado

Date: Wednesday, September 12, 2007


A

Sheet

Rev

-1
12

of

39

PARALLEL TERMINATION

1
2

1
2

1
2

1
2

1
2

1
2

DY

C120
SCD1U16V2ZY-2GP

C100
SCD1U16V2ZY-2GP

DY

C70
SCD1U16V2ZY-2GP

C121
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C101

M_A_A[14..0] 8,12

DY

C74

DY
2

C134

1
2

C116

DY

C130
SCD1U16V2ZY-2GP

C96

SCD1U16V2ZY-2GP

DY

C153

SCD1U16V2ZY-2GP

C129

DY

SCD1U16V2ZY-2GP

C144

DY

C105

DY

C89

C127

SCD1U16V2ZY-2GP

M_B_A[14..0] 8,12
SCD1U16V2ZY-2GP

SRN56J-5-GP

DY

SCD1U16V2ZY-2GP

M_ODT2 7,12
M_ODT3 7,12
M_B_RAS# 8,12

C78
SCD1U16V2ZY-2GP

M_B_WE# 8,12

C88
SCD1U16V2ZY-2GP

M_B_A[14..0]

C103

SCD1U16V2ZY-2GP

8
7
6
5

SRN56J-5-GP
RN3
1 M_B_A13
2
3
4

M_A_A[14..0]

M_B_A3
M_B_A1
M_B_A10

DY

C85

SCD1U16V2ZY-2GP

SRN56J-5-GP
RN7
1
2
3
4

DY
M_CKE2 7,12
M_CKE3 7,12
M_B_BS#2 8,12

C86

SCD1U16V2ZY-2GP

8
7
6
5

C71

SCD1U16V2ZY-2GP

SRN56J-5-GP
RN15
1
2
3
4 M_B_A12

Put decap near power(0.9V)


and pull-up resistor

DDR_VREF_S0

SCD1U16V2ZY-2GP

8
7
6
5

M_A_A12

SCD1U16V2ZY-2GP

8
7
6
5

SRN56J-5-GP
RN11
1 M_B_A9
2 M_B_A5
3 M_B_A8
4

M_CKE0 7,12
M_CKE1 7,12
M_A_BS#2 8,12

SCD1U16V2ZY-2GP

1
2
3
4

SCD1U16V2ZY-2GP

8
7
6
5

Decoupling Capacitor

Put decap near power(0.9V) and pull-up resistor

RN14

DDR_VREF_S0

RN8
M_B_BS#1 8,12

M_A_A13
M_ODT0 7,12
M_CS0# 7,12
M_A_RAS# 8,12

SRN56J-5-GP

C118

2
1

DY

C107
SC2D2U6D3V3MX-1-GP

C94

DY

SCD1U16V2ZY-2GP

1
2
3
4

DY

SCD1U16V2ZY-2GP

RN4

8
7
6
5

C113
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

C77

SRN56J-5-GP

2
1

M_B_BS#0 8,12
M_B_CAS# 8,12
M_CS3# 7,12
M_CS2# 7,12

1
2
3
4

C95
SC2D2U6D3V3MX-1-GP

RN2

8
7
6
5

C102
SC2D2U6D3V3MX-1-GP

SRN56J-5-GP

C124
SC2D2U6D3V3MX-1-GP

M_B_A14
M_B_A6
M_B_A7
M_B_A11

SC2D2U6D3V3MX-1-GP

1
2
3
4

C84

RN12

8
7
6
5

SRN56J-5-GP

Place these Caps near DM1

1D8V_S3

M_B_A2
M_B_A0
M_B_A4

1
2
3
4

8
7
6
5

RN9

8
7
6
5

1
2
3
4

M_A_A2
M_A_A0
M_A_A4

M_A_BS#1 8,12

Place these Caps near DM2

1D8V_S3

M_A_A6
M_A_A7
M_A_A11
M_A_A14

SRN56J-5-GP

DY

C137
SC2D2U6D3V3MX-1-GP

1
2
1

C442

1
2
1

DY
2

1
2
3
4

C80

C450

C447
SCD1U16V2ZY-2GP

DY

SCD1U16V2ZY-2GP

RN13

8
7
6
5

C452

SCD1U16V2ZY-2GP

DY

SCD1U16V2ZY-2GP

SRN56J-5-GP

2
M_A_A9
M_A_A8
M_A_A5
M_A_A3

1
2
3
4

C72

SC2D2U6D3V3MX-1-GP

RN10

8
7
6
5

C454

SC2D2U6D3V3MX-1-GP

M_CS1# 7,12
M_ODT1 7,12

SRN56J-5-GP

C445

M_A_CAS# 8,12

SC2D2U6D3V3MX-1-GP

1
2
3
4

SC2D2U6D3V3MX-1-GP

RN5

8
7
6
5

SRN56J-5-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

RN6

8
7
6
5

1
2
3
4

M_A_A1
M_A_A10
Title

M_A_BS#0 8,12
M_A_WE# 8,12

DDR2 Termination Resistor


Size

SRN56J-5-GP

Document Number

Rev

-1

Calado
Date: Wednesday, September 12, 2007
A

Sheet
E

13

of

39

26
26

DMIC_12
DMIC_CLK

DMIC_12
DMIC_CLK

LCD/INVERTER CONN

R423 1 33R2J-2-GP
2 DMIC_12_1
R422 1 33R2J-2-GP
2 DMIC_CLK_1

LED

Q26

3D3V_S0

1DY

2 EC70
SCD1U10V2MX-3GP
R200 1
0R2J-2-GP DY
R199 1
0R2J-2-GP

L_BKLTCTL
BRIGHTNESS
BLON_OUT

DMIC_12_1
DMIC_CLK_1
CLK_DDC_EDID
DAT_DDC_EDID

CCD_PWR

BRIGHTNESS_CN
BLON_OUT

DCBATOUT
F1

DY
2

1
1

SC100P50V2JN-3GP

C355

DY

C356
SC100P50V2JN-3GP

R197
10KR2J-3-GP

28
28

39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
42

69.44001.041
C1
SC10U25V6KX-1GP

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

28

C3
SC1U6D3V3KX-1GP

1
2

ENG

R196 USB_82 0R0402-PAD


1
R198 USB_8+
2 0R0402-PAD
1

USBPN8
USBPP8

3 OUT PWRLED#_DB

R2

LCD1

41
40
17
17

GND 2

1
EC72
SC33P50V2JN-3GP

EC71
SC33P50V2JN-3GP

LCDVDD

PD

BLON_5V
GMCH_TXAOUT2- 7
GMCH_TXAOUT2+ 7
GMCH_TXAOUT1GMCH_TXAOUT1+
GMCH_TXAOUT0GMCH_TXAOUT0+
GMCH_TXACLK- 7
GMCH_TXACLK+ 7

IN

PWR_G_LED

7
7
7
7

ODD CHANNEL

28

84.00143.J11
Q25
GND 2

IN

1 R411
2 FRONT_PWRLED#_R 3
100R2J-2-GP

STDBY_LED#_R
1 R414
2
100R2J-2-GP

4
LED-BO-4-GP

83.00195.G70

R1

CHDTA143ZUPT-GP

84.00143.J11
Q23
GND 2

EVEN CHANNEL

3 OUT CHARGE_LED#_DB

R2
28

IN

CHARGE_LED

Charger:
Green: Battary Full
OFF : Battery or DC only
Orange : Charging
Orange Blink : Battery low

ACES-CONN40C-1-GP

20.F1047.040

1nd source: 20.F1047.040

28

on Front Panel

R1

CHDTA143ZUPT-GP

84.00143.J11
Q24

1 R410
2 CHARGE_LED#_R
100R2J-2-GP

1 R413
2 DC_BATFULL#_R
100R2J-2-GP

3 OUT DC_BATFULL#_DB

R2
IN

DC_BATFULL

83.00195.I70

R1

CHDTA143ZUPT-GP

84.00143.J11
5V_S0

1
2

LED-GY-14-GP

ENG
RN29

VOUT
VIN
GND
NC#3 EN/EN#

5
4

R2
BLON_OUT

28

IN

L-line_LED

R1

5V_S5
LED1

A
LED-B-77-GP-U2

83.01221.I70

CHDTA143ZUPT-GP

84.00143.J11

U55 for LED panel

RT9711-APBG-GP
74.09711.A7F
LCDVDD

R401
33R2J-2-GP
1
2

3D3V_S0
24 WLAN_LED#_MC

U1

R396
75R2J-1-GP
1
2

WLAN_LED#_1

WLAN_LED#

69.50007.951

C2
C354
SC4D7U6D3V5KX-3GP SCD1U10V2MX-3GP

Q10

Q1 Q23 Q24 Q25 Q26 Q27 change to 84.00143.D1K

AAT4280IGU-1-T1GP
74.04280.C9P

C7
SC1U6D3V3KX-1GP

28 WLAN_TEST_LED

2N7002-11-GP
84.27002.W31

6
5
4

ENG
Q27
GND 2

3 OUT

R2

IN
GND
IN

C5
SCD1U10V2MX-3GP

F2
CCD_PWR

DY

SC1U6D3V3KX-1GP

3D3V_S0

C4

OUT
GND
ON/OFF#

1
2
3

7 GMCH_LCDVDD_ON

DY

4
3
1
2

DY

DY

1
2
3

C582
SCD1U10V2MX-3GP

7 DAT_DDC_EDID

SC4D7U10V5ZY-3GP

DY

7 CLK_DDC_EDID

R1
3 OUT L-line_LED# 1
2 L-line_LED#_1 K
100R2J-2-GP

DY

BLON_5V
C581

ENG

Q1
GND 2

U55

SRN4K7J-8-GP

EC73
SC100P50V2JN-3GP

3D3V_S5

LED2

GND 2

3D3V_S0

EC74
SC100P50V2JN-3GP

5V_S5

3 OUT STDBY_LED#_DB

R2

PWR_O_LED

5V_S0

LED3

CHDTA143ZUPT-GP

Power:
BLUE : S0
Orange : S3
Orange Blinking : Enter S4

on Front Panel

R1

5V_S0

28

3D3V_S0

BT_LED

IN

BT_LED#

R1

CHDTA143ZUPT-GP

TP170 TPAD30

5V_S0

TP171 TPAD30

5V_S5

TP172 TPAD30

3D3V_AUX_S5

5V_S5

R206
10KR2J-3-GP

KBC_PWRBTN# 28

2
1

G67
GAP-OPEN

C358

21

ODD_LED#

16

SATA_LED#

2
3
1

C367
SC1U6D3V3KX-1GP

D16

R207
470R2J-2-GP
KBC_PWRBTN#_CN 1
2

TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30

TP173
TP175
TP174
TP177
TP176
TP179
TP178
TP180
TP182
TP181
TP183
TP185
TP184

21

CN1

A-BUTTON#
WLAN_LED#
BT_LED#
PWRLED#_DB
STDBY_LED#_DB
MEDIA_LED#
NUM_LED#
CAP_LED#

PD

SCD1U10V2MX-3GP

WLAN_LED#
BT_LED#
PWRLED#_DB
STDBY_LED#_DB
MEDIA_LED#
NUM_LED#
CAP_LED#
A-BUTTON#
INTERNET#
WIRELESS_BTN#
BT_BTN#
MAIL#
KBC_PWRBTN#_CN

C378
SC1U6D3V3KX-1GP

BAW56PT-U
83.00056.E11

28
28

NUM_LED#
CAP_LED#

28
A-BUTTON#
28 INTERNET#
28 WIRELESS_BTN#
28
BT_BTN#
28
MAIL#

WLAN_LED#
BT_LED#
PWRLED#_DB
STDBY_LED#_DB
MEDIA_LED#
NUM_LED#
CAP_LED#
A-BUTTON#
INTERNET#
WIRELESS_BTN#
BT_BTN#
MAIL#
KBC_PWRBTN#_CN

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

MLX-CON20-5GP

20.K0227.020

EC78
EC94
EC93
EC92
EC91
EC86
EC85
EC83

1DY
1DY
1DY
1DY
1DY
1DY
1DY
1DY

2
2
2
2
2
2
2
2

SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP

INTERNET#
EC82
WIRELESS_BTN# EC79
BT_BTN#
EC76
MAIL#
EC77
KBC_PWRBTN#_CN
EC80

1DY
1DY
1DY
1DY
1DY

2
2
2
2
2

SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

22

3D3V_S0

PWR BD

C370
SC1U6D3V3KX-1GP

84.00143.J11

Title
Size

LCD CONN & LED & PWR BD

Document Number

Rev

-1

Calado
Date: Wednesday, September 12, 2007

Sheet

14

of

39

CRT_R

1
2
FCB1608CF-220T05-GP

CRT_R 3

DY
CRT1

L4

17

CRT_G

1
2
FCB1608CF-220T05-GP

BAV99-5-GP
D4

5V_CRT_S0

15

1
R209
10KR2J-3-GP

CRT_DEC#

R216
2 0R0402-PAD
1

PD

2
CRT_DEC_R

28

5V_S0

D2

DY

DY

Hsync & Vsync level shift

5V_S0

DY

1
2

DY

SC18P50V2JN-1-GP

C368

3D3V_S0

RN30
SRN10KJ-6-GP

DDC_CLK & DATA level shift

GND

1
4
2
5
7
6
3

GND
LUMA
NC#2
NC#5
COMP
CRMA
GND

GND

Q16
7 GMCH_DDCDATA

C434
1 DY2 SC33P50V2JN-3GP
L20

DAT_DDC1_5

7 GMCH_DDCCLK

CLK_DDC1_5

MINDIN7-26-GP

PD

22.10021.J81

change to 22.10021.H61

COMP_1
1
2
FCM1608K-151T06-GP
C435
C436
SC6P50V2CN-1GP
SC6P50V2CN-1GP

TV_DACA

2N7002DW-1-GP
84.27002.D3F

L21
LUMA_1
1
2
FCM1608K-151T06-GP
C440
C441
SC6P50V2CN-1GP
SC6P50V2CN-1GP

TV_DACB

R281
150R2F-1-GP

3D3V_S0

TVOUT1

2
FUSE-1A8V-GP

5
6
7
8

1
2CRT_VSYNC1
0R2J-2-GP

C438
1 DY2 SC33P50V2JN-3GP

R283
150R2F-1-GP

F3

U5B
TSAHCT125PW-GP

TV CONN
7

D6
BAS16-1-GP
5V_CRT_S0

R220
CRT_HSYNC1_R 1
2CRT_HSYNC1
0R2J-2-GP
U5A
TSAHCT125PW-GP

CRT_VSYNC1_R

ENG
1

C359
SCD1U16V2ZY-2GP

14
5

C369
SC18P50V2JN-1-GP

R219
7 GMCH_VSYNC

SC100P50V2JN-3GP

BAV99-5-GP

14
2

7 GMCH_HSYNC

C395

DY

change to 20.20378.015

5V_S0

C391

DY

C363
SC100P50V2JN-3GP

R210
0R2J-2-GP

SC18P50V2JN-1-GP

SYN-CONN15-GP

20.20326.015

SC100P50V2JN-3GP

3D3V_S0

C379

C377

DY

DY

BAV99-5-GP

CLK_DDC1_5

16

CRT_B 3

CRT_VSYNC1

CRT_HSYNC1

14

C385
SCD01U16V2KX-3GP

13

SC18P50V2JN-1-GP

5V_CRT_S0

BAV99-5-GP
D3

CRT_B

Layout Note:
* Must be a ground return path between this ground and the ground on
the VGA connector.
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.

DAT_DDC1_5

12

DY

C388

7
2
8
3
9
4
10
5

CRT_G

1
2

1
2

1
2

CRT_G 3

SC6P50V2CN-1GP

C393
SC6P50V2CN-1GP

DY

C401
SC6P50V2CN-1GP

DY

SC22P50V2JN-4GP

DY

C392
SC22P50V2JN-4GP

SC22P50V2JN-4GP

C400

R234
150R2F-1-GP

R244
150R2F-1-GP

150R2F-1-GP

R251

CRT_B

1
2
FCB1608CF-220T05-GP
C387

GMCH_BLUE

11

L3
7

6
1

CRT_R

7 GMCH_GREEN

CRT I/F & CONNECTOR

5V_S0
D5

L5

GMCH_RED

4
3
2
1

Ferrite bead impedance: 22 ohm@100MHz


from 10 ohm change to 22 ohm for EMI

Layout Note:
Place these resistors
close to the CRT-out
connector

C420
1 DY2 SC33P50V2JN-3GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title
Size

R274
150R2F-1-GP

Wistron Corporation

L16
CRMA_1
1
2
FCM1608K-151T06-GP
C421
C422
SC6P50V2CN-1GP
SC6P50V2CN-1GP

TV_DACC

Ferrite bead impedance: 150 ohm@100MHz 100mA(min) design recommend

CRT/TV Connector

Document Number

Rev

-1

Calado

Date: Thursday, September 13, 2007

Sheet
E

15

of

39

X5

RCT_X1

R371
10MR2J-L-GP

D13

X-32D768KHZ-38GPU

C300
SC1U16V3ZY-GP

AF25
AD21
B24

GLAN_CLK

LAN_RSTYNC

D22

LAN_RSTSYNC

26

ACZ_BTCLK_MDC

R175 1
22R2J-2-GP
R176 1
ACZ_BIT_CLK
2
22R2J-2-GP
ACZ_SYNC_R
1
2
R185 22R2J-2-GP
R184 2 0R0402-PAD
ACZ_RST#_R
1

ACZ_BITCLK
21,26 ACZ_SYNC

21,26 ACZ_RST#
26 ACZ_SDATAIN0
21 ACZ_SDATAIN1
3D3V_S0

FWH4/LFRAME#

C4

LDRQ0#
LDRQ1#/GPIO23

G9
E6

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

28
28
28
28

LPC_LFRAME# 28
LDRQ0#_SB
3D3V_LDRQ1_S0

TP89 TPAD30

1
R76

DY

2
0R2J-2-GP

LDRQ0# 28
1D05V_S0

R177 1

21,26 ACZ_SDATAOUT
TPAD30

TP113

HDA_DOCK_RST#

14

SATA_LED#

21
21
21
21

SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0

C338
C339
C341
C340

1
1
1
1

1 DY
R146

2
2
2
2

D21
E20
C20

LAN_TXD0
LAN_TXD1
LAN_TXD2

AH21

GLAN_DOCK#/GPIO13

D25
C25

GLAN_COMPI
GLAN_COMPO
HDA_BIT_CLK
HDA_SYNC

AE14

SATA_RXN0_C
SATA_RXP0_C
SATA_TXN0_C
SATA_TXP0_C

ENG
2

3 CLK_PCIE_SATA#
3 CLK_PCIE_SATA
SATARBIAS

1
R163

2
24D9R2F-L-GP

HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
HDA_SDOUT

SATALED#

AF6
AF5
AH5
AH6

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

AG3
AG4
AJ4
AJ3

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

AF2
AF1
AE4
AE3

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

AB7
AC6

SATA_CLKN
SATA_CLKP

AG1
AG2

SATARBIAS#
SATARBIAS

KA20GATE 28
H_A20M# 4
H_DPRSTP#

R148
56R2J-4-GP

H_DPRSTP# 4,7,32
H_DPSLP# 4

FERR#

AD24

CPUPWRGD/GPIO49

AG29

H_PWRGD 4,30,38

IGNNE#

AF27

H_IGNNE# 4

INIT#
INTR
RCIN#

AE24
AC20
AH14

H_INIT# 4
H_INTR 4
KBRCIN# 28

NMI
SMI#

AD23
AG28

H_NMI 4
H_SMI# 4

STPCLK#

AA24

H_STPCLK# 4

THRMTRIP#

AE27

TP8

AA23

HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34

AF10

Place within 500 mils of


ICH8 ball

DPRSTP#
DPSLP#

AF26
AE26

HDA_RST#

AJ17
AH17
AH15
AD13

ACZ_SDATAOUT_R AE13
2
39R2J-L-GP
HDA_DOCK_EN#
2
AE10
8K2R2J-3-GP
AG14

SC3900P50V2KX-2GP
SC3900P50V2KX-2GP
SC3900P50V2KX-2GP
SC3900P50V2KX-2GP

AF13
AG26

LAN_RXD0
LAN_RXD1
LAN_RXD2

AJ16
AJ15

ACZ_SDIN2
ACZ_SDIN3

TPAD30 TP115
TPAD30 TP109

C21
B21
C22

A20GATE
A20M#

H_FERR# 4

1D05V_S0
3

1
2 GLAN_DOCK#
R173 10KR2J-3-GP
1
2 GLAN_COMP
24D9R2F-L-GP
R109

GLAN_COMP place within 500 mil of ICH8M


21 ACZ_BTCLK_MDC

EC67
1

E5
F5
G8
F6

R158
56R2J-4-GP
R159

1D5V_S0

DYSC22P50V2JN-4GP

INTVRMEN
LAN100_SLP

CPU

TP87

3D3V_S5

INTRUDER#

INTVRMEN
LAN100_SLP

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

IDE

TPAD30

EMI capacitor

RTCRST#

INTRUDER# AD22

62.70001.011

AF23

R129
1MR2J-1-GP

C568
SCD1U16V2ZY-2GP

RTCX1
RTCX2

LPC

2
R382
1KR2J-1-GP

AG25
AF24

RTC_RST#

LAN/GLAN

DY

RCT_X2
R130
1 20KR2J-L2-GP
2

IHDA

BAT-CON2-1-GP-U

1
2
NP1
NP2

PWR
GND
NP1
NP2

RTC_BAT

RTC1

U49A 1 OF 6

C559 SC12P50V2JN-3GP
1
2

RTC circuitry

82.30001.691

C285
SC1U16V3ZY-GP

SATA

RTC_BAT_R

1
BAS40CW-GP
83.00040.E81

3
4

RTC_AUX_S5

3D3V_AUX_S5

C560 SC12P50V2JN-3GP
1
2

RTC

H_THERMTRIP_R
ICH_TP8

1 DY
2
24D9R2F-L-GP

PM_THRMTRIP-A# 4,7,30

TP105 TPAD30

DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15

V1
U2
V3
T1
V4
T5
AB2
T6
T3
R2
T4
V6
V5
U1
V2
U6

IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

DA0
DA1
DA2

AA4
AA1
AB3

IDE_PDA0 21
IDE_PDA1 21
IDE_PDA2 21

DCS1#
DCS3#

Y6
Y5

IDE_PDCS1# 21
IDE_PDCS3# 21

DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ

W4
W3
Y2
Y3
Y1
W5

IDE_PDIOR# 21
IDE_PDIOW# 21
IDE_PDDACK# 21
INT_IRQ14 21
IDE_PDIORDY 21
IDE_PDDREQ 21

21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21

Layout Note: R133 needs to placed


within 2" of ICH7, R334 must be placed
within 2" of R169 w/o stub.

ICH8-M-1-GP-U-NF

Change to 24.9 1% ohm


when use SATA HD

RTC_AUX_S5

RTC_AUX_S5

LAN100_SLP

integrated VccSus1_05,VccSus1_5,VccCL1_5

Wistron Corporation

INTVRMEN

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

High=Enable

Low=Disable

INTVRMEN

DY

R137
0R2J-2-GP

integrated VccLan1_05VccCL1_05

LAN100_SLP

High=Enable

Title

Low=Disable
Size

R141
0R2J-2-GP

DY

<Core Design>

R149
330KR2F-L-GP

R142
330KR2F-L-GP

Document Number

ICH8-M (1 of 4)

Rev

-1

Calado

Date: Wednesday, September 12, 2007

Sheet
E

16

of

39

U49D 4 OF 6

7 MCH_ICH_SYNC#
ICH_RSVD
TPAD30

No Reboot Strap
SPKR
LOW = Defaule
High=No Reboot

PCIE_RXN2
PCIE_RXP2
PCIE_TXN2
PCIE_TXP2

TXN2
TXP2

M27
M26
L29
L28

PERN2
PERP2
PETN2
PETP2

C531 SCD1U10V2KX-4GP
2
C533 SCD1U10V2KX-4GP
2

1
1

TXN3
TXP3

K27
K26
J29
J28

PERN3
PERP3
PETN3
PETP3

MINICARD
PCIE_RXN3
PCIE_RXP3
PCIE_TXN3
PCIE_TXP3

C523 SCD1U10V2KX-4GP
2
C521 SCD1U10V2KX-4GP
2

1
1

NEW CARD
Layout Note:
PCIE AC coupling caps
need to be within 250 mils of the driver.

21

H27
H26
G29
G28

PERN4
PERP4
PETN4
PETP4

F27
F26
E29
E28

PERN5
PERP5
PETN5
PETP5

D27
D26
C29
C28

PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP

TPAD30 TP84
TPAD30 TP149

SPI_CLK
SPI_CS0#
SPI_CS#1

C23
B23
E22

SPI_CLK
SPI_CS0#
SPI_CS1#

TPAD30 TP90
TPAD30 TP93

SPI_MOSI
SPI_MISO

D23
F21

SPI_MOSI
SPI_MISO

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
USB_OC#8
USB_OC#9

USB_OC#0

21,38 USB_OC#4

AJ19
AG16
AG15
AE15
AF15
AG17
AD12
AJ18
AD14
AH18

OC0#
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31
OC8#
OC9#

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP

V27
V26
U29
U28

DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0

7
7
7
7

DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP

Y27
Y26
W29
W28

DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1

7
7
7
7

DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP

AB26
AB25
AA29
AA28

DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2

7
7
7
7

DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

AD27
AD26
AC29
AC28

DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3

7
7
7
7

DMI_CLKN
DMI_CLKP

T26
T25

DMI_ZCOMP
DMI_IRCOMP

Y23
Y24

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

G3
G2
H5
H4
H2
H1
J3
J2
K5
K4
K2
K1
L3
L2
M5
M4
M2
M1
N3
N2

USBRBIAS#
USBRBIAS

F2
F3

USB

ICH8-M-1-GP-U-NF

RP1

3D3V_S0
ACZ_SPKR

R147 1 DY
1KR2J-1-GP

7,20

CL_CLK0
CL_CLK1

F23
AE18

CL_CLK0 7

CL_DATA0
CL_DATA1

F22
AF19

CL_DATA0 7

3D3V_S0

CL_VREF0
CL_VREF1

D24
AH23

CL_RST#

AJ23

CLGPIO0/GPIO24
CLGPIO1/GPIO10
CLGPIO2/GPIO14
CLGPIO3/GPIO9

AJ27
AJ24
AF22
AG19

R180
3K24R2F-GP

CL_VREF0_ICH
CL_VREF1_ICH
CL_RST#0
CLGPIO0
GPIO10
GPIO14
WOL_EN

TP119
TPAD30
R174
100KR2J-1-GP

C343

R170
10KR2J-3-GP

DY

R181

ICH8_GPIO18

USBPN0 21,38
USBPP0 21,38

DY

USB_OC#9
DBRESET#
PM_RI#
SB_ECSMI#
3D3V_S5

1
2
3
4
5

10
9
8
7
6

3D3V_S5

3D3V_S5

RP3

SMLINK0
USB_OC#4
USB_OC#3
PCIE_WAKE#

1
2
3
4
5

USB_OC#2
USB_OC#7
USB_OC#5

10
9
8
7
6

USBPN4
USBPP4
USBPN5
USBPP5
USBPN6
USBPP6
USBPN7
USBPP7
USBPN8
USBPP8
USBPN9
USBPP9
USB_RBIAS_PN

21,38
21,38
24
24
25
25
24
24
14
14
24
24
R113
22D6R2F-L1-GP
1
2

USB_OC#6

SRN10KJ-L3-GP
1D5V_S0
Place within 500 mils of ICH
R133
24D9R2F-L-GP

3D3V_S5
R165
0R2J-2-GP
1

USB Table

R166
10KR2J-3-GP

D15

USB

1
USBPN2 21,38
USBPP2 21,38

USB_OC#1
USB_OC#8

SRN10KJ-L3-GP

CLK_PCIE_ICH# 3
CLK_PCIE_ICH 3
DMI_IRCOMP_R

RP2

DY

R172 1
10KR2J-3-GP

R344
453R2F-1-GP

SRN10KJ-L3-GP

3D3V_S5
SDATAOUT1
R140 1
10KR2J-3-GP

C515

3D3V_S5
10
ECSWI#
9
USB_OC#0
8
7 PM_BATLOW#_R
6

SMB_LINK_ALERT# 1
SMB_ALERT#
2
SMLINK1
3
GPIO10
4
5
3D3V_S5

R345
3K24R2F-GP

TP120 TPAD30

Pair

Device

USB1

NC

USB2

NC

USB3

BT

Cardreader

MINICARD

CCD

NEW1

28 RSMRST#_KBC

BOOT BIOS Strap


PCI_GNT#0 SPI_CS#1

0
1
1

1
0
1

DY
BAS16-1-GP

SPI
PCI
LPC(Default)

A16 swap override strap

<Core Design>

PCI_GNT#3 low = A16 swap override enable


high = default
PCI_GNT#0 1
R342
SPI_CS#1
1
R111
PCI_GNT#3 1
R343

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

2
DY 1KR2J-1-GP
2
DY 1KR2J-1-GP
2
DY 1KR2J-1-GP

Title
Size

Document Number

ICH8-M (2 of 4)

Rev

-1

Calado

RSMRST#_SB

R169
100KR2J-1-GP

BOOT BIOS Location

Date: Wednesday, September 12, 2007


A

3D3V_S5

TP118 TPAD30

AJ25 PM_SLP_M#

CLK_PWRGD 3
PWROK

E3

CLPWROK

CK_PWRGD

SATA

CLOCKS

SMB

TP3

RSMRST#_SB

E1

PM_PWRBTN# 28,38

PERN1
PERP1
PETN1
PETP1

Direct Media Interface

24
24
24
24

P27
P26
N29
N28

PCI-Express

TXN1
TXP1

LAN

AJ21

AG27

SLP_M#

SPKR
MCH_SYNC#

RSMRST#

PWRBTN#_ICH

U49B 2 OF 6

1
1

AJ13

PLT_RST1#

ICH8-M-1-GP-U-NF

INT_SERIRQ
PCI_DEVSEL#
PCI_STOP#
PCI_FRAME#

C534 SCD1U10V2KX-4GP
2
C535 SCD1U10V2KX-4GP
2

TP114

AD9

SRN8K2J-2-GP-U

3D3V_S0

SPI

24
24
24
24

PCIE_RXN1
PCIE_RXP1
PCIE_TXN1
PCIE_TXP1

ACZ_SPKR

TACH1/GPIO1
TACH2/GPIO6
TACH3/GPIO7
GPIO8
GPIO12
TACH0/GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
QRT_STATE0/GPIO27
QRT_STATE1/GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48

LAN_RST#

AH20

INT_PIRQG#
INT_PIRQD#
SCLOCK
ECSCI#_1

SRN8K2J-2-GP-U
22
22
22
22

TP7

C2

26

3D3V_S0

10
9
8
7
6

AJ22

PWRBTN#

PM_DPRSLPVR 7,32

3D3V_S0

1
2
3
4
5

VRMPWRGD

AE21

RP5
PCI_REQ#3
INT_PIRQF#
INT_PIRQA#
PCI_TRDY#

AJ20

PM_BATLOW#_R

BATLOW#

SCD1U10V2KX-4GP

3D3V_S0

1
2
3
4
5

SRN8K2J-2-GP-U
RP6
10
9
8
7
6

3D3V_S0
INT_PIRQH#
PCI_REQ#0
INT_PIRQC#
INT_PIRQB#

WAKE#
SERIRQ
THRM#

R178
7,20
100R2J-2-GP
2
1
R186 1
2DY
100KR2J-1-GP
D23
BAS16-1-GP
1

PM_DPRSLPVR_R

453R2F-1-GP

PCI_REQ#2
PCI_REQ#1
PCI_SERR#
PM_CLKRUN#

10
9
8
7
6

AJ14

SCD1U10V2KX-4GP

3D3V_S0

1
2
3
4
5

AE17
AF12
AC13

AJ8
AJ9
RTM
AH9
28
ECSCI#_1
SB_ECSMI#AE16
TPAD30 TP107
CLK_SEL28
AC19
ECSWI#
PSW_CLR#
AG8
ICH8_GPIO18
AH12
ICH8_GPIO20
AE11
R188
SCLOCK
AG10
AH25
ICS
R145
AD16
AG13
DY 10R2J-2-GP
AF9
29
PCB_VER0
AJ11
29
PCB_VER1
SDATAOUT1 AD10

DPRSLPVR/GPIO16

RP4
PCI_IRDY#
INT_PIRQE#
PCI_LOCK#
PCI_PERR#

CLKRUN#

TP112 TPAD30
PWROK

GAP-OPEN

ICH8-M-1-GP-U-NF

2 ICH_TP7
DY
0R2J-2-GP

AE23

G71
INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#

F8
G11
F12
B3

1
R171

PWROK

R167
10KR2J-3-GP

R189

AH11

PLT_RST1# 7,28
PCLK_ICH 3

S4_STATE#

R391
1
AG24 PLT_RST# 2 0R0402-PAD
B10
G7 ICH_PME#_1
TP97
TPAD30

S4_STATE#/GPIO26

AH27

PM_SLP_S3# 24,28,30,34,35
PM_SLP_S4# 24,28,34,35
TP110 TPAD30

32 VGATE_PWRGD

SLPS5#

3D3V_S0

8
7
6
5

SRN8K2J-1-GP

PM_SUS_CLK 20

AG23
AF21
AD18

22,24 PCIE_WAKE#
28 INT_SERIRQ
20
THRM#
3D3V_S0

STP_PCI#
STP_CPU#

1
2
3
4

CLK_ICH14 3
CLK48_ICH 3

D3

SMBALERT#/GPIO11

SATA2GP
ICH_GPIO37
SATA0GP
SATA1GP

AG9
G5

SUSCLK

BMBUSY#/GPIO0

AE20
AG18

SATA0GP
SATA1GP
SATA2GP
ICH_GPIO37

AJ12
AJ10
AF11
AG11

SLP_S3#
SLP_S4#
SLP_S5#

POWER MGT

R112
56R2J-4-GP

AG22

CLK14
CLK48

Controller Link

28 PM_CLKRUN#

PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

AG12

PM_STPPCI#
PM_STPCPU#

PCIRST1# 21,22,24

Interrupt I/F

SUS_STAT#/LPCPD#
SYS_RESET#

PM_BMBUSY#

3
3

INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#

F4
AD15

SMB_ALERT#

TPAD30

PM_SUS_STAT#
DBRESET#

SYSGPIO

RI#

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA2GP/GPIO36
GPIO37

GPIO

TP91

TPAD30 TP95

AF17

MISC

TPAD30
TPAD30
TPAD30
TPAD30

PLTRST#
PCICLK
PME#

PCI_IRDY#
PCI_PAR
PCIRST#
PCI_DEVSEL#
PCI_PERR#
PCI_FRAME#
PCI_LOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#

TP83
TP99
TP94
TP88

PM_RI#

C8
D9
G6
D16
A7
A17
B7
F10
C16
C9

TPAD30
TPAD30
TPAD30

IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
FRAME#
PLOCK#
SERR#
STOP#
TRDY#

TPAD30

TP92
TP147
TP81

C17
E15
F16
E17

TPAD30

TP86

C/BE0#
C/BE1#
C/BE2#
C/BE3#

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

TP146

PIRQA#
PIRQB#
PIRQC#
PIRQD#

REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
GNT3#/GPIO55
REQ3#/GPIO54

10KR2J-3-GP

F9
B5
C5
A10

PCI

10KR2J-3-GP

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

PCI_REQ#0
PCI_GNT#0
PCI_REQ#1
PCI_GNT#1
PCI_REQ#2
PCI_GNT#2
PCI_GNT#3
PCI_REQ#3

A4
D7
E18
C18
B19
F18
C10
A11

SMBCLK
SMBDATA
LINKALERT#
SMLINK0
SMLINK1

D20
E19
D19
A20
D17
A21
A19
C19
A18
B16
A12
E16
A14
G16
A15
B6
C11
A9
D11
B12
C12
D10
C7
F13
E11
E13
E12
D8
A6
E8
D6
A3

AJ26
AD19
SMB_LINK_ALERT#
AG21
SMLINK0
AC17
SMLINK1
AE19

19,24 SMB_CLK
19,24 SMB_DATA

GPIO

RN26
U49C3 OF 6

Sheet
E

17

of

39

C308
SC4D7U6D3V3KX-GP

3D3V_S0

1mA

VccSus1_5[2]

TP104 TPAD28

AC7
AD7

VCC1_5_A
VCC1_5_A

VCCSUS3_3

C3

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

AC18
AG20
AC21
AC22
AH28

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

P6
P7
N7
C1
P1
R1
P2
P3
R3
P4
P5
R5
R6

VCCCL1_05

G22 VccSus1_05[3]

VCCCL1_5

A22 VccSus1_5[3]

VCCCL3_3
VCCCL3_3

F20
G21

VCCGLAN3_3

1
2

1
1

1
C302
SCD1U10V2KX-4GP

NO_STUFF

C255

C249
SCD1U10V2KX-4GP

3D3V_S5

C248

DY

C277

C283

DY SCD1U10V2KX-4GP
2

VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5

C333

VCC3_3=278mA

177mA
3D3V_S5

NO_STUFF

A26
A27
B26
B27
B28

Layout Note:
PCI decoupling
3D3V_S0

32mA

VCCGLANPLL

TP106 TPAD28

J7

A24

C298
SCD1U10V2KX-4GP

C509
SCD1U10V2KX-4GP

AC16 VccSus1_5[1]

VCCSUS1_5

VCCLAN3_3
VCCLAN3_3

VCCSUS1_5

F19
G20

VCC1_5_A
VCC1_5_A
VCC1_5_A

VCCLAN1_05
VCCLAN1_05

C510
SCD1U10V2KX-4GP

G12
G17
H7

VCC1_5_A

C269

1
2

TP100 TPAD28
TP111 TPAD28

F17
G18

3D3V_S0

1
2

VccSus1_05[1]
J6
AF20 VccSus1_05[2]

W23

2
1

1
2

1
2

1
2
1
2

1
2
1
2

VCCSUS1_05
VCCSUS1_05

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

1
2
1
2

CORE

VCCSUSHDA

VCC1_5_A
VCC1_5_A

F1
L6
L7
M6
M7

1D05V_S0

3D3V_S5

AA5
AA6

VCCUSBPLL

50mA

32mA

AD11

D1

1D5V_S0

C279
SC10U6D3V5MX-3GP

1mA

C511
SCD1U10V2KX-4GP

VCC1_5_A
VCC1_5_A

B25

DY C295
SCD1U10V2KX-4GP

AC12

DY

C252

C512

AC10
AC9

1
2

C514
C513
DY SCD1U10V2KX-4GP
SCD1U10V2KX-4GP

80mA
1

1D5V_S0

1D5VGLANPLL_ICH

1
2
R341
0R0603-PAD

DY

VccLan1_05[1]
VccLan1_05[2]

C313

C316

DY SCD1U10V2KX-4GP
NO_STUFF
1

TP102 TPAD28
TP148 TPAD28

3D3V_ICH_CL_S5

18mA

Wistron Corporation

3D3V_S5

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

1
2
R114
0R0603-PAD

Title

ICH8-M (3 of 4)

ICH8-M-1-GP-U-NF

1
2

TPAD28 TP96
TPAD28 TP98

VCCHDA

23mA
L10 1
2
0R0603-PAD

3D3V_S0

SCD1U10V2KX-4GP

23mA

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

C543
SC10U6D3V5MX-3GP

3D3V_S0

3D3V_S0

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D5V_S0
C311
SCD1U10V2KX-4GP

AC1
AC2
AC3
AC4
AC5

C508
SC10U6D3V5MX-3GP

3D3V_S5

C310

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

C288
SCD1U10V2KX-4GP

C296

1D5V_S0

18mA in S0;50mA in S3/S4/S5

AE7
AF7
AG7
AH7
AJ7

3D3V_S0

C294
SCD1U10V2KX-4GP

A8
B15
B18
B4
B9
C15
D13
D5
E10
E7
F11

VCCSATAPLL

1
2

SCD1U10V2KX-4GP

C325

VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3

C331

C505
SCD1U10V2KX-4GP
3D3V_S0

SCD1U10V2KX-4GP

C261
SCD1U10V2KX-4GP

AA3
U7
V7
W1
W6
W7
Y7

SCD1U10V2KX-4GP

USBPLL=10mA

VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3

1
2

C264
SCD1U10V2KX-4GP

AC8
AD8
AE8
AF8

1
2
2

1
2

C268
SCD1U10V2KX-4GP

VCC3_3
VCC3_3
VCC3_3
VCC3_3

1D5V_S0

DY

C260
SCD1U10V2KX-4GP

AD2

C328
SCD1U10V2KX-4GP

VCC3_3

SCD1U10V2KX-4GP

C337
SCD1U10V2KX-4GP

AF29

DY

SCD1U10V2KX-4GP

1D5V_S0

AJ6

VCC3_3

1D5V_DMIPLL_ICH_S0

C536
SCD1U10V2KX-4GP

C245

SCD1U10V2KX-4GP

C258
SCD1U10V2KX-4GP

C319
SCD1U10V2KX-4GP

C320
SCD1U10V2KX-4GP

R115
100R2J-2-GP

1mA

AC23
AC24

C263

1D25V_S0
C551

SCD1U10V2KX-4GP

D12
BAS16-1-GP

V5REF_S5

1D5V_S0

5V_S5

V_CPU_IO
V_CPU_IO

VCCP CORE

SATA+USB=1.56A

3D3V_S5
Layout Note:
Place near ICH8

AE28
AE29

IDE

C342
SC10U6D3V5MX-3GP

VCC_DMI
VCC_DMI

DY

SCD1U10V2KX-4GP

C517
SCD1U10V2KX-4GP

VCCDMIPLL

PCI

0R3-0-U-GP

VCCPSUS

V5REF_S0

VCCPUSB

1D5V_APLL_S0
L12

VCCA3GP

1mA

1D5V_S0

C262

C290

DY

SC10U6D3V5MX-3GP

47mA
R346
100R2J-2-GP

C293

SCD1U10V2KX-4GP

D24
BAS16-1-GP

R29

C272

C273

DY

SCD1U10V2KX-4GP

5V_S0

C292

SCD1U10V2KX-4GP

3D3V_S0

VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B

1D05V_S0

1.13A

Layout Note: Place near ICH8M

SCD1U10V2KX-4GP

*Within a given well, 5VREF needs to be up before the


corresponding 3.3V rail

V5REF_SUS

ARX

1
2

1
2

1
2

1
2

DY

SCD1U10V2KX-4GP

C315

A13
B13
C13
C14
D14
E14
F14
G14
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

SCD1U10V2KX-4GP

C317
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U10V5ZY-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

C251

SCD1U10V2KX-4GP

C282

VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05

V5REF
V5REF

SCD1U10V2KX-4GP

C271

G4
AA25
AA26
AA27
AB27
AB28
AB29
D28
D29
E25
E26
E27
F24
F25
G24
H23
H24
J23
J24
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T23
T24
T27
T28
T29
U24
U25
V23
V24
V25
W25
Y25

VCCRTC

SCD1U10V2KX-4GP

C267

T7
A16

SCD1U10V2KX-4GP

C518
SCD1U10V2KX-4GP

SC10U6D3V5MX-3GP

1D5V_S0

V5REF_S5

657mA

V5REF_S0

5 OF 6

USB CORE

1
2

DY

AD25

C304
SCD1U10V2KX-4GP

6uA in G3

C309
SCD1U10V2KX-4GP

C516

U49E

GLAN POWER

RTC_AUX_S5

ATX

Size

Document Number

Rev

-1

Calado
Date: Monday, September 10, 2007
A

Sheet
E

18

of

39

U49F 6 OF 6

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

K7
L1
L13
L15
L26
L27
L4
L5
M12
M13
M14
M15
M16
M17
M23
M28
M29
M3
N1
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
N4
N5
N6
P12
P13
P14
P15
P16
P17
P23
P28
P29
R11
R12
R13
R14
R15
R16
R17
R18
R28
R4
T12
T13
T14
T15
T16
T17
T2
U12
U13
U14
U15
U16
U17
U23
U26
U27
U3
U5
V13
V15
V28
V29
W2
W26
W27
Y28
Y29
Y4
AB4
AB23
AB5
AB6
AD5
U4
W24

VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF

A1
A2
A28
A29
AJ28
AH1
AH29
AJ1
AJ2
AJ29
B1
B29

3D3V_S5

3D3V_S0

8
7
6
5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

RN27
SRN4K7J-10-GP

1
2
3
4

A23
A5
AA2
AA7
A25
AB1
AB24
AC11
AC14
AC25
AC26
AC27
AD17
AD20
AD28
AD29
AD3
AD4
AD6
AE1
AE12
AE2
AE22
AD1
AE25
AE5
AE6
AE9
AF14
AF16
AF18
AF3
AF4
AG5
AG6
AH10
AH13
AH16
AH19
AH2
AF28
AH22
AH24
AH26
AH3
AH4
AH8
AJ5
B11
B14
B17
B2
B20
B22
B8
C24
C26
C27
C6
D12
D15
D18
D2
D4
E21
E24
E4
E9
F15
E23
F28
F29
F7
G1
E2
G10
G13
G19
G23
G25
G26
G27
H25
H28
H29
H3
H6
J1
J25
J26
J27
J4
J5
K23
K28
K29
K3
K6

5V_S0

Q15
17,24

SMB_CLK

6 2N7002DW-1-GP

SMBC_ICH 3,12
2

17,24 SMB_DATA
SMBD_ICH 3,12

Q12 connect SMLINK and SMBUS in S) for SMBus 2.0 compliance

SMBUS

SB_A1
SB_A2
SB_A28
SB_A29
SB_AJ28
SB_AH1
SB_AH29
SB_AJ1
SB_AJ2
SB_AJ29
SB_B1
SB_B29

TP143TPAD30
TP144TPAD30
TP150TPAD30
TP151TPAD30
TP116TPAD30
TP159TPAD30
TP117TPAD30
TP160TPAD30
TP161TPAD30
TP121TPAD30
TP145TPAD30
TP152TPAD30

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ICH8-M-1-GP-U-NF

ICH8-M (4 of 4)
Size

Document Number

Rev

-1

Calado
Date: Wednesday, September 12, 2007
A

Sheet
E

19

of

39

Digital Output Data Bits


TEMP.
Sign

MSB

LSB

EXT

+127.875

111

1111

111

+126.375

111

1110

011

+25.5

001

1001

100

+1.75

000

0001

110

+0.5

000

0000

100

+0.125

000

0000

001

-0.125

111

1111

111

-1.125

111

1110

111

5V_S0

5V_S0

8
10
12

R317
49K9R2F-L-GP
3D3V_AUX_S5

G792SFUF-GP

74.00792.A79

DXP1:108 Degree (CPU)


DXP2:H/W Setting 100(System)
DXP3:105 Degree (SYSTEM)

28,30,38 PURE_HW_SHUTDOWN#

2 G792_RESET#

PWROK

7,17

1
1

R307
10KR2J-3-GP

C469 B

Q17
MMBT3904-3-GP

B
C206

SC470P50V3JN-2GP
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP

Q8
MMBT3904-3-GP

SC470P50V3JN-2GP

3.System Sensor,
Put between CPU and NB.

G69

1.For CPU Sensor


H_THERMDA 4

Place near chip as close


as possible

C489
SC2200P50V2KX-2GP
H_THERMDC 4

R316
4K7R2F-GP

R315
10KR2F-2-GP

G68

C486

C478

V_DEGREE
=(((Degree-72)*0.02)+0.34)*VCC

G792_DXN2
G792_DXN3

V_DEGREE

SGND1
SGND2
SGND3

G792_DXP2
G792_DXP3

5
17

DGND
DGND

GAP-CLOSE

ALERT#

Setting T8 as
90 Degree

R305 2
DY 0R2J-2-GP

THRM#

2.HW T8 sensor

SMBD_G792 28
SMBC_G792 28

ALERT#
THERM#
THERM_SET
RESET#

FAN1_VCC 38
FAN1_FG1 38

15
13
3
2

G792_32K

DXP1
DXP2
DXP3

1
4
14
16
18
19

7
9
11

FAN1
FG1
CLK
SDA
SCL
NC#19

VCC
DVCC

2
17

MLX-CON3-10-GP-U

20.F1000.003

DY

C474
C476
SCD1U10V2MX-3GP
SC4D7U6D3V5KX-3GP
SCD1U16V2ZY-2GP

R302
10KR2J-3-GP

6
20

C477

R318
21KR2F-GP

1
1

1
SC1U16V3ZY-GP

C487

C453
SC1KP50V2KX-1GP

5V_G792_S0

R319
10R3J-3-GP

*Layout* 15 mil

U46

*Layout* 30 mil
1

2
3

FAN1_FG1

2
3D3V_S0
5V_S0

2
D21
BAS16-1-GP

DY

000

1111

GAP-CLOSE
2

011

4
1

C448
SC4D7U6D3V3KX-GP

-65.000

C451
SCD1U16V2ZY-2GP

FAN1

110

100

1000

0110

100

110

EC100
SCD1U25V2ZY-1GP

DY

*Layout* 15 mil
1

-55.25

ENG

R290
10KR2J-3-GP

FAN1_VCC

-25.5

FAN1_VCC

FAN1_VCC

32K suspend clock output

RUN_POWER_ON

32KHZ

G792_32K

17 PM_SUS_CLK

R306
10R2F-L-GP

Q18

2N7002-11-GP

R303
100KR2F-L1-GP

20060810

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

Thermal/Fan Controllor

Document Number

Calado

Date: Thursday, September 13, 2007

Sheet

Rev

-1
20

of

39

SATA HD Connector

ODD Connector
3D3V_S0

5V_S0

5
6
7
8

SATA1

23
NP1
1

RN25

ODD1

53
51
1

SRN10KJ-6-GP

IDE_PDDACK#
R143 1
10KR2J-3-GP 16
DY
16

ALP-CON22-GP-U1

20.F0754.022

C259

C254

IDE_PDA2
IDE_PDCS3#

DY

C253

5V_S0

PDIAG

3D3V_S0

14

10

16 IDE_PDDACK#

DY

16
17
18
19
20
21
22
NP2
24

4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15
IDE_PDDREQ
IDE_PDIOR#

16
16

R136
10KR2J-3-GP

SCD1U16V2ZY-2GP

SATA_TXN0
SATA_TXP0

HDDDRV#_5

SCD1U16V2ZY-2GP

16
16

U5C
TSAHCT125PW-GP

SC10U10V5ZY-1GP

SATA_RXP0
SATA_RXN0

R144
1
2
0R0402-PAD

SCD1U10V2MX-3GP

16
16

IDE_PDIORDY
INT_IRQ14

17,22,24 PCIRST1#

16
16
16
16
16
16
16
16

TC12
SC10U6D3V5MX-3GP

C336
D14
SSM24PT-GP

ODD_LED#
PDIAG

5V_S0

5V_S0

4
3
2
1

2
3
4
5
6
7
8
9
10
11
12
13
14
15

3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
52

HDDDRV#_5
IDE_PDD7
IDE_PDD6
IDE_PDD5
IDE_PDD4
IDE_PDD3
IDE_PDD2
IDE_PDD1
IDE_PDD0

16
16
16
16
16
16
16
16

IDE_PDIOW# 16
IDE_PDIORDY 16
INT_IRQ14 16
IDE_PDA1 16
IDE_PDA0 16
IDE_PDCS1# 16
ODD_LED# 14
5V_S0
R340

1
2
0R0402-PAD

54
SYN-CONN50-4R14GP

ENG

20.80967.050

PD

TC2

U4

EC101

DY

SKT-USB-146-GP-U1

USB_4+

2
4
3
6

2
3
4
6

TC17
SE220U6D3VM-4GP

USB_4-

USBPN4
USBPP4

17,38
17,38

USB_0USB_0+

USBPN0
USBPP0

100 mil

USB1

5
1

74.09711.B7F

RN35

7
5
1

17,38
17,38

SCD1U16V2ZY-2GP

DY

DY

RN34

PD
5V_USB2_S0_1

C362
SCD1U16V3KX-3GP

ENG
USB2

5V_USB3_S0_1

RT9711BPB-GP

EC81
SCD1U16V2ZY-2GP

FUSE-2A8V-3GP 5V_USB2_S0_1

FUSE-1A8V-GP

USB_PWR_EN#

FLG# VOUT
GND
EN/EN# VIN

28,38 USB_PWR_EN#

5V_S5

DY

1
2
3

F5

ENG
F4

5V_USB2_S0

DY

G5250F2T1U-GP
74.05250.C7F
5V_USB3_S0

17,38 USB_OC#4

USB On Board CONN(LEFT)

EC84

USB_PWR_EN#

OC#
EN/EN#

ST100U6D3VBM-9GP

5V_USB3_S0

OUT
GND
IN

USB_OC#4

5V_S5

ENG

5V_USB3_S0_1

100 mil

SCD1U16V2ZY-2GP

1
2
3

5V_USB3_S0

USB On Board CONN(RIGHT)

U56

22.10218.Q41

SKT-USB-152-GP-U4
DLW21HN900SQ2LGP

22.10218.R31
5V_USB2_S0_1
5V_USB2_S0_1
USB3

3D3V_S5

USB_OC#0

EN/EN#

USB_PWR_EN#

17,38
17,38

USB_2USB_2+

USBPN2
USBPP2

2
3
4

6
5V_USB2_S0

DLW21HN900SQ2LGP

22.10218.R31

U45

DY

5V_S5

EC102
SCD1U16V2ZY-2GP

DY

<Core Design>

Wistron Corporation

4
1

FLG# VOUT
GND
EN/EN# VIN

EC65
SC22P50V2JN-4GP

USB_PWR_EN#

1
2
3

RT9711BPB-GP
74.09711.B7F

C479
SCD1U16V3KX-3GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

DY
2

USB_OC#0

28,38 USB_PWR_EN#

1
2

R138

C287

17

20.F0917.012

OC#

G5250F2T1U-GP
74.05250.C7F

ACZ_BTCLK_MDC 16

TYCO-CONN12A-2-GP

2nd source: 20.F0604.012

DY

0R0603-PAD

4
6
8
10
12
17
18

OUT
GND
IN

SKT-USB-152-GP-U4

C301

3
5
7
9
11
NP2
16

1
2
3

R123

SC4D7U6D3V5KX-3GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP

DY DY

15
14
2

100KR2J-1-GP

C306

1
2ACSDATAIN1_A
R132
39R2J-L-GP
ACZ_RST#_1
2
1
R183 0R0402-PAD

16,26
ACZ_SYNC
16 ACZ_SDATAIN1
16,26 ACZ_RST#

13
NP1
1

16,26 ACZ_SDATAOUT

3D3V_S5

MDC1

5V_S5

7
5

5V_USB2_S0

RN36

U57

ENG

MDC 1.5 CONN

DLW21HN900SQ2LGP

Title
Size

HDD / CDROM / USB / MDC

Document Number

Rev

-1

Calado
Date: Wednesday, September 12, 2007

Sheet

21

of

39

2D5V_LAN_S5
1D2V_LAN_S5

TRD2TRD2+

23
23

TRD1TRD1+

42
43

MDI1MDI1+

23
23

TRD0TRD0+

41
40

MDI0MDI0+

23
23

2
1
67
66

REGCTL12

14

16

69

REG_GND

R26
0R0402-PAD

C366

Q6
BCP69T1-1-GP

C66

1
2
1
2

1
2

1
2

1
1

GPHY_PLLVDD

R23
C45
FCM1608K-601T03GP

SC4D7U6D3V5KX-3GP
C27
SCD1U10V2KX-4GP

1
2

C64
SCD1U10V2KX-4GP

SC4D7U6D3V5KX-3GP
C42
SCD1U10V2KX-4GP

PCIE_PLLVDD

R28
C61
FCM1608K-601T03GP

2 R27
1
0R3-0-U-GP

SC4D7U6D3V5KX-3GP
C54
SCD1U10V2KX-4GP

PCIE_SDSVDD
C60

C19

SC4D7U6D3V5KX-3GP

R606 change to Bead


for Transmitter Distortion

SCD1U10V2KX-4GP

1D2V_LAN_S5

SC10U6D3V5MX-3GP

C372
SCD1U10V2KX-4GP

NC#11(CLK_REQ#)

REGCTL12
SC4D7U10V5ZY-3GP

11

DY

C58

3D3V_LAN_S5

RDAC

2D5V_LAN_S5

C57
SC4D7U6D3V5KX-3GP

REGCTL25

18

XTALO
XTALI

1K21R2F-2-GP
C46
SC15P50V2JN-2-GP

ENG

1
3

REGCTL25

Q7
BCP69T1-1-GP

R8
C15
FCM1608K-601T03GP

RDAC 37

SMB_CLK
SMB_DATA

1 AVDDL_G

C375

1D2V_LAN_S5

R20

VAUXPRSNT
VMAINPRSNT
LOW_PWR

C33

C35

82.30020.571

C56
SC12P50V2JN-3GP

XTAL-25MHZ-67GP

ENERGY_DET 28

1
C364
SCD1U10V2KX-4GP

C24

28

1
R227
4K7R2J-2-GP

R211
0R0603-PAD

1
2

3 1

R217

3D3V_LAN_S5

59

SCLK
SI
SO
CS#

NC#59/(ENERGY_DET)

TP131TPAD30

SC10U10V5ZY-1GP

R225
1KR2J-1-GP
1 VAUX_PRESENT54
VMAINPRSNT 53
2
1
1KR2J-1-GP
LOW_PWR
3
LOW_PWR
2 R11
1DY
0R2J-2-GP
58
R24
57
200R2J-L1-GP
LAN_XO_R
1
2
LAN_X0
X1
22
LAN_XI
1
2
21

3D3V_LAN_S0

GND

3D3V_LAN_S0

TP133TPAD30

R228
4K7R2J-2-GP
2 DY
1

3D3V_LAN_S5

3D3V_S0

C68

R226

DY 10KR2J-3-GP

SC4D7U10V5ZY-3GP

65
63
64
62

TP132TPAD30

9
7
4

UART_MODE
EE_WP
GPIO0

SCLK
SI
SO
CS#

2
1

GPIO2

UART_MODE
GPIO1_SERIALDI
GPIO0_SERIALDO

ENERGY_DET

LAN_ACT_LED# 23

PCIE_TXDP
PCIE_TXDN
PCIE_RXDP
PCIE_RXDN
WAKE#
PERST#
REFCLK+
REFCLK-

3D3V_LAN_S5

GPIO2

PCIE_GND

R12

DY 10KR2J-3-GP
10M/100M/1G_LED# 23

24

3D3V_AUX_S5

PCIE_VDD
PCIE_VDD

C37

Place PLLVDD/AVDDL
CKT as close to chip as
possible

27
33

C371
SCD1U10V2KX-4GP

PCIE_PLLVDD

23
23

MDI2MDI2+

LAN_AVDD

MDI3MDI3+

48
47

49
50

TRD3TRD3+

LAN_AVDD

52

LINKLED#
SPD100LED#
SPD1000LED#
TRAFFICLED#

26
25
31
32
12
10
29
28

AVDD

R18
0R0603-PAD
1
2

R224
4K7R2J-2-GP

DY DY

1
2

AVDD

45

GPHY_PLLVDD

3 CLK_PCIE_LAN
3 CLK_PCIE_LAN#

38

R218
4K7R2J-2-GP

SCD1U10V2KX-4GP

C31
SC47P50V2JN-3GP

LAN_RST

AVDD

72.24C64.F01

SCD1U10V2KX-4GP

17,24 PCIE_WAKE#

2 0R0402-PAD
1

XTALVDD_G

C38
SCD1U10V2KX-4GP

3D3V_LAN_S5

SCD1U10V2KX-4GP

R14

17,21,24 PCIRST1#

PCIE_RXDP
PCIE_RXDN

23

R231
10KR2J-3-GP
1
2

EE_WP
SCLK
SO

SC4D7U6D3V5KX-3GP

PCIE_RXP1
PCIE_RXN1
PCIE_TXP1
PCIE_TXN1

1 C52
1 C51

XTALVDD

17
68

AVDDL
AVDDL
AVDDL
AVDDL

PCIE_SDSVDD

SCD1U10V2KX-5GP 2
SCD1U10V2KX-5GP 2

BIASVDD_G

AT24C64CN-SH-T-GP

C53
SCD1U10V2KX-4GP

36

8
7
6
5

VCC
WP
SCL
SDA

30

BIASVDD

A0
A1
A2
GND

PCIE_PLLVDD

35

1
2
3
4

GPHY_PLLVDD

39
44
46
51

C50
SCD1U10V2KX-4GP
R19
0R0603-PAD
BIASVDD_G
1
2

C25
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

AVDDL_G

3D3V_LAN_S5

U34

XTALVDD_G

1
2
R25
0R0603-PAD

C26

part change to 71.05787.M02

VDDC
VDDC
VDDC
VDDC
VDDC
VDDC

C18

5
13
20
34
55
60

VDDP
VDDP

71.05787.A03

6
15
19
56
61

U10
BCM5787MKMLG-GP

VDDP 1

1
2
R16
0R0603-PAD

1D2V_LAN_S5

17
17
17
17

1
2

R17
0R0603-PAD

3D3V_LAN_S5

3D3V_S5

VDDIO
VDDIO
VDDIO
VDDIO
VDDIO

1
2

1
2

1
2

C373
SCD1U10V2KX-4GP

C49
SCD1U10V2KX-4GP

C47
SCD1U10V2KX-4GP

C20
SCD1U10V2KX-4GP

C36
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C376

SCD1U10V2KX-4GP

C374

SCD1U10V2KX-4GP

C48
SCD1U10V2KX-4GP

C365
SC4D7U6D3V5KX-3GP

2D5V_LAN_S5

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

LAN BCM5787
Size
A3

Document Number

Rev

-1

Calado

Date: Wednesday, September 12, 2007

Sheet
1

22

of

39

Voltage
Rail
VDDIO_PCI
VDDC
4

4401E

3D3V_S0

1D8V_LAN_S5

VDDIO

3D3V_LAN_S5

VESD

3D3V_LAN_S5

VDDP

Don't Care

LAN Connector
RJ1
SKT-JACK-222-GP

Don't Care
38
38

1D2V_LAN_S5

TIP_C
RING_C

TIP_C
RING_C

10

3D3V_S0

RJ45_8
RJ45_7
RJ45_6
RJ45_5
RJ45_4
RJ45_3
RJ45_2
RJ45_1

1D8V_1D2V_S5 1D8V_LAN_S5

REVERSE CHECK

Don't Care

2D5V_S5

PD

TRING1

2D5V_S5

FCM1608K-601T03GP
L2
RING
2
1
TIP
2
1

RING_C

1D2V_S5

B2

LAN_ACT_LED#

B1

CONN_PWR_2

NP2

3D3V_LAN_S5

3D3V_S5

3D3V_2D5V_S5

5787

5789

3D3V_LAN_S5

TIP_C

2
4

L1
FCM1608K-601T03GP

JST-CON2-22-GP

RJ45_8
RJ45_7
RJ45_6
RJ45_5
RJ45_4
RJ45_3
RJ45_2
RJ45_1

LAN_ACT_LED# 22

A3
A2
A1

10M/100M/1G_LED#
CONN_PWR_1

10M/100M/1G_LED# 22

RJ11_2
RJ11_1
NP1
9

ENG

21.E0024.102

22.10123.081

A3:Green
B2:YELLOW
GIGA Lan Transformer
2D5V_LAN_S5

22
22

MDI1+
MDI1-

22
22

MDI0+
MDI0-

1
2
3
4
5
6

1
SCD1U16V2ZY-2GP

C62

SCD1U16V2ZY-2GP

C63

LAN Link: Green(A3), behavior is the


same for 10/100/1000 bits

XF2

RD+
RDRDCT
TDCT
TD+
TD-

RX+
RXRXCT
TXCT
TX+
TX-

RJ45_3
RJ45_6

12
11
10
9
8
7

MCT2
MCT1

12
11
10
9
8
7

MCT4
MCT3

LAN Data: Yellow(B2), when LAN is


transfering data.
3

RJ45_1
RJ45_2

XFORM-208-GP

68.68161.30A

XF1
22
22

MDI3+
MDI3-

22
22

MDI2+
MDI2-

1
2
3
4
5
6

RD+
RDRDCT
TDCT
TD+
TD-

RX+
RXRXCT
TXCT
TX+
TX-

RJ45_7
RJ45_8
RJ45_4
RJ45_5

XFORM-208-GP

1.route on bottom as differential pairs.


2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.

RJ45-6

5
6
7
8

LAN_TERMINAL 1

DY

EC2

EC3

DY

DY

1
2

4
3
2
1
RN1
SRN75J-1-GP

EC5

SC100P50V2JN-3GP

RJ45-3

RD- --> RX-

DY

EC4

MCT1
MCT2
MCT4
MCT3

SC100P50V2JN-3GP

RD+ --> RX+

R52
CONN_PWR_2
470R2J-2-GP

SC100P50V2JN-3GP

RJ45-2

R62
CONN_PWR_1
470R2J-2-GP

SC100P50V2JN-3GP

RJ45-1

TD- --> TX-

3D3V_LAN_S5

RJ45 PIN

TD+ --> TX+

10M/100M/1G_LED#
LAN_ACT_LED#

DOC_TIP,DOC_RING,TIP,RING:
W/S : 10/100 @ Surface layers
10/20 @ Inner layers
10/100 LAN Transformer

3D3V_LAN_S5

RJ11 signal must leave the other signal


or power plane 100mil.

SCD1U16V2ZY-2GP

C65

SCD1U16V2ZY-2GP

68.68161.30A
C55

<Core Design>

C59
SC1KP2KV8KX-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

LAN Connector
Size
A3

Document Number

Rev

-1

Calado

Date: Wednesday, September 12, 2007

Sheet
E

23

of

39

Mini Card Connector


3D3V_S5

NEWCARD Connector

DY

Reserve the symbol


for bottom side
connector

NEW1

CARDBUS-SKT95-GP

ENG

EC64

2
1
R187
0R0402-PAD
C345
SC100P50V2JN-3GP

USBPN7
USBPP7

17
17

R192
2 DY
1
10KR2J-3-GP
MINI_PCIRST1#
3D3V_S5_MINIC1

14 WLAN_LED#_MC

TP123TPAD28

1LED_WPAN1#

TP122TPAD28

1LED_WPAN#

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

28 WIRELESS_EN
17,21,22 PCIRST1#

21.H0153.001

NEW

NP2
26
25
17 PCIE_TXP3
24
17 PCIE_TXN3
23
22
17 PCIE_RXP3
21
17 PCIE_RXN3
20
19
3 CLK_PCIE_NEW
3D3V_NEW_S0
18
3 CLK_PCIE_NEW#
CPPE#
17
TP155
NEWCARD_TEST
16
15
14
3D3V_NEW_LAN_S5
TPS2231_PERST#
13
12
PCIE_WAKE#_R
1DY
2
11
17,22 PCIE_WAKE#
R116 0R2J-2-GP
10
1D5V_NEW_S0
RN24
9
DY EC63
SMB_DATA_NEW
1
4
8
DY
17,19 SMB_DATA
SMB_CLK_NEW
2
3
7
17,19 SMB_CLK
CONN_TP1 6
TP154
SRN33J-5-GP-U
CONN_TP2 5
TP153
CPUTSB#
4
3
17 USBPP9
2
17 USBPN9
1
NP1

53
NP1
1

MINI_WAKE#

TP163 TPAD30

R190
0R5J-5-GP

3D3V_S0_MINI

MINIC1

R191
0R5J-5-GP

SK1

1D5V_S0

3D3V_S0

4
6
8
10
12
14
16

3
5
7
9
11
13
15

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
NP2
54

CLK_PCIE_MINI1# 3
CLK_PCIE_MINI1 3

E51_RxD 28
E51_TxD 28
PCIE_RXN2 17
PCIE_RXP2 17
PCIE_TXN2 17
PCIE_TXP2 17
5V_S5

SKT-MINI52P-13-GP

62.10043.461

NEW

FCI-CON26-5-GP
3D3V_S0

20.F0789.026

11
12
13
14
15
1_5VOUT
1_5VIN
NC#13
NC#14
AUXOUT

3D3V_BT_S0

1
2
3

EC118
SCD1U16V2ZY-2GP

VOUT
VIN
GND
NC#3 EN/EN#

5
4

1D5V_NEW_S0

BLUE1

TP162
TP165

USB_5+
USB_5-

3D3V_BT_S0

2
3
4

USB_5+
USB_5-

R194 1
0R0402-PAD
2
R195 1
0R0402-PAD
2

USBPP5
USBPN5

17
17

3D3V_NEW_LAN_S5

3D3V_NEW_S0

TPAD30
TPAD30

3D3V_NEW_S0
3D3V_S0

3D3V_S0

3D3V_S0
3D3V_NEW_S0

ENG

74.09711.A7F

EC21 put near


BLUE1 / all
USB put one
choke near
connector by
EMI request

C567
SC4D7U6D3V5KX-3GP

BLUETOOTH_EN 28

DY
PM_SLP_S3# 17,28,30,34,35

3D3V_S0

RT9711-APBG-GP

DY

C351

DY

DY

U53
PM_SLP_S4# 17,28,34,35

C350

C322

1
2
R389 0R3-0-U-GP

3D3V_BT_S0

5
4
3
2
1

W83L351YG-GP

C346

2
2
1

1
2

1
2

1
2

C348

DY

SC10U6D3V5KX-1GP

NC#5
NC#4
3_3VOUT
3_3VIN
STBY#

C352

BLUETOOTH MODULE

16
17
18
19
20
21

NC#16
AUXIN
RCLKEN
OC#
SHDN#
GND

3D3V_S5

SCD1U10V2MX-3GP

C334

SC100P50V2JN-3GP

3D3V_S5

C353

1D5V_S0

SCD1U10V2MX-3GP

CPPE#
CPUSB#
PERST#
GND
SYSRST#

R162
2 0R0402-PAD
1

17,21,22 PCIRST1#

3D3V_NEW_LAN_S5

C347

SC1U6D3V3KX-1GP

NEW_PCIRST1#

10
9
8
7
6

DY

SC10U6D3V5KX-1GP

CPPE#
CPUTSB#
TPS2231_PERST#

DY

TC14

R182

DY 0R5J-5-GP

SCD1U10V2MX-3GP

2100KR2J-1-GP
2100KR2J-1-GP

3D3V_S0_MINI

SC1U6D3V3KX-1GP

DY
DY

R372
0R5J-5-GP

SC10U6D3V5KX-1GP

3D3V_S5
2

R1601
R1611

1D5V_S0
1D5V_NEW_S0
1D5V_S0

1D5V_NEW_S0

ENG

ST100U6D3VBM-9GP

U30

NEW

3D3V_S5

Place near MINIC1

ICS

C266
SCD1U10V2MX-3GP

20.D0197.104

NEW

Wistron Corporation

1st source:20.D0197.104
2nd source:20.F0984.004

NEW
1

1
2

2
1

NEW

C265
SCD1U10V2MX-3GP

NEW

C256
SC1U6D3V3KX-1GP

Place them Near to Chip

NEW

C278
SCD1U10V2MX-3GP

NEW

C281

C556
SCD1U10V2MX-3GP

SC1U6D3V3KX-1GP

ACES-CON4-1-GP-U1
1

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

MINI CARD / NEW CARD/BT


Size

Place them Near to Connector

Document Number

Rev

-1

Calado

Date: Wednesday, September 12, 2007


A

Sheet
E

24

of

39

XD_CE#

XD_ALE

SD_DAT2/XD_RE#

SD_DAT3/XD_WE#

XD_R/B#

SD_DAT4/XD_WP#

41

40

39

38

37

DM

D3V3

33

DP

DGND

32

SD_DAT6/XD_D7/MS_D3/CF_D15

31

CF_CS0#

30

MS_INS#/CF_IORD#

29

MS_INS#

SD_DAT7/XD_D2/MS_D2/CF_IOWR#

28

SD_DAT7/XD_D2/MS_D2

SD_DAT0/XD_D6/MS_D0/CF_RST#

27

SD_DAT0/XD_D6/MS_D0

SD_DAT1/XD_D3/MS_D1/CF_IORDY

26

SD_DAT1/XD_D3/MS_D1_1

XD_D5/MS_BS/CF_A2

25

XD_D5/MS_BS

1
1
11

D3V3_OUT

12

DGND

VREG

CF_D8/SM_CD#

CF_D1/XD_CD#
19

18

CF_D2

CF_D9

17

16

CF_D10
15

GPIO0

SD_CLK/XD_D1/MS_CLK_R

13

MODE_SEL
SD_DAT1/XD_D3/MS_D1_1

R108
0R2J-2-GP
2
1 SD_DAT1/XD_D3/MS_D1

XD_D4

RTS5158-GP

LED4
LED-W-23-GP
VBUS_R
A

DY

K VBUS_LED

DY

R97
10KR2J-3-GP

DY

XD_D4

3D3V_S0

R421
68R2-GP
1

C238
SC47P50V2JN

R107
0R2J-2-GP

71.05158.00G

ENG

XD_CD#

SD_CLK/XD_D1/MS_CLK

14

R110
0R2J-2-GP
2
1

CF_CD#

Place close to controler IC

CARD_3V3

C242
SC1U10V3KX-3GP

9
10

5V_IN

RST#

R81
100KR2J-1-GP

C250
SCD1U16V2ZY-2GP

A3V3_OUT

SD_DAT6/XD_D7/MS_D3

AG33

C228
SCD1U16V2ZY-2GP

3D3V_D_S0

3D3V_D_S0

3D3V_A_S0

VREG

SD_CD#

DY

C222
SC1U10V3KX-3GP

SD_CLK/XD_D1/MS_CLK

CF_DMARQ

C224
SCD1U16V2ZY-2GP

2
1

C217
SC4D7U6D3V5KX-3GP

CARD_3D3V_S0
C

34

24

5V_VBUS_S0

SD_DAT5/XD_D0

SD_CLK/XD_D1/MS_CLK/CF_D7

CF_A1/XD_D4

R74
0R0603-PAD
1
2

SD_DAT3/XD_WE#/CF_D5

AV33

1 USB_60R0402-PAD
1 USB_6+
0R0402-PAD

SD_CMD

35

23

36

CF_DMACK#

R78

SD_CMD

SD_DAT5/XD_D0/CF_D14

22

R79

XD_ALE/CF_D4

CF_A0/SD_CD#

USBPP6

SD_DAT4/XD_WP#/CF_D6

XD_CLE

42

RREF

21

USBPN6

17

XD_CLE/CF_D3

AV_PLL

CF_D0/SM_WPM#/SD_WP

17

47

SD_WP

3D3V_S0

2
1

C219
SCD1U16V2ZY-2GP

AG_PLL

48
AV_PLL

3D3V_A_S0
C225
SCD1U16V2ZY-2GP

U16

1 RREF
6K19R2F-GP

20

XD_CE#/CF_D11

R80

C226
SCD1U16V2ZY-2GP

VREG

3D3V_A_S0

R77
0R0603-PAD
1
2

C221
SC1U10V3KX-3GP

46

12M_XO

C229
SC27P50V2JN-2-GP

XD_RDY/CF_D13

RST#

43

82.30006.191

XTLO

R73
0R0603-PAD
1
2

XTLI

R87
0R0603-PAD
1
2

RST#

X3
XTAL-12MHZ-11GP

MODE_SEL

R88
270KR2F-GP

3D3V_A_S0

3D3V_S0

3D3V_D_S0

SD_DAT2/XD_RE#/CF_D12

MODE_SEL

44

12M_XI

1
1

45

C237
SC27P50V2JN-2-GP

ENG

4 IN1 CARD-READER (SD/SD IO/MMC/MMC4.0/MS/MS PRO/XD)


CN2
4
19
29

XD-VCC
SD-VCC
MS-VCC

SD_DAT4/XD_WP#
SD_DAT5/XD_D0
SD_DAT6/XD_D7/MS_D3
SD_DAT7/XD_D2/MS_D2

28
24
13
10

MMC-DAT4
MMC-DAT5
MMC-DAT6
MMC-DAT7

XD_D5/MS_BS
MS_INS#
SD_CLK/XD_D1/MS_CLK_R
SD_DAT0/XD_D6/MS_D0
SD_DAT1/XD_D3/MS_D1
SD_DAT7/XD_D2/MS_D2
SD_DAT6/XD_D7/MS_D3

14
23
27
18
16
20
25

MS-BS
MS-INS
MS-SCLK
MS-DAT0
MS-DAT1
MS-DAT2
MS-DAT3

SD_CD#
SD_WP
SD_CLK/XD_D1/MS_CLK_R
SD_CMD
SD_DAT0/XD_D6/MS_D0
SD_DAT1/XD_D3/MS_D1
SD_DAT2/XD_RE#
SD_DAT3/XD_WE#

1
2
15
26
8
5
31
30

SD_CD
SD_WP
SD-CLK
SD-CMD
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3

CARD_3D3V_S0

1
2

DY

C344
SC4D7U10V5ZY-3GP

CARD_3D3V_S0

C280
SCD1U16V2ZY-2GP

XD-DAT0
XD-DAT1
XD-DAT2
XD-DAT3
XD-DAT4
XD-DAT5
XD-DAT6
XD-DAT7

22
21
17
12
11
9
7
6

SD_DAT5/XD_D0
SD_CLK/XD_D1/MS_CLK_R
SD_DAT7/XD_D2/MS_D2
SD_DAT1/XD_D3/MS_D1
XD_D4
XD_D5/MS_BS
SD_DAT0/XD_D6/MS_D0
SD_DAT6/XD_D7/MS_D3

XD-WP
XD-WE
XD-ALE
XD-CLE
XD-CE
XD-RE
XD-R/-B
XD_CD

32
33
34
35
36
37
38
40

SD_DAT4/XD_WP#
SD_DAT3/XD_WE#
XD_ALE
XD_CLE
XD_CE#
SD_DAT2/XD_RE#
XD_R/B#
XD_CD#

NP1
NP2
7IN1_GND
7IN1_GND
7IN1_GND
7IN1_GND

NP1
NP2

3
39
41
42

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

MEMCARD-40P-GP-U2

USB Card Reader Controller - RTS5158


Size

20.I0055.001

Document Number

Date: Wednesday, September 12, 2007


5

Rev

-1

Calado
2

Sheet
1

25

of

39

5VA_S0

3D3V_S0

"VAUX" Pull high to enable standby mode


RN33

KBC_BEEP
17

ACZ_SPKR

SPKR_SB_1

C519
SCD47U16V3ZY-3GP

C520
SC100P50V2JN-3GP
PESET#

C539
SC10U10V5ZY-1GP
C525
C541
SCD1U10V2KX-4GP
SC10U10V5ZY-1GP

C529

R347
10KR2J-3-GP

2AUDIP_PC_BEEP

SC1U10V3KX-3GP

SRN47KJ-1-GP

28

C526
1

AUDIO_BEEP

C522
SCD47U16V3ZY-3GP
1

5
6
7
8

SCD1U10V2KX-4GP

4
3
2
1

KBC_BEEP_1

ENG

C527

1
DY

SC10P50V2JN-4GP
1
2
R348 0R2J-2-GP
C530
1
2
DY

27

C545
SCD47U16V3ZY-3GP

34
13
SENSE_B
SENSE_A

44
43

R352
20KR2F-L-GP
2

MIC_JD# 27,38

ACZ_SDATAOUT 16,21
ACZ_SDATAIN0 16

2
39R2J-L-GP

SPDIFO
EAPD

48
47

NC#45
DMIC-CLK

45
46

HP-OUT-L_PORT-A
HP-OUT-R_PORT-A

39
41

SOUNDL 27
SOUNDR 27

LINE-OUT-L_PORT-D
LINE-OUT-R_PORT-D

35
36

FRONTL 27
FRONTR 27

G1410_SHDN# 27

DMIC_CLK 14

DMIC_12 14
MONO-OUT
TP158
TPAD30
R354
20KR2F-L-GP
2

POWER GENERATE
5V_S0

U51

5VA_S0

NC#5

VOUT

4
1
2

2nd:74.00923.C3F
(G923-475T1UF)

C542

C540

ICS

SC1U10V3KX-3GP

RT9198-4GPBG-GP
74.09198.A7F

SC2D2U10V3ZY-1GP

C544
SC1U10V3KX-3GP

EN
GND
VIN

*Layout*
20 mil

1
2
3

ALC268_SENSE

DY

C548
SC10U10V5ZY-1GP

VREF

AC97_DATIN 1
R349

LINEOUT_JD# 27,38

CD-L
CD-R
CD-G

VREF

SC4D7U6D3V5KX-3GP

ALC268-GR-GP

5
8

18
20
19

C549

JDREF
MONO-OUT

MIC1-VREFO-R
MIC1-VREFO-L
MIC2-VREFO

40
37

32
28
30

JDREF

C550
SC4D7U6D3V5KX-3GP

MIC1V_R
MIC1V_L

AVSS1
AVSS2
DVSS
DVSS

2 2K2R2J-2-GP
2 2K2R2J-2-GP

SC10P50V2JN-4GP

ALC268

MIC1-L_PORT-B
MIC1-R_PORT-B
MIC2-L_PORT-F
MIC2-R_PORT-F

DMIC-12/GPIO0
DMIC-34/GPIO3

LINE1-VREFO
GPIO1

ACZ_RST# 16,21
ACZ_SYNC 16,21
ACZ_BITCLK 16

C528
1
2
DY

SDATA-OUT
SDATA-IN

2
3

29
31
2 C537 MIC1-L_PORT-B 21
2 C538 MIC1-R_PORT-B 22
16
17

1
1

R356 1
R355 1

LINE1-L_PORT-C
LINE1-R_PORT-C
NC#14
NC#15

26
42
4
7

SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP

27,38 AUD_MICIN_L
27,38 AUD_MICIN_R

23
24
14
15

NC#44
NC#43

DVDD
DVDD-IO
AVDD1
AVDD2

U50

PCBEEP
RESET#
SYNC
BCLK
NC#33

1
9
25
38

12
11
10
6
33

SC10P50V2JN-4GP

R350
4K99R2F-L-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

AZALIA CODEC - ALC268


Document Number

Rev

Calado

Date: Wednesday, September 12, 2007

-1

Sheet
E

26

of

39

C575
SC2700P50V3KX-1GP

R395
56KR2J-L1-GP

L_LINE_IN_1

3D3V_S0

SC47P50V2JN-3GP
C554

L_LINE_IN

U48

2
R394

1
G1410_SHDN# 2
3

5V_S0

DY 0R2J-2-GP

DY
R75
100KR2J-1-GP

26

FRONTL

26

FRONTR

R357
20KR2J-L2-GP
1
2 HP_L

2SOUND_L1

2SOUND_R1 1

C547 SC1U16V3KX-2GP

ENG

R385
10KR2J-3-GP

R388
10KR2J-3-GP

GAIN0 GAIN1 Av(dB)

R406
0R2J-2-GP

DY

R387
0R2J-2-GP

R386
0R2J-2-GP

6
10
15.6
21.6

HP_L
HP_R

PVDD
NVDD

7
6

INL
INR

NC#9

OUTL
OUTR

2
4

SPKR_L+1
SPKR_R+1

SHDN#

G1410_SHDN#

PGND

G1410_SHDN# 26

R353

G1412RC1U-GP

74.01412.AE3

R351
0R2J-2-GP

DY
AMP_SHUTDOWN# 28
3

DY

R_LINE_IN

R407
56KR2J-L1-GP

C577
SC2700P50V3KX-1GP

0
1
0
1

0
0
1
1

C558
SCD1U10V2MX-3GP

2R_LINE_IN_1

SOUNDR

GAIN0

C532
SC1U6D3V3KX-1GP

GAIN1

DY

ENG

1410_VSS
C563

10KR2J-3-GP

APA2031RI-TRLGP
74.02031.01G

3D3V_S0

C557

5V_S0

8
3

NC#12

U52
3D3V_S0

12

SPKR_R+1

C571
SC1U16V3ZY-GP

SPKR_R+
SPKR_R-

SC2D2U6D3V3MX-1-GP

RIN+
RIN-

R364
18KR2F-GP
1
2

DY

SC2D2U6D3V3MX-1-GP

C572
SC1U16V3ZY-GP

7
17

1
11
13
20
21

ENG

R358
20KR2J-L2-GP

SPKR_L+1

C555
SC47P50V2JN-3GP

RIN+
R_LINE_IN

GND
GND
GND
GND
GND

LOUT+
LOUT-

18
14

AMP_SHUTDOWN# 28
2
SC1U16V3ZY-GP
1

4
8

ROUT+
ROUT-

C570

SPKR_L+
SPKR_L-

LIN+
L_LINE_IN

GAIN0
GAIN1

LIN+
LIN-

BYPASS

2
3

19
10
9
5

GAIN0
GAIN1

SHUTDOWN#
BYPASS

PVDD
PVDD

VDD

15
6

DY

R363
18KR2F-GP
1
2

HP_R

2
1
2

1
2

SC1U16V3ZY-GP

C524
SC4D7U10V5ZY-3GP

74.05930.073

16
C578

SC4D7U10V5ZY-3GP

SC4D7U10V5ZY-3GP

C579 C569

26

OUT
C1+
C1NC#7

C546 SC1U16V3KX-2GP

G5930RB1U-GP

U54
5V_S0

IN
SHDN#
GND

1410_VSS
1

6
5
4
7

SOUNDL

AUDIO OP AMPLIFIER

ENG

26

R,L 2W Speaker

Internal Speaker
LOUT1

LINEOUT_JD# 26,38

SPKR_R_A1

1
2
56R2F-1-GP
R405
1
2
56R2F-1-GP R404
1

C580
SC680P50V2KX-2GPDY

RN28

SRN1KJ-7-GP

AUD_AGND

DY

26,38
26,38

1
1

AUD_MICIN_L
R415

DYDY

PD

AUD_AGND
AUD_AGND

SHIELDING

2
SCD1U25V2ZY-1GP

EC129
1

L24
FCM1608KF-121-GP
1DY
2

2
SCD1U25V2ZY-1GP

DY DY

20.D0197.104

1st source:20.D0197.104
2nd source:20.F0984.004

ICS

DY

Wistron Corporation

1
AUD_AGND

G78

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

BAV99-5-GP
Title

GAP-CLOSE
AUD_AGND

ACES-CON4-1-GP-U1

5V_S0

D26

ENG

EC128
1

26,38

AUD_MICIN_R

10KR2J-3-GP

DY

EC126
SC1KP50V2KX-1GP

10KR2J-3-GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

PD

EC125

DY

2
3
4

EC115 SC100P50V2JN-3GP
EC117 SC100P50V2JN-3GP
EC119 SC100P50V2JN-3GP
EC120 SC100P50V2JN-3GP

1 R408
2
1KR2J-1-GP
1
2
R412
1KR2J-1-GP
R409

AUD_MIC_L

2
2

AUD_MIC_R

EC121

SPKR_L+
SPKR_RSPKR_R+

DY DY
MIC_JD#

AUD_AGND

SPKR_L+
SPKR_RSPKR_R+

AUD_AGND

MIC_JD#

PHONE-JK233-GP-U2

SPKR_L-

38
38
38

SPKR1

4
3

DY DY

38

1
1
1
1

AUD_AGND

DY

SPKR_L-

2
2
2
2

MICIN1

SC680P50V2KX-2GP

SC1KP50V2KX-1GP

22.10133.B21

22.10133.B01

SPKR_L+1 38

C576

EC122

PHONE-JK235-GP-U2

NP2
NP1
5
4
3
6
2
1

SPKR_R+1 38

1
2

SPKR_L_A1

SHIELDING
2

PD

ENG

LINEOUT_JD#

NP2
NP1
5
4
3
6
2
1

AUDIO AMP AND JACK


Size

AUD_AGND

Document Number

Rev

-1

Calado
Date: Wednesday, September 12, 2007
A

Sheet
E

27

of

39

3D3V_AUX_S5
D10

C214
SC15P50V2JN-2-GP

C216
SCD1U16V2ZY-2GP

29
29
29
29

86
87
90
92

F_SDI
F_SDO
F_CS0#
F_SCK

3D3V_S0

D/A

5V_S0

RN21

3D3V_S0

97
98
99
100
108
96

DA0/GPI94
DA1/GPI95
DA2/GPI96
DA3/GPI97

101
105
106
107

BRIGHT_SETTING
ENERGY_DET

3D3V_S0

RN17

AD_IA
36
MAIL# 14
INTERNET# 14

DVR_1
DVR_0
KBC_MATRIX0#

SRN10KJ-6-GP

MMBT3906-3-GP
84.03906.R11

E-BUTTON#
WIRELESS_BTN#

Big KB(17")

Small KB (Biwa)

C574
SC100P50V2JN-3GP

C573
SC100P50V2JN-3GP

BRIGHT_SETTING

DY

DY

ICS

DY

R94
10KR2J-3-GP

KBC_MATRIX0#

BT_LED
R420

R93
10KR2J-3-GP

Wistron Corporation

R99
10KR2J-3-GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

R92
10KR2J-3-GP

GND
GND
GND
GND
GND
GND

AGND

1
2

WPC8763LDG-1-GP
71.08763.A0G

DVR_1
DVR_0

VR-10M-GP-U1

R62

10KR2J-3-GP

C201
SCD1U16V2ZY-2GP

2
1
2
R393
100R2F-L1-GP-U

3D3V_S0

10KR2J-3-GP

DY

VCORF

10KR2J-3-GP

44

R66

17.10131.106

USB_PWR_EN# 21,38

R95

R392
100R2F-L1-GP-U

3D3V_AUX_S5

IRTX
MODEL_ID#

10KR2J-3-GP

VCORF

SER/IR

10KR2J-3-GP

1
NP1
DVR_1_C
2
DVR_0_C
3

NP2

CIRTX/GPIO16/HGPIO04
GPIO34/CIRRX2
GPIO36

VR1

R400
10KR2J-3-GP

114
14
15

C241

3D3V_S0

BT_LED
14
WIRELESS_BTN# 14
BLON_OUT 14
GMCH_BL_ON 7

SOUT_CR/GPIO83/BADDR1
SIN_CR/CIRRX/GPIO87
GPIO84/HGPIO01/BADDR0

Q11
B

KBC_THERMALTRIP# 30

111
113
112

GPIO

30,33,38 S5_ENABLE

SPI

ECRST#
KBC_THERMALTRIP#
KA20GATE
KBRCIN#

20,30,38 PURE_HW_SHUTDOWN#

ENERGY_DET 22
CRT_DEC# 15

PM_SLP_S3# 17,24,30,34,35
KBC_PWRBTN# 14
AC_IN#
36
LID_CLOSE# 29
PM_PWRBTN# 17,38
LDRQ0#
16
NUM_LED# 14
CAP_LED# 14
PWR_G_LED 14
PWR_O_LED 14
RSMRST#_KBC 17
AD_OFF 37
L-line_LED 14
CHARGE_LED 14
BT_BTN# 14
ENG
WLAN_TEST_LED 14

DC_BATFULL

SPI_DI/GPIO77
SPI_DO/GPIO76/SHBM
SPI_SCK/GPIO75
GPIO81

4
3
2
1

SRN10KJ-6-GP

TPDATA
TPCLK

5
18
45
78
89
116

14

E51_TxD
E51_RxD

84
83
82
91

64
95
93
94
119
6
109
120
65
66
16
17
20
21
22
23
24
25
26
27
28
73
74
75
110

24
24

BLUETOOTH_EN

SP

GPIO01
GPIO03
GPIO06/HGPIO06
GPIO07/HGPIO07
GPIO23
LDRQ#/GPIO24/HGPIO01
GPIO30
GPIO31
GPIO32
GPIO33
GPIO40
GPIO42/TCK
GPIO43/TMS
GPIO44/TDI
GPIO45
GPIO46/TRST#
GPIO47/JEN0#
GPIO50/TDO
GPIO51
GPIO52/RDY#
GPIO53
IRRX2_IRSL0/GPIO70
IRTX/GPIO71
IRRX1/GPIO72
GPIO82/HGPIO00/TRIS#

5
6
7
8

3D3V_AUX_S5

8
7
6
5

VREF
AD0/GPI90
AD1/GPI91
AD2/GPI92
AD3/GPI93
AD4/GPIO05
AD5/GPIO04

29
E-BUTTON#
24 BLUETOOTH_EN
24 WIRELESS_EN
27 AMP_SHUTDOWN#

SMB

SWD/GPIO66

ECRST#

WPC8763LDG-1-GP
71.08763.A0G

A/D

104

81

17,24,34,35 PM_SLP_S4#

SDA2
SCL2
SDA1
SCL1

85

19
46
76
88
115

MAIL#
INTERNET#
BT_BTN#
A-BUTTON#

4
3
2
1
SRN10KJ-6-GP

LPC

103

BATTERY----->

68
67
69
70

VCC_POR#

RN22

5
6
7
8

U14A

VCC
VCC
VCC
VCC
VCC

102

4
VDD

LPCPD#/GPIO10/HGPIO00
LRESET#
LCLK
LFRAME#
LAD0
LAD1
LAD2
LAD3
SERIRQ
CLKRUN#/GPIO11/HGPIO02
KBRST#
GA20
ECSCI#
SMI#
PWUREQ#

1 OF 2

THER_SDA
THER_SCL
36,37 BAT_SDA
36,37 BAT_SCL

KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8

TPAD28
TPAD28

R63

R399

THERMAL----->

54
55
56
57
58
59
60
61

FIU

ECSWI#

SPIDI
SPIDO
SPICS#
SPICLK

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

KBC

PS/2

17

ECSCI#_KBC

PSDAT3/GPIO12
PSCLK3/GPIO25
PSDAT2/GPIO27
PSCLK2/GPIO26
PSDAT1
PSCLK1

KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
TP68
TP73

0R0603-PAD

AVCC

80
VBAT

16 LPC_LFRAME#
16
LPC_LAD0
R89
DY
16
LPC_LAD1
0R2J-2-GP
16
LPC_LAD2
16
LPC_LAD3
17
INT_SERIRQ
17
PM_CLKRUN#
PCLK_KBC_RC
1 DY2
16
KBRCIN#
16
KA20GATE
C234
SC4D7P50V2CN-1GP

TPDATA
TPCLK

13
12
11
10
71
72

BAT_IN#

1
2
3
4

1
2

PLT_RST1#_1

PCLK_KBC

124
7
2
3
126
127
128
1
125
8
122
121
29
9
123

TB1/GPIO14/HGPIO04
TA2/GPIO20
TA1/GPIO56
A_PWM0
A_PWM1/GPIO21
B_PWM0/GPIO13

53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33

SC1U10V3KX-3GP

A-BUTTON#

BRIGHTNESS

32KX2
CLKOUT/GPIO55

63
117
31
32
118
62

4
3

3D3V_AUX_S5

1
2

C209
SCD1U16V2ZY-2GP

C220
SC470P50V2KX-3GP DY

14

14

79
30

KBSOUT0/JENK#
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KBSOUT4
KBSOUT5/TDO
KBSOUT6/RDY#
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
KBSOUT16/GPIO60
KBSOUT17/GPIO57/HGPIO03

C319,C657 colse to Pin102

VBAT

R390
2 0R0402-PAD
1

KBC_BEEP

32KX1/32KCLKIN

C344,C645 colse to Pin VDD

PLT_RST1#

KBC_CIR

26

37

RN20

1
2

DY

3D3V_S0

7,17

29

77

DY

C202
SC10U10V5ZY-1GP

3D3V_S0

C227
SCD1U10V2MX-3GP

TP14
TP1

C210
SC1U16V3ZY-GP

KBC_XO

29
SRN10KJ-5-GP
29

TPAD28
TPAD28

KBC_XI

1
2
R70
10MR2J-L-GP

LOW_PWR

FOR KBC DEBUG


5V_AUX_S5

X-32D768KHZ-38GPU

VBAT

C230
SC10U6D3V5MX-3GP

DY

22

1
2
R69
10MR2J-L-GP

1
2

1
2

2N7002DW-1-GP
84.27002.D3F

3D3V_S0

SMBC_G792 20
SMBD_G792 20

C213
SCD1U10V2MX-3GP

C203
SCD1U10V2MX-3GP

C204
SCD1U10V2MX-3GP

THER_SDA

SCD1U10V2MX-3GP

C357

C205
SC10U6D3V5MX-3GP

Q9

3D3V_S0

SRN10KJ-6-GP

THER_SCL

R67
10KR2J-3-GP

4
3
2
1

BLUETOOTH_EN 5
S5_ENABLE
6
7
8

3D3V_S0

3D3V_AUX_S5

R61
10KR2J-3-GP

U14B 2 OF 2

R68
33KR2J-3-GP

RN19

R193 4K7R2F-GP

KBC_XO_14

3D3V_AUX_S5

E51_TxD

KCOL[1..16] 29,38
KROW[1..8] 29,38

X2

1
2
3
4

1
DY 2 E51_TxD
R100 10KR2J-3-GP

THER_SCL
THER_SDA

C215
SC15P50V2JN-2-GP

82.30001.691

2 E51_RxD
DY
10KR2J-3-GP

1
R96

3ECSCI#_KBC

RN18
SRN4K7J-10-GP

BAT_SCL
BAT_SDA

3D3V_S0

BAS16-1-GP

ECSCI#_1

8
7
6
5

17

Title
Size
A3

KBC WPC8763L
Document Number

Rev

-1

Calado

Date: Wednesday, September 12, 2007

Sheet

28

of

39

3D3V_AUX_S5

Hall Switch

3D3V_AUX_S5

LID1

VDD

OUT

R22
10KR2F-2-GP

5
6
7
8

SPI FLASH ROM

COVER_SW#

ME268-002-GP

BIOS_VCC

8
7
6
5

SPICLK
SPIDO

3D3V_S0

28
28

SPICLK_1
SPIDO_1

R402
10KR2J-3-GP

R403
10KR2J-3-GP

DY
17
17

PCB_VER0
PCB_VER1
R397
10KR2J-3-GP

DY

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

PlanarID
(1,0)
SA: 0,0
SB: 0,1
-1: 1,0
-2: 1,1

EC55

DY

EC57

R398
10KR2J-3-GP

W25X80-VSSI-GP
72.25X80.001

VCC
HOLD#
CLK
DIO

DY

CS#
DO
WP#
GND

3D3V_AUX_S5
R85
0R0402-PAD
1
2
SPI_HOLD#
1R84
2 150R2J-L1-GP-U
1
2
150R2J-L1-GP-U
R82

EC54

1
2
3
4

SPICS#_1
SPIDI_1
SPI_WP#
150R2J-L1-GP-U

DY

2nd source: 74.09132.07B

U17

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

DY

KBC_CIR 28

EC56

SPICS#
SPIDI

28

28

R83
0R0402-PAD
1
2
1
R86

C41
SCD22U16V3KX-2-GP

SPI_HOLD#

LID_CLOSE# 28
4

4
3
2
1

74.00268.07B

R21
2 0R0402-PAD
1

C43
SCD1U16V2ZY-2GP

8M Bits

RN23
SRN10KJ-6-GP

GND
1

E-key
R201
470R2J-2-GP
1
2

PD
LEFT1

E-BUTTON#_1
3

DY
2

4
SW-TACT-119-GP

62.40009.671
KB1
MLX-CON25-1-GP

20.K0192.025

SC47P50V2JN-3GP

E-BUTTON# 28
EC46

KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16

KCOL16
KCOL15
KCOL14
KCOL13

EC14
EC15
EC17
EC18

1
1
1
1

Touch Pad CONN

2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP

1
26

27
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2

5V_S0

EMI Bypass cap.

C183
SC1U16V3ZY-GP

ENG

TPAD1

PD

KCOL4
KCOL3
KCOL2
KCOL1

EC28
EC29
EC30
EC31

1
1
1
1

2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP

1
RN16
28
28

1
2

TPDATA
TPCLK

TP_DATA
TP_CLK

4
3

28,38

EC37
EC38
EC39
EC40

1
1
1
1

2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP

KCOL12
KCOL11
KCOL10
KCOL9

EC19
EC20
EC21
EC22

1
1
1
1

2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP

25
........

EC42

TP_RIGHT

TP_LEFT

EC49

Touch Pad Button

2
3
4
5
6
7
8
9
10
11
12

LEFT2 TP_LEFT
3

RIGHT1

5
2
14

ACES-CON12-4-GP

EC50

62.40009.671

62.40009.671

38
38
38
38

TP_DATA
TP_CLK
TP_RIGHT
TP_LEFT

TP_DATA
TP_CLK
TP_RIGHT
TP_LEFT

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

BUTTONs / KB / TOUCHPAD / BIOS


Document Number

Rev

-1

Calado

Date: Wednesday, September 12, 2007


B

4
SW-TACT-119-GP

ICS

CHECK KB SPEC. AND PIN DEFINE


A

TP_RIGHT
3

4
SW-TACT-119-GP

20.K0228.012

SC47P50V2JN-3GP

KROW4
KROW3
KROW2
KROW1

SC47P50V2JN-3GP

Internal KeyBoard CONN

EC41

TP_RIGHT
TP_LEFT

KCOL[1..16]

2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP

28,38

1
1
1
1

KCOL[1..16]

KROW[1..8]

EC32
EC33
EC34
EC35

KROW[1..8]

KROW8
KROW7
KROW6
KROW5

SRN100J-3-GP

2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP
2SC220P50V2JN-3GP

1
1
1
1

SC47P50V2JN-3GP

EC24
EC25
EC26
EC27

SC47P50V2JN-3GP

KCOL8
KCOL7
KCOL6
KCOL5

13

Sheet
E

29

of

39

Aux Power

3D3V_AUX_S5
1D05V_S0

R106
2K2R2J-2-GP

2nd source:74.09198.G7F

PM_THRMTRIP-A#

PM_THRMTRIP-A# 4,7,16

C244
SCD1U16V2ZY-2GP

KBC_THERMALTRIP# 28

Q13
MMBT3904-3-GP

4,16,38 H_PWRGD

R104
1KR2J-1-GP
1
DY 2H_PWRGD# B

SCD1U16V2ZY-2GP

C246
SCD1U16V2ZY-2GP

2
D11
BAS16-1-GP

DY

MMBT2222A-3-GP
Q12

DY

PURE_HW_SHUTDOWN#

20,28,38

S5_ENABLE 28,33,38

Run Power
5V_S5

5V_S0
Q19
TP0610T-T1-E3-GP

DCBATOUT

C564
1
DY

RUN_POWER_ON

R376

DY

Z_12V_D3

DY

D
D
D
D

8
7
6
5

AO4468-GP
84.04468.037

D25
PDZ9D1B-GP

8
7
6
5

83.9R103.C3F
3D3V_S0

3D3V_S5

1
2
3
4

U19
S
S
S
G

Q22
2N7002-11-GP
84.27002.W31

G
ICS

17,24,28,34,35 PM_SLP_S3#

D
D
D
D

AO4468-GP
84.04468.037

Q20

Q21
2N7002-11-GP

U29
S
S
S
G

2N7002-11-GP

Z_12V_D3

1
3D3V_runpwr 2

DY

R383
100KR2J-1-GP

R377

Z_12V_G3
10KR2J-3-GP

2
1
R375
330KR2F-L-GP

R378
100KR2J-1-GP

SCD1U16V2ZY-2GP

DY

C565

R384
100R5J-3-GP

1
2
3
4

3D3V_S0

1
2
10KR2J-3-GP

SCD1U25V3KX-GP
Z_12V

SC1U16V3ZY-GP

PD

G909-330T1U-GP
74.00909.03F

1
C14

100KR2F-L1-GP

C583

NC#4

R105
56R2J-4-GP

VOUT

VIN
GND
SHDN#

SC1U16V3ZY-GP

C16

1 R432

1
2
3

3D3V_AUX_S5

I max = 150 mA
U7

5V_AUX_S5

1D05V_S0

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

RUN POWER and 3D3V_AUX_S5


Document Number

Rev

Calado

Date: Wednesday, September 12, 2007

Sheet

-1
30

of

39

TPS51124
1D8V/1D05V

CPU_CORE
MAX8770
VID Setting

H_VID0

PWRG(OD / 3.3V)

VID1(I / 1.05V)

H_VID2

Input Power

5V_S0

Output Signal

VID0(I / 1.05V)

H_VID1

Output Power

VDD
1D8V (O)

VGATE_PWRGD
DCBATOUT_8717

1D05V(O)

VID3(I / 1.05V)

H_VID4

Output Power

VID5(I / 1.05V)

H_VID6

VID6(I / 1.05V)

VCC_CORE_PWR(O)

Input Signal

PSI#

PM_SLP_S4#
VCC_CORE_S0(Imax=47A)

EN1

0D9V_S0

PM_SLP_S3#

EN2

PSI# (I / 3.3V)

CPUCORE_ON

SHDN#(I / 3.3V)

PM_DPRSLPVR

5V_S5

Output Signal

CPUCORE_ON

VIN

1D8V_S3

VLDOIN

PGOOD1

DPRSLPVR (I / 3.3V)

H_DPRSTP#

1D05V_S0 (9.5A)

Input Signal

VID4(I / 1.05V)

H_VID5

1D8V_S3 (8.5A)
D

VCC

VID2(I / 1.05V)

H_VID3

PM_SLP_S3#

DPRSTP# (I / 3.3V)

PM_SLP_S4#
Voltage Sense
VCC_SENSE
C

0D9V_S0 (1.5A)

VTT

S3

0D9V_S3

VTTREF

S5

CCI(I / Vcore)

TPS51100
C

VSS_SENSE

GNDS(I / Vcore)

1D25V_S0
Input Power
DCBATOUT_6262

VCC(I)

5V_S0

1D8V_S0

1D25V(O)

VIN

1D25V_S0 (4A)

VCC(I)
PM_SLP_S3#

5V_S0

EN

VDD(I)

POK

CPUCORE_ON

APL5913

1D5V_S0

TPS51120
5V/3D3V
1D8V_S3

Input Signal

PGOOD1(OD / 5V)
PGOOD2(OD / 5V)
S5_ENABLE
S5_ENABLE

CPUCORE_ON

PM_SLP_S3#

1D5V(O)

1D5V_S0 (4A)

CPUCORE_ON

POK

EN

CPUCORE_ON

ON3

APL5915
Output Power

Charger MAX8731

ON5
PGOOD5(O)

5V_S5 (6A)

Input Signal
CHGON#/OFF

Input Power

VIN

Output Signal

DCBATOUT_51120

PGOOD3(O)

3D3V_S5 (7A)
BT_TH

Output Signal

ICTL

BATT

PKPRES

ACOK

BT+SENSE
AC_IN

ICS

VIN

Input Power

Output Power

Wistron Corporation
AD+

ACIN

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

BT+

VOUT (O)

Title

DCBATOUT

VOUT (O)

Power Block Diagram


Size
A3

Document Number

Date: Monday, September 10, 2007


5

Rev

-1

Calado
Sheet
1

31

of

39

G3

DCBATOUT_8770_1

GAP-CLOSE-PWR-2U
G5
1
2

ENG

DCBATOUT_8770_2

EC7

DY

DCBATOUT_8770_2

GAP-CLOSE-PWR-2U
G15
1
2

TC20
ST15U25VDM-4-GP

GAP-CLOSE-PWR-2U
G13
1
2

TC19.TC20 changed 77.C1561.00L to 77.21561.00L

GAP-CLOSE-PWR-2U
G12
1
2

5V_S0

1
2

5
6
7
8
4
3
2
1
4
3
2
1

4
3
2
1

8770_CSP2

1 R272
2 1 R273
2
3K48R2F-GP
NTC-10K-9-GP
C413
1
2

ICS

960

960

TC1

EC36

DY
2

TC4

TC16

1
2

1
5
6
7
8

5
6
7
8
4
3
2
1

GAP-CLOSE-PWR

2
2

S
S
S
G

G14

4
3
2
1

5
6
7
8

5
6
7
8
4
3
2
1

AO4456-GP

Id=14.5A
Qg=25~35nC
Rdson=5.9~7.25mohm

R268
0R2J-2-GP

960

U11

AO4456-GP

MAX8770GTL-GP

R267
2K1R2F-GP

4
3
2
1

U39

Circuit and components value need change

VCC_CORE_S0

VSS_SENSE 5

C416
SC1000P50V3JN-GP

10KR2J-3-GP
C407
SCD1U10V2KX-4GP

C408

L15
IND-D36UH-9-GP
1
2

S
S
S
G

POUT

SCD1U16V2ZY-2GP

41

C409

SE330U2VDM-6-GP

GND

EC44

DY

PANASONIC
330uF / 2V / V size
ESR=6mohm / Iripple=3.7A

SE330U2VDM-6-GP

VRHOT#

R271
100R2F-L1-GP-U
1
2

8770_GNDS

5V_S0

C410

13

Id=13A
Qg=10~14nC
Rdson=9.4~12mohm

8770_CSP2

GNDS

R266 DY
1
2
0R2J-2-GP

8770_CSN2

THRM

C40

DY

SE330U2VDM-6-GP

DY

CSN2

15

14

U41
AO4474-GP

CSP2

5
6
7
8

PGND2

5
6
7
8

24
23

U12
AO4474-GP

C39

D
D
D
D

8770_POUT

4
3
2
1
5
6
7
8

DL2

8770_DL2

965

D
D
D
D

56R2J-4-GP
1 R258DY2

8770_LX2

TC3

SCD1U25V3KX-GP

22

TC15DY

VCC_SENSE 5

SC10U25V6KX-1GP

LX2

960

DCBATOUT_8770_2

SC10U25V6KX-1GP

21

SCD22U16V3KX-2-GP

SC10U25V6KX-1GP

DH2

C4121
2 8770_CCI_1
1 R264
2
SC470P50V2KX-3GP
20KR2F-L-GP
8770_BST21
2 8770_BST2_11
2
R270 0R0603-PAD
C418 SCD22U16V3KX-2-GP
8770_DH2

8770_CCI

8770_CSN1

SC10U25V6KX-1GP

BST2

20

8770_CSP1

S
S
S
G

10

R215
0R2J-2-GP

R213
R214
1
2 1
2
3K48R2F-GP
C360
NTC-10K-9-GP
1
2

D
D
D
D

CCI

R212
2K1R2F-GP

Id=14.5A
Qg=25~35nC
Rdson=5.9~7.25mohm

C419
SC1000P50V3JN-GP

S
S
S
G

8770_VRHOT#

R263
100R2F-L1-GP-U
2

U36
AO4456-GP

D
D
D
D

1D25V_S0

12

TIME

10KR2F-2-GP

1 R259

1 R265
2 8770_FB_1
3K65R2F-1-GP

FB

71K5R2F-1-GP
8770_THRM

8770_FB

REF

8770_CSP1
8770_CSN1

1
11

2
2

1
2
2

8770_REF
2
SCD22U10V2KX-1GP

17
16

VCC_CORE_S0
L14
IND-D36UH-9-GP
1
2

SCD1U16V2ZY-2GP

CSP1
CSN1

U8
AO4456-GP

SE330U2VDM-6-GP

27
18

PD

C4141

1 R260

8770_DL1

DL1
PGND1
GND

SHDN#
CCV

8770_VCC

8770_LX1

26

C382

SE330U2VDM-6-GP

DPRSLPVR

8770_TIME

28

C13

SCD1U25V3KX-GP

39

8770_CCV
2
SC470P50V2KX-3GP

LX1

20061225

DY

SC10U25V6KX-1GP

DPRSTP#

C4111

1 R261

29

PSI#

40

38

DH1

C405
0R0603-PAD
SCD22U16V3KX-2-GP
8770_BST11
2 8770_BST1_11
2
R253
8770_DH1

SC10U25V6KX-1GP

DY

D0
D1
D2
D3
D4
D5
D6

30

AO4474-GP

C384

SC10U25V6KX-1GP

R256
10KR2J-3-GP

31
32
33
34
35
36
37

BST1

8770_TON

S
S
S
G

PWRGD

C12

D
D
D
D

33,34,35 CPUCORE_ON

CLKEN#

25

TON

S
S
S
G

7,17 PM_DPRSLPVR

AO4474-GP

VDD

C383

U6

S
S
S
G

1
R257
1
R246
1
R247
1
R248

PSI#

4,7,16 H_DPRSTP#

VCC

U35

D
D
D
D

8770_D0
2
0R0402-PAD
8770_D1
2
0R0402-PAD
8770_D2
2
0R0402-PAD
8770_D3
2
0R0402-PAD
8770_D4
2
0R0402-PAD
8770_D5
2
0R0402-PAD
8770_D6
2
0R0402-PAD
8770_PSI#
2
0R0402-PAD
8770_DPRSTP#
2
0R0402-PAD
8770_DPRSLPVR
2
0R0402-PAD
8770_SHDN#
2
0R0402-PAD

1
R2411
R2401
R2381
R2391
R2371
R2501
R249

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6

R262
200KR2F-L-GP

965

S
S
S
G

19

Id=13A
Qg=10~14nC
Rdson=9.4~12mohm

D
D
D
D

U40

17 VGATE_PWRGD
5
5
5
5
5
5
5

DCBATOUT_8770_2

D
D
D
D

SC2D2U10V3KX-1GP

R255
2K2R2J-2-GP

8770_VCC

SC10U25V6KX-1GP

C417
3D3V_S0

GAP-CLOSE-PWR-2U
B

C44
SC10U10V5KX-2GP

R269
10R3J-3-GP

GAP-CLOSE-PWR-2U
G80
1
2

DCBATOUT_8770_1

GAP-CLOSE-PWR-2U
G79
1
2

ENG

ENG

EC8
SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

DY

GAP-CLOSE-PWR-2U
G11
1
2

TC19
ST15U25VDM-4-GP

DY

GAP-CLOSE-PWR-2U
G6
1
2

DCBATOUT_8770_1

GAP-CLOSE-PWR-2U
G4
1
2

DCBATOUT

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

SCD22U16V3KX-2-GP

8770_CSN2
Title

VCC_CORE_2
Size
A3

Document Number

Rev

-1

Calado

Date: Wednesday, September 12, 2007

Sheet
5

32

of

39

G42

DCBATOUT_51120

5
6
7
8

0R3-0-U-GP
51120_VREG5
3D3V_AUX_S5 R433
1
2
0R2J-2-GP
C305

27
14

51120_DRVH1
51120_DRVH2

51120_CS2

51120_GND

VFB1

N/A

not use

ADJ.

VFB2

N/A

not use

ADJ.

not use

LDO OFF
A

Swither ON
LDO ON

1
2

1
2

1
2

DY

SC33P50V3JN-GP

TC11
ST220U6D3VDM-17GP

R122
30K9R3F-GP

51120_VFB2

51120_DRVL2
R127
22KR2F-GP

DY

GAP-CLOSE-PWR-2U
G41
1
2
GAP-CLOSE-PWR-2U
G40
1
2

KEMET 220uF
ESR=25mohm
Iripple=2.2A

GAP-CLOSE-PWR-2U

R125
13KR3F-GP

DY

51120_GND

C303
SC1000P50V3JN-GP

51120_GND

Switcher ON

DY

DY

For TPS51120,
Vout=5V
If you use
2. If you use
3. If you use
Vout=3.3V
1. If you use
2. If you use
3. If you use

C289
1.
SC680P50V2KX-2GP

51120_GND

<Core Design>

a 6.8uH inductor, the minimum ESR is 70m ohm.


a 4.7uH inductor, the minimum ESR is 48m ohm.
a 3.3uH inductor, the minimum ESR is 34m ohm.
a 4.7uH inductor, the minimum ESR is 51m ohm.
a 3.3uH inductor, the minimum ESR is 36m ohm.
a 2.5uH inductor, the minimum ESR is 27m ohm.

VREG3 on

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

TPS51120_5V_3D3V
Size
A3

Document Number

Rev

-1

Calado

Date: Wednesday, September 12, 2007


B

GAP-CLOSE-PWR-2U
G38
1
2

DY

GAP-CLOSE-PWR-2U
G43
1
2

C291
SC390P50V3JN-GP
2

5V
Fixed Output
3.3V
Fixed Output

DY

220k/CH1
330k/CH2

SC390P50V3JN-GP
2

290k/CH1
440k/CH2

EN3,EN5

51120_COMP1_PL

380k/CH1
590k/CH2

not use

DY

C307

TONSEL

EN1,EN2 Switcher OFF

PWM

R134
30KR2F-GP

180k/CH1
280k/CH2

DY

D-Cap
MODE

PWM

51120_COMP2

3D3V Iomax=6A
OCP>10A

IND-3D3UH-57GP

C284
S
S
S
G

AUTOSKIP

AUTOSKIP
/FAULTS
OFF

V5FILT

U21
AO4712-GP

Id=9.1A
Qg=12nC
Rdson=15~18mohm

51120_COMP2_PL

VREF2

3D3V_S5

GAP-CLOSE-PWR-2U
G45
1
2

3D3V_PWR

L9

51120_DRVH2
51120_LL2

ENG

Cyntec 7*7*3
DCR=37mohm, Irating=5.5A
Isat=10A

DY

GAP-CLOSE-PWR-2U
G37
1
2

3D3V_PWR

Id=9.2A
Qg=9~12nC
Rdson=17.4~22mohm

51120_VREF2

GAP-CLOSE-PWR-2U
G35
1
2

C327
SCD1U50V3ZY-GP

R155
1
2
0R2J-2-GP

51120_TONSEL

C330

1 R124
2
13KR3F-GP

C329

U20
AO4468-GP

51120_COMP1

G39

51120_CS1

GND

N/A

DCBATOUT_51120

D
D
D
D

1 R151
2
16K5R3F-GP

32,34,35

ENG

N/A

CPUCORE_ON

R156
0R2J-2-GP

51120_V5FILT

COMP

1
1
2

DRVH1
DRVH2

2 0R2J-2-GP
2 0R2J-2-GP

51120_GND
51120_GND

CURRENT
MODE

1
51120_DRVL1
51120_DRVL2

R154 1
R119 1

GAP-CLOSE-PWR

DRVL1
DRVL2

25
16

51120_PGD1
51120_PGD2

S
S
S
G

251120_SKIPSEL 32
31

CS1
CS2
23
18

24
17
5
33

PGND1
PGND2
GND
GND

TPS51120RHBR-GPU1

30
11

D
D
D
D

SC1000P50V3JN-GP

G75

SKIPSEL

1
7
2

VREF2

PGOOD1
PGOOD2

SC10U25V6KX-1GP

FLOAT

GAP-CLOSE-PWR-2U

Vout=1V*(R1+R2)/R2

SC10U25V6KX-1GP

51120_VREF2

VO1
VO2

15
26

VFB2
VFB1

R164
100KR2J-1-GP
51120_LL2
51120_LL1

LL2
LL1

6
3

C299

R150
7K5R3F-2-GP

5
6
7
8

EN1
EN2
EN3
EN5

1
8

GAP-CLOSE-PWR-2U
G64
1
2

51120_GND

COMP2
COMP1

VREG3
VREG5

29
12
10
9

5V_PWR
3D3V_PWR

51120_GND

GAP-CLOSE-PWR-2U
G63
1
2

KEMET 220uF
ESR=25mohm
Iripple=2.2A

3D3V_S0

4
3
2
1

2 0R2J-2-GP 51120_VFB2
2 0R2J-2-GP 51120_VFB1

EN3 to VREG5 and EN5 to VBAT.

R152
30KR3F-GP

51120_EN1
2 0R2J-2-GP
51120_EN2
2 0R2J-2-GP
0R2J-2-GP
51120_EN3
2
51120_EN5
2 0R2J-2-GP

20
22

U22

51120_GND

R128 1
R135 1

C286

V5FILT
VIN

DY

1
2
0R2J-2-GP
51120_COMP1 1
2
R139
0R2J-2-GP

5
6
7
8

51120_V5FILT

GAP-CLOSE-PWR-2U
G61
1
2

TC13
ST220U6D3VDM-17GP

51120_VFB1

DY

4
3
2
1

DCBATOUT_51120

DY

51120_COMP2

SKIPSEL
TONSEL

R153
1
R118
1
51120_VREG5 1 R120
R121
1

28,30,38 S5_ENABLE

IND-4D7UH-88-GP

51120_DRVL1

5V_S5

GAP-CLOSE-PWR-2U
G59
1
2

R126
51120_VREG3

51120_GND

C321
SC1U25V5KX-1GP
51120_V5FILT

28
13

PD

51120_VBST1

5V_PWR

5V_PWR

C318DY
SC33P50V3JN-GP

Id=9.1A
Qg=12nC
Rdson=15~18mohm

SCD1U50V3ZY-GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP

C326
1
2

G48

51120_LL1_1

1 R157

51120_VBST2

SCD1U50V3ZY-GP

GAP-CLOSE-PWR-2U
G56
1
2

S
S
S
G

51120_LL1
5V_AUX_S5

C276
1
2

51120_LL2_1

0R3-0-U-GP

VBST1
VBST2

1 R117

19
21

51120_LL2

DCBATOUT_51120

5V Iomax=5A
OCP>9A

51120_GND

U27
AO4712-GP

GAP-CLOSE-PWR-2U
G55
1
2
GAP-CLOSE-PWR-2U
G57
1
2

D
D
D
D

GAP-CLOSE-PWR-2U

C270
SCD1U50V3ZY-GP

L11

1
5
6
7
8

C297
SC1U16V3KX-2GP

Cyntec 7*7*3
DCR=37mohm, Irating=5.5A
Isat=10A

51120_DRVH1
51120_LL1

51120_VREG5 1
2
5D1R3F-GP

GAP-CLOSE-PWR-2U
G58
1
2

4
3
2
1

Id=9.2A
Qg=9~12nC
Rdson=17.4~22mohm

R131

S
S
S
G

GAP-CLOSE-PWR-2U
G60
1
2

1
2

U28
AO4468-GP
51120_V5FILT

C275
SC10U25V6KX-1GP

TC21
ST15U25VDM-4-GP

DY

GAP-CLOSE-PWR-2U
G62
1
2

GAP-CLOSE-PWR-2U

C274

D
D
D
D

GAP-CLOSE-PWR-2U
G46
1
2

TC21 changed 77.C1561.00L to 77.21561.00L

G66

ENG

SC10U25V6KX-1GP

GAP-CLOSE-PWR-2U
G44
1
2

4
3
2
1

DCBATOUT

DCBATOUT_51120

Sheet
E

33

of

39

1D8V_PWR

1D8V_S3

G21

DCBATOUT_51124
DCBATOUT

DCBATOUT_51124

51124_DRVL2

L8

5
6
7
8
G76

GAP-CLOSE-PWR

2 51124_LL2_1 1
2 C562
0R3-0-U-GP
SCD1U50V3ZY-GP

1
2

GAP-CLOSE-PWR-2U
G29
1
2

51124_VBST2

51124_DRVL2

51124_VFB2

51124_GND

R362
29K4R2F-GP

DY

C553
SC33P50V3JN-GP

C257

TC9
SE220U2VDM-8GP

GAP-CLOSE-PWR-2U

Panasonic
220uF/ 2V
ESR=15mohm

1
R374

AO4706-GP
S
S
S
G

Id=13.2A
Qg=27nC,
Rdson=6.8~8.2mohm

51124_VBST1

DY

2C561

SCD1U50V3ZY-GP
51124_LL2

COIL-1UH-34-GP
U25

51124_GND

GAP-CLOSE-PWR-2U
G34
1
2

Voutsetting=1.055V
2

GAP-CLOSE-PWR-2U
G30
1
2

1D05V_PWR

2 51124_LL1_1
0R3-0-U-GP

51124_DRVL1

GAP-CLOSE-PWR-2U
G31
1
2

1D05V Iomax=8A
OCP>12A

4
3
2
1

1
R373

Cyntec 7*7*3
DCR=9mohm,Irating=11A
Isat=22A

GAP-CLOSE-PWR-2U
G32
1
2

C312
SCD1U25V3ZY-1GP

SCD1U50V3ZY-GP

51124_LL1

1
6

51124_DRVH2

C332

D
D
D
D

51124_GND

1
AO4468-GP

Id=9.2A
Qg=9~12nC,
Rdson=17.4~22mohm

51124_GND

5
6
7
8

51124_GND

C323
U26

GAP-CLOSE-PWR-2U
G33
1
2

1
R368
0R2J-2-GP

DY

51124_LL2
R381
7K5R3F-2-GP

1D05V_S0

G36
DCBATOUT_51124

4
3
2
1

TRIP1
TRIP2
17
14

18
13
25
3

R379
10KR3F-L-GP

1D05V_PWR

51124_V5FILT

ENG

51124_TRIP1
51124_TRIP2

PGND1
PGND2
GND
GND

51124_DRVH1
51124_DRVH2

S
S
S
G

TPS51124RGER-GPU1

21
10

DY

SC10U25V6KX-1GP

LL1
LL2

DRVH1
DRVH2

SC10U25V6KX-1GP

20
11

51124_TONSEL

EN1
EN2

51124_GND

D
D
D
D

51124_LL1
51124_LL2

23
8

SANYO
330uF, 2.5V
ESR=9mohm, V size

R367
10KR2J-3-GP

TONSEL

DRVL1
DRVL2

51124_EN1_1
51124_EN2_1

2
0R2J-2-GP
2
0R2J-2-GP

GAP-CLOSE-PWR-2U
G23
1
2
GAP-CLOSE-PWR-2U

Vout=0.758V*(R1+R2)/R2

19
12

1
R3691
R370

V5FILT
V5IN

VBST1
VBST2

17,24,28,35 PM_SLP_S4#
17,24,28,30,35 PM_SLP_S3#

15
16

22
9

51124_V5FILT

32,33,35

TC8
ST330U2D5VDM-9GP

GAP-CLOSE

PGOOD1
PGOOD2

51124_GND

VO1
VO2

VFB1
VFB2

U31

2
5

1
2

C566
SC1U16V3ZY-GP

CPUCORE_ON

GAP-CLOSE
G65
1
2

24
7

51124_PGD1
51124_PGD2

1
2

1D05V_PWR
1D8V_PWR
51124_VFB2
51124_VFB1

DY C247
2

1
2
2

51124_VFB1
R360
47KR3F-GP

P/H CPU CORE PAGE


G77
1
2

R380
3D3R3J-L-GP

C349
SC4D7U10V5ZY-3GP

1
1

DY

51124_DRVL1

GAP-CLOSE-PWR-2U
G24
1
2

C552

5V_S5

1
4
3
2
1

10KR2J-3-GP

4
3
2
1

10KR2J-3-GP

R359
64K9R2F-1-GP

R366

GAP-CLOSE-PWR-2U
G25
1
2

S
S
S
G

Id=13.2A
AO4706-GP
Qg=27nC,
Rdson=6.8~8.2mohm

DY

GAP-CLOSE-PWR-2U
G26
1
2

IND-1D5UH-34-GP

5
6
7
8
U24

DY
R365

5
6
7
8

1
2
1

3D3V_S5

GAP-CLOSE-PWR-2U
G27
1
2

1D8V Iomax=12A

SCD1U50V3ZY-GP

3D3V_S5

GAP-CLOSE-PWR-2U
G22
1
2
4

SC33P50V3JN-GP

TC22
GAP-CLOSE-PWR-2U
ST15U25VDM-4-GP

51124_LL1

D
D
D
D

DY

GAP-CLOSE-PWR-2U
G52
1
2

C314
SCD1U25V3ZY-1GP

Cyntec 10*10*4
OCP>16A
DCR=4.2mohm, Irating=16A
1D8V_PWR
Isat=33A
ENG
L7
Voutsetting=1.8046V

51124_DRVH1

GAP-CLOSE-PWR-2U
G51
1
2

ENG

S
S
S
G

Id=9.6A
Qg=18~nC,
Rdson=13.5~16.5mohm

GAP-CLOSE-PWR-2U
G50
1
2

C335
SC10U25V6KX-1GP

U23
AO4406-1-GP

C324
SC10U25V6KX-1GP

TC22.TC24 changed 77.C1561.00L to 77.21561.00L

D
D
D
D

GAP-CLOSE-PWR-2U
G49
TC24
1
2
ST15U25VDM-4-GP
GAP-CLOSE-PWR-2U
G53
1
2

G54

ENG

GAP-CLOSE-PWR-2U
G28
1
2

R361
75KR3F-GP

Vtrip(mV)=Rtrip(Kohm)*10(uA)
Iocp=(Vtrip/Rdson)+((1/(2*L*f))*((Vin-Vout)*Vout)/Vin))
GND

OPEN

V5FILT

240k/CH1
300k/CH2

300k/CH1
360k/CH2

360k/CH1
420k/CH2

51124_GND

TONSEL
1

ICS

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

TPS51124_1D8V_1D05V
Size
A3

Document Number

Calado

Date: Wednesday, September 12, 2007


A

Rev

-1
Sheet
E

34

of

39

10
51100_S5 9
8
51100_S3
7
6

1
2

GAP-CLOSE-PWR-2U
G70
1
2

1
2

C499
SC10U10V5ZY-1GP

GAP-CLOSE-PWR-2U
G74
1
2

1
2
3
4
5

11

TPS51100DGQ-1-GP

VIN
VDDQSNS
S5
VLDOIN
GND
VTT
S3
PGND
VTTREF VTTSNS

DDR_VREF_S3

C503
SCD1U16V2ZY-2GP

DDR_VREF_S0
G72

U47

17,24,28,30,34 PM_SLP_S3#

1 R338
2
0R0402-PAD
1 R337
2
0R0402-PAD

OCP=3A
DDR_VREF_PWR

GND

17,24,28,34 PM_SLP_S4#

C497
SC10U6D3V5MX-3GP

1
2

SCD1U16V2ZY-2GP

DY

1D8V_S3
C502
SC10U10V5ZY-1GP

0D9V_S3
Iomax=0.5A

5V_S5

C504

GAP-CLOSE-PWR-2U
G73
C494
1
2
SC10U10V5ZY-1GP
GAP-CLOSE-PWR-2U

1D25V_S0
Iomax=2A
5V_S5

1D8V_S3

20061205

G16

1
2

6
FB

1D25V_LDO

R31
35K7R2F-GP

5913_FB

APL5913-KAC-1-GP

GAP-CLOSE-PWR-2U
G20
1
2

20061205

GND

DY
2

C67
SCD1U16V2ZY-2GP

GAP-CLOSE-PWR-2U
G17
1
2

C76
SC56P-GP

20061205

SO-8-P

Vo=0.8*(1+(R1/R2))

1D25V_S0

GAP-CLOSE-PWR-2U
C90

R30
63K4R2F-2-GP

C81

OCP=4A

SC10U6D3V5MX-3GP

3
4

SC10U6D3V5MX-3GP

VOUT
VOUT

EN

5
9

VIN
VIN

POK

GAP-CLOSE-PWR-2U
G19
1
2
GAP-CLOSE-PWR-2U
G18
1
2

Vo(cal.)=1.2504V

5913_EN_U74

VCNTL

U13

PM_SLP_S3#1 R29
2
0R0402-PAD

SC1U16V3ZY-GP

32,33,34 CPUCORE_ON

C91
SC10U6D3V5MX-3GP

DY

1 R32
25913_POK_U74
0R0402-PAD

C87
SC10U6D3V5MX-3GP

C439

1D8V_S3

EN

FB

1D5V_S0

20061205

R98
26K7R3F-GP

APL5915-KAI-TRL-GP

5912_FB

SO-8-P

C233

C232
ICS

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

0D9V/1D25V/1D5V

R101
30K1R3F-GP

C240
SC82P50V3JN-GP

GND

20061205
A

1
2

1
2
3
4

SC10U6D3V5MX-3GP

VOUT
VOUT

SC10U6D3V5MX-3GP

5
9

1D5V_S0
Iomax=1.5A
OCP>1.8A

Vo(cal.)=1.5096V
VIN
VIN

5912_EN_U74

SC10U6D3V5MX-3GP

POK

C239

PM_SLP_S3#1 R103
2
0R0402-PAD

5912_POK_U74

SC10U6D3V5MX-3GP

17,24,28,30,34 PM_SLP_S3#

1 R102
2
0R0402-PAD

VCNTL

U18
32,33,34 CPUCORE_ON

C231

C243
SC1U16V3ZY-GP

5V_S5

Vo=0.8*(1+(R1/R2))

Size
A3

Document Number

Rev

-1

Calado

Date: Wednesday, September 12, 2007

Sheet
1

35

of

39

MAX8731_LDO

R236
10KR2F-2-GP

Q5

DCIN_GATE1

ACAV_IN

ACAV_IN

AC_IN#

ACAV_IN

R235
15K4R2F-GP

2N7002DW-1-GP
84.27002.D3F

5V_AUX_S5

R9
100KR2J-1-GP

NEAR
2

Adaptor In Soft-Start Circuit

AC_IN#
AD+ Layout

Trace 250mil
8
7
6
5

U3
S
S
S
G

D
D
D
D

AD+_TO_SYS

1
2
3
4

1
2
R2
D01R2512F-4-GP
AD+

U33
S
S
S
G

D
D
D
D

BT+

8
7
6
5

AO4433-GP
G2

2nd:A04407(84.04407.A37)

G1

2nd:A04433(84.04433.A37)

R208
470KR2J-2-GP
DCIN_GATE2

1
R3

2
100KR2J-1-GP

GAP-CLOSE-PWR

GAP-CLOSE-PWR

NEAR INPUT AD+

R4
1
2
49K9R2F-L-GP

DCIN_GATE1

DC_IN_D

1
2
3
4

P2003EVG-GP

R203
10KR2J-3-GP

Q3
2N7002-11-GP

Layout Trace 300mil

DCBATOUT

Layout Trace 250mil

C380
SC1U10V3KX-3GP

28

SCL

NEAR KBC POWER

LX

BAT_SDA

SDA

23

19

1
1

1
2

D
D
D
D

2 C396
SCD1U25V3KX-GP

MAX8731_LX1

BT+

CHG_PWR

L13

Layout Trace 300mil

2
COIL-6D8UH-2-GP

1
2
R7
D01R2512F-4-GP

U38
SI4800BDY-T1

MAX8731_CSIN

INP

MAX8731_CSIP

18
17

G8

AD_IA

GAP-CLOSE-PWR

GAP-CLOSE-PWR

C30

FBSB

16

FBSA

15

BAT_SENSE

R233
100R2F-L1-GP-U
2 BATT_SENSE

C361

C10

C11

BATT_SENSE 37

GND

CCV
CCI
CCS
REF
DAC
GND

MAX8731AETI-GP

SCD1U16V2ZY-2GP

SC1U10V3KX-3GP

SCD01U50V2ZY-1GP

SCD01U50V2ZY-1GP

29

C32

C28

C29

MAX8731_CCV
6
MAX8731_CCI
5
MAX8731_CCS
4
MAX8731_REF
3
MAX8731_DAC 7
12

2
4K7R2F-GP

C34
SCD01U50V2ZY-1GP

SCD1U16V2ZY-2GP

10KR2F-2-GP

R15

C22

1MAX8731_CCV1

R13

2nd:FDS8884(84.8884.A37)

28

CSIP
CSIN

4
3
2
1

CHG_AGND

G7

D
D
D
D

BATSEL

G
S
S
S

14

SC10U25V6KX-1GP

PGND

2nd:FDS8884(84.8884.A37)

R242
1R3F-GP
MAX8731_LX 1
2
1
2 C390
SC220P50V2JN-3GP
MAX8731_DLO

SC10U25V6KX-1GP

20

2 C381

SC10U25V6KX-1GP

DLO

SC1U10V3KX-3GP

28,37 BAT_SDA

MAX8731_DHI

24

DHI

BAS16-1-GP
2

10

BAT_SCL

28,37 BAT_SCL

5
6
7
8

25
21

TC23
SE100U25VM-7GPU

ACOK

U37
SI4800BDY-T1

D20

C399

13

MAX8731_VCC

C403

C406
DY
SC10U25V6KX-1GP

G
S
S
S

VDD

CHG_AGND

4
3
2
1

BST
LDO

R10
0R0603-PAD
MAX8731_BST 1
2MAX8731_BST1
MAX8731_LDO

33R2J-2-GP

CHG_AGND
CHG_AGND

CSSN
VCC

27
26

1
2

C17
SCD1U25V3KX-GP
ACAV_IN

CSSP

ENG

C394
SC1U10V3KX-3GP

5
6
7
8

SCD01U50V2ZY-1GP

49K9R2F-L-GP

11

3D3V_AUX_S5

C404

ACIN

R243

28

1
DCIN

MAX8731_ACIN

22

CHG_AGND

SCD1U25V3KX-GP

R254

MAX8731_DCIN

C398
SCD1U25V3KX-GP

SC10U25V6KX-1GP

365KR3F-GP

U9

ASNS

C389
SC1U25V5KX-1GP

R252

MAX8731_CSSN

CHG_AGNDCHG_AGND

1 R232
2
0R0402-PAD

C402
SCD1U25V3KX-GP
MAX8731_CSSP

AD+

C386
SCD01U50V2ZY-1GP

ICS

74.08731.A73

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

1
2
G10
GAP-CLOSE-PWR

CHG_AGND

Need Check MAXIM Sming Use MAX8731 or MAX8731A

Title

CHARGER MAX8731
Size
A3

Document Number

Rev

-1

Calado

Date: Wednesday, September 12, 2007

Sheet

36

of

39

Adaptor in to generate DCBATOUT

AD+
DC1

4
1

AD+_JK

TP5

Layout Trace 250mil

AD+_JK

1
2
3
4

D1
P4SSMJ24PT-GP
200KR2F-L-GP

A
R2

ENG

C8
SCD1U50V3ZY-GP

2nd:A04433(84.04433.A37)

R202
100KR2F-L1-GP

C
Q4
MMBT2222A-3-GP
84.02222.V11

AD_OFF

28

ID = -10A/70deg
Rds(ON) = 24mohm
SO-8

PDTA124EU-1-GP
Q2

Change to 22.10037.E91

Layout Trace 250mil

8
7
6
5

C9

R1

22.10037.C51

D
D
D
D

P2003EVG-GP

EC1
SCD1U50V3ZY-GP

DC-JACK115-GP

AD+_2

SCD47U50V5ZY

DY

5
6
MH1

R204

C6
SCD1U50V3ZY-GP

TPAD30

U2
S
S
S
G

TP130 TPAD30

AD+_JK

R205
1KR2J-1-GP
3

3D3V_AUX_S5

BATTERY CONNECTOR

TP7
TP8
TP9
TP11
TP12

PD

D18
BAV99-5-GP
83.00099.T11

DY

BAT1

9
7
6
5
4
3
2

BATA_SCL_1
BATA_SDA_1
BAT_IN#
BT+
BT+

D17
BAV99-5-GP
83.00099.T11

DY

D19
BAV99-5-GP
83.00099.T11

R223
470KR2J-2-GP

DY

3D3V_AUX_S5

TPAD30
TPAD30
TPAD30
TPAD30
TPAD30

28 BAT_IN#
28,36 BAT_SDA
28,36 BAT_SCL

1
R230
1
R229

2
227R3F-GP
27R3F-GP

BATA_SDA_1
BATA_SCL_1

1
8

BT+

Layout Trace 320mil

2
2

20.F1152.007

EC97DY
SC100P50V2JN-3GP

SC100P50V2JN-3GP

SCD1U50V3ZY-GP

MLVS0603M04-1-GP

SYN-CON7-28-GP-U1

1
EC96

DY

ENG

DY

EC88

EC98

G9
36 BATT_SENSE

1
GAP-CLOSE-PWR

ICS

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

AD/BATT CONN
Size
A3

Document Number

Rev

-1

Calado

Date: Wednesday, September 12, 2007

Sheet
E

37

of

39

DCBATOUT

VCC_CORE_S0

EC53
SCD1U10V2KX-5GP

DY

EC43
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

DY

EC51

DY

EC61

DY

EC109

DY

EC9

960

1
2

EC6

960

1D8V_S3

EC58

DY

EC68

DY

EC114

DY

EC45

DY

EC69

DY

SCD1U10V2KX-5GP

EC66
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

DY

EC11

960

3D3V_S0

EC108

DY

EC99

DY

EC48

DY

EC104

DY

EC47

SCD1U10V2KX-5GP

DY

EC16

SCD1U10V2KX-5GP

DY

EC60

SCD1U10V2KX-5GP

DY

SCD1U10V2KX-5GP

EC103

SCD1U10V2KX-5GP

DY

SCD1U10V2KX-5GP

DY

EC59
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

EC110

DY

EC127

DY

5V_S0

1D05V_S0

3D3V_AUX_S5

1
2

1
2

EC13

960

SCD1U10V2KX-5GP

960

SCD1U10V2KX-5GP

EC10
SCD1U10V2KX-5GP

EC95
SCD1U25V2ZY-1GP

EC87
SCD1U25V2ZY-1GP

EC75
SCD1U25V2ZY-1GP

EC89
SCD1U25V2ZY-1GP

EC12
SCD1U25V2ZY-1GP

EC23
SCD1U25V2ZY-1GP

EC52
SCD1U25V2ZY-1GP

EC123
SCD1U25V2ZY-1GP

EC124
SCD1U25V2ZY-1GP

EC112
SCD1U25V2ZY-1GP

EC90
SCD1U25V2ZY-1GP

13

EC62
SCD1U25V2ZY-1GP

EC111
SCD1U25V2ZY-1GP

U5D
TSAHCT125PW-GP

EC113

SCD1U10V2KX-5GP

EC116

SCD1U25V2ZY-1GP

11

SCD1U25V2ZY-1GP

12

SCD1U10V2KX-5GP

14

5V_S0

ENG

FAN CONN
FAN1_VCC
FAN1_FG1
PURE_HW_SHUTDOWN#

20
FAN1_VCC
20
FAN1_FG1
20,28,30 PURE_HW_SHUTDOWN#

TP33 TPAD30
TP39 TPAD30
TP82 TPAD30
C

PD

TRING CONN

Audio Connector Internal KeyBoard CONN


26,27 LINEOUT_JD#

USB ZIF CONN


Test Point
TP79 TPAD30

5V_S5

TP6

USBPN0

17,21 USBPP0
17,21 USBPN2

17,21 USBPP2
17,21 USBPN4
17,21 USBPP4
17,21 USB_OC#4
21,28 USB_PWR_EN#

CPU
H5
HOLE

H7
HOLE

SPKR_L+1
MIC_JD#

26,27 AUD_MICIN_L

TP156 TPAD30

SPKR_R+1

TP166 TPAD30

SPKR_L+1

TP164 TPAD30

MIC_JD#

TP157 TPAD30

AUD_MICIN_R

TP167 TPAD30

AUD_MICIN_L

TP168 TPAD30

TP60 TPAD30

USBPN2

TP138 TPAD30

USBPP2

TP137 TPAD30

USBPN4

TP101 TPAD30

USBPP4

TP103 TPAD30

USB_OC#4

TP108 TPAD30

USB_PWR_EN#

TP80 TPAD30

H9
HOLE

Internal Speaker
27

SPKR_L-

27

SPKR_L+

27

SPKR_R-

27

SPKR_R+

SPKR_L-

TP124 TPAD30

SPKR_L+

TP126 TPAD30

SPKR_R-

TP127 TPAD30

SPKR_R+

TP128 TPAD30

Test Point

Test Point

TP59 TPAD30

MDC

H8
HOLE

27

26,27 AUD_MICIN_R

TPAD30

USBPP0

NB
H6
HOLE

SPKR_R+1

26,27

5V_S5

17,21 USBPN0

27

LINEOUT_JD#

28,29

KROW[1..8]

28,29

KCOL[1..16]

KROW[1..8]
KCOL[1..16]

KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16

TP45
TP41
TP40
TP38
TP36
TP34
TP32
TP31
TP28
TP26
TP22
TP21
TP19
TP18
TP16
TP17

TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30

KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7

TP56
TP55
TP52
TP51
TP50
TP49
TP48

TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30

KROW8

TP46 TPAD30

23
23

H11
HOLE

H1
HOLE

29
29
29
29

GND3
SPRING-23-GP

GND6
SPRING-6

GND7
SPRING-6

GND4
SPRING-16

4,16,30

H17
HOLE

H18
HOLE

H19
HOLE

H20
HOLE

H21
HOLE

H22
HOLE

H23
HOLE

GND13

SPRING-9-GP

SPRING-9-GP

SPRING-9-GP

SPRING-9-GP

SPRING-9-GP

SPRING-9-GP

ICS

TPAD30

TP13 TPAD30

3D3V_S5

TP15 TPAD30

5V_S5

TP125 TPAD30
TP140 TPAD30
TP85 TPAD30

H_PWRGD

TP139 TPAD30
TP27 TPAD30

H_CPURST#

Test PointDimm Door

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

H16
HOLE

GND12

H15
HOLE

GND11

H14
HOLE

GND10

H13
HOLE

GND9

H12
HOLE

4,6

34.43E28.001

34.4G502.001

H4
HOLE

TP4

3D3V_S0

GND5
SPRING-16

GND8

TPAD30
TPAD30
TPAD30
TPAD30

Check test point

34.42Y01.011

TP54
TP53
TP57
TP58

34.42Y01.011

TP10 TPAD30

TP_DATA
TP_CLK
TP_RIGHT
TP_LEFT

28,30,33 S5_ENABLE

TPAD30
TPAD30

5V_S0

17,28 PM_PWRBTN#

34.13B01.001

H3
HOLE

TP_DATA
TP_CLK
TP_RIGHT
TP_LEFT

3D3V_AUX_S5

H2
HOLE

TP2
TP3

Test Point near TPAD1

DY

34.42Y01.011

TIP_C
RING_C

Touch Pad CONN

MINI CARD
H10
HOLE

TIP_C
RING_C

Title
Size

34.49U23.001

EMI/Spring/Boss

Document Number

Calado

Date: Thursday, September 13, 2007


5

Rev

-1
Sheet
1

38

of

39

SA to SB
1.TC6 change to 900U
2.modify U42(change to G913 300mA) add R417 for TV CRT ripple.
3.add Q27 for BT LED signal
4.change LED1 to 83.01221.I70(right angle)
5.add U55 BLON_5V for LED panel
6.change U1 to 74.04280.C9P for source request
7.add polyswitch F3 for safety.
8.C338 C339 C341 C340 change to 0402 size for SATA signal.
9.FAN1 change to 20.F1000.003 for ME.
10.USB1 swap pin3 pin4 signal.
11.USB2 USB3 change to 22.10218.R31 for ME.
12.add polyswitch F4 F5 for safety.
13.change U4 U45 to 74.09711.B7F ,U56 U57 74.05250.C7F for source request.
14.R20 change to 1.21K for IEEE.
15.C56 change to 12P for Oscillation report.
16.U53 change to 74.09711.A7F for source request.
17.NEW1 change to 20.F07890.026.SK1 change to 21.H0153.001 for ME
18.add R421 LED4 for CardReader test.
19.C237 C229 change to 27P for Oscillation report.
20.R350 change to 4.99K for jack detection.
21.R363 R364 change to 18K.R404 R405 change to 56 ohm for audio report.
22.add AUD_AGND.L24 for audio niose.
23.C575 C577 change to 2700p Cut frequency at 500HZ
24.add BT_LED to KBC GPIO50.
25.add TC19 TC20 TC21 TC22 TC23 TC24 for acoustic noise.
26.C419 change to 1000p for power team.
27.U21 change to 84.04712.037.L9 change to 68.3R310.20A for power team.
28.R151 change to 16.5K.R124 change to 13K for OCP.
29.L7 change to 68.1R510.10J for power team.
30.R379 change to 10K.R381 change to 7.5K for OCP.
31,BAT1 change to 20.80977.007 for ME.
32.EC98 add 69.80007.031 for EC damaged.
33.R402 change to 10K.R397 DY for planar ID.
34.ODD1 change to 20.80967.050 for ME.
35.add G79.G80 for power.
36.R385.R386.R388.R387 change for Gain.R395.R407 change to 56K.
37.add EC6.EC9.EC10.EC11.EC13 to 960 for EMI.
38.add EC41.EC42.EC49.EC50.EC127 for EMI.
39.add R423.R422 for EMI.
40.add RN34.RN35.RN36 for EMI.
41.remove Golden finger
42.swap Touchpad pin define.
43.change L1 L2 to 68.00084.371.
44.change DC1 to 22.10037.E91 for ME.
45.change TVOUT1 to 22.10021.F41 for ME.
SB to -1
1.add AFTE test point for power board Conn.
2.add R432.C583 change G47 to R433 for 3D3V_AUX_S5 power option
3.change to 0 ohm pad for R45.R41.R216.R391.R183.R184.R14.R162.
R78.R79.R74.R87.R73.R77.R390.R21.R194.R187
4.change SPKR1 to 20.D0197.104 for ME.
5.change TRING1 to 21.E0024.102 for ME.
6.remove D7.D8.D9 for EMI.
7.add EC116.EC113.EC111.EC62.EC90.EC112.EC124.EC123.EC52.EC23.EC12.EC89.EC75.EC87.EC95.
8.change R422.R423 to 33 ohm.add EC71.EC72 to 33P for EMI.
9.add EC128.EC129 for EMI.
10.change c419 to 78.10234.1BL for source OBSOLETED.
11.change LEFT1.LEFT2.RIGHT1 to 62.40009.671 for ME.
12.change TVOUT1 to 22.10021.H61 for ME.
13.change BAT1 to 20.F1152.007 for ME.
14.add D26 for EMI.
15.change TC17 to 79.22710.3AL for USB droop test fial.
16.change TC2.EC84 to 5V_USB3_S0_1,change TC17.EC101 to5V_USB2_S0_1 for UPT2 fail.
17.add GND6.GND7.GND8.GND9.GND10.GND11.GND12.GND13 fot EMI.
18.change CRT1 to 20.20378.015 for ME.
19.del GND1.GND2.

ICS
A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

Change List

Document Number

Calado

Date: Thursday, September 13, 2007


5

Rev

-1
Sheet
1

39

of

39

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