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Project
Dr. J. M. Emmert
Instructions
• For this project you will test nine circuits
– Each circuit may or may not have a defect
– If a circuit is faulty, it will have no more than one line stuck to
logic ‘1’ or ‘0’
– If a circuit has a defect, you will determine what is possibly
defective
• You will turn in a report describing your approach, results,
and analysis of your results
• The report is due on the last day of class (Thurs) at
midnight
• The bit files for each circuit, ckt1.bit – ckt9.bit, can be
found in ~emmert/754/project/
Dr. J. M. Emmert
circuit1 a
f b
ds1 g
ds2
ds3 e c
ds4 d
a
ds5
ds6
ds7
ds8
Dr. J. M. Emmert
circuit2 a
f b
ds1 g
ds2
ds3 e c
ds4 d
a
ds5
ds6
ds7
ds8
Dr. J. M. Emmert
circuit3 a
f b
ds1 g
ds2
ds3 e c
ds4 d
a
ds5
ds6
ds7
ds8
Dr. J. M. Emmert
a
f b
g
circuit4 e
d
c
ds1
ds2 f
ds3
ds4
a
ds5
ds6
ds7 b
ds8
Dr. J. M. Emmert
a
f b
g
circuit5 e
d
c
ds1
ds2 f
ds3
ds4
a
ds5
ds6
ds7 b
ds8
Dr. J. M. Emmert
a
f b
g
circuit6 e
d
c
ds1
ds2 f
ds3
ds4
a
ds5
ds6
ds7 b
ds8
Dr. J. M. Emmert
a
f b
circuit7 g
e c
d
ds1
ds2
ds3 f
ds4
a
ds5
ds6 b
ds7
ds8
Dr. J. M. Emmert
a
f b
circuit8 g
e c
d
ds1
ds2
ds3 f
ds4
a
ds5
ds6 b
ds7
ds8
Dr. J. M. Emmert
a
f b
circuit9 g
e c
d
ds1
ds2
ds3 f
ds4
a
ds5
ds6 b
ds7
ds8
Dr. J. M. Emmert