HP G56 - G42 - G62 Schematics Â - Compaq Presario CQ56 - CQ62 Schematics Â - 31AX2MB00D0 Â - DA0AX2MB6E0 Â - DA0AX2MB6E1 Â - AX2 - AX7 Motherboard Schematics

1 2 3 4 5 6 7 8
AX2/7 SYSTEM DIAGRAM 01

DDR3-SODIMM1 DDR3 channel A
AMD Champlain CPU THERMAL
PAGE 6 SENSOR
35mm X 35mm
A A
S1G4 Processor PAGE 5
DDR3-SODIMM2 DDR3 channel B
638P (PGA)35W/25W
PAGE 7 PAGE 3,4,5
HT3
PCI-Express 16X
PCI-E HDMI
PAGE 25
X1 X1 NORTH BRIDGE ATI
CRT
LAN Mini PCI-E RS880M A12 PAGE 24 PARK-LP
Realtek Card
PCIE-LAN
RTL8103E (Wireless LAN)
21mm X 21mm, 528pin BGA LVDS
B
(10/100) 23mm X 23mm B
PAGE 23
Side port
PAGE 30 PAGE 33 DDR3
PAGE 17,18,19
PAGE 8,9,10,11 20,21
DDR3 RAM
VRAM
for UMA only PAGE 22
RJ45 PAGE 8
ALINK X4
PAGE 30
SYSTEM CHARGER(ISL6251) USB2.0
PAGE 40 0,5,8 15 2 3 10
SATA - HDD
SATA0 150MB
SOUTH BRIDGE USB2.0 Ports BT softbreeze Webcam
PAGE 29 PAGE 29 PAGE 29
Flash Media PCI-E WLAN Card x1
SYSTEM POWER ISL6237 X3 X1 PAGE 23 RTS5159 PAGE 33
PAGE 34 SB820 A12 PAGE 26
SATA - CD-ROM
SATA4 150MB
21mm X 21mm, 605pin FCBGA
DDR II SMDDR_VTERM PAGE 29
1.8V/1.8VSUS(RT8207) 4.5W(Ext)
C PAGE 37 4.3W(Int) Azalia C
PAGE 12,13,14,15,16
VCCP +1.1V AND +1.2V(RT8204)
PAGE 35 Realtek
MDC CONN ALC270-GR
LPC PAGE 28
VGACORE(1.1V~1.2V)Oz8118 PAGE 27
PAGE 38
ENE KBC RJ11 AUDIO CONN
CPU CORE ISL6265HRTZ-T KB3926 Dx Ang MIC
(Phone/ MIC)
PAGE 36
PAGE 32 PAGE 27 PAGE 28
SMBUS TABLE
Clock gen/Robson/TV tuner
SB--SCL0/SD0 /DDR2/DDR2 thermal/Accelerometer +3V
D Keyboard PAGE 31 FAN SPI D
Touch Pad PAGE 31

epress card PAGE 28 PAGE 31
Wlan Card +3VS5
PROJECT : AX2/7
EC --SCL/SD Battery charge/discharge +3VPCU Quanta Computer Inc.
EC--SCL2/SD2 VGA thermal/system thermal +3V Size Document Number Rev
Custom 1A
Block Diagram
NB5/RD2
Date: Thursday, December 24, 2009 Sheet 1 of 42
1 2 3 4
http://laptop-schematic.com/
5 6 7 8
5 4 3 2 1
02
D D
PV,delete all external clock GEN reserve material
C C
B B
A A
PROJECT : AX2/7
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Clock Generator
NB5/RD2
Date: Wednesday, December 23, 2009 Sheet 2 of 42
5 4
3 2 1
5 4 3 2 1
BLM21PG221SN1D(220,100M,2A)_8 H_THRMDC
03
+CPUVDDA
W/S= 15 mil/20mil H_THRMDA
H_THRMDC 5
+2.5V H_THRMDA 5
VLDT use 1.5A Max current L34 CPU CLK CPU_PWRGD 300_4 R146
+1.1V +1.1V_VLDT C418 LS0805-100M-N C392 C302 C304 CPUCLKP CPU_LDT_RST# 300_4 R148
12 CPUCLKP
4.7U/6.3V_6 4.7U/6.3V_6 0.22U/25V_6 3300P/50V_4 CPUCLKN CPU_LDT_STOP# 300_4 R166
12 CPUCLKN
R164 *0_6/S CPU_LDT_REQ#_CPU *300/F_4 R144 +1.5V
Keep trace from resisor to CPU within 0.6"
+1.1V +1.1V_VLDT_R +CPUVDDA 250mA
keep trace from caps to CPU within 1.2" U21D
R83 *0_6/S U21A W/S= 15 mil/20mil
+CPUVDDA F8 M11
+1.1V_VLDT +1.1V_VLDT_R 10U/6.3V_8 C99 CPUCLKIN R149 169/F_4 CPUCLKIN# +CPUVDDA VDDA1 VSS
D1 VLDT_A0 HT LINK VLDT_B0 AE2 F9 VDDA2 RSVD11 W18
C396 10U/6.3V_8 +1.1V_VLDT D2 AE3 +1.1V_VLDT_R 0.22U/6.3V_4 C113
D C390 0.22U/6.3V_4 +1.1V_VLDT VLDT_A1 VLDT_B1 +1.1V_VLDT_R 180P/50V_4 C120 CPUCLKP C402 3900P/25V_4 CPUCLKIN CPU_SVC_R D
D3 VLDT_A2 VLDT_B2 AE4 A9 CLKIN_H SVC A6
C389 180P/50V_4 +1.1V_VLDT D4 AE5 +1.1V_VLDT_R 10U/6.3V_8 C594 CPUCLKN C401 3900P/25V_4 CPUCLKIN# A8 A4 CPU_SVD_R
VLDT_A3 VLDT_B3 CLKIN_L SVD
HT_NB_CPU_CAD_H0 E3 AD1 HT_CPU_NB_CAD_H0 CPU_LDT_RST# B7
L0_CADIN_H0 L0_CADOUT_H0 12 CPU_LDT_RST# RESET_L
HT_NB_CPU_CAD_L0 E2 AC1 HT_CPU_NB_CAD_L0 CPU_PWRGD A7
L0_CADIN_L0 L0_CADOUT_L0 12 CPU_PWRGD PWROK
HT_NB_CPU_CAD_H1 E1 AC2 HT_CPU_NB_CAD_H1 CPU_LDT_STOP# F10 AF6 CPU_THERMTRIP_L#
L0_CADIN_H1 L0_CADOUT_H1 10,12 CPU_LDT_STOP# LDTSTOP_L THERMTRIP_L
HT_NB_CPU_CAD_L1 F1 AC3 HT_CPU_NB_CAD_L1 CPU_LDT_REQ#_CPU C6 AC7 CPU_PROCHOT_L#
HT_NB_CPU_CAD_H2 L0_CADIN_L1 L0_CADOUT_L1 HT_CPU_NB_CAD_H2 LDTREQ_L PROCHOT_L CPU_MEMHOT_L#
G3 AB1 AA8 T15
HT_NB_CPU_CAD_L2 L0_CADIN_H2 L0_CADOUT_H2 HT_CPU_NB_CAD_L2 CPU_SIC MEMHOT_L
G2 L0_CADIN_L2 L0_CADOUT_L2 AA1 5 CPU_SIC AF4 SIC
HT_NB_CPU_CAD_H3 G1 AA2 HT_CPU_NB_CAD_H3 SideBand Temp sense I2C CPU_SID AF5
HT_NB_CPU_CAD_H[15..0] L0_CADIN_H3 L0_CADOUT_H3 5 CPU_SID SID
HT_NB_CPU_CAD_L3 H1 AA3 HT_CPU_NB_CAD_L3 CPU_ALERT AE6 W7 H_THRMDC
8 HT_NB_CPU_CAD_H[15..0] L0_CADIN_L3 L0_CADOUT_L3 5 CPU_ALERT ALERT_L THERMDC
HT_NB_CPU_CAD_H4 J1 W2 HT_CPU_NB_CAD_H4 W8 H_THRMDA
HT_NB_CPU_CAD_L[15..0] HT_NB_CPU_CAD_L4 L0_CADIN_H4 L0_CADOUT_H4 HT_CPU_NB_CAD_L4 R114 44.2/F_4 CPU_HTREF0 THERMDA
K1 W3 R6
8 HT_NB_CPU_CAD_L[15..0] HT_NB_CPU_CAD_H5 L0_CADIN_L4 L0_CADOUT_L4 HT_CPU_NB_CAD_H5 +1.5VSUS R115 44.2/F_4 CPU_HTREF1 HT_REF0
L3 L0_CADIN_H5 L0_CADOUT_H5 V1 +1.1V_VLDT P6 HT_REF1
HT_NB_CPU_CLK_H[1..0] HT_NB_CPU_CAD_L5 L2 U1 HT_CPU_NB_CAD_L5 place them to CPU within 1.5"
8 HT_NB_CPU_CLK_H[1..0] HT_NB_CPU_CAD_H6 L0_CADIN_L5 L0_CADOUT_L5 HT_CPU_NB_CAD_H6 VDDIO_FB_H
L1 U2 36 CPU_VDD0_RUN_FB_H F6 W9 VDDIO_FB_H 37
HT_NB_CPU_CLK_L[1..0] HT_NB_CPU_CAD_L6 L0_CADIN_H6 L0_CADOUT_H6 HT_CPU_NB_CAD_L6 VDD0_FB_H VDDIO_FB_H VDDIO_FB_L
8 HT_NB_CPU_CLK_L[1..0] M1 L0_CADIN_L6 L0_CADOUT_L6 U3 36 CPU_VDD0_RUN_FB_L E6 VDD0_FB_L VDDIO_FB_L Y9 VDDIO_FB_L 37
HT_NB_CPU_CAD_H7 N3 T1 HT_CPU_NB_CAD_H7 R163
HT_NB_CPU_CTL_H[1..0] HT_NB_CPU_CAD_L7 L0_CADIN_H7 L0_CADOUT_H7 HT_CPU_NB_CAD_L7
N2 R1 36 CPU_VDD1_RUN_FB_H Y6 H6 CPU_VDDNB_RUN_FB_H 36
8 HT_NB_CPU_CTL_H[1..0] HT_NB_CPU_CAD_H8 L0_CADIN_L7 L0_CADOUT_L7 HT_CPU_NB_CAD_H8 510/F_4 VDD1_FB_H VDDNB_FB_H
E5 L0_CADIN_H8 L0_CADOUT_H8 AD4 36 CPU_VDD1_RUN_FB_L AB6 VDD1_FB_L VDDNB_FB_L G6 CPU_VDDNB_RUN_FB_L 36
HT_NB_CPU_CTL_L[1..0] HT_NB_CPU_CAD_L8 F5 AD3 HT_CPU_NB_CAD_L8
8 HT_NB_CPU_CTL_L[1..0] HT_NB_CPU_CAD_H9 L0_CADIN_L8 L0_CADOUT_L8 HT_CPU_NB_CAD_H9 CPU_DBRDY
F3 L0_CADIN_H9 L0_CADOUT_H9 AD5 G10 DBRDY
HT_CPU_NB_CAD_H[15..0] HT_NB_CPU_CAD_L9 F4 AC5 HT_CPU_NB_CAD_L9 CPUTEST25H CPU_TMS AA9 E10 CPU_DBREQ#
8 HT_CPU_NB_CAD_H[15..0] HT_NB_CPU_CAD_H10 L0_CADIN_L9 L0_CADOUT_L9 HT_CPU_NB_CAD_H10 CPU_TCK TMS DBREQ_L
G5 AB4 AC9
HT_CPU_NB_CAD_L[15..0] HT_NB_CPU_CAD_L10 L0_CADIN_H10 L0_CADOUT_H10 HT_CPU_NB_CAD_L10 CPUTEST25L CPU_TRST# TCK CPU_TDO
H5 AB3 AD9 AE9
8 HT_CPU_NB_CAD_L[15..0] HT_NB_CPU_CAD_H11 L0_CADIN_L10 L0_CADOUT_L10 HT_CPU_NB_CAD_H11 CPU_TDI TRST_L TDO
H3 AB5 AF9
HT_CPU_NB_CLK_H[1..0] HT_NB_CPU_CAD_L11 L0_CADIN_H11 L0_CADOUT_H11 HT_CPU_NB_CAD_L11 R162 TDI
H4 AA5
8 HT_CPU_NB_CLK_H[1..0] HT_NB_CPU_CAD_H12 L0_CADIN_L11 L0_CADOUT_L11 HT_CPU_NB_CAD_H12 CPUTEST23
K3 Y5 T7 AD7 J7
HT_CPU_NB_CLK_L[1..0] HT_NB_CPU_CAD_L12 L0_CADIN_H12 L0_CADOUT_H12 HT_CPU_NB_CAD_L12 510/F_4 TEST23 TEST28_H
K4 W5 H8
8 HT_CPU_NB_CLK_L[1..0] HT_NB_CPU_CAD_H13 L0_CADIN_L12 L0_CADOUT_L12 HT_CPU_NB_CAD_H13 CPUTEST18 TEST28_L
L5 V4 T26 H10
C HT_CPU_NB_CTL_H[1..0] HT_NB_CPU_CAD_L13 L0_CADIN_H13 L0_CADOUT_H13 HT_CPU_NB_CAD_L13 CPUTEST19 TEST18 CPUTEST17 C
8 HT_CPU_NB_CTL_H[1..0] M5 L0_CADIN_L13 L0_CADOUT_L13 V3 T30 G9 TEST19 TEST17 D7 T37
HT_NB_CPU_CAD_H14 M3 V5 HT_CPU_NB_CAD_H14 E7 CPUTEST16
HT_CPU_NB_CTL_L[1..0] L0_CADIN_H14 L0_CADOUT_H14 TEST16 T38
HT_NB_CPU_CAD_L14 M4 U5 HT_CPU_NB_CAD_L14 CPUTEST25H E9 F7 CPUTEST15
8 HT_CPU_NB_CTL_L[1..0] L0_CADIN_L14 L0_CADOUT_L14 TEST25_H TEST15 T29
HT_NB_CPU_CAD_H15 N5 T4 HT_CPU_NB_CAD_H15 CPUTEST25L E8 C7 CPUTEST14
L0_CADIN_H15 L0_CADOUT_H15 TEST25_L TEST14 T49
HT_NB_CPU_CAD_L15 P5 T3 HT_CPU_NB_CAD_L15 place them to CPU within 1.5"
L0_CADIN_L15 L0_CADOUT_L15 CPUTEST21 AB8 TEST21 TEST7 C3
HT_NB_CPU_CLK_H0 J3 Y1 HT_CPU_NB_CLK_H0 CPUTEST20 AF7 K8 R156 *300/F_4 +1.1V_VLDT
L0_CLKIN_H0 L0_CLKOUT_H0 T127 TEST20 TEST10
HT_NB_CPU_CLK_L0 J2 W1 HT_CPU_NB_CLK_L0 CPUTEST24 AE7
HT_NB_CPU_CLK_H1 L0_CLKIN_L0 L0_CLKOUT_L0 HT_CPU_NB_CLK_H1 CPUTEST22 TEST24
J5 Y4 +1.5VSUS T8 AE8 C4
HT_NB_CPU_CLK_L1 L0_CLKIN_H1 L0_CLKOUT_H1 HT_CPU_NB_CLK_L1 R172 300/F_4 CPU_DBREQ# CPUTEST12 TEST22 TEST8 CPUTEST29H
K5 Y3 T6 AC8 T46
L0_CLKIN_L1 L0_CLKOUT_L1 CPUTEST27 TEST12
AF8
HT_NB_CPU_CTL_H0 HT_CPU_NB_CTL_H0 R338 1K/F_4 CPUTEST27 TEST27 R130
N1 R2 C9
HT_NB_CPU_CTL_L0 L0_CTLIN_H0 L0_CTLOUT_H0 HT_CPU_NB_CTL_L0 R157 *0_4/S TEST29_H
P1 R3 C2 C8
HT_NB_CPU_CTL_H1 L0_CTLIN_L0 L0_CTLOUT_L0 HT_CPU_NB_CTL_H1 R339 *300/F_4 TEST9 TEST29_L 80.6/F_4
P3 L0_CTLIN_H1 L0_CTLOUT_H1 T5 AA6 TEST6
HT_NB_CPU_CTL_L1 P4 R5 HT_CPU_NB_CTL_L1 CPUTEST29L
L0_CTLIN_L1 L0_CTLOUT_L1 T45
A3 H18
RSVD1 RSVD10
FOX PZ63826-284R-41F A5
RSVD2 RSVD9
H19
DG0^8000004 IC SOCKET SMD 638P S1(P1.27,H3.2) SOCKET_638_PIN B3 AA7 Route as 80ohm, diff
RSVD3 RSVD8
MLX 47296-4131 B5 D5
RSVD4 RSVD7
C1 RSVD5 RSVD6 C5
DG0^8000003 IC SOCKET SMD 638P S1(P1.27,H3.2)
TYC 4-1903401-2
DG0^8000005 IC SOCKET SMD 638P S1(P1.27,H3.2) SOCKET_638_PIN
MV can remove reserve for debug Serial VID VFIX MODE VID Override table (VDD)
B +1.5VSUS B
SVC SVD Output Voltage
R207 10K/F_4 CNTR_VREF +3V
+1.5VSUS +1.5V 0 0 1.1V
R186 R189 1K/F_4 +1.5VSUS
0 1 1.0V
2
Q19 R170 R171 R190 1K/F_4

MMBT3904
1K/F_4
*1K/F_4 *1K/F_4
+1.5V 1 0 0.9V
CPU_LDT_RST# CPU_LDT_RST_HTPA#
1 3
CPU_SVC_R R176 0_4 CPU_SVC 1 1 0.8V
CPU_SVC 36
CPU_SVD_R R175 0_4 CPU_SVD
CPU_SVD 36
CPU_PWRGD R177 0_4 CPU_PWRGD_SVID_REG
CPU_PWRGD_SVID_REG 36
CPUTEST20 R340 1K/F_4
CPUTEST21 R81 1K/F_4
R184 *220_4 CPUTEST22 R80 1K/F_4
R183 *220_4 CPUTEST24 R69 1K/F_4
R185 *220_4
+1.5VSUS R224 10K/F_4

+1.5VSUS R181 10K/F_4 HDT Connector
R225 300_4 +1.5VSUS
+1.5VSUS
+1.5VSUS R180 1K/F_4 CPUTEST12 R70 1K/F_4
2
Q18 1 2 CPUTEST19 R124 1K/F_4

MMBT3904 3 4 CPUTEST18 R125 1K/F_4
A CPU_THERMTRIP_L# 1 3 5 6 A
5 CPU_THERMTRIP_L# CPU_THERMTRIP# 13
CPU_PROCHOT_L# R205 0_4 CPU_DBREQ# 7 8
2
Q22 CPU_DBRDY 9 10
CPU_TCK 11 12
R219 0_4 1 3 CPU_PROCHOT_R# CPU_TMS 13 14
32 CPU_PROCHOT# CPU_PROCHOT_R# 12
MMBT3904 CPU_TDI 15 16
CPU_TRST#
CPU_TDO
17
19
18
20
PROJECT : AX2/7
EC new option SI , add R205 for P-state implement
C74 *0.1U/10V_4
21
23
22
24 CPU_LDT_RST_HTPA#
KEY 25
Custom 1A
CN6 *HDT CONN
S1G4 HT,CTL I/F 1/3
NB5/RD2
5 4 3
http://laptop-schematic.com/ 2 1
A B C D E
+1.5VSUS
R337
*0_4/S
PLACE THEM CLOSE TO
CPU WITHIN 1"
+0.9V
D10
C10
B10
AD10
U21B
VDDR1 MEM:CMD/CTRL/CLKVDDR5
VDDR2
VDDR3
VDDR6
VDDR7
W 10
AC10
AB10
AA10
+0.9V
VDDR = 0.9V for 25W & 35W CPU
VDDR = 1.05V for 35V & 45W CPU 7 MEM_MB_DATA[0..63]
DDR_VTTREF 6,7,37
Processor Memory Interface
MEM_MB_DATA0 C11
U21C
MEM:DATA
G12 MEM_MA_DATA0
MEM_MA_DATA[0..63]
04
6
VDDR4 VDDR8 R113 MEM_MB_DATA1 MB_DATA0 MA_DATA0 MEM_MA_DATA1
VDDR9 A10 A11 MB_DATA1 MA_DATA1 F12
R344 39.2/F_4 M_ZP AF10 *0_4 MEM_MB_DATA2 A14 H14 MEM_MA_DATA2
R342 39.2/F_4 M_ZN MEMZP CPU_VTT_SENSE Reserved MEM_MB_DATA3 MB_DATA2 MA_DATA2 MEM_MA_DATA3
AE10 MEMZN VDDR_SENSE Y10 CPU_VTT_SENSE 37 B14 MB_DATA3 MA_DATA3 G14
MEM_MB_DATA4 G11 H11 MEM_MA_DATA4
MEM_MA_RESET# H16 MB_DATA4 MA_DATA4
6 MEM_MA_RESET# MA_RESET_L MEMVREF W 17 MEMVREF_CPU MEM_MB_DATA5 E11 MB_DATA5 MA_DATA5 H12 MEM_MA_DATA5
C593 MEM_MB_DATA6 D12 C13 MEM_MA_DATA6
4
10U/6.3V_8 MB_DATA6 MA_DATA6 4
6 MEM_MA0_ODT0 T19 MA0_ODT0 MB_RESET_L B18 MEM_MB_RESET# MEM_MB_RESET# 7
MEM_MB_DATA7 A13 MB_DATA7 MA_DATA7 E13 MEM_MA_DATA7
V22 MEM_MB_DATA8 A15 H15 MEM_MA_DATA8
6 MEM_MA0_ODT1 MA0_ODT1 MB_DATA8 MA_DATA8
U21 W 26 MEM_MB_DATA9 A16 E15 MEM_MA_DATA9
T19 MA1_ODT0 MB0_ODT0 MEM_MB0_ODT0 7 MB_DATA9 MA_DATA9
V19 W 23 C181 C175 MEM_MB_DATA10 A19 E17 MEM_MA_DATA10
T17 MA1_ODT1 MB0_ODT1 MEM_MB0_ODT1 7 MB_DATA10 MA_DATA10
PV,change Y26 0.1U/10V_4 1000P/50V_4 MEM_MB_DATA11 A20 H17 MEM_MA_DATA11
MB1_ODT0 T132 MB_DATA11 MA_DATA11
to short pad 6 MEM_MA0_CS#0 T20 MEM_MB_DATA12 C14 E14 MEM_MA_DATA12
MA0_CS_L0 MEM_MB_DATA13 MB_DATA12 MA_DATA12 MEM_MA_DATA13
6 MEM_MA0_CS#1 U19 MA0_CS_L1 MB0_CS_L0 V26 MEM_MB0_CS#0 7 D14 MB_DATA13 MA_DATA13 F14
U20 W 25 MEM_MB_DATA14 C18 C17 MEM_MA_DATA14
T18 MA1_CS_L0 MB0_CS_L1 MEM_MB0_CS#1 7 MB_DATA14 MA_DATA14
V20 U22 MEM_MB_DATA15 D18 G17 MEM_MA_DATA15
T16 MA1_CS_L1 MB1_CS_L0 T20 MB_DATA15 MA_DATA15
SI , change from 0.01u to 0.1u MEM_MB_DATA16 D20 G18 MEM_MA_DATA16
MEM_MB_DATA17 MB_DATA16 MA_DATA16 MEM_MA_DATA17
6 MEM_MA_CKE0 J22 MA_CKE0 MB_CKE0 J25 MEM_MB_CKE0 7 from AMD recommand A21 MB_DATA17 MA_DATA17 C19
J20 H26 MEM_MB_DATA18 D24 D22 MEM_MA_DATA18
6 MEM_MA_CKE1 MA_CKE1 MB_CKE1 MEM_MB_CKE1 7 MB_DATA18 MA_DATA18
MEM_MB_DATA19 C25 E20 MEM_MA_DATA19
6 MEM_MA_CLK5_P N19 MA_CLK_H5 MB_CLK_H5 P22 MEM_MB_CLK5_P 7 B20 MB_DATA20 MA_DATA20 E18
N20 R22 MEM_MB_DATA21 C20 F18 MEM_MA_DATA21
6 MEM_MA_CLK5_N MA_CLK_L5 MB_CLK_L5 MEM_MB_CLK5_N 7 MB_DATA21 MA_DATA21
E16 A17 MEM_MB_DATA22 B24 B22 MEM_MA_DATA22
T39 MA_CLK_H1 MB_CLK_H1 T142 MB_DATA22 MA_DATA22
F16 A18 MEM_MB_DATA23 C24 C23 MEM_MA_DATA23
T34 MA_CLK_L1 MB_CLK_L1 T141 MB_DATA23 MA_DATA23
Y16 AF18 MEM_MB_DATA24 E23 F20 MEM_MA_DATA24
T13 MA_CLK_H7 MB_CLK_H7 T128 MB_DATA24 MA_DATA24
AA16 AF17 MEM_MB_DATA25 E24 F22 MEM_MA_DATA25
T14 MA_CLK_L7 MB_CLK_L7 T129 MB_DATA25 MA_DATA25
P19 R26 MEM_MB_DATA26 G25 H24 MEM_MA_DATA26
6 MEM_MA_CLK4_P MA_CLK_H4 MB_CLK_H4 MEM_MB_CLK4_P 7 MB_DATA26 MA_DATA26
P20 R25 MEM_MB_DATA27 G26 J19 MEM_MA_DATA27
6 MEM_MA_CLK4_N MA_CLK_L4 MB_CLK_L4 MEM_MB_CLK4_N 7 MB_DATA27 MA_DATA27
MEM_MB_DATA28 C26 E21 MEM_MA_DATA28
6 MEM_MA_ADD[0..15] MEM_MB_ADD[0..15] 7 MB_DATA28 MA_DATA28
MEM_MA_ADD0 N21 P24 MEM_MB_ADD0 MEM_MB_DATA29 D26 E22 MEM_MA_DATA29
MEM_MA_ADD1 MA_ADD0 MB_ADD0 MEM_MB_ADD1 MEM_MB_DATA30 MB_DATA29 MA_DATA29 MEM_MA_DATA30
M20 MA_ADD1 MB_ADD1 N24 G23 MB_DATA30 MA_DATA30 H20
MEM_MA_ADD2 N22 P26 MEM_MB_ADD2 MEM_MB_DATA31 G24 H22 MEM_MA_DATA31
M19 MA_ADD3 MB_ADD3 N23 AA24 MB_DATA32 MA_DATA32 Y24
MEM_MA_ADD4 M22 N26 MEM_MB_ADD4 MEM_MB_DATA33 AA23 AB24 MEM_MA_DATA33
L20 MA_ADD5 MB_ADD5 L23 AD24 MB_DATA34 MA_DATA34 AB22
MEM_MA_ADD6 M24 N25 MEM_MB_ADD6 MEM_MB_DATA35 AE24 AA21 MEM_MA_DATA35
3 L21 MA_ADD7 MB_ADD7 L24 AA26 MB_DATA36 MA_DATA36 W 22 3
MEM_MA_ADD8 L19 M26 MEM_MB_ADD8 MEM_MB_DATA37 AA25 W 21 MEM_MA_DATA37
K22 MA_ADD9 MB_ADD9 K26 AD26 MB_DATA38 MA_DATA38 Y22
MEM_MA_ADD10 R21 T26 MEM_MB_ADD10 MEM_MB_DATA39 AE25 AA22 MEM_MA_DATA39
L22 MA_ADD11 MB_ADD11 L26 AC22 MB_DATA40 MA_DATA40 Y20
MEM_MA_ADD12 K20 L25 MEM_MB_ADD12 MEM_MB_DATA41 AD22 AA20 MEM_MA_DATA41
V24 MA_ADD13 MB_ADD13 W 24 AE20 MB_DATA42 MA_DATA42 AA18
MEM_MA_ADD14 K24 J23 MEM_MB_ADD14 MEM_MB_DATA43 AF20 AB18 MEM_MA_DATA43
K19 MA_ADD15 MB_ADD15 J24 AF24 MB_DATA44 MA_DATA44 AB21
MEM_MB_DATA45 AF23 AD21 MEM_MA_DATA45
6 MEM_MA_BANK0 R20 MA_BANK0 MB_BANK0 R24 MEM_MB_BANK0 7 AC20 MB_DATA46 MA_DATA46 AD19
R23 U26 MEM_MB_DATA47 AD20 Y18 MEM_MA_DATA47
6 MEM_MA_BANK1 MA_BANK1 MB_BANK1 MEM_MB_BANK1 7 MB_DATA47 MA_DATA47
J21 J26 MEM_MB_DATA48 AD18 AD17 MEM_MA_DATA48
6 MEM_MA_BANK2 MA_BANK2 MB_BANK2 MEM_MB_BANK2 7 MB_DATA48 MA_DATA48
MEM_MB_DATA49 AE18 W 16 MEM_MA_DATA49
6 MEM_MA_RAS# R19 MA_RAS_L MB_RAS_L U25 MEM_MB_RAS# 7 AC14 MB_DATA50 MA_DATA50 W 14
T22 U24 MEM_MB_DATA51 AD14 Y14 MEM_MA_DATA51
6 MEM_MA_CAS# MA_CAS_L MB_CAS_L MEM_MB_CAS# 7 MB_DATA51 MA_DATA51
T24 U23 MEM_MB_DATA52 AF19 Y17 MEM_MA_DATA52
6 MEM_MA_WE# MA_W E_L MB_W E_L MEM_MB_WE# 7 MB_DATA52 MA_DATA52
MEM_MB_DATA53 AC18 AB17 MEM_MA_DATA53
AF16 MB_DATA54 MA_DATA54 AB15
SOCKET_638_PIN MEM_MB_DATA55 AF15 AD15 MEM_MA_DATA55
AF13 MB_DATA56 MA_DATA56 AB13
MEM_MB_DATA57 AC12 AD13 MEM_MA_DATA57
AB11 MB_DATA58 MA_DATA58 Y12
MEM_MB_DATA59 Y11 W 11 MEM_MA_DATA59
+0.9V Place close to socket MEM_MB_DATA60 AE14
MB_DATA59 MA_DATA59
AB14 MEM_MA_DATA60
AF14 MB_DATA61 MA_DATA61 AA14
MEM_MB_DATA62 AF11 AB12 MEM_MA_DATA62
AD11 MB_DATA63 MA_DATA63 AA12
C95 C94 C420 C419 C91 C90 C411 C407
7 MEM_MB_DM[0..7] MEM_MA_DM[0..7] 6
4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 0.22U/6.3V_4 0.22U/6.3V_4 0.22U/6.3V_4 0.22U/6.3V_4 MEM_MB_DM0 A12 E12 MEM_MA_DM0
2
MEM_MB_DM1 MB_DM0 MA_DM0 MEM_MA_DM1 2
B16 MB_DM1 MA_DM1 C15
MEM_MB_DM2 A22 E19 MEM_MA_DM2
MEM_MB_DM3 MB_DM2 MA_DM2 MEM_MA_DM3
E25 MB_DM3 MA_DM3 F24
MEM_MB_DM4 AB26 AC24 MEM_MA_DM4
AE22 MB_DM5 MA_DM5 Y19
+0.9V MEM_MB_DM6 AC16 AB16 MEM_MA_DM6
AD12 MB_DM7 MA_DM7 Y13
7 MEM_MB_DQS0_P C12 MB_DQS_H0 MA_DQS_H0 G13 MEM_MA_DQS0_P 6

C98 C96 C400 C397 C105 C104 C393 C93 B12 H13
7 MEM_MB_DQS0_N MB_DQS_L0 MA_DQS_L0 MEM_MA_DQS0_N 6
1000P/50V_4 1000P/50V_4 1000P/50V_4 1000P/50V_4 180P/50V_4 180P/50V_4 180P/50V_4 180P/50V_4 D16 G16
7 MEM_MB_DQS1_P MB_DQS_H1 MA_DQS_H1 MEM_MA_DQS1_P 6
7 MEM_MB_DQS1_N C16 MB_DQS_L1 MA_DQS_L1 G15 MEM_MA_DQS1_N 6
7 MEM_MB_DQS2_P A24 MB_DQS_H2 MA_DQS_H2 C22 MEM_MA_DQS2_P 6
7 MEM_MB_DQS2_N A23 MB_DQS_L2 MA_DQS_L2 C21 MEM_MA_DQS2_N 6
7 MEM_MB_DQS3_P F26 MB_DQS_H3 MA_DQS_H3 G22 MEM_MA_DQS3_P 6
+1.5VSUS E26 G21
7 MEM_MB_DQS4_P AC25 MB_DQS_H4 MA_DQS_H4 AD23 MEM_MA_DQS4_P 6
7 MEM_MB_DQS4_N AC26 MB_DQS_L4 MA_DQS_L4 AC23 MEM_MA_DQS4_N 6
7 MEM_MB_DQS5_P AF21 MB_DQS_H5 MA_DQS_H5 AB19 MEM_MA_DQS5_P 6
R211 0_4 AF22 AB20
7 MEM_MB_DQS6_P AE16 MB_DQS_H6 MA_DQS_H6 Y15 MEM_MA_DQS6_P 6
+3VPCU
Reserved for AMD suggest 7 MEM_MB_DQS6_N AD16
AF12
MB_DQS_L6 MA_DQS_L6 W 15
W 12
MEM_MA_DQS6_N 6
C435 7 MEM_MB_DQS7_P MB_DQS_H7 MA_DQS_H7 MEM_MA_DQS7_P 6
R229 AE12 W 13
1K/F_4
SOCKET_638_PIN
*.1U/10V_4
5
U14
3 + R200 *10_4
1 1 1 2 MEMVREF_CPU 1
4 -
R222 C439 *OPA343NA/3K
2
1K/F_4 *0.47u/6.3V_4 R220
R193 *0_4
*10K/F_4
PROJECT : AX2/7
R204 *0_4
Custom 1A
S1G4 DDRII MEMORY I/F 2/3
NB5/RD2
A B
C D E
5 4 3 2 1
+VCORE U21E +VCORE

AA4
AA11
AA13
AA15
U21F
VSS1
VSS2
VSS3
VSS66
VSS67
VSS68
J6
J8
J10
J12
+VCORE
BOTTOM SIDE DECOUPLING
05
VSS4 VSS69
G4 VDD0_1 VDD1_1 P8 AA17 VSS5 VSS70 J14
H2 VDD0_2 VDD1_2 P10 AA19 VSS6 VSS71 J16
J9 VDD0_3 VDD1_3 R4 AB2 VSS7 VSS72 J18
J11 R7 AB7 K2 C180 C216 C230 C247 C256 C255 C254
VDD0_4 VDD1_4 VSS8 VSS73 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 0.22U/6.3V_4 0.01U/16V_4 180P/50V_4
J13 VDD0_5 VDD1_5 R9 AB9 VSS9 VSS74 K7
D
J15 VDD0_6 VDD1_6 R11 AB23 VSS10 VSS75 K9 D
K6 VDD0_7 VDD1_7 T2 AB25 VSS11 VSS76 K11
K10 VDD0_8 VDD1_8 T6 AC11 VSS12 VSS77 K13
K12 VDD0_9 VDD1_9 T8 AC13 VSS13 VSS78 K15
K14 T10 AC15 K17 +VCORE
VDD0_10 VDD1_10 VSS14 VSS79
L4 VDD0_11 VDD1_11 T12 AC17 VSS15 VSS80 L6
L7 VDD0_12 VDD1_12 T14 AC19 VSS16 VSS81 L8
L9 VDD0_13 VDD1_13 U7 AC21 VSS17 VSS82 L10
L11 VDD0_14 VDD1_14 U9 AD6 VSS18 VSS83 L12
L13 U11 AD8 L14 C242 C250 C228 C215 C177 C178 C176
VDD0_15 VDD1_15 VSS19 VSS84 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 0.22U/6.3V_4 0.01U/16V_4 180P/50V_4
L15 VDD0_16 VDD1_16 U13 AD25 VSS20 VSS85 L16
M2 VDD0_17 VDD1_17 U15 AE11 VSS21 VSS86 L18
M6 VDD0_18 VDD1_18 V6 AE13 VSS22 VSS87 M7
M8 VDD0_19 VDD1_19 V8 AE15 VSS23 VSS88 M9
M10 VDD0_20 VDD1_20 V10 AE17 VSS24 VSS89 AC6
N7 V12 AE19 M17 +CPUVDDNB +1.5VSUS
+CPUVDDNB VDD0_21 VDD1_21 VSS25 VSS90
N9 VDD0_22 VDD1_22 V14 AE21 VSS26 VSS91 N4
N11 VDD0_23 VDD1_23 W4 AE23 VSS27 VSS92 N8
4A VDD1_24 Y2 B4 VSS28 VSS93 N10
K16 VDDNB_1 VDD1_25 AC4 B6 VSS29 VSS94 N16
M16 AD2 +1.5VSUS B8 N18 C223 C212 C235 C214 C227 C238 C257 C258
VDDNB_2 VDD1_26 VSS30 VSS95 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 0.22U/6.3V_4 0.22U/6.3V_4 180P/50V_4
P16 VDDNB_3 B9 VSS31 VSS96 P2
+1.5VSUS T16 Y25 B11 P7
VDDNB_4 VDDIO27 VSS32 VSS97
V16 VDDNB_5 VDDIO26 V25 B13 VSS33 VSS98 P9
2A VDDIO25 V23 B15 VSS34 VSS99 P11
H25 VDDIO1 VDDIO24 V21 B17 VSS35 VSS100 P17
J17 VDDIO2 VDDIO23 V18 B19 VSS36 VSS101 R8
K18 VDDIO3 VDDIO22 U17 B21 VSS37 VSS102 R10
K21 VDDIO4 VDDIO21 T25 B23 VSS38 VSS103 R16
K23 VDDIO5 VDDIO20 T23 B25 VSS39 VSS104 R18
C K25 VDDIO6 VDDIO19 T21 D6 VSS40 VSS105 T7 C
L17 T18 D8 T9
M18
VDDIO7
VDDIO8
VDDIO18
VDDIO17 R17 D9
VSS41
VSS42
VSS106
VSS107 T11 DECOUPLING BETWEEN PROCESSOR AND DIMMs
M21 VDDIO9 VDDIO16 P25 D11 VSS43 VSS108 T13
M23 P23 D13 T15
M25
VDDIO10
VDDIO11
VDDIO15
VDDIO14 P21 D15
VSS44
VSS45
VSS109
VSS110 T17 PLACE CLOSE TO PROCESSOR AS POSSIBLE
N17 VDDIO12 VDDIO13 P18 D17 VSS46 VSS111 U4
D19 VSS47 VSS112 U6
D21 U8 +1.5VSUS
SOCKET_638_PIN VSS48 VSS113
D23 VSS49 VSS114 U10
D25 VSS50 VSS115 U12
E4 VSS51 VSS116 U14
+1.5VSUS +1.5VSUS F2 U16
VSS52 VSS117 C115 C126 C291 C288 C119 C123
F11 VSS53 VSS118 U18
F13 V2 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 0.22U/6.3V_4 0.22U/6.3V_4
VSS54 VSS119
F15 VSS55 VSS120 V7
R228 R198 R173 F17 V9
R214 R187 R178 VSS56 VSS121 +1.5VSUS
SI , change SMB 2K/F_4 2K/F_4 2K/F_4 F19 VSS57 VSS122 V11
1K/F_4 1K/F_4 1K/F_4 F21 V13
connection F23
VSS58 VSS123
V15
VSS59 VSS124
F25 VSS60 VSS125 V17
2
Q23 H7 W6
MMBT3904 VSS61 VSS126 C135 C133 C188 C172 C287 C284 C189
H9 VSS62 VSS127 Y21
32,40 MBCLK MBCLK 3 1 CPU_SIC H21 Y23 0.22U/6.3V_4 0.22U/6.3V_4 0.01U/16V_4 0.1U/10V_4 180P/50V_4 180P/50V_4 0.1U/10V_4
CPU_SIC 3 VSS63 VSS128
H23 VSS64 VSS129 N6
1 2 J4 VSS65
2
RB501V-40 D19 Q21

MMBT3904 SOCKET_638_PIN
32,40 MBDATA MBDATA 3 1 CPU_SID
CPU_SID 3
B B
1 2
2
RB501V-40 D16
SMBALERT#
SI , add Q21,Q23,D16,D19
3
Q17 *MMBT3904
1 CPU_ALERT
CPU_ALERT 3 PROCESSOR POWER AND GROUND
+3V +3V
EC10 0.01U/16V_4 +VGA_CORE +3V

+1.5V_VGA +3V
R405
R212 *0_4 SYS_SHDN# EC15 EC6
SYS_SHDN# 34
200/F_6 +1.8V_VGA EC12 0.01U/16V_4 +3V
reserve for
1
R424 R423 R416

power shutdown D17 EC8 0.01U/16V_4 0.1U/10V_4 *0.1U/10V_4
+VGA_CORE +3V
( if can ) *CH500H
10K/F_4 10K/F_4 10K/F_4 C693
0.1U/10V_4 +VIN EC7 0.01U/16V_4
+3V
2
U25
+1.5V_VGA EC9 0.01U/16V_4 +3V
18,32 MBCLK2 8 1 +5V EC1 *0.01U/16V_4
SCLK VCC H_THRMDA 3 +3V
R203 *0_4/S 3920_RST#
3920_RST# 32
18,32 MBDATA2 7 2 C695 Q20 +1.5VSUS EC11 0.01U/16V_4 +1.1V
SDA DXP 1000P/50V_4
3
MMBT3904 D18
6 ALERT# DXN 3
2 2 1 ECPWROK +VGA_CORE EC2 *0.01U/16V_4 +1.8V_VGA
H_THRMDC 3 ECPWROK 16,32
13 PM_THERM# 4 OVERT# GND 5
For fix HyperTransport nets
1
A PV ,Change from +1.5VSUS to +1.5V MSOP CH501H-40PT A

for leakage current issue
across plane splits
G786P8 SMBALERT# R218 10K/F_4
+3V
+VIN
3
+1.5V R428 10K/F_4

SI , add Q33,R428 R174 *10K/F_4 EC13
PV,add for PROJECT : AX2/7
PQ18 2 TEMP_FAIL 18 EMI suggest Quanta Computer Inc.
2
Q33
MMBT3904 *2N7002E-G ADD VGA TEMP_ FAIL function 0.1U/10V_4
CPU_THERMTRIP_L# 1 3 SMBALERT# M92 is active Hi Size Document Number Rev
3 CPU_THERMTRIP_L# Custom
S1G4 PWR & GND 3/3 1A
1
NB5/RD2
5 4 3
5 4 3 2 1
+1.5VSUS
06
CN23A MEM_MA_DATA[0..63] 4 CN23B
4 MEM_MA_ADD[0..15]
MEM_MA_ADD0 98 5 MEM_MA_DATA0 75 44
MEM_MA_ADD1 A0 DQ0 MEM_MA_DATA1 VDD1 VSS16
97 A1 DQ1 7 76 VDD2 VSS17 48
95 A3 DQ3 17 82 VDD4 VSS19 54
D MEM_MA_ADD4 92 4 MEM_MA_DATA4 87 55 D
91 A5 DQ5 6 88 VDD6 VSS21 60
86 A7 DQ7 18 94 VDD8 VSS23 65
85 A9 DQ9 23 100 VDD10 VSS25 71
A10/AP DQ10 VDD11 VSS26
PC2100 DDR3 SDRAM SO-DIMM

83 A12/BC# DQ12 22 111 VDD13 VSS28 128
80 A14 DQ14 34 117 VDD15 VSS30 134
A15 DQ15 VDD16 VSS31

39 MEM_MA_DATA16 123 139
4 MEM_MA_BANK[0..2] DQ16 VDD17 VSS32
MEM_MA_BANK0 109 41 MEM_MA_DATA17 124 144
MEM_MA_BANK1 108 BA0 DQ17 MEM_MA_DATA18 VDD18 VSS33
51 145
MEM_MA_BANK2 79 BA1 DQ18 MEM_MA_DATA19 VSS34
53 +3V 199 150
BA2 DQ19 MEM_MA_DATA20 VDDSPD VSS35
4 MEM_MA0_CS#0 114 S0# DQ20 40 VSS36 151
121 42 MEM_MA_DATA21 77 155
4 MEM_MA0_CS#1 S1# DQ21 NC1 VSS37
101 50 MEM_MA_DATA22 122 156
4 MEM_MA_CLK5_P CK0 DQ22 NC2 VSS38
103 52 MEM_MA_DATA23 MEM_MA_TEST 125 161
4 MEM_MA_CLK5_N CK0# DQ23 T12 NCTEST VSS39
102 57 MEM_MA_DATA24 162
4 MEM_MA_CLK4_P CK1 DQ24 VSS40
104 59 MEM_MA_DATA25 198 167
4 MEM_MA_CLK4_N CK1# DQ25 14 MEM_MA_EVENT# EVENT# VSS41
73 67 MEM_MA_DATA26 MEM_MA_RESET# 30 168
4 MEM_MA_CKE0 CKE0 DQ26 4 MEM_MA_RESET# RESET# VSS42
74 69 MEM_MA_DATA27 172
4 MEM_MA_CKE1 CKE1 DQ27 VSS43
115 56 MEM_MA_DATA28 173
4 MEM_MA_CAS# CAS# DQ28 VSS44
110 58 MEM_MA_DATA29 +VREF_DQ 1 178
4 MEM_MA_RAS# RAS# DQ29 7 +VREF_DQ VREF_DQ VSS45
113 68 MEM_MA_DATA30 +VREF_CA_A 126 179
4 MEM_MA_WE# WE# DQ30 VREF_CA VSS46
197 70 MEM_MA_DATA31 184
SA0 DQ31 MEM_MA_DATA32 VSS47
201 129 185
PCLK_SMB SA1 DQ32 MEM_MA_DATA33 VSS48
7,13,33 PCLK_SMB 202 131 2 189
C PDAT_SMB SCL DQ33 MEM_MA_DATA34 C413 C603 VSS1 VSS49 C
7,13,33 PDAT_SMB 200 SDA DQ34 141 3 VSS2 VSS50 190
143 MEM_MA_DATA35 1000P/50V_4 1000P/50V_4 8 195
(204P)
DQ35 MEM_MA_DATA36 VSS3 VSS51
4 MEM_MA0_ODT0 116 ODT0 DQ36 130 9 VSS4 VSS52 196
120 132 MEM_MA_DATA37 13
4 MEM_MA0_ODT1 ODT1 DQ37 VSS5
140 MEM_MA_DATA38 14
MEM_MA_DM0 DQ38 MEM_MA_DATA39 VSS6
4 MEM_MA_DM[0..7] 11 DM0 DQ39 142 19 VSS7
MEM_MA_DM1 28 147 MEM_MA_DATA40 20
MEM_MA_DM2 DM1 DQ40 MEM_MA_DATA41 VSS8
46 149 25
(204P)

63 157 26 203 +0.75V_DDR_VTT
MEM_MA_DM4 DM3 DQ42 MEM_MA_DATA43 VSS10 VTT1
136 159 31 204
MEM_MA_DM5 DM4 DQ43 MEM_MA_DATA44 VSS11 VTT2
153 146 32
170 148 37
187 158 38
DM7 DQ46 MEM_MA_DATA47 VSS14
DQ47 160 43 VSS15
12 163 MEM_MA_DATA48
4 MEM_MA_DQS0_P DQS0 DQ48
47 175 MEM_MA_DATA50 DDR3-DIMM1
4
4
MEM_MA_DQS5_P
MEM_MA_DQS6_P 171
DQS5
DQS6
DQ53
DQ54 174 MEM_MA_DATA54 +1.5VSUS Place close to DIMMs
4 MEM_MA_DQS0_N DQS#0 DQ56
45 191 MEM_MA_DATA58 R159 *0_4
4 MEM_MA_DQS3_N DQS#3 DQ59 +3VPCU
4 MEM_MA_DQS5_N DQS#5 DQ61 C421
169 192 MEM_MA_DATA62 R169 C415
B 4 MEM_MA_DQS7_N DQS#7 DQ63 B
1K/F_4 .1U/10V_4
.1U/10V_4
5
DDR3-DIMM1 U11
H=5.2 footprint: "ddr-c-2013289-204p" 3 + R160 10_4
1 1 2 +VREF_DQ
4 -
SO-DIMM BYPASS PLACEMENT : R158 C412 OPA343NA/3K
2
Place these Caps near So-Dimm1. 1K/F_4 1n/50V_4 R161 C414
No Vias Between the Trace of PIN to CAP. 10K/F_4 0.01U/16V_4

R179 0_4
R182 *0_4
SI , add C226 from EMI suggest
+1.5VSUS DE-COUPLING FOR DIMM1(ONE CAP PER POWER PIN)
PV,add from EMI suggestion

C651 C635 C606 C129 C199 C153 C609 C642 C615 C226 C168 C142
.1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 *.1U/10V_4 *.1U/10V_4 *.1U/10V_4 .1U/10V_4 *.1U/10V_4 .1U/10V_4
+1.5VSUS
SI , remove C100 , C136

. add C100 , C136 C843 +VREF_CA_A R348
Reserve C901
DE-COUPLING FOR DIMM1 *2K/F_4
A A
+3V +0.75V_DDR_VTT +0.75V_DDR_VTT R347 *0_4/S VREF_CA_A

4,7,37 DDR_VTTREF
+1.5VSUS
R349
1
C39 C40 C31 C34

C35 *.1U/10V_4
+1.5VSUS + C901 PV,change
*2K/F_4 PROJECT : AX2/7
1U/6.3V_4 *.1U/10V_4 4.7U/6.3V_6 *22U/6.3V_8
C33 .1U/10V_4
C100
10U/6.3V_8
C136 C843
10U/6.3V_8 10U/6.3V_8 *150u_6.3V_3528
to short pad Quanta Computer Inc.
2

Custom 1A
DDR3 SODIMMS: A/B CHANNEL
NB5/RD2
5 4
3 2 1
5 4 3 2 1
+1.5VSUS
07
CN24A MEM_MB_DATA[0..63] 4
4 MEM_MB_ADD[0..15]
MEM_MB_ADD0 98 5 MEM_MB_DATA0
MEM_MB_ADD1 A0 DQ0 MEM_MB_DATA1
97 A1 DQ1 7 CN24B
MEM_MB_ADD2 96 15 MEM_MB_DATA2
MEM_MB_ADD3 A2 DQ2 MEM_MB_DATA3
95 A3 DQ3 17 75 VDD1 VSS16 44
MEM_MB_ADD4 92 4 MEM_MB_DATA4 76 48
D
MEM_MB_ADD5 A4 DQ4 MEM_MB_DATA5 VDD2 VSS17 D
91 A5 DQ5 6 81 VDD3 VSS18 49
MEM_MB_ADD7 A6 DQ6 MEM_MB_DATA7 VDD4 VSS19
86 A7 DQ7 18 87 VDD5 VSS20 55
85 A9 DQ9 23 93 VDD7 VSS22 61
MEM_MB_ADD11 A10/AP DQ10 MEM_MB_DATA11 VDD8 VSS23
84 A11 DQ11 35 99 VDD9 VSS24 66
MEM_MB_ADD13 A12/BC# DQ12 MEM_MB_DATA13 VDD10 VSS25
119 A13 DQ13 24 105 VDD11 VSS26 72

78 A15 DQ15 36 111 VDD13 VSS28 128

39 MEM_MB_DATA16 112 133
4 MEM_MB_BANK[0..2] DQ16 VDD14 VSS29
MEM_MB_BANK0 109 41 MEM_MB_DATA17 117 134
MEM_MB_BANK1 BA0 DQ17 MEM_MB_DATA18 VDD15 VSS30
108 BA1 DQ18 51 118 VDD16 VSS31 138
MEM_MB_BANK2 79 53 MEM_MB_DATA19 123 139
BA2 DQ19 MEM_MB_DATA20 VDD17 VSS32
4 MEM_MB0_CS#0 114 40 124 144
+3V S0# DQ20 MEM_MB_DATA21 VDD18 VSS33
4 MEM_MB0_CS#1 121 S1# DQ21 42 VSS34 145
101 50 MEM_MB_DATA22 199 150
4 MEM_MB_CLK5_P CK0 DQ22 +3V VDDSPD VSS35
103 52 MEM_MB_DATA23 151
4 MEM_MB_CLK5_N CK0# DQ23 VSS36
102 57 MEM_MB_DATA24 77 155
4 MEM_MB_CLK4_P CK1 DQ24 NC1 VSS37
R335 104 59 MEM_MB_DATA25 122 156
4 MEM_MB_CLK4_N CK1# DQ25 NC2 VSS38
4.7K_4 4 MEM_MB_CKE0 73 67 MEM_MB_DATA26 MEM_MB_TEST 125 161
CKE0 DQ26 T11 NCTEST VSS39
4 MEM_MB_CKE1 74 69 MEM_MB_DATA27 162
CKE1 DQ27 MEM_MB_DATA28 VSS40
4 MEM_MB_CAS# 115 56 14 MEM_MB_EVENT# 198 167
CAS# DQ28 MEM_MB_DATA29 MEM_MB_RESET# EVENT# VSS41
4 MEM_MB_RAS# 110 58 4 MEM_MB_RESET# 30 168
RAS# DQ29 MEM_MB_DATA30 RESET# VSS42
4 MEM_MB_WE# 113 68 172
DIM2_SA0 DIM2_SA0 WE# DQ30 MEM_MB_DATA31 VSS43
197 70 173
SA0 DQ31 MEM_MB_DATA32 +VREF_DQ VSS44
201 129 6 +VREF_DQ 1 178
PCLK_SMB SA1 DQ32 MEM_MB_DATA33 VREF_DQ VSS45
6,13,33 PCLK_SMB 202 131 +VREF_CA_B 126 179
PDAT_SMB SCL DQ33 MEM_MB_DATA34 VREF_CA VSS46
C
6,13,33 PDAT_SMB 200 141 184 C
SDA DQ34 MEM_MB_DATA35 VSS47
DQ35 143 VSS48 185
116 130 MEM_MB_DATA36 2 189
4 MEM_MB0_ODT0 ODT0 DQ36 VSS1 VSS49
120 132 MEM_MB_DATA37 C395 C112 3 190
4 MEM_MB0_ODT1 ODT1 DQ37 VSS2 VSS50
140 MEM_MB_DATA38 1000P/50V_4 1000P/50V_4 8 195
(204P)
4 MEM_MB_DM[0..7] DQ38 VSS3 VSS51
MEM_MB_DM0 11 142 MEM_MB_DATA39 9 196
MEM_MB_DM1 DM0 DQ39 MEM_MB_DATA40 VSS4 VSS52
28 DM1 DQ40 147 13 VSS5
MEM_MB_DM2 46 149 MEM_MB_DATA41 14
(204P)
MEM_MB_DM3 DM2 DQ41 MEM_MB_DATA42 VSS6

63 157 19
136 159 20
153 146 25
170 148 26 203 +0.75V_DDR_VTT
MEM_MB_DM7 DM6 DQ45 MEM_MB_DATA46 VSS10 VTT1
187 158 31 204
DM7 DQ46 MEM_MB_DATA47 VSS11 VTT2
160 32
DQ47 MEM_MB_DATA48 VSS12
4 MEM_MB_DQS0_P 12 DQS0 DQ48 163 37 VSS13
29 165 MEM_MB_DATA49 38
4 MEM_MB_DQS1_P DQS1 DQ49 VSS14
47 175 MEM_MB_DATA50 43
4 MEM_MB_DQS2_P DQS2 DQ50 VSS15
64 177 MEM_MB_DATA51
4 MEM_MB_DQS3_P DQS3 DQ51
154 166 MEM_MB_DATA53 DDR3-DIMM2
4 MEM_MB_DQS0_N DQS#0 DQ56
B 4 MEM_MB_DQS7_N DQS#7 DQ63 B
DDR3-DIMM2
H=9.2 footprint: "ddr-c-2013310-204p-1"
SO-DIMM BYPASS PLACEMENT :
Place these Caps near So-Dimm1.
No Vias Between the Trace of PIN to CAP.
+1.5VSUS DE-COUPLING FOR DIMM2(ONE CAP PER POWER PIN)
C197 C151 C127 C198 C152 C128 C229 C166 C140 C225 C167 C141
.1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 *.1U/10V_4 *.1U/10V_4 *.1U/10V_4 *.1U/10V_4 *.1U/10V_4 *.1U/10V_4
SI , remove C165 , C236 +1.5VSUS

add C845 , C846 ,C844
Reserve C902
+VREF_CA_B R99
DE-COUPLING FOR DIMM2 *2K/F_4
A A
+3V +0.75V_DDR_VTT +0.75V_DDR_VTT +1.5VSUS

R88 *0_4/S +VREF_CA_B
4,6,37 DDR_VTTREF
1
C36 C37 C32 C43

C30 *.1U/10V_4
+1.5VSUS C845 C846 C844
+ C902 R96
*2K/F_4
PROJECT : AX2/7
1U/6.3V_4 *.1U/10V_4 4.7U/6.3V_6 *22U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 *150u_6.3V_3528 PV,change Quanta Computer Inc.
2
C38 .1U/10V_4 to short pad

Custom 1A
DDR3 SODIMMS TERMINATIONS
NB5/RD2
5 4 3 2 1
5 4 3 2 1
U22A
HT_CPU_NB_CAD_H[15..0]
HT_CPU_NB_CAD_L[15..0]
HT_CPU_NB_CAD_H[15..0] 3
HT_CPU_NB_CAD_H0
HT_CPU_NB_CAD_L0
HT_CPU_NB_CAD_H1
HT_CPU_NB_CAD_L1
HT_CPU_NB_CAD_H2
HT_CPU_NB_CAD_L2
HT_CPU_NB_CAD_H3
Y25
Y24
V22
V23
V25
V24
U24
HT_RXCAD0P
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD2P
HT_RXCAD2N
PART 1 OF 6
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
D24
D25
E24
E25
F24
F25
F23
HT_NB_CPU_CAD_H0
HT_NB_CPU_CAD_L0
HT_NB_CPU_CAD_H1
HT_NB_CPU_CAD_L1
HT_NB_CPU_CAD_H2
HT_NB_CPU_CAD_L2
HT_NB_CPU_CAD_H3
08
HT_CPU_NB_CAD_L[15..0] 3 HT_CPU_NB_CAD_L3 HT_RXCAD3P HT_TXCAD3P HT_NB_CPU_CAD_L3
U25 HT_RXCAD3N HT_TXCAD3N F22
HT_CPU_NB_CLK_H[1..0] HT_CPU_NB_CAD_H4 T25 H23 HT_NB_CPU_CAD_H4
HT_CPU_NB_CLK_H[1..0] 3 HT_CPU_NB_CAD_L4 HT_RXCAD4P HT_TXCAD4P HT_NB_CPU_CAD_L4
T24 HT_RXCAD4N HT_TXCAD4N H22
HT_CPU_NB_CLK_L[1..0] HT_CPU_NB_CAD_H5 P22 J25 HT_NB_CPU_CAD_H5
HT_CPU_NB_CLK_L[1..0] 3 HT_CPU_NB_CAD_L5 HT_RXCAD5P HT_TXCAD5P HT_NB_CPU_CAD_L5
P23 HT_RXCAD5N HT_TXCAD5N J24
HT_CPU_NB_CTL_H[1..0] HT_CPU_NB_CAD_H6 P25 K24 HT_NB_CPU_CAD_H6
D HT_CPU_NB_CTL_H[1..0] 3 HT_RXCAD6P HT_TXCAD6P D
HYPER TRANSPORT CPU I/F

HT_CPU_NB_CAD_L6 P24 K25 HT_NB_CPU_CAD_L6
HT_CPU_NB_CTL_L[1..0] HT_CPU_NB_CAD_H7 HT_RXCAD6N HT_TXCAD6N HT_NB_CPU_CAD_H7
HT_CPU_NB_CTL_L[1..0] 3 N24 HT_RXCAD7P HT_TXCAD7P K23
HT_CPU_NB_CAD_L7 N25 K22 HT_NB_CPU_CAD_L7
HT_NB_CPU_CAD_H[15..0] HT_RXCAD7N HT_TXCAD7N
HT_NB_CPU_CAD_H[15..0] 3 HT_CPU_NB_CAD_H8 HT_NB_CPU_CAD_H8
AC24 HT_RXCAD8P HT_TXCAD8P F21
HT_NB_CPU_CAD_L[15..0] HT_CPU_NB_CAD_L8 AC25 G21 HT_NB_CPU_CAD_L8 signals RS880 RX880
HT_NB_CPU_CAD_L[15..0] 3 HT_CPU_NB_CAD_H9 HT_RXCAD8N HT_TXCAD8N HT_NB_CPU_CAD_H9
AB25 HT_RXCAD9P HT_TXCAD9P G20
HT_NB_CPU_CLK_H[1..0] HT_CPU_NB_CAD_L9 AB24 H21 HT_NB_CPU_CAD_L9
HT_NB_CPU_CLK_H[1..0] 3 HT_CPU_NB_CAD_H10 HT_RXCAD9N HT_TXCAD9N HT_NB_CPU_CAD_H10
AA24 HT_RXCAD10P HT_TXCAD10P J20 HT_TXCALP
HT_NB_CPU_CLK_L[1..0] HT_CPU_NB_CAD_L10 AA25 J21 HT_NB_CPU_CAD_L10 R430 R430
HT_NB_CPU_CLK_L[1..0] 3 HT_CPU_NB_CAD_H11 HT_RXCAD10N HT_TXCAD10N HT_NB_CPU_CAD_H11
Y22 HT_RXCAD11P HT_TXCAD11P J18 301 ohm 1% 1.21k ohm 1%
HT_NB_CPU_CTL_H[1..0] HT_CPU_NB_CAD_L11 Y23 K17 HT_NB_CPU_CAD_L11 HT_TXCALN
HT_NB_CPU_CTL_H[1..0] 3 HT_CPU_NB_CAD_H12 HT_RXCAD11N HT_TXCAD11N HT_NB_CPU_CAD_H12
W 21 HT_RXCAD12P HT_TXCAD12P L19
HT_NB_CPU_CTL_L[1..0] HT_CPU_NB_CAD_L12 W 20 J19 HT_NB_CPU_CAD_L12
HT_NB_CPU_CTL_L[1..0] 3 HT_CPU_NB_CAD_H13 HT_RXCAD12N HT_TXCAD12N HT_NB_CPU_CAD_H13
V21 HT_RXCAD13P HT_TXCAD13P M19 HT_RXCALP
HT_CPU_NB_CAD_L13 V20 L18 HT_NB_CPU_CAD_L13 R434 R434
HT_CPU_NB_CAD_H14 HT_RXCAD13N HT_TXCAD13N HT_NB_CPU_CAD_H14
U20 HT_RXCAD14P HT_TXCAD14P M21 301 ohm 1% 1.21k ohm 1%
HT_CPU_NB_CAD_L14 U21 P21 HT_NB_CPU_CAD_L14 HT_RXCALN
HT_CPU_NB_CAD_H15 HT_RXCAD14N HT_TXCAD14N HT_NB_CPU_CAD_H15
U19 HT_RXCAD15P HT_TXCAD15P P18
HT_CPU_NB_CAD_L15 U18 M18 HT_NB_CPU_CAD_L15
HT_RXCAD15N HT_TXCAD15N
HT_CPU_NB_CLK_H0 T22 H24 HT_NB_CPU_CLK_H0
HT_CPU_NB_CLK_L0 HT_RXCLK0P HT_TXCLK0P HT_NB_CPU_CLK_L0
T23 HT_RXCLK0N HT_TXCLK0N H25
HT_CPU_NB_CLK_H1 AB23 L21 HT_NB_CPU_CLK_H1
HT_CPU_NB_CLK_L1 HT_RXCLK1P HT_TXCLK1P HT_NB_CPU_CLK_L1
AA22 HT_RXCLK1N HT_TXCLK1N L20
U18 HT_CPU_NB_CTL_H0 M22 M24 HT_NB_CPU_CTL_H0

HT_CPU_NB_CTL_L0 HT_RXCTL0P HT_TXCTL0P HT_NB_CPU_CTL_L0
M23 HT_RXCTL0N HT_TXCTL0N M25
SPM_VREF1 M9 E4 SPM_DQ2 HT_CPU_NB_CTL_H1 R21 P19 HT_NB_CPU_CTL_H1
SPM_VREF2 VREFCA DQL0 SPM_DQ1 HT_CPU_NB_CTL_L1 HT_RXCTL1P HT_TXCTL1P HT_NB_CPU_CTL_L1
C H2 VREFDQ DQL1 F8 R20 HT_RXCTL1N HT_TXCTL1N R18 C
F3 SPM_DQ5
SPM_A0 DQL2 SPM_DQ3 R412 301/F_4 HT_RXCALP HT_TXCALP R411 301/F_4
N4 A0 DQL3 F9 C23 HT_RXCALP HT_TXCALP B24
SPM_A1 P8 H4 SPM_DQ7 HT_RXCALN A24 B25 HT_TXCALN
SPM_A2 A1 DQL4 SPM_DQ0 HT_RXCALN HT_TXCALN
P4 A2 DQL5 H9
SPM_A3 N3 G3 SPM_DQ4 RS880
SPM_A4 A3 DQL6 SPM_DQ6
P9 A4 DQL7 H8
SPM_A5 P3
SPM_A6 A5
R9 A6
SPM_A7 R3 D8 SPM_DQ13
SPM_A8 A7 DQU0 SPM_DQ8
T9 A8 DQU1 C4
SPM_A9 R4 C9 SPM_DQ10
L8 A10/AP DQU3 C3
SPM_A11 R8 A8 SPM_DQ15
N8 A3
SPM_A13 T4
A12/BC
A13
DQU5
DQU6 B9 SPM_DQ14 This block is for UMA only , DIS can remove all component
T8 A4 SPM_DQ9
A14 DQU7
M8 A15 +1.5V_MEM_VDDQ
+1.5V
SPM_BA0 M3 B3
SPM_BA1 BA0 VDD#B3 U22D +1.5V_MEM_VDDQ
SPM_BA2
N9 BA1 VDD#D10 D10 40mils wdith or more
SI,exchange M4 BA2 VDD#G8 G8 PAR 4 OF 6
K3 SPM_A0 AB12 AA18 SPM_DQ0 R341 *0_6
net name VDD#K3
K9 SPM_A1 AE16
MEM_A0(NC) MEM_DQ0/DVO_VSYNC(NC)
AA20 SPM_DQ1
VDD#K9 SPM_A2 MEM_A1(NC) MEM_DQ1/DVO_HSYNC(NC) SPM_DQ2
VDD#N2 N2 V11 MEM_A2(NC) MEM_DQ2/DVO_DE(NC) AA19
SPM_CLKP J8 N10 SPM_A3 AE15 Y19 SPM_DQ3 C86 C71 C66
R95 *100_4 SPM_CLKN CK VDD#N10 SPM_A4 MEM_A3(NC) MEM_DQ3/DVO_D0(NC) SPM_DQ4 *1U/10V_4 *10U/6.3V_8 *10U/6.3V_8
K8 CK VDD#R2 R2 AA12 MEM_A4(NC) MEM_DQ4(NC) V17
SPM_CKE K10 R10 SPM_A5 AB16 AA17 SPM_DQ5
CKE VDD#R10 +1.5V_MEM_VDDQ SPM_A6 MEM_A5(NC) MEM_DQ5/DVO_D1(NC) SPM_DQ6
B
AB14 MEM_A6(NC) MEM_DQ6/DVO_D2(NC) AA15 B
SPM_A7 AD14 Y15 SPM_DQ7
SPM_ODT SPM_A8 MEM_A7(NC) MEM_DQ7/DVO_D4(NC) SPM_DQ8
K2 ODT VDDQ#A2 A2 AD13 MEM_A8(NC) MEM_DQ8/DVO_D3(NC) AC20
SPM_CS# L3 A9 SPM_A9 AD15 AD19 SPM_DQ9
CS VDDQ#A9 MEM_A9(NC) MEM_DQ9/DVO_D5(NC)
SBD_MEM/DVO_I/F
SPM_RAS# J4 C2 SPM_A10 AC16 AE22 SPM_DQ10
SPM_CAS# RAS VDDQ#C2 SPM_A11 MEM_A10(NC) MEM_DQ10/DVO_D6(NC) SPM_DQ11
K4 CAS VDDQ#C10 C10 AE13 MEM_A11(NC) MEM_DQ11/DVO_D7(NC) AC18
SPM_WE# L4 D3 SPM_A12 AC14 AB20 SPM_DQ12 C84 C92 C87
WE VDDQ#D3 SPM_A13 MEM_A12(NC) MEM_DQ12(NC) SPM_DQ13 *0.1U/10V_4 *0.1U/10V_4 *1U/10V_4
VDDQ#E10 E10 T21 Y14 MEM_A13(NC) MEM_DQ13/DVO_D9(NC) AD22
F2 AC22 SPM_DQ14
SPM_DQS0P VDDQ#F2 SPM_BA0 MEM_DQ14/DVO_D10(NC) SPM_DQ15
F4 DQSL VDDQ#H3 H3 AD16 MEM_BA0(NC) MEM_DQ15/DVO_D11(NC) AD21
SPM_DQS1P C8 H10 SPM_BA1 AE17
DQSU VDDQ#H10 SPM_BA2 MEM_BA1(NC) SPM_DQS0P
AD17 MEM_BA2(NC) MEM_DQS0P/DVO_IDCKP(NC) Y17
W 18 SPM_DQS0N
SPM_DM0 SPM_RAS# MEM_DQS0N/DVO_IDCKN(NC) SPM_DQS1P
E8 DML VSS#A10 A10 W 12 MEM_RASb(NC) MEM_DQS1P(NC) AD20
SPM_DM1 D4 B4 SPM_CAS# Y12 AE21 SPM_DQS1N
DMU VSS#B4 SPM_WE# MEM_CASb(NC) MEM_DQS1N(NC)
VSS#E2 E2 AD18 MEM_W Eb(NC)
G9 SPM_CS# AB13 W 17 SPM_DM0
+1.5V_MEM_VDDQ SPM_DQS0N VSS#G9 SPM_CKE MEM_CSb(NC) MEM_DM0(NC) SPM_DM1
G4 DQSL VSS#J3 J3 AB18 MEM_CKE(NC) MEM_DM1/DVO_D8(NC) AE19
SPM_DQS1N B8 J9 SPM_ODT V14
DQSU VSS#J9 MEM_ODT(NC) +1.8V_IOPLLVDD18 *PBY160808T-221Y-N L54
VSS#M2 M2 IOPLLVDD18(NC) AE23 +1.8V
R343 *10K/F_4 M10 SPM_CLKP V15 AE24 +1.1V_IOPLLVDD *PBY160808T-221Y-N L16 +1.1V
VSS#M10 SPM_CLKN MEM_CKP(NC) IOPLLVDD(NC)
VSS#P2 P2 W 14 MEM_CKN(NC)
T3 P10 AD23 C630 C146
13 SP_DDR3_RST# RESET VSS#P10 IOPLLVSS(NC)
T2 R357 *40.2/F_4 SPM_COMPP AE12
VMA_ZQ2 VSS#T2 *40.2/F_4 SPM_COMPN MEM_COMPP(NC)
L9 ZQ VSS#T10 T10 R352 AD12 MEM_COMPN(NC) MEM_VREF(NC) AE18 SPM_VREF *2.2U/6.3V_6 *2.2U/6.3V_6
+1.5V_MEM_VDDQ
RS880
VSSQ#B2 B2
B10 R356 *1K/F_4 R355 *1K/F_4
R91 VSSQ#B10
VSSQ#D2 D2
A *243/F_4 VSSQ#D9 D9 A
VSSQ#E3 E3
J2 E9 SPM_VREF1 SPM_VREF2 C619 *0.1U/10V_4 C620 *0.1U/10V_4 +1.5V_MEM_VDDQ
NC#J2 VSSQ#E9
L2 NC#L2 VSSQ#F10 F10
J10 NC#J10 VSSQ#G2 G2
L10 NC#L10 VSSQ#G10 G10
100-BALL
R73 *1K/F_4 R75 *1K/F_4 R100 *1K/F_4 R101 *1K/F_4
PROJECT : AX2/7
SDRAM DDR3
*H5TQ1G63AFR-14C
C85 *0.1U/10V_4 C77 *0.1U/10V_4 +1.5V_MEM_VDDQ C121 *0.1U/10V_4 C138 *0.1U/10V_4 +1.5V_MEM_VDDQ
Custom 1A
RS880-HT LINK I/F 1/5
NB5/RD2
5 4 3
5 4 3 2 1
SI , for routing smooth UMA can remove all GFX_TX CAP

GFX_RX can remove
at next stage for MUXLESS
PEG_RX15 D4
U22B
GFX_TX 0/1/3/9/10/11
A5 C_PEG_TX#15
SI remove C711,C713,C710,
C712,C708,C709,C703,C704
for MUXLESS
C_PEG_TX15 C711 *0.1U/10V_4 PEG_TX15

09
PEG_RX#15 GFX_RX0P GFX_TX0P C_PEG_TX15 C_PEG_TX#15 C713 *0.1U/10V_4 PEG_TX#15
PEG_RX#14
C4 GFX_RX0N PART 2 OF 6 GFX_TX0N B5
C_PEG_TX#14 C_PEG_TX14 C710 *0.1U/10V_4 PEG_TX14
A3 GFX_RX1P GFX_TX1P A4
PEG_RX14 B3 B4 C_PEG_TX14 C_PEG_TX#14 C712 *0.1U/10V_4 PEG_TX#14
PEG_RX13 GFX_RX1N GFX_TX1N C_PEG_TX13 C708 *0.1U/10V_4 PEG_TX13
C2 GFX_RX2P GFX_TX2P C3
D PEG_RX#13 C1 B2 C_PEG_TX#13 C709 *0.1U/10V_4 PEG_TX#13 D
PEG_RX12 GFX_RX2N GFX_TX2N C_PEG_TX12 C_PEG_TX#12 C703 *0.1U/10V_4 PEG_TX12
E5 GFX_RX3P GFX_TX3P D1
PEG_RX#12 F5 D2 C_PEG_TX#12 C_PEG_TX12 C704 *0.1U/10V_4 PEG_TX#12 Close to North Bridge
G5 GFX_RX4P GFX_TX4P E2
PEG_RX#11 G6 E1 C_PEG_TX#11 C696 *0.1U/10V_4 PEG_TX#11
H5 GFX_RX5P GFX_TX5P F4
PEG_RX#10 H6 F3 C_PEG_TX#10 C694 *0.1U/10V_4 PEG_TX#10
PEG_RX9 GFX_RX5N GFX_TX5N C_PEG_TX9 C690 *0.1U/10V_4 PEG_TX9 C_PEG_TX15
J6
GFX_RX6P GFX_TX6P
F1 PV,change to reserve C_PEG_TX15 25
PEG_RX#9 J5 F2 C_PEG_TX#9 C688 *0.1U/10V_4 PEG_TX#9 for MUXLESS C_PEG_TX#15
GFX_RX6N GFX_TX6N C_PEG_TX#15 25
PEG_RX8 J7 H4 C_PEG_TX8 C686 *0.1U/10V_4 PEG_TX8
PEG_RX#8 GFX_RX7P GFX_TX7P C_PEG_TX#8 C687 *0.1U/10V_4 PEG_TX#8 C_PEG_TX14
J8 GFX_RX7N GFX_TX7N H3 C_PEG_TX14 25
PCIE I/F GFX

PEG_RX7 L5 H1 C_PEG_TX7 C685 0.1U/10V_4 PEG_TX7 C_PEG_TX#14
GFX_RX8P GFX_TX8P C_PEG_TX#14 25
PEG_RX#7 L6 H2 C_PEG_TX#7 C682 0.1U/10V_4 PEG_TX#7
PEG_RX6 GFX_RX8N GFX_TX8N C_PEG_TX6 C_PEG_TX#6 C679 0.1U/10V_4 PEG_TX6 C_PEG_TX13
M8 GFX_RX9P GFX_TX9P J2 C_PEG_TX13 25
PEG_RX#6 L8 J1 C_PEG_TX#6 C_PEG_TX6 C681 0.1U/10V_4 PEG_TX#6 C_PEG_TX#13
GFX_RX9N GFX_TX9N C_PEG_TX#13 25
PEG_RX5 P7 K4 C_PEG_TX5 C_PEG_TX#5 C675 0.1U/10V_4 PEG_TX5
PEG_RX#5 GFX_RX10P GFX_TX10P C_PEG_TX#5 C_PEG_TX5 C676 0.1U/10V_4 PEG_TX#5 C_PEG_TX12
M7 GFX_RX10N GFX_TX10N K3 C_PEG_TX12 25
PEG_RX4 P5 K1 C_PEG_TX4 C_PEG_TX#4 C677 0.1U/10V_4 PEG_TX4 C_PEG_TX#12
GFX_RX11P GFX_TX11P C_PEG_TX#12 25
PEG_RX#4 M5 K2 C_PEG_TX#4 C_PEG_TX4 C678 0.1U/10V_4 PEG_TX#4
PEG_RX3 GFX_RX11N GFX_TX11N C_PEG_TX3 C670 0.1U/10V_4 PEG_TX3
R8 M4
PEG_RX#3 P8
GFX_RX12P
GFX_RX12N
GFX_TX12P
GFX_TX12N
M3 C_PEG_TX#3 C674 0.1U/10V_4 PEG_TX#3 To HDMI CONN
PEG_RX2 R6 M1 C_PEG_TX2 C669 0.1U/10V_4 PEG_TX2
PEG_RX#2 GFX_RX13P GFX_TX13P C_PEG_TX#2 C667 0.1U/10V_4 PEG_TX#2
R5 GFX_RX13N GFX_TX13N M2
PEG_RX1 P4 N2 C_PEG_TX1 C662 0.1U/10V_4 PEG_TX1
P3 N1
PEG_RX0 GFX_RX14N GFX_TX14N C_PEG_TX0 C656 0.1U/10V_4 PEG_TX0
T4 P1
T3 P2
GFX_RX15N GFX_TX15N PEG_RX#[15:0] PEG_TX#[15:0]
17 PEG_RX#[15:0] PEG_TX#[15:0] 17
AE3 AC1
GPP_RX0P GPP_TX0P PEG_RX[15:0] PEG_TX[15:0]
AD4 AC2 17 PEG_RX[15:0] PEG_TX[15:0] 17
C PCIE_RXP1 GPP_RX0N GPP_TX0N PCIE_TXP1_C C155 0.1U/10V_4 C
33 PCIE_RXP1 AE2 GPP_RX1P GPP_TX1P AB4 PCIE_TXP1 33
PCIE_RXN1 AD3 AB3 PCIE_TXN1_C C156 0.1U/10V_4 TO WLAN
33 PCIE_RXN1 GPP_RX1N GPP_TX1N PCIE_TXN1 33
PCIE_RXP2_LAN AD1 AA2 PCIE_TXP2_C C618 0.1U/10V_4
30 PCIE_RXP2_LAN GPP_RX2P GPP_TX2P PCIE_TXP2_LAN 30
PCIE_RXN2_LAN AD2 PCIE I/F GPP AA1 PCIE_TXN2_C C631 0.1U/10V_4 TO PCIE-LAN
30 PCIE_RXN2_LAN GPP_RX2N GPP_TX2N PCIE_TXN2_LAN 30
V5 GPP_RX3P GPP_TX3P Y1
W6 GPP_RX3N GPP_TX3N Y2
U5 Y4
GPP_RX4P GPP_TX4P
U6 Y3
GPP_RX4N GPP_TX4N
U8 V1
GPP_RX5P GPP_TX5P
U7 V2
GPP_RX5N GPP_TX5N
AA8 AD7 A_TX0P_C C622 0.1U/10V_4 PCIE_NB_SB_TX0P 12
12 PCIE_SB_NB_RX0P SB_RX0P SB_TX0P
Y8 AE7 A_TX0N_C C621 0.1U/10V_4 PCIE_NB_SB_TX0N 12
12 PCIE_SB_NB_RX0N SB_RX0N SB_TX0N
AA7 AE6 A_TX1P_C C623 0.1U/10V_4 PCIE_NB_SB_TX1P 12
Y7 AD6 A_TX1N_C C624 0.1U/10V_4 PCIE_NB_SB_TX1N 12
AA5 PCIE I/F SB AB6 A_TX2P_C C157 0.1U/10V_4 PCIE_NB_SB_TX2P 12
AA6 AC6 A_TX2N_C C158 0.1U/10V_4 PCIE_NB_SB_TX2N 12
W5 AD5 A_TX3P_C C626 0.1U/10V_4 PCIE_NB_SB_TX3P 12
Y5 AE5 A_TX3N_C C625 0.1U/10V_4 PCIE_NB_SB_TX3N 12
AC8 NB_PCIECALRP R104 1.27K/F_4
PCE_CALRP(PCE_BCALRP) NB_PCIECALRN R107 2K/F_4
AB8 +1.1V
PCE_CALRN(PCE_BCALRN)
RS880
RS880 Display Port Support (muxed on GFX)

B B
GFX_TX0,TX1,TX2 and TX3

DP0
AUX0 and HPD0
GFX_TX4,TX5,TX6 and TX7

DP1
AUX1 and HPD1
A A
PROJECT : AX2/7
Custom 1A
RS880-PCIE I/F 2/5
NB5/RD2
5 4 3
5 4 3 2 1
10
U22C
+3V_AVDD_NB F12 A22 LA_DATAP0
AVDD1(NC) TXOUT_L0P(NC) LA_DATAP0 23
E12 PART 3 OF 6 B22 LA_DATAN0
AVDD2(NC) TXOUT_L0N(NC) LA_DATAN0 23
+1.8V_AVDDDI_NB F14 A21 LA_DATAP1
AVDDDI(NC) TXOUT_L1P(NC) LA_DATAP1 23
G15 B21 LA_DATAN1
AVSSDI(NC) TXOUT_L1N(NC) LA_DATAN1 23
+1.8V_AVDDQ_NB H15 B20 LA_DATAP2
AVDDQ(NC) TXOUT_L2P(NC) LA_DATAP2 23
R91 for UMA use 140 ohm H14 A20 LA_DATAN2
AVSSQ(NC) TXOUT_L2N(DBG_GPIO0) LA_DATAN2 23
TXOUT_L3P(NC) A19
140ohm CS11402FB19 E17 C_Pr(DFT_GPIO5) TXOUT_L3N(DBG_GPIO2) B19
CRT/TVOUT
133ohm CS11332FB00 F17 Y(DFT_GPIO2)
F15 B18 LB_DATAP0
COMP_Pb(DFT_GPIO4) TXOUT_U0P(NC) LB_DATAP0 23
A18 LB_DATAN0
TXOUT_U0N(NC) LB_DATAN0 23
18,24 CRT_R R22 0_4 CRT_R_1 G18 A17 LB_DATAP1 SI , remove test point
RED(DFT_GPIO0) TXOUT_U1P(PCIE_RESET_GPIO3) LB_DATAP1 23
R135 140/F_4 G17 B17 LB_DATAN1 from AMD recommand
REDb(NC) TXOUT_U1N(PCIE_RESET_GPIO2) LB_DATAN1 23
18,24 CRT_G R17 0_4 CRT_G_1 E18 D20 LB_DATAP2
GREEN(DFT_GPIO1) TXOUT_U2P(NC) LB_DATAP2 23
R136 150/F_4 F18 D21 LB_DATAN2
GREENb(NC) TXOUT_U2N(NC) LB_DATAN2 23
D 18,24 CRT_B R13 0_4 CRT_B_1 E19 D18 D
R134 150/F_4 BLUE(DFT_GPIO3) TXOUT_U3P(PCIE_RESET_GPIO5)
F19 BLUEb(NC) TXOUT_U3N(NC) D19
18,24 HSYNC_COM R361 0_4 HSYNC_INT A11 B16 LA_CLK

DAC_HSYNC(PWM_GPIO4) TXCLK_LP(DBG_GPIO1) LA_CLK 23
18,24 VSYNC_COM R358 0_4 VSYNC_INT B11 A16 LA_CLK#
DAC_VSYNC(PWM_GPIO6) TXCLK_LN(DBG_GPIO3) LA_CLK# 23
R147 0_4 DDCDATA_INT E8 D16 LB_CLK
18,24 DDCDATA DAC_SDA(PCE_TCALRN) TXCLK_UP(PCIE_RESET_GPIO4) LB_CLK 23
R151 0_4 DDCCLK_INT F8 D17 LB_CLK#
18,24 DDCCLK DAC_SCL(PCE_RCALRN) TXCLK_UN(PCIE_RESET_GPIO1) LB_CLK# 23
R133 715/F_6 DAC_RSET_NB G14 DAC_RSET(PWM_GPIO1) +1.8V_VDDLTP18_NB
VDDLTP18(NC) A13
+1.1V_PLLVDD A12 B13
+1.8V_PLLVDD18 PLLVDD(NC) VSSLTP18(NC)
Only for UMA D14 PLLVDD18(NC)
LVTM
B12 A15 +1.8V_VDDLT_18_NB
PLLVSS(NC) VDDLT18_1(NC)
PLL PWR
VDDLT18_2(NC) B15
SI,add all material for MUXLESS +1.8V_VDDA18HTPLL H17 A14
VDDA18HTPLL VDDLT33_1(NC)
VDDLT33_2(NC) B14
+1.8V_VDDA18PCIEPLL D7 VDDA18PCIEPLL1
E7 VDDA18PCIEPLL2 VSSLT1(VSS) C14
VSSLT2(VSS) D15
NB_RST#_IN D8 C16
12 NB_PLTRST# SYSRESETb VSSLT3(VSS)
NB_PWRGD_IN A10 C18
16 NB_PWRGD_IN POWERGOOD VSSLT4(VSS)
NB_LDT_STOP# C10 C20
LDTSTOPb VSSLT5(VSS)
PM
NB_ALLOW_LDTSTOP C12 E20
ALLOW_LDTSTOP VSSLT6(VSS)
VSSLT7(VSS) C22 SI,add R24,R26,R52 for MUXLESS
NBHT_REFCLKP C25
12 NBHT_REFCLKP HT_REFCLKP
NBHT_REFCLKN C24 I
12 NBHT_REFCLKN HT_REFCLKN
NB_REFCLK_P E11
12 NB_REFCLK_P REFCLK_P/OSCIN(OSCIN)
CLOCKs
NB_REFCLK_N F11 I E9 R24 0_4 DISP_ON
12 NB_REFCLK_N REFCLK_N(PWM_GPIO3) LVDS_DIGON(PCE_TCALRP) DISP_ON 19,23
F7 R26 0_4 DPST_PWM
LVDS_BLON(PCE_RCALRP) DPST_PWM 19,23
NBGFX_CLKP T2 G12 R52 0_4 LVDS_BLON
GFX_REFCLKP LVDS_ENA_BL(PWM_GPIO2) LVDS_BLON 18,23
NBGFX_CLKN T1 I/O
GFX_REFCLKN
NBGPP_CLKP U1
T24 GPP_REFCLKP
NBGPP_CLKN U2 I/O
T22 GPP_REFCLKN
C R117 R116 Only for UMA C
SBLINK_CLKP V4
12 SBLINK_CLKP GPPSB_REFCLKP(SB_REFCLKP)
4.7K_4 4.7K_4 SBLINK_CLKN V3
12 SBLINK_CLKN GPPSB_REFCLKN(SB_REFCLKN)
SI , remove R427
NB_I2C_DATA A9
18,23 EDIDDATA I2C_DATA
NB_I2C_CLK B9 D9 TMDS_HPD0
18,23 EDIDCLK
B8
I2C_CLK MIS. TMDS_HPD(NC)
D10 TMDS_HPD1
INT_TMDS_HPD 25
T135 DDC_DATA/AUX0N(NC) HPD(NC) T137
T133 A8 DDC_CLK/AUX0P(NC)
B7 D12 SUS_STAT#_NB R154 0_4
25 HDMI_DDC_CLK DDC_CLK1/AUX1P(NC) SUS_STAT#(PWM_GPIO5) SUS_STAT# 13
25 HDMI_DDC_DATA A7 DDC_DATA1A/AUX1N(NC)
THERMALDIODE_P AE8
DYN_PWR_EN B10 AD8
35 DYN_PWR_EN STRP_DATA THERMALDIODE_N
SI , Change HDMI CLK/DATA PIN
from AMD recommand G11 RSVD TESTMODE D13 TEST_EN
C8 R414
T140 AUX_CAL(NC) 1.8K_4
RS880
PBY160808T-221Y-N(220,2A) 65 mA VDDLTP18 - LVDS or DVI/HDMI PLL

SI , for MUXLESS 110 mA +1.1V +1.1V_PLLVDD not applicable to RX780
+3V L33 +3V_AVDD_NB L65
need add PLL power PBY160808T-221Y-N(220,2A) PLLVDD - Graphics PLL
C702 +1.8V
for LVDS AVDD-DAC Analog
not applicable to
C374 2.2U/6.3V_6 RX780 PBY160808T-221Y-N(220,2A) 15 mA
not applicable to RX780
2.2U/6.3V_6 +1.8V_VDDLTP18_NB
L68
C705
+1.8V 2.2U/6.3V_6
B
STRAP_DEBUG_BUS_GPIO_ENABLEb +1.8V
B
R131 0_6 +1.8V_AVDDDI_NB AVDDI-DAC Digital PBY201209T-221Y-N(220,2A) 300 mA

Enables the Test Debug Bus using GPIO. L35 +1.8V_PLLVDD18 +1.8V_VDDLT_18_NB
not applicable to RX780
PBY160808T-221Y-N(220,2A) C336 L66
RS880M
VSYNC_INT R422 3K_4 +3V 0.1U/10V_4
1 Disable C405 C360 C706 C700
0 Enable 10U/6.3V_8 2.2U/6.3V_6
PBY160808T-221Y-N(220,2A) 4 mA 4.7U/6.3V_6 0.1U/10V_4
+1.8V_AVDDQ_NB
PLLVDD18 - Graphics PLL L32 VDDLT18 - LVDS or
not applicable to RX780 AVDDQ-DAC Bandgap Reference DVI/HDMI digital
C356 not applicable to RX780 not applicable to
2.2U/6.3V_6
RX780
RS880M: Enables Side port memory
RS880M:HSYNC#
Selects if Memory SIDE PORT is available or not +1.8V

1 = Memory Side port Not available VDDA18PCIEPLL -PCIE PLL
0 = Memory Side port available 20mils width +1.8V
Register Readback of strap: NB_CLKCFG:CLK_TOP_SPARE_D[1] L31 +1.8V_VDDA18PCIEPLL
PBY160808T-221Y-N(220,2A) +1.8V
R137
C388
2.2U/6.3V_6 1K/F_4
HSYNC_INT R418 3K_4 +3V
C717 R167
R419 *3K_4 U10 2K/F_4 12 ALLOW_LDTSTOP
VDDA18HTPLL -HT LINK PLL 0.1U/10V_4 1 5
NC VCC
A A
20 mA 2 R141 *0_4/S NB_ALLOW_LDTSTOP
3,12 CPU_LDT_STOP# IN
L30 +1.8V_VDDA18HTPLL
3 4 NB_LDT_STOP#
PBY160808T-221Y-N(220,2A) GND OUT
For external EEPROM Debug only
RS780/RX780 74LVC1G07GW
C363
DYN_PWR_EN R426 2K/F_4 2.2U/6.3V_6
PROJECT : AX2/7
Custom 1A
RS880-SYSTEM I/F 3/5
NB5/RD2
5 4 3 2 1
5 4 3 2 1
RS880M POWER TABLE 11
AE14
AC3
AC4
M11
AA4
AB5
AB1
AB7
AE1
AE4
AB2
D11
E14
E15
K14
L15
J15
J12
W1
W2
W4
W7
W8
M6
G1
G2
G4
G8
D3
D5
H7
R7
N4
R1
R2
R4
U4
A2
B1
E4
P6
V7
V8
V6
Y6
L1
L2
L4
L7
J4
U22F PIN NAME PIN NAME
RS880M RS880M
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VDDHT +1.1V IOPLLVDD +1.1V
VDDHTRX +1.1V AVDD +3.3V
VDDHTTX +1.2V AVDDDI +1.8V

PART 6/6
D D
GROUND VDDA18PCIE +1.8V AVDDQ +1.8V
VDDG18 +1.8V PLLVDD +1.1V
VDD18_MEM +1.8V PLLVDD18 +1.8V

VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
VDDPCIE +1.1V VDDA18PCIEPLL +1.8V
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VDDC +1.1V VDDA18HTPLL +1.8V
VDD_MEM +1.8V/1.5V VDDLTP18 +1.8V

A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25
L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
VDDG33 +3.3V VDDLT18 +1.8V
IOPLLVDD18 +1.8V VDDLT33 NC
VDDHT - HT +1.1V
C
LINK digital
I/O for
+1.1V 2A for RS880M VDDPCIE - PCIE-E Main power C
U22E
RX780/RS780 0.6A L51 +1.1V_VDDHT +1.1V_VDD_PCIE
2.5A R143 *0_8/S
J17 VDDHT_1 VDDPCIE_1 A6 +1.1V
*0_8/S K16 PART 5/6 B6
VDDHT_2 VDDPCIE_2
L16 VDDHT_3 VDDPCIE_3 C6
C607 C259 C311 C277 M16 D6 C297 C372 C320 C352 C382
4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 VDDHT_4 VDDPCIE_4 0.1U/10V_4 0.1U/10V_4 1U/10V_4 1U/10V_4 4.7U/6.3V_6
P16 VDDHT_5 VDDPCIE_5 E6
VDDHTRX - HT R16 VDDHT_6 VDDPCIE_6 F6
LINK RX I/O for T16 VDDHT_7 VDDPCIE_7 G7
RX780/RS780 0.7A L67 +1.1V_VDDHTRX VDDPCIE_8 H8
H18 VDDHTRX_1 VDDPCIE_9 J9
*0_8/S G19 K9
VDDHTRX_2 VDDPCIE_10
F20 VDDHTRX_3 VDDPCIE_11 M9
VDDHTTX - HT C707 C340 C334 C701 E21 L9
10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 VDDHTRX_4 VDDPCIE_12
LINK TX I/O for D22 VDDHTRX_5 VDDPCIE_13 P9
RS880 B23 VDDHTRX_6 VDDPCIE_14 R9
A23 VDDHTRX_7 VDDPCIE_15 T9
RS880 0.5A V9
+1.1V L12 +1.1V 2A for RS880M +1.1V_VDDHTTX AE25 VDDHTTX_1
VDDPCIE_16
VDDPCIE_17 U9
*0_8/S AD24 7A VDDC - Core Logic power
VDDHTTX_2
AC23 VDDHTTX_3 VDDC_1 K12 +1.1V_DYN
C179 C211 C222 C241 C203 AB22 J14
4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 VDDHTTX_4 VDDC_2
AA21 VDDHTTX_5 VDDC_3 U16
Y20 J11 C246 C286 C296 C299 C29
VDDHTTX_6 VDDC_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 10U/6.3V_8
W 19 K15
POWER
VDDHTTX_7 VDDC_5
V18 VDDHTTX_8 VDDC_6 M12
U17 VDDHTTX_9 VDDC_7 L14
T17 VDDHTTX_10 VDDC_8 L11
R17 VDDHTTX_11 VDDC_9 M13
P17 M15
B +1.8V 1A for RS780M+SB700 M17
VDDHTTX_12 VDDC_10
N12
B
VDDHTTX_13 VDDC_11
L19
700mA +1.8V_VDDA18PCIE VDDC_12 N14
C280 C270 C245 C41
+1.8V J10 VDDA18PCIE_1 VDDC_13 P11 VDD_MEM For UMA RS780 only
P10 P13 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 10U/6.3V_8
PBY201209T-221Y-N(220,2A) K10
VDDA18PCIE_2 VDDC_14
P14 Not applicable to RX780
C196 C182 C248 C219 C262 C234 VDDA18PCIE_3 VDDC_15
VDDA18PCIE - M10 VDDA18PCIE_4 VDDC_16 R12 memory I/O transform
PCIE TX stage 4.7U/6.3V_6 4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 L10 R15
I/O for W9 VDDA18PCIE_6 VDDC_18 T11
H9 VDDA18PCIE_7 VDDC_19 T15
RX780/RS780 T10 U12 SI , change footprint to 0603
R10 VDDA18PCIE_9 VDDC_21 T14
Y9 VDDA18PCIE_10 VDDC_22 J16
AA9 VDDA18PCIE_11
AB9 AE10 +1.5V_VDD_MEM L55 *0_8 +1.5V
VDDA18PCIE_12 VDD_MEM1(NC)
R138 *0_6/S
25mA AD9 VDDA18PCIE_13 VDD_MEM2(NC) AA11
C207 C186 C185 C205 C204
VDD18 - RS780 I/O +1.8V AE9 VDDA18PCIE_14 VDD_MEM3(NC) Y11
transform U10 AD10 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 0_4 *4.7U/6.3V_6
C310 VDDA18PCIE_15 VDD_MEM4(NC)
VDD_MEM5(NC) AB10
1U/10V_4 +1.8V_VDDG18_NB F9 AC10
VDDG18_1(VDD18_1) VDD_MEM6(NC) RS780
G9 VDDG18_2(VDD18_2) +3V_VDDG33 R139 *0_6/S
3.3V(0.06A)
R353 *0_6/S
25mA +1.8V_VDD18_MEM
AE11 VDD18_MEM1(NC) VDDG33_1(NC) H11 +3V This is side port power
+1.8V AD11 H12
VDD18_MEM2(NC) VDDG33_2(NC) C364 C353 VDD33 - 3.3V I/O DIS remove L55 ,
VDD18_MEM For UMA RS780 only C616 RS880 0.1U/10V_4 0.1U/10V_4 change C205 to 0 ohm
1U/10V_4 Not applicable to RX780
Not applicable to RX780 and short to GND
memory I/O transform
A A
PROJECT : AX2/7
Custom 1A
RS880-POWER5/5
NB5/RD2
Date: Tuesday, December 22, 2009 Sheet 11 of 42
5 4 3
5 4 3 2 1
U29A
12
P1
SB800 Part 1 of 5
W2
PCIE_RST# PCICLK0 T62
10 NB_PLTRST# R456 33_4 A_RST# L1 W1 PCI_CLK_TPM 16
PCI CLKS
A_RST# PCICLK1/GPO36
PCICLK2/GPO37 W3 PCI_CLK2 16
9 PCIE_SB_NB_RX0P C554 0.1U/10V_4 A_RX0P_C AD26 W4 PCI_CLK3 16
C555 0.1U/10V_4 A_RX0N_C A_TX0P PCICLK3/GPO38
PLACE THESE 9 PCIE_SB_NB_RX0N
C557 0.1U/10V_4 A_RX1P_C
AD27 A_TX0N PCICLK4/14M_OSC/GPO39 Y1 PCI_CLK4 16
9 PCIE_SB_NB_RX1P AC28 A_TX1P
D
PCIE AC 9 PCIE_SB_NB_RX1N C556 0.1U/10V_4 A_RX1N_C AC29 V2 PCIRST#_L R449 33_4 PCIRST# PCIRST# 32
D
C559 0.1U/10V_4 A_RX2P_C A_TX1N PCIRST#
COUPLING CAPS 9 PCIE_SB_NB_RX2P AB29 A_TX2P
9 PCIE_SB_NB_RX2N C558 0.1U/10V_4 A_RX2N_C AB28 A_TX2N
CLOSE TO SB 9 PCIE_SB_NB_RX3P C553 0.1U/10V_4 A_RX3P_C AB26 A_TX3P AD0/GPIO0 AA1
9 PCIE_SB_NB_RX3N C552 0.1U/10V_4 A_RX3N_C AB27 AA4 C752
A_TX3N AD1/GPIO1
AD2/GPIO2 AA3 150P/50V_4
PCIE_NB_SB_TX0P AE24 AB1
9 PCIE_NB_SB_TX0P A_RX0P AD3/GPIO3
To RS880
PCIE_NB_SB_TX0N AE23 AA5
9 PCIE_NB_SB_TX0N A_RX0N AD4/GPIO4
PCI EXPRESS INTERFACES

PCIE_NB_SB_TX1P AD25 AB2
PCIE_NB_SB_TX1N AD24 AB6
PCIE_NB_SB_TX2P AC24 AB5
PCIE_NB_SB_TX2N AC25 AA6 D23
PCIE_NB_SB_TX3P AB25 AC2 RB500V-40
9 PCIE_NB_SB_TX3P A_RX3P AD9/GPIO9 +AVBAT
PCIE_NB_SB_TX3N AB24 AC3 1 2
9 PCIE_NB_SB_TX3N A_RX3N AD10/GPIO10 +3VPCU
AD11/GPIO11 AC4
R492 590/F_4 PCIE_CALRP_SB AD29
+1.1V_PCIE_VDDR R490 2.0K/F_4 PCIE_CALRN_SB AD28 PCIE_CALRP AD12/GPIO12 AC1
AD1
20MIL R319 499/F_4 +3VRTC_1 R318 10_4 +3VRTC 1 2
PCIE_CALRN AD13/GPIO13
AD14/GPIO14 AD2
D24
AA28 AC6
20MIL 20MIL
+VCCRTC_2
+3V GPP_TX0P AD15/GPIO15 RB500V-40
AA29 GPP_TX0N AD16/GPIO16 AE2
Y29 AE1 C568
GPP_TX1P AD17/GPIO17
Y28 GPP_TX1N AD18/GPIO18 AF8
R451 33_4 A_RST#_R Y26 AE3 1U/10V_4
30 LAN_PLTRST#
33 MINI_PLTRST# R450 33_4 Y27
GPP_TX2P AD19/GPIO19
AF1 PV,add for 1.05V control 20MIL
C841 GPP_TX2N AD20/GPIO20
W 28 GPP_TX3P AD21/GPIO21 AG1
0.1U/10V_4 W 29 AF2 R320
GPP_TX3N AD22/GPIO22 VDDR_1.05_EN 16,39
AE9 AD23
AD23/GPIO23 AD23 16
SI , C404 change to U36 AA22 AD9 AD24 RTC_X1 1K/F_4
GPP_RX0P AD24/GPIO24 AD24 16,39
5
TC7SH08FU Y21 AC11 AD25

reserve only A_RST# GPP_RX0N AD25/GPIO25 AD26
AD25 16 Y6
C 2 AA25 AF6 C
+BAT
GPP_RX1P AD26/GPIO26 AD26 16
A_RST#_R AD27
4
1 SB_GPIO_RST# 13
AA24
W 23
GPP_RX1N AD27/GPIO27 AF4
AF3
AD27 16 3 2
20MIL
C404 *150P/50V_4 GPP_RX2P AD28/GPIO28 SB_MEMHOT#
V24 GPP_RX2N AD29/GPIO29 AH2 T68
W 24 AG2
3
GPP_RX3P AD30/GPIO30 RTC_X2

W 25 GPP_RX3N AD31/GPIO31 AH3 4 1
PCI INTERFACE
SI , add AND gate for the reset input AA8 All the PCI bus has R441
CBE0#
of PCIE devices from AMD recommand CBE1# AD5
build-in Pull-UP/Down 32.768KHZ
1
CBE2# AD8
AA10 resistors *20M_6 R462 20M_6 BT1
CBE3#
FRAME# AE8
AB9 BAT_CONN
2
SBLINK_CLKP RP23 DEVSEL#
10 SBLINK_CLKP 2 1 0_4P2R_4 SBLINK_CLKP_R M23 PCIE_RCLKP/NB_LNK_CLKP IRDY# AJ3 C753 C755
SBLINK_CLKN 4 3 SBLINK_CLKN_R P23 AE7 18P/50V_4 18P/50V_4
10 SBLINK_CLKN PCIE_RCLKN/NB_LNK_CLKN TRDY#
PAR AC5
NB_REFCLK_P RP22 2 1 0_4P2R_4 NB_REFCLK_P_R U29 AF5
10 NB_REFCLK_P NB_DISP_CLKP STOP#
NB_REFCLK_N 4 3 NB_REFCLK_N_R U28 AE6
10 NB_REFCLK_N NB_DISP_CLKN PERR#
AE4 SERR#
SERR# SERR# 32
NBHT_REFCLKP RP24 2 1 0_4P2R_4 NBHT_REFCLKP_R T26 AE11 SI , change CN14 to BT1
10 NBHT_REFCLKP NB_HT_CLKP REQ0#
NBHT_REFCLKN 4 3 NBHT_REFCLKN_R T27 AH5
10 NBHT_REFCLKN NB_HT_CLKN REQ1#/GPIO40
REQ2#/CLK_REQ8#/GPIO41 AH4 PV, change from 22p to 18p
3 CPUCLKP
CPUCLKP RP25 4 3 0_4P2R_4 CPUCLKP_R V21 CPU_HT_CLKP REQ3#/CLK_REQ5#/GPIO42 AC12 T92 from vendor update H=4.2 footprint: "BAT-23_2-4_2"
CPUCLKN 2 1 CPUCLKN_R T21 AD12
3 CPUCLKN CPU_HT_CLKN GNT0#
GNT1#/GPO44 AJ5 footprint check ok
EXT_GFX_CLKP RP21 4 3 0_4P2R_4 EXT_GFX_CLKP_R V23 AH6 VGA_ON_SB VGA_ON_SB 32
17 EXT_GFX_CLKP SLT_GFX_CLKP GNT2#/GPO45
EXT_GFX_CLKN 2 1 EXT_GFX_CLKN_R T23 AB12
17 EXT_GFX_CLKN SLT_GFX_CLKN GNT3#/CLK_REQ7#/GPIO46 T86
CLKRUN# AB11 CLKRUN# 32
PCIE_MINI1_CLKP RP26 2 1 0_4P2R_4 PCIE_MINI1_CLKP_R L29 AD7
33 PCIE_MINI1_CLKP GPP_CLK0P LOCK# T85
PCIE_MINI1_CLKN 4 3 PCIE_MINI1_CLKN_R L28 SI add R615 for reserve
33 PCIE_MINI1_CLKN GPP_CLK0N
AJ6 R615 0_4
B INTE#/GPIO32 VGA_PWROK 32,37,38 VGA_PWROK to BIOS B
N29 GPP_CLK1P INTF#/GPIO33 AG6
Place within 0.5" N28 GPP_CLK1N INTG#/GPIO34 AG4
AJ4 VGA_RSTB
of SB M29
INTH#/GPIO35
GPP_CLK2P
M28 GPP_CLK2N
CLOCK GENERATOR
LPC_CLK0 16
PCIE_LAN_CLKP RP20 4 3 0_4P2R_4 PCIE_LAN_CLKP_R T25
30 PCIE_LAN_CLKP GPP_CLK3P LPC_CLK1 16
PCIE_LAN_CLKN 2 1 PCIE_LAN_CLKN_R V25 H24 LPC_CLK0 R297 22_4
30 PCIE_LAN_CLKN GPP_CLK3N LPCCLK0 PCLK_LPC_DEBUG 33
H25 LPC_CLK1 R306 22_4
LPCCLK1 PCLK_LPC_KB3920 32
L24 J27 LAD0
GPP_CLK4P LAD0 LAD0 32,33
L23 J26 LAD1
+3V_DELAY GPP_CLK4N LAD1 LAD1 32,33
H29 LAD2
LPC
LAD2 LAD2 32,33

P25 H28 LAD3 C551
GPP_CLK5P LAD3 LAD3 32,33
SI , remove R483,R286 M25 G28 LFRAME# C535
GPP_CLK5N LFRAME# LFRAME# 32,33
from AMD recommand J25 LDRQ0#_SB 5.6P/50V_6 22P/50V_4
LDRQ0# T124
SI , change pull high R19 P29 AA18 LDRQ1#_SB EMI suggestion
GPP_CLK6P LDRQ1#/CLK_REQ6#/GPIO49 T113
from +3V_VGA to P28 AB19 SERIRQ
GPP_CLK6N SERIRQ/GPIO48 SERIRQ 32
+3V_DELAY 10K/F_4
N26 R290 10K/F_4 +3VS5
SI,add R616 GPP_CLK7P
N27 GPP_CLK7N
17 PCIE_RST# 2 1 A_RST# for CR CLK G21 ALLOW_LDTSTOP
ALLOW _LDTSTP/DMA_ACTIVE# ALLOW_LDTSTOP 10
D22 T29 H21 CPU_PROCHOT_R#
GPP_CLK8P PROCHOT# CPU_PROCHOT_R# 3
RB501V-40 T28 K19 CPU_PWRGD
CPU
GPP_CLK8N LDT_PG CPU_PWRGD 3

2 1 VGA_RSTB G22 CPU_LDT_STOP# CPU_LDT_STOP# 3,10 +AVBAT +AVBAT
D21 LDT_STP# CPU_LDT_RST#
LDT_RST# J24 CPU_LDT_RST# 3
RB501V-40 R616 33_4
26 CLK_48M_CR L25 14M_25M_48M_OSC 20MIL
1
G2
SI , change from C1 RTC_X1 *SHORT_ PAD1 C481
32K_X1
0.1U/10V_4
A
VGA_RSTA to A_RST#_R C792 27P/50V_4 R494 *0_4/S 25M_X1 L26 C2 RTC_X2
RTC_CLK 16
A
2
25M_X1 32K_X2
RTC
1
D2 RTC_CLK
Y7 R493 RTCCLK INTRUDER_ALERT# R469 *1M/F_4
INTRUDER_ALERT# B2 +AVBAT
25M_X2 L27 B1 +AVBAT
25MHZ 1M/F_4 25M_X2 VDDBT_RTC_G
SI , change to 27P
2
C793 27P/50V_4 SB820M A12 PROJECT : AX2/7

PV,change
to short pad
INTRUDER_ALERT# Left not connected (Southbridge Size Document Number Rev
Custom 1A
has 50-kohm internal pull-up to VBAT). SB820-PCIE/PCI/CPU/LPC 1/4
NB5/RD2
5 4 3
5 4 3 2 1
13
PV,remove workaround
+3VS5
NC,no install by default U29D
R253 *2.2K_4 SB_TEST0 J2 A10 CLK_48M_USB PV,delete R272
14 MEM_GEVEN# PCI_PME#/GEVENT4# USBCLK/14M_25M_48M_OSC
remove pull hi RI# K1
T144 RI#/GEVENT22#
( chip internal SPI_CS3# D3 G19 USB_RCOMP_SB R291 11.8K/F_6
T73 SPI_CS3#/GBE_STAT1/GEVENT21# USB_RCOMP
R470 *2.2K_4 SB_TEST1 SUSB# F1
have pull hi ) 32 SUSB# SLP_S3#
SUSC# H1
32 SUSC# SLP_S5#
ACPI / WAKE UP EVENTS

DNBSWON# F2 SI,add R272 for PARK LP 14M CLK source
32 DNBSWON#
USB 1.1 USB MISC

R245 *2.2K_4 SB_TEST2 SB_PWRGD_IN PW R_BTN#
16 SB_PWRGD_IN
SUS_STAT#
H5
G6
PW R_GOOD SB800 J10
CLK_48M_USB
10 SUS_STAT# SUS_STAT# USB_FSD1P/GPIO186 USBP15+ 29
SB_TEST0 B3 Part 4 of 5 H11 BLUETOOTH
TEST0 USB_FSD1N USBP15- 29
SI , Add SB_GPIO_RST# SB_TEST1 C4
SB_TEST2 TEST1/TMS
D form AMD recommand F6 TEST2 USB_FSD0P/GPIO185 H9 T83 D
+3VS5 SCL1/SDATA1 is 3V/S5 tolerance GATEA20 AD21 J8 C509
32 GATEA20 GA20IN/GEVENT0# USB_FSD0N T82
AMD datasheet define it RCIN# AE21 *2.2P/50V_4
32 RCIN# KBRST#/GEVENT1#
K2 LPC_PME#/GEVENT3# USB_HSD13P B12 T99
R459 2.2K_4 SB_SMBCLK1 J29 A12
32 KBSMI# LPC_SMI#/GEVENT23# USB_HSD13N T88
R460 2.2K_4 SB_SMBDATA1 SCI# H2 for EMI
32 SCI# GEVENT5#
SYS_RST# J1 F11
SYS_RESET#/GEVENT19# USB_HSD12P T90
30,33 PCIE_WAKE# H6 W AKE#/GEVENT8# USB_HSD12N E11 T100
F3 IR_RX1/GEVENT20#
3 CPU_THERMTRIP# J6 THRMTRIP#/SMBALERT#/GEVENT2# USB_HSD11P E14 USBP11+ 26
WD_PWRGD AC19 E12 USB card reader
+3V SCL0/SDATA0 16 WD_PWRGD NB_PW RGD USB_HSD11N USBP11- 26
is 3V tolerance Clock gen/Robson/TV
AMD datasheet define it tuner C500 RSMRST# G1 J12
32 RSMRST# RSMRST# USB_HSD10P USBP10+ 33
100P/50V_4 J14 WLAN Min-Card
/DDR2/DDR2 USB_HSD10N USBP10- 33
R312 2.2K_4 PCLK_SMB AD19
thermal/Accelerometer T119 CLK_REQ4#/SATA_IS0#/GPIO64
30 LAN_CLKREQ# AA16 CLK_REQ3#/SATA_IS1#/GPIO63 USB_HSD9P A13 T103
R311 2.2K_4 PDAT_SMB R444 *0_4 LAN_DISABLE#_SB AB21 B13
+3V 30,32 LAN_DISABLE# SMARTVOLT1/SATA_IS2#/GPIO50 USB_HSD9N T87
12 SB_GPIO_RST# AC18 CLK_REQ0#/SATA_IS3#/GPIO60
T123 AF20 SATA_IS4#/FANOUT3/GPIO55 USB_HSD8P D13 T105
T114 AE19 SATA_IS5#/FANIN3/GPIO59 USB_HSD8N C13 T94
ACZ_SPKR AF19
27 ACZ_SPKR SPKR/GPIO66
R561 PCLK_SMB AD22 G12
USB 2.0
6,7,33 PCLK_SMB SCL0/GPIO43 USB_HSD7P T101
PDAT_SMB AE22 G14
6,7,33 PDAT_SMB SDA0/GPIO47 USB_HSD7N T96
10K/F_4 SB_SMBCLK1 F5
SB_SMBDATA1 SCL1/GPIO227
F4 SDA1/GPIO228 USB_HSD6P G16 USBP6+ 29
RB501V-40 D38 AH21 G18 USB Connector
33 WLAN_CLKREQ# CLK_REQ2#/FANIN4/GPIO62 USB_HSD6N USBP6- 29
1 2 VGA_REQ_R AB18
37 VGA_REQ CLK_REQ1#/FANOUT4/GPIO61
GPIO
T69 E1 IR_LED#/LLB#/GPIO184 USB_HSD5P D16 USBP5+ 29
T152 AJ21 SMARTVOLT2/SHUTDOW N#/GPIO51 USB_HSD5N C16 USBP5- 29 USB Connector
8 SP_DDR3_RST# H4 DDR3_RST#/GEVENT7#
C
T67 D5 GBE_LED0/GPIO183 USB_HSD4P B14 T148
C
SI , add R561,D38 for VGA_CLK_REQ T78 D7 GBE_LED1/GEVENT9# USB_HSD4N A14 T150
T77 G5 GBE_LED2/GEVENT10#
+3VS5 SCL2/SDATA2 is 3V/S5 tolerance K3 E18
T74 GBE_STAT0/GEVENT11# USB_HSD3P T109
AMD datasheet define it EXT_SB_OSC AA20 E16
T121 CLK_REQG#/GPIO65/OSCIN USB_HSD3N T112
R296 2.2K_4 SB_SCLK2 PV,Reserve for system stable J16
USB_HSD2P USBP2+ 23
R292 2.2K_4 SB_SDATA2 H3 J18 Carama USB
BLINK/USB_OC7#/GEVENT18# USB_HSD2N USBP2- 23
R576 *10K_4 SYS_RST# D1
R243 *0_4 SMBALERT#_1 USB_OC6#/IR_TX1/GEVENT6#
E4 B17
USB OC
5 PM_THERM# USB_OC5#/IR_TX0/GEVENT17# USB_HSD1P T107
+3VS5 R244 10K/F_4 D4 A17
+3VS5 USB_OC4#/IR_RX0/GEVENT16# USB_HSD1N T149
SB_JTAG_TDO E8
SB_JTAG_TCK USB_OC3#/AC_PRES/TDO/GEVENT15#
F7 USB_OC2#/TCK/GEVENT14# USB_HSD0P A16 USBP0+ 29
R458 2.2K_4 DNBSWON# SB_JTAG_TDI E7 B16 USB Connector
USB_OC1#/TDI/GEVENT13# USB_HSD0N USBP0- 29
SB_JTAG_RST# F8
+3V USB_OC0#/TRST#/GEVENT12#
SI , add from HP request
R457 4.7K_4 SUS_STAT# R255 *10K/F_4
ACZ_BCLK M3 D25 SB_SCLK2
R332 8.2K_4 WLAN_CLKREQ# ACZ_SDOUT AZ_BITCLK SCL2/GPIO193 SB_SDATA2
16 ACZ_SDOUT N1 AZ_SDOUT SDA2/GPIO194 F23
R334 8.2K_4 LAN_CLKREQ# R455 *10K/F_4 ACZ_SDIN0 L2 B26 SB_SCLK3
T168
HD AUDIO
R453 *10K/F_4 ACZ_SDIN1 AZ_SDIN0/GPIO167 SCL3_LV/GPIO195 5159_RST_R#
HD audio M2 AZ_SDIN1/GPIO168 SDA3_LV/GPIO196 E26 5159_RST_R# 26
interface is R454 *10K/F_4 ACZ_SDIN2_R M1 F25
R452 *10K/F_4 ACZ_SDIN3_R AZ_SDIN2/GPIO169 EC_PW M0/EC_TIMER0/GPIO197
M4 E22
To Azalia 3.3S5 voltage ACZ_SYNC
ACZ_RST#
N2
AZ_SDIN3/GPIO170
AZ_SYNC
EC_PW M1/EC_TIMER1/GPIO198
EC_PW M2/EC_TIMER2/GPIO199 F22 SB_GPIO199
SB_GPIO200
SB_GPIO199 16
ACZ_SDOUT R247 33_4
P2 AZ_RST# EC_PW M3/EC_TIMER3/GPIO200 E21 SB_GPIO200 16 SPI/LPC define
ACZ_SDOUT_AUDIO 27
KSI_0/GPIO201 G24
C478 *10P/50V_4 R483 10K/F_4 T1 G25
R505 10K/F_4 GBE_COL KSI_1/GPIO202
B
T4 GBE_CRS KSI_2/GPIO203 E28 B
L6 GBE_MDCK KSI_3/GPIO204 E29
ACZ_SYNC R251 33_4 PV,change from pull +3VS5 R509 10K/F_4 L5 D29
ACZ_SYNC_AUDIO 27 GBE_MDIO KSI_4/GPIO205
high to pull low from T9 GBE_RXCLK KSI_5/GPIO206 D28
C484 *10P/50V_4 U1 C29
AMD update GBE_RXD3 KSI_6/GPIO207
U3 GBE_RXD2 KSI_7/GPIO208 C28
PV, change to 27P T2
GBE LAN
GBE_RXD1
from EMI suggest BIT_CLK_AUDIO 27 U2 GBE_RXD0 KSO_0/GPIO209 B28
EMBEDDED CTRL
T5 GBE_RXCTL/RXDV KSO_1/GPIO210 A27
ACZ_BCLK R254 33_4 C479 27P/50V_4 SI , add pull up resistor R511 10K/F_4 V5 B27
GBE_RXERR KSO_2/GPIO211
from AMD recommend P5 GBE_TXCLK KSO_3/GPIO212 D26
M5 GBE_TXD3 KSO_4/GPIO213 A26
ACZ_RST# R242 33_4 P9 C26
ACZ_RST#_AUDIO 27 GBE_TXD2 KSO_5/GPIO214
T7 GBE_TXD1 KSO_6/GPIO215 A24
P7 GBE_TXD0 KSO_7/GPIO216 B25
ACZ_SDIN0 ACZ_SDIN0 27 M7 A25
GBE_TXCTL/TXEN KSO_8/GPIO217
P4 GBE_PHY_PD KSO_9/GPIO218 D24
Remove short pad M9 GBE_PHY_RST# KSO_10/GPIO219 B24
EMI suggestion R545 10K/F_4 V7 C24
GBE_PHY_INTR KSO_11/GPIO220
B23
To Modem Board T118 E23 PS2_DAT/SDA4/GPIO187
KSO_12/GPIO221
KSO_13/GPIO222 A23
T166 E24 PS2_CLK/SCL4/GPIO188 EMBEDDED CTRL KSO_14/GPIO223 D22
ACZ_SDOUT R246 33_4 F21 C22
ACZ_SDOUT_AUDIO_MDC 28 SPI_CS2#/GBE_STAT2/GPIO166 KSO_15/GPIO224
T167 G29 FC_RST#/GPO160 KSO_16/GPIO225 A22
C477 *10P/50V_4 B22
KSO_17/GPIO226
D27 PS2KB_DAT/GPIO189
F28 PS2KB_CLK/GPIO190
ACZ_SYNC R248 33_4 F29
ACZ_SYNC_AUDIO_MDC 28 PS2M_DAT/GPIO191
E27 PS2M_CLK/GPIO192
C473 *10P/50V_4
A +3VSUS A
C833 SB820M A12
CN32
ACZ_BCLK R256 33_4 10P/50V_4
BIT_CLK_AUDIO_MDC 28
C486 27P/50V_4 1 SB_JTAG_TCK
PV, change to 27P 2
from EMI suggest SB_JTAG_TDO
3
ACZ_RST# R249 33_4
ACZ_RST#_AUDIO_MDC 28
SB JTAG 4
SB_JTAG_TDI
SB_TEST1 PROJECT : AX2/7
5
6 SB_JTAG_RST#
7
ACZ_SDIN1 8 Size Document Number Rev
ACZ_SDIN1 28 Custom
SB820-ACPI/GPIO/USB 2/4 1A
Remove short pad *S/W JTAG DEBUG NB5/RD2
5 4 3
5 4 3 2 1
14
SATA PORT 0,1,2,3
can support AHCI IF THERE IS NO IDE, TEST
PLACE SATA AC COUPLING
mode U29B POINTS FOR DEBUG BUS SI define side port ID
CAPS CLOSE TO SB820
IS MANDATORY
C490 0.01U/16V_4 SATA_TXP0_C AH9
SB800 AH28
29 SATA_TXP0 SATA_TX0P FC_CLK
C493 0.01U/16V_4 SATA_TXN0_C AJ9 Part 2 of 5 AG28
SATA1 29 SATA_TXN0 SATA_TX0N FC_FBCLKOUT
AF26 SIDE_PORT_ID2 SIDE_PORT_ID1 SIDE_PORT_ID0
C498 0.01U/16V_4 SATA_RXN0_C FC_FBCLKIN
29 SATA_RXN0 AJ8 SATA_RX0N
C503 0.01U/16V_4 SATA_RXP0_C AH8 AF28
29 SATA_RXP0 SATA_RX0P FC_OE#/GPIOD145
FC_AVD#/GPIOD146 AG29 1 0 0 Samsung
C489 0.01U/16V_4 SATA_TXP1_C AH10 AG26
SATA ODD 31 SATA_TXP1
C485 0.01U/16V_4 SATA_TXN1_C AJ10
SATA_TX1P FC_W E#/GPIOD148
AF27
D 31 SATA_TXN1 SATA_TX1N FC_CE1#/GPIOD149 D
FC_CE2#/GPIOD150 AE29
C487 0.01U/16V_4 SATA_RXN1_C AG10 AF29 1 0 1 Hynix
31 SATA_RXN1 SATA_RX1N FC_INT1/GPIOD144
C482 0.01U/16V_4 SATA_RXP1_C AF10 AH27
31 SATA_RXP1 SATA_RX1P FC_INT2/GPIOD147
AG12 SATA_TX2P FC_ADQ0/GPIOD128 AJ27
PLVDD_SATA-- AF12 SATA_TX2N FC_ADQ1/GPIOD129 AJ26 0 0 0 No support side port
SATA PLL FC_ADQ2/GPIOD130 AH25
POWER AJ12 SATA_RX2N FC_ADQ3/GPIOD131 AH24
AH12 SATA_RX2P FC_ADQ4/GPIOD132 AG23
FC_ADQ5/GPIOD133 AH23
AH14 SATA_TX3P FC_ADQ6/GPIOD134 AJ22
XTLVDD_SATA-- SATA AJ14 SATA_TX3N FC_ADQ7/GPIOD135 AG21
crystal power FC_ADQ8/GPIOD136 AF21
AG14 AH22 +3VS5 R259 *10K/F_4 SIDE_PORT_ID0 R471 10K/F_4
SATA_RX3N FC_ADQ9/GPIOD137
FLASH
AF14 AJ23 SI , remove test point
SATA_RX3P FC_ADQ10/GPIOD138
FC_ADQ11/GPIOD139 AF23 from AMD recommand
PLACE SATA_CAL AG17 AJ24 +3VS5 R265 *10K/F_4 SIDE_PORT_ID1 R475 10K/F_4
SATA_TX4P FC_ADQ12/GPIOD140
AF17 AJ25
RES VERY CLOSE SATA_TX4N FC_ADQ13/GPIOD141
AG25
FC_ADQ14/GPIOD142
TO BALL OF SB820 AJ17 SATA_RX4N FC_ADQ15/GPIOD143 AH26 +3VS5 R264 *10K/F_4 SIDE_PORT_ID2 R260 10K/F_4
PV,change
SERIAL ATA
AH17 SATA_RX4P
NOTE: AJ18
to short pad
SATA_TX5P R466 *0_4/S
R361 IS 1K 1% FOR 25MHz AH18 SATA_TX5N FANOUT0/GPIO52 W5 RF_OFF# 33
W6 R477 *0_4/S +3VS5 R474 *10K/F_4 BOARD_ID0 R262 10K/F_4
XTAL, 4.99K 1% FOR 100MHz AH19
FANOUT1/GPIO53
Y9 R443 *0_4
BT_OFF# 29
SATA_RX5N FANOUT2/GPIO54 BT_COMBO_EN# 33
INTERNAL CLOCK AJ19 SATA_RX5P
W7 SB_FANIN0 For blue tooth R268 10K/F_4 BOARD_ID1 R274 *10K/F_4
FANIN0/GPIO56 T76
V9 SB_FANIN1
FANIN1/GPIO57 T84 & wireless
C R476 1K/F_4 SATA_CALRP AB14 W8 R468 *0_4/S LCD_BK 23 C
R472 931/F_4 SATA_CALRN SATA_CALRP FANIN2/GPIO58 R478 *10K/F_4 BOARD_ID2 R277 10K/F_4
+1.1V_AVDD_SATA AA14 SATA_CALRN merge card
B6 TEMPIN0
TEMPIN0/GPIO171 T147
A6 TEMPIN1
TEMPIN1/GPIO172 T145
SB_SATA_LED# AD11 A5 MB_THRMDA_SB R479 *10K/F_4 BOARD_ID3 R280 10K/F_4
SATA_ACT#/GPIO67 TEMPIN2/GPIO173 T146
TEMPIN3/TALERT#/GPIO174 B5 T70
+3V R486 10K/F_4 C7 TEMP_COMM
TEMP_COMM R267 *10K/F_4 BOARD_ID4 R273 10K/F_4
SI define board ID
A3 SIDE_PORT_ID0
HW MONITOR
C518 *22P/50V_4 SATA_X1 VIN0/GPIO175 SIDE_PORT_ID1
AD16 SATA_X1 VIN1/GPIO176 B4
A4 SIDE_PORT_ID2
VIN2/GPIO177
2
Y4 C5 BOARD_ID0
R284 VIN3/GPIO178 BOARD_ID1
VIN4/GPIO179 A7
*25MHZ B7 BOARD_ID2
*1M/F_4 VIN5/GPIO180 BOARD_ID3
B8
1
C514 *22P/50V_4 SATA_X2 VIN6/GBE_STAT3/GPIO181 BOARD_ID4

AC16 SATA_X2 VIN7/GBE_LED3/GPIO182 A8 ID4 ID3 ID2 ID1 ID0
0 0 0 0 0 AX2 UMA DF
SI , change to reserve only J5 SPI_DI/GPIO164 NC1 G27
E2 Y2 0 0 0 0 1 AX7 UMA DF
SPI ROM
SPI_DO/GPIO163 NC2
K4 SPI_CLK/GPIO162
K9 SPI_CS1#/GPIO165
ROM_RST# G2 0 0 0 1 0 AX2 PARK DF
T72 ROM_RST#/GPIO161
+3V SB820M A12 0 0 0 1 1 AX7 PARK DF
B B
0 0 1 0 0 AX2 UMA FF
C764
0.1U/10V_4 0 0 1 0 1 AX7 UMA FF
U30
5
TC7SH08FU 0 0 1 1 0 AX2 PARK FF

2 SB_SATA_LED#
33 SATA_LED# 4
1 0 0 1 1 1 AX7 PARK FF
3
0 1 0 1 0 AX2 M93 DF
0 1 0 1 1 AX7 M93 DF
+1.5VSUS
+1.5VSUS R250 2.2K_4 0 1 1 1 0 AX2 M93 FF
R238
2
Q25 2.2K_4 0 1 1 1 1 AX7 M93 FF

MMBT3904
3 1 MEM_MA_EVENT# 6
R233 2.2K_4
R234
2.2K_4
2
Q24 PV define for M93

A MMBT3904 A
13 MEM_GEVEN# 3 1 MEM_MB_EVENT# 7
PROJECT : AX2/7
Custom 1A
SB820-ACPI/GPIO/USB 2/4
NB5/RD2
5 4 3
5 4 3 2 1
+3.3V_SB_R
VDDQ--3.3V I/O power

PLACE ALL THE DECOUPLING CAPS ON
THIS SHEET CLOSE TO SB AS POSSIBLE.
U29C
Part 3 of 5
VDD-- S/B CORE power
+1.1V_VCC_SB_R
PV,change
to short pad 15
R241 *0_8/S
131mA SB800 510mA R276 *0_8/S U29E
+3V AH1 VDDIO_33_PCIGP_1 VDDCR_11_1 N13 +1.1V
V6 VDDIO_33_PCIGP_2 VDDCR_11_2 R15
Y19 N17 SB800
CORE S0
C474 C492 C494 C526 VDDIO_33_PCIGP_3 VDDCR_11_3 C516 C515 C511 C507 C510
PV,change AE5 VDDIO_33_PCIGP_4 VDDCR_11_4 U13 Y14 VSSIO_SATA_1 VSS_1 AJ2
to short pad 22U/6.3V_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 AC21 U17 0.1U/10V_4 0.1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3V_8 Y16 A28
VDDIO_33_PCIGP_5 VDDCR_11_5 VSSIO_SATA_2 VSS_2
AA2 V12 AB16 A2
PCI/GPIO I/O
D VDDIO_33_PCIGP_6 VDDCR_11_6 VSSIO_SATA_3 VSS_3 D
AB4 VDDIO_33_PCIGP_7 VDDCR_11_7 V18 AC14 VSSIO_SATA_4 VSS_4 E5
AC8 VDDIO_33_PCIGP_8 VDDCR_11_8 W 12 CKVDD_1.1V-- AE12 VSSIO_SATA_5 VSS_5 D23
AA7 VDDIO_33_PCIGP_9 VDDCR_11_9 W 18 Internal clock AE14 VSSIO_SATA_6 VSS_6 E25
AA9 +1.1V_CKVDD AF9 E6
VDDIO_33_PCIGP_10 Generator I/O VSSIO_SATA_7 VSS_7
AF7 VDDIO_33_PCIGP_11 TBDmA power BLM18PG181SN1D(180,1.5A)_6
AF11 VSSIO_SATA_8 VSS_8 F24
1.8V : FLASH MEMORY MODE(DEFAULT) AA19 VDDIO_33_PCIGP_12 VDDAN_11_CLK_1 K28 AF13 VSSIO_SATA_9 VSS_9 N15
VDD33_18--3.3V IDE I/O power K29 L77 +1.1V AF16 R13
3.3V: IDE MODE VDDAN_11_CLK_2 VSSIO_SATA_10 VSS_10
R310 *0_8/S
1.8V flash memory I/O power
VDDIO_18_FC
71mA VDDAN_11_CLK_3 J28 AG8 VSSIO_SATA_11 VSS_11 R17
K26 AH7 T10
CLKGEN I/O
VDDAN_11_CLK_4 C537 C539 C543 C528 C791 VSSIO_SATA_12 VSS_12
VDDAN_11_CLK_5 J21 AH11 VSSIO_SATA_13 VSS_13 P10
Delete Cap and change +1.8V to pull low from AF22 J20 1U/10V_4 1U/10V_4 0.1U/10V_4 0.1U/10V_4 22U/6.3V_8 AH13 V11
FLASH I/O
VDDIO_18_FC_1 VDDAN_11_CLK_6 VSSIO_SATA_14 VSS_14
AE25 K21 AH16 U15
AMD command , due to no IDE & flash mode AF24
VDDIO_18_FC_2 VDDAN_11_CLK_7
J22 AJ7
VSSIO_SATA_15 VSS_15
M18
VDDIO_18_FC_3 VDDAN_11_CLK_8 VSSIO_SATA_16 VSS_16
PV,change AC22 VDDIO_18_FC_4 AJ11 VSSIO_SATA_17 VSS_17 V19
to short pad AJ13 VSSIO_SATA_18 VSS_18 M11
VDDRF_GBE_S V1 AJ16 VSSIO_SATA_19 VSS_19 L12
L75 L18
+3V
POWER VDDIO_33_GBE_S M10 A9 VSSIO_USB_1
VSS_20
VSS_21 J7
PBY160808T-221Y-N(220,2A) 43mA B10 P3
C787 C785 VDDPL_3.3V_PCIE VSSIO_USB_2 VSS_22
AE28 K11 V4
GBE LAN
2.2U/6.3V_4 *0.1U/10V_4 VDDPL_33_PCIE VSSIO_USB_3 VSS_23
B9 VSSIO_USB_4 VSS_24 AD6
D10 AD4
PCI EXPRESS
+1.1V_PCIE_VDDR VSSIO_USB_5 VSS_25
U26 VDDAN_11_PCIE_1 VDDCR_11_GBE_S_1 L7 D12 VSSIO_USB_6 VSS_26 AB7
V22 VDDAN_11_PCIE_2 VDDCR_11_GBE_S_2 L9 D14 VSSIO_USB_7 VSS_27 AC9
PCIE_VDDR--PCIE I/O power 600mA V26 VDDAN_11_PCIE_3 D17 VSSIO_USB_8 VSS_28 V8
+1.1V L82 V27 E9 W9
VDDAN_11_PCIE_4 VSSIO_USB_9 VSS_29
V28 VDDAN_11_PCIE_5 VDDIO_GBE_S_1 M6 F9 VSSIO_USB_10 VSS_30 W 10
BLM18PG181SN1D(180,1.5A)_6 V29 P8 F12 AJ28
C797 C550 C788 C547 C542 VDDAN_11_PCIE_6 VDDIO_GBE_S_2 VSSIO_USB_11 VSS_31
W 22 VDDAN_11_PCIE_7 F14 VSSIO_USB_12 VSS_32 B29
C 10U/6.3V_8 1U/10V_4 10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 W 26 F16 U4 C
VDDAN_11_PCIE_8 VSSIO_USB_13 VSS_33
C9 VSSIO_USB_14 VSS_34 Y18
S5_3.3--3.3v standby power G11 VSSIO_USB_15 VSS_35 Y10
+3VALW_R
93mA
GROUND
F18 VSSIO_USB_16 VSS_36 Y12
+3V L42 VDDPL_3.3V_SATA AD14 32mA D9 Y11
VDDPL_33_SATA R487 *0_6/S VSSIO_USB_17 VSS_37
VDDIO_33_S_1 A21 +3VS5 H12 VSSIO_USB_18 VSS_38 AA11
PBY160808T-221Y-N(220,2A) AJ20 D21 H14 AA12
C513 C508 VDDAN_11_SATA_1 VDDIO_33_S_2 VSSIO_USB_19 VSS_39
AF18 B21 H16 G4
SERIAL ATA
2.2U/6.3V_4 *0.1U/10V_4 VDDAN_11_SATA_4 VDDIO_33_S_3 C770 C771 C773 VSSIO_USB_20 VSS_40
AH20 K10 H18 J4
3.3V_S5 I/O
+1.1V_AVDD_SATA VDDAN_11_SATA_2 VDDIO_33_S_4 *0.1U/10V_4 2.2U/6.3V_6 2.2U/6.3V_6 VSSIO_USB_21 VSS_41
AG19 VDDAN_11_SATA_3 VDDIO_33_S_5 L10 PV,change J11 VSSIO_USB_22 VSS_42 G8
AE18 VDDAN_11_SATA_5 VDDIO_33_S_6 J9 to short pad J19 VSSIO_USB_23 VSS_43 G9
AVDD_SATA--SATA phy power 567mA AD18 VDDAN_11_SATA_6 VDDIO_33_S_7 T6 K12 VSSIO_USB_24 VSS_44 M12
+1.1V L49 AE16 T8 K14 AF25
VDDAN_11_SATA_7 VDDIO_33_S_8 VSSIO_USB_25 VSS_45
K16 VSSIO_USB_26 VSS_46 H7
BLM18PG181SN1D(180,1.5A)_6 S5_1.1V--1.1V standby power K18 AH29
C544 C531 C538 C521 C520 VSSIO_USB_27 VSS_47
113mA H19 V10
CORE S5
22U/6.3V_8 0.1U/10V_4 0.1U/10V_4 1U/10V_4 1U/10V_4 VDDCR_1.1V R303 *0_6/S VSSIO_USB_28 VSS_48
VDDCR_11_S_1 F26 +1.1VS5 VSS_49 P6
A18 VDDAN_33_USB_S_1 VDDCR_11_S_2 G26 VSS_50 N4
A19 VDDAN_33_USB_S_2 TBDmA C545 C549
Y4 EFUSE VSS_51 L4
For support USB A20 VDDAN_33_USB_S_3 VDDIO_AZ_S M8 +VDDIO_AZ VSS_52 L8
AVDDTX--USB Phy +3V_AVDD_USB B18 1U/10V_4 1U/10V_4 D8
wakeup-->3V_S5 VDDAN_33_USB_S_4 VSSAN_HW M
Analog I/O power B19 A11 VDDCR_1.1V_USB
VDDAN_33_USB_S_5 VDDCR_11_USB_S_1
658mA B20 B11 M19 M20
USB I/O
L73 VDDAN_33_USB_S_6 VDDCR_11_USB_S_2 VSSXL VSSPL_SYS
+3VS5 C18 VDDAN_33_USB_S_7
C20 197mA PBY160808T-221Y-N(220,2A)
PBY160808T-221Y-N(220,2A) VDDAN_33_USB_S_8 L71
C766 C767 C769 C765
D18 VDDAN_33_USB_S_9 VDDPL_33_SYS M21 +VDDPL_3.3V 47mA +1.1VS5 P21 VSSIO_PCIECLK_1 VSSIO_PCIECLK_14 H23
D19 VDDAN_33_USB_S_10 P20 VSSIO_PCIECLK_2 VSSIO_PCIECLK_15 H26
10U/6.3V_8 10U/6.3V_8 1U/10V_4 1U/10V_4 D20 L22 +VDDPL_1.1V 62mA M22 AA21
VDDAN_33_USB_S_11 VDDPL_11_SYS_S C760 C759 C758 VSSIO_PCIECLK_3 VSSIO_PCIECLK_16
E19 M24 AA23
PLL
VDDAN_33_USB_S_12 10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 VSSIO_PCIECLK_4 VSSIO_PCIECLK_17

B VDDPL_33_USB_S F19 +VDDPL_3.3V_USB 17mA M26 VSSIO_PCIECLK_5 VSSIO_PCIECLK_18 AB23 B
P22 VSSIO_PCIECLK_6 VSSIO_PCIECLK_19 AD23
L43 VDDAN_1.1V_USB
TBDmA C11 VDDAN_11_USB_S_1 VDDAN_33_HW M_S D6 +VDDAN_3.3VHWM 5mA P24 VSSIO_PCIECLK_7 VSSIO_PCIECLK_20 AA26
+1.1VS5 D11 VDDAN_11_USB_S_2 P26 VSSIO_PCIECLK_8 VSSIO_PCIECLK_21 AC26
L20 VDDXL_3.3V T20 Y20
PBY160808T-221Y-N(220,2A) VDDXL_33_S PBY160808T-221Y-N(220,2A) VSSIO_PCIECLK_9 VSSIO_PCIECLK_22
C505 C506
32mA L45
T22 VSSIO_PCIECLK_10 VSSIO_PCIECLK_23 W 21
+3V T24 VSSIO_PCIECLK_11 VSSIO_PCIECLK_24 W 20
2.2U/6.3V_4 0.1U/10V_4 SB820M A12 V20 AE26
VSSIO_PCIECLK_12 VSSIO_PCIECLK_25
J23 VSSIO_PCIECLK_13 VSSIO_PCIECLK_26 L21
C529 C527 K20
*0.1U/10V_4 2.2U/6.3V_6 VSSIO_PCIECLK_27
Part 5 of 5
SB820M A12
+3V +VDDPL_3.3V +1.1V +VDDPL_1.1V

SI , remove R272
from AMD recommand
L76 L81
+VDDIO_AZ PBY160808T-221Y-N(220,2A) PBY160808T-221Y-N(220,2A)
C790 C534 C799 C546

+3VS5 2.2U/6.3V_6 *0.1U/10V_4 2.2U/6.3V_6 *0.1U/10V_4
C496
2.2U/6.3V_6
A +3VS5 +VDDAN_3.3VHWM A
+3VS5 +VDDPL_3.3V_USB
L41 *0_6/S To meet SB800 SCL1.02:

Separate ferrite bead is not
C499
*2.2U/6.3V_6
C501
0.1U/10V_4
required for VDDPL_33_USB_S,
Del B603/600ohm bead. C533 C536 PROJECT : AX2/7
SI , remove L48
2.2U/6.3V_6 0.1U/10V_4 Quanta Computer Inc.
Custom 1A
SB820-PWR/DECOUPLING 4/4
NB5/RD2
Date: Tuesday, December 22, 2009 Sheet 15 of 42
5 4 3
5 4 3 2 1
OVERLAP COMMON PADS WHERE

POSSIBLE FOR DUAL-OP RESISTORS.
intermal have pull
Hi 10K , confirm AMD
ward this pull Hi
not need
16
REQUIRED STRAPS It must ready
before RSMRST#
+3VS5
D D
+VDDIO_AZ +3V +3VS5 +3VS5
INT CLK GEN R307
10K/F_4
R446 R304
R461
R257 10K/F_4 10K/F_4 *10K/F_4
*10K/F_4
13 SB_GPIO200
13 ACZ_SDOUT 12 PCI_CLK_TPM 12 PCI_CLK2 12 PCI_CLK3 12 PCI_CLK4 12 LPC_CLK0 12 LPC_CLK1 12 RTC_CLK 13 SB_GPIO199
R448 R447 R445 R298 R305

R258 GPIO199 R309 R299 GPIO200
10K/F_4 10K/F_4 10K/F_4 10K/F_4 10K/F_4 *10K/F_4 *2.2K_4 2.2K_4
EXT CLK GEN

PV, add it to force
PCIE of SB820 at Gen I
C C
AZ_SDOUT PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 GPIO200 GPIO199

REQUIRED
STRAPS PULL LOW POWER ALLOW Watchdog USE non_Fusion EC CLKGEN
MODE PCIE Gen2 Timer DEBUG CLOCK MODE ENABLED ENABLED H,H = Reserved
HIGH
DEFAULT Enabled STRAP DEFAULT DEFAULT
H,L = SPI ROM
PULL PERFORMANCE FORCE Watchdog IGNORE FUSION EC CLKGEN L,H = LPC ROM (Default)
LOW MODE PCIE Gen1 Timer DEBUG CLOCK MODE DISABLED DISABLED L,L = FWH ROM
Disabled STRAP
DEFAULT DEFAULT DEFAULT DEFAULT
NB_PWRGD_IN:
RS780/RX780 = 1.8V; RS740 = 3.3V
DEBUG STRAPS Do NOT share it with SB_PWRGD when use Internal Clk Gen
(Need SB PLL initialize firstly)
SB800 HAS 15K INTERNAL PU FOR PCI_AD[27:23]
B B
+3VS5 R271 10K/F_4 R270 *0_4/S SB_PWRGD_IN

SB_PWRGD_IN 13
C475 NB/SB POWER GOOD CIRCUIT

*2.2U/6.3V_6 +1.8V
12 AD27 +1.8V
12 AD26
12 AD25
12,39 AD24 U15 R237
12 AD23 1 5 C465 *0.1U/10V_4 300_4
NC VCC
2 2 RX780,RS780
36 VRM_PWRGD A
R442 R463 R467 R464 R465 3 3 4 R235 *33_4 NB_PWRGD_IN
GND Y NB_PWRGD_IN 10
*2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 Use 2.2K PD.
1 *NL17SZ17DFT2G
5,32 ECPWROK
SOT-353
D20 PV,change
BAT54A to short pad
R232 *0_4/S
WD_PWRGD 13
PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
PULL USE PCI DISABLE ILA USE FC USE DEFAULT DISABLE PCI AL17SZ17000 IC(5P) NL17SZ17DFT2G(SOT-353) SOT-353
A HIGH PLL AUTORUN PLL PCIE STRAPS MEM BOOT ALUC1G17000 IC OTHER(5P) SN74AUC1G17DBVR(SOT23-5) A
SOT23-5
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
PULL BYPASS ENABLE ILA BYPASS FC USE EEPROM ENABLE PCI

LOW PCI PLL AUTORUN PLL PCIE STRAPS MEM BOOT PROJECT : AX2/7
Custom 1A
SB820-STRAPS
NB5/RD2
5 4 3
5 4 3 2 1
U24A
+1.8V_DPE_VDD18 AG15
U24G
DP E/F POWER
DPE_VDD18#1
DP A/B POWER
DPA_VDD18#1 AE11 +1.8V_DPA_VDD18

17
AG16 DPE_VDD18#2 DPA_VDD18#2 AF11
2.5GT/s bit rate

PEG_TX0 AF30 AH30 C_PEG_RXN0 C239 0.1U/10V_4 +1.0V_DPE_VDD10 AG20 AF6 +1.0V_DPB_VDD10
9 PEG_TX0 PCIE_RX0P PCIE_TX0P PEG_RX0 9 DPE_VDD10#1 DPA_VDD10#1
PEG_TX#0 AE31 AG31 C_PEG_RXP0 C233 0.1U/10V_4 AG21 AF7
9 PEG_TX#0 PCIE_RX0N PCIE_TX0N PEG_RX#0 9 DPE_VDD10#2 DPA_VDD10#2
D D
PEG_TX1 AE29 AG29 C_PEG_RXP1 C240 0.1U/10V_4 AG14 AE1
9 PEG_TX1 PEG_TX#1 PCIE_RX1P PCIE_TX1P C_PEG_RXN1 PEG_RX1 9 DPE_VSSR#1 DPA_VSSR#1
AD28 AF28 C249 0.1U/10V_4 AH14 AE3
9 PEG_TX#1 PCIE_RX1N PCIE_TX1N PEG_RX#1 9 DPE_VSSR#2 DPA_VSSR#2
AM14 DPE_VSSR#3 DPA_VSSR#3 AG1
AM16 DPE_VSSR#4 DPA_VSSR#4 AG6
PEG_TX#2 AD30 AF27 C_PEG_RXP2 C251 0.1U/10V_4 AM18 AH5
9 PEG_TX#2 PCIE_RX2P PCIE_TX2P PEG_RX2 9 DPE_VSSR#5 DPA_VSSR#5
PEG_TX2 AC31 AF26 C_PEG_RXN2 C263 0.1U/10V_4
9 PEG_TX2 PCIE_RX2N PCIE_TX2N PEG_RX#2 9
+1.0V_VGA
PEG_TX3 AC29 AD27 C_PEG_RXP3 C231 0.1U/10V_4 +1.8V_DPE_VDD18 AF16 AE13 +1.8V_DPA_VDD18 (Park-S3:110mA@1.0V)
9 PEG_TX3 PCIE_RX3P PCIE_TX3P PEG_RX3 9 DPF_VDD18#1 DPB_VDD18#1
PEG_TX#3 AB28 AD26 C_PEG_RXN3 C220 0.1U/10V_4 AG17 AF13
9 PEG_TX#3 PCIE_RX3N PCIE_TX3N PEG_RX#3 9 DPF_VDD18#2 DPB_VDD18#2 (M9X-S2/S3:200mA@1.1V)
BLM18PG181SN1D(180,1.5A)_6
PEG_TX4 AB30 AC25 C_PEG_RXP4 C282 0.1U/10V_4 +1.0V_DPB_VDD10 L59
9 PEG_TX4 PCIE_RX4P PCIE_TX4P PEG_RX4 9
PCI EXPRESS INTERFACE

PEG_TX#4 AA31 AB25 C_PEG_RXN4 C289 0.1U/10V_4 AF22 AF8
9 PEG_TX#4 PCIE_RX4N PCIE_TX4N PEG_RX#4 9 +1.0V_DPE_VDD10 DPF_VDD10#1 DPB_VDD10#1
AG22 DPF_VDD10#2 DPB_VDD10#2 AF9
C653 C650 C654
PEG_TX5 AA29 Y23 C_PEG_RXP5 C267 0.1U/10V_4 0.1U/10V_4 10U/6.3V_8 1U/10V_4
PEG_TX#5 Y28 Y24 C_PEG_RXN5 C279 0.1U/10V_4 AF23 AF10
9 PEG_TX#5 PCIE_RX5N PCIE_TX5N PEG_RX#5 9 DPF_VSSR#1 DPB_VSSR#1
AG23 DPF_VSSR#2 DPB_VSSR#2 AG9
AM20 DPF_VSSR#3 DPB_VSSR#3 AH8
PEG_TX6 Y30 AB27 C_PEG_RXP6 C292 0.1U/10V_4 AM22 AM6
9 PEG_TX6 PCIE_RX6P PCIE_TX6P PEG_RX6 9 DPF_VSSR#4 DPB_VSSR#4
PEG_TX#6 W 31 AB26 C_PEG_RXN6 C303 0.1U/10V_4 AM24 AM8
9 PEG_TX#6 PCIE_RX6N PCIE_TX6N PEG_RX#6 9 DPF_VSSR#5 DPB_VSSR#5
PEG_TX#7 W 29 Y27 C_PEG_RXP7 C308 0.1U/10V_4

9 PEG_TX#7 PCIE_RX7P PCIE_TX7P PEG_RX7 9
PEG_TX7 V28 Y26 C_PEG_RXN7 C317 0.1U/10V_4
R368 150/F_4 AF17 AE10 R121 150/F_4
DPEF_CALR DPAB_CALR
C PEG_TX8 V30 W 24 C_PEG_RXP8 C328 *0.1U/10V_4 C
PEG_TX#8 U31 W 23 C_PEG_RXN8 C337 *0.1U/10V_4
9 PEG_TX#8 PCIE_RX8N PCIE_TX8N PEG_RX#8 9
+1.8V_DPE_PVDD AG18 DP PLL POWER AG8 +1.8V_DPA_PVDD
+1.8V_DPE_PVDD DPE_PVDD DPA_PVDD +1.8V_DPA_PVDD
AF19 DPE_PVSS DPA_PVSS AG7
PEG_TX#9 U29 V27 C_PEG_RXP9 C324 *0.1U/10V_4
PEG_TX9 T28 U26 C_PEG_RXN9 C318 *0.1U/10V_4
+1.8V_DPF_PVDD AG19 AG10 +1.8V_DPA_PVDD
+1.8V_DPF_PVDD DPF_PVDD DPB_PVDD +1.8V_DPA_PVDD
PEG_TX10 T30 U24 C_PEG_RXP10 C338 *0.1U/10V_4 R510 0_4 AF20 AG11
9 PEG_TX10 PCIE_RX10P PCIE_TX10P PEG_RX10 9 DPF_PVSS DPB_PVSS
PEG_TX#10 R31 U23 C_PEG_RXN10 C343 *0.1U/10V_4
PV , reserve for M93
PEG_TX#11 R29 T26 C_PEG_RXP11 C345 *0.1U/10V_4 PARK-S3
PEG_TX11 P28 T27 C_PEG_RXN11 C354 *0.1U/10V_4 M93-S3--NC
9 PEG_TX11 PCIE_RX11N PCIE_TX11N PEG_RX#11 9 PARK-S3--install
PEG_TX12 P30 T24 C_PEG_RXP12 C358 *0.1U/10V_4

PEG_TX#12 N31 T23 C_PEG_RXN12 C368 *0.1U/10V_4
9 PEG_TX#12 PCIE_RX12N PCIE_TX12N PEG_RX#12 9 M93-S3--NC
PARK-S3--install
PEG_TX13 N29 P27 C_PEG_RXP13 C380 *0.1U/10V_4
PEG_TX#13 M28 P26 C_PEG_RXN13 C370 *0.1U/10V_4 (Park-S3:110mA@1.0V)
9 PEG_TX#13 PCIE_RX13N PCIE_TX13N PEG_RX#13 9 +1.0V_DPE_VDD10 +1.8V_DPA_VDD18
(M9X-S2/S3:200mA@1.1V)
1.8V(130mA)
PEG_TX14 M30 P24 C_PEG_RXP14 C385 *0.1U/10V_4 +1.0V_DPE_VDD10 L21 +1.8V_DPA_VDD18 L23
9 PEG_TX14 PCIE_RX14P PCIE_TX14P PEG_RX14 9 +1.0V_VGA +1.8V_VGA
PEG_TX#14 L31 P23 C_PEG_RXN14 C387 *0.1U/10V_4
BLM18PG181SN1D(180,1.5A)_6 C190 C260 BLM18PG181SN1D(180,1.5A)_6
C209 C173 C192 0.1U/10V_4 1U/10V_4 C183
PEG_TX15 L29 M27 C_PEG_RXP15 C383 *0.1U/10V_4 0.1U/10V_4 1U/10V_4 10U/6.3V_6 10U/6.3V_8
PEG_TX#15 K30 N26 C_PEG_RXN15 C386 *0.1U/10V_4
B 9 PEG_TX#15 PCIE_RX15N PCIE_TX15N PEG_RX#15 9 B
+1.8V_DPA_PVDD
CLOCK 1.8V(20mA)
EXT_GFX_CLKP AK30 PV,change to reserve 1.8V(130mA) +1.8V_DPA_PVDD L58 +1.8V_VGA
12 EXT_GFX_CLKP PCIE_REFCLKP
EXT_GFX_CLKN AK32 for MUXLESS +1.8V_DPE_VDD18 L18
12 EXT_GFX_CLKN PCIE_REFCLKN +1.8V_VGA
C171 C162 C647 C268 BLM18PG181SN1D(180,1.5A)_6
C266 0.1U/10V_4 1U/10V_4 C639
M93-S3--NC CALIBRATION 0.1U/10V_4 1U/10V_4 10U/6.3V_8 BLM18PG181SN1D(180,1.5A)_6 10U/6.3V_8
PARK-S3--install Y22 M72_PCIE_CALRP R118 1.27K/F_4
PCIE_CALRP
10K/F_4 R425 N10 AA22 M72_PCIE_CALRN R386 2K/F_4 +1.0V_VGA
PW RGOOD PCIE_CALRN
AL27 +1.8V_DPF_PVDD +1.8V_DPE_PVDD

12 PCIE_RST# PERSTB
1.8V(20mA) 1.8V(20mA)
+1.8V_DPF_PVDD L53 +1.8V_VGA +1.8V_DPE_PVDD L15 +1.8V_VGA
PARK-S3
100MHz (+/-300ppm) input frequency, C611 C612 BLM18PG181SN1D(180,1.5A)_6 C150 C145 BLM18PG181SN1D(180,1.5A)_6
0-0.7V single-ended swing 0.1U/10V_4 1U/10V_4 C608 0.1U/10V_4 1U/10V_4 C137
10U/6.3V_8 10U/6.3V_8
M93-S3--NC
PARK-S3--install
A A
PROJECT : AX2/7
Custom 1A
PARK_PCIE_Interface
NB5/RD2
5 4 3 2 1
5 4 3 2 1
MEM_ID[3:0]
0000
0001
0010
0011
Vendor
Samsung- E die
Hynix - Orion
Type
64*16-800MHZ
64*16-800MHZ
Vendor P/N
K4W1G1646E-HC12
H5TQ1G63BFR-12C
Reserved
Reserved T23 AE9
U24B
M93-S3/M92-S2
DVCNTL_0/ DVPDATA_18
TXCAP_DPA3P
TXCAM_DPA3N
AF2
AF4 +1.8V_AVDD_Q +A2VDD
18
0100 Reserved T53 L9
DVCNTL_1 / NC 1.8V(70mA) 3.3V(65mA)
0101 Reserved T51 N9
DVCNTL_2 / NC TX0P_DPA2P
AG3
0110 Reserved AE8 DPA AG5 +1.8V_AVDD_Q L24 +A2VDD L17 +3V_DELAY
T25 DVDATA_12 / DVPDATA_16 TX0M_DPA2N +1.8V_VGA
0111 Reserved T27 AD9
DVDATA_11 / DVPDATA_20
1000 Reserved AC10 AH3 PBY160808T-121Y-N(120,2.5A) BLM18PG181SN1D(180,1.5A)_6
T33 DVDATA_10 / DVPDATA_22 TX1P_DPA1P
1001 Reserved T28 AD7
DVDATA_9 / DVPDATA_12 TX1M_DPA1N
AH1
1010 Reserved AC8 C191 C210 C194 C164 C160 C149
T31 DVDATA_8 / DVPDATA_14
1011 Reserved AC7 AK3 0.1U/10V_4 1U/10V_4 10U/6.3V_6 0.1U/10V_4 1U/10V_4 10U/6.3V_8
T32 DVDATA_7 / DVPCNTL_0 TX2P_DPA0P
1100 Reserved T40 AB9
DVDATA_6 / DVPDATA_8 TX2M_DPA0N
AK1
1101 Reserved T35 AB8
1110 Reserved AB7 AK5 TXC_HDMI_L+
D +VDDR4 T36 DVDATA_4 DVPDATA_4 TXCBP_DPB3P TXC_HDMI_L+ 25 D
1111 Reserved Memory ID AM3 TXC_HDMI_L-
TXCBM_DPB3N TXC_HDMI_L- 25
R395
DVO
*10K/F_4 MEM_ID3 AB4 AK6 TX0_HDMI_L+
DVDATA_3 / DVPDATA_19 TX3P_DPB2P TX0_HDMI_L+ 25 +1.8V_A2VDD_Q
R393 *10K/F_4 MEM_ID2 AB2 AM5 TX0_HDMI_L-
DVDATA_2 / DVPDATA_21 TX3M_DPB2N TX0_HDMI_L- 25
R390 *10K/F_4 MEM_ID1 Y8 DPB 1.8V(70mA)
PWRCNTL1 PWRCNTL0 V-CORE R123 *10K/F_4 MEM_ID0 Y7
DVDATA_0 / DVPDATA_0 TX4P_DPB1P
AJ7 TX1_HDMI_L+
TX1_HDMI_L+ 25
AH6 TX1_HDMI_L- +1.8V_A2VDD_Q L20
TX4M_DPB1N TX1_HDMI_L- 25 +1.8V_VGA
L 0 0 0.9V PBY160808T-121Y-N(120,2.5A) 1.8V(200mA DPC_PVDD) TX5P_DPB0P
AK8 TX2_HDMI_L+
TX2_HDMI_L+ 25
PBY160808T-121Y-N(120,2.5A)
+1.8V_VGA +1.8V_DPC_PVDD AL7 TX2_HDMI_L-
TX5M_DPB0N TX2_HDMI_L- 25
L63 C206 C278 C187
C673 C672 C671 M93-S3/M92-S2 0.1U/10V_4 1U/10V_4 10U/6.3V_8
M 0 1 0.96V 10U/6.3V_8 1U/10V_4 0.1U/10V_4 W6
DPC_PVDD / DVPDATA_11
V6 M92-S2/M93-S3 M93-S3--NC
DPC_PVSS / GND PARK-S3--install
V4
PBY160808T-121Y-N(120,2.5A) DVPDATA_3/TXCCP_DPC3P
1.8V(130mA DPC_VDD18) U5
H 1 0 1.06V +1.8V_VGA +1.8V_DPC_VDD18 AC6
DPC_VDD18#1/DVPDAT10
DVPCNTL_2/TXCCM_DPC3N
L62 AC5 W3
C661 C665 C664 DPC_VDD18#2/DVPDAT23 DVPDATA_7 / TX0P_DPC2P +VDDD1
V2
M93-S3--NC 10U/6.3V_8 1U/10V_4 0.1U/10V_4 DVPDATA_1 / TX0M_DPC2N
1.8V(45mA VDD1DI)
TBD 1 1 1.12V PARK-S3--install
DVPCNTL_MV1 / TX1P_DPC1P
Y4
AA5 W5 +VDDD1 L56
DPC_VDD10#1/DVPDAT15 DVPDATA_9 / TX1M_DPC1N +1.8V_VGA
PBY160808T-121Y-N(120,2.5A) 1.1V(110mA DPC_VDD10) AA6
+1.1V_DPC_VDD10 DPC_VDD10#2/DVPDAT17 PBY160808T-121Y-N(120,2.5A)
+1.1V AA3
L78 DVPDATA_13 / TX2P_DPC0P
DVPCNTL_1 / TX2M_DPC0N
Y2 For M93-S3: Use 150 Ohms Pull Down
C271 C272 C273 C627 C628 C633
10U/6.3V_8 1U/10V_4 0.1U/10V_4
For M92-S2: Use 0R to VDDR4
U1 AA12 R120 *150/F_4 0.1U/10V_4 1U/10V_4 10U/6.3V_6
R152 10K/F_4 GPIO22 DPC_VSSR#1 / DVPCLK VDDR4 / DPCD_CALR For Park-S3: NC
W1
DPC_VSSR#2 / DVPDAT5
U3 SI , need pull high near chip side
DPC_VSSR#3 / GND
GPIO22(ROMCS#) Y6
DPC_VSSR#4 / GND for MUXLESS change to reserve
PD without external VBIOS ROM AA1
DPC_VSSR#5/ DVPCNTL_MV0 DPC only
PV,change to reserv only SI, R128 change to
for delete workaround reserve only for MUXLESS SI,change to reserve only for MUXLESS
+3V_DELAY R1
10,23 EDIDCLK SCL DIS Pure DIS need install
10,23 EDIDDATA R3
SDA I2C +3V_DELAY
R127 *10K/F_4 GPIO24_TRSTB R543 *10K/F_4 L_CRT_R R372 *150/F_4
C AM26 L_CRT_R R18 *0_4 C
R CRT_R 10,24
R129 *10K/F_4 GPIO25_TDI GENERAL PURPOSE I/O AK26
GPIO0 RB L_CRT_G R373 *150/F_4
19 GPIO0 U6
R409 *10K/F_4 GPIO27_TMS GPIO1 GPIO_0 L_CRT_G R14 *0_4
SI , add R409 , R543 from AMD update 19 GPIO1 U10
GPIO_1 G
AL25 CRT_G 10,24
19 GPIO2 GPIO2 T10 AJ25
R410 *10K/F_4 GPIO28_TDO GPIO3 GPIO_2 GB L_CRT_B R374 *150/F_4 HSYNC_COM_R R360 *10K/F_4
T47 U8
GPIO4 GPIO_3_SMBDATA L_CRT_B R12 *0_4
T42 U7 AH24 CRT_B 10,24
GPIO5 GPIO_4_SMBCLK B VSYNC_COM_R R359 *10K/F_4
19 GPIO5 T9 AG25
GPIO_5_AC_BATT BB
T8
GPIO_6 DAC1
R407 *10K/F_4 GPIO26_TCK 10,23 LVDS_BLON R128 *0_4 EXT_LVDS_BLON T7 AH26 HSYNC_COM_R R46 *0_4
GPIO_7_BLON HSYNC HSYNC_COM 10,24
19 GPIO8 GPIO8 P10 AJ27 VSYNC_COM_R R48 *0_4
GPIO_8_ROMSO VSYNC VSYNC_COM 10,24
GPIO9 P4
19 GPIO9 GPIO_9_ROMSI
SI , provide 14M CLK source to GPIO10 P2
T44 GPIO_10_ROMSCK
GPIO11 N6 AD22 R365 499/F_4 SI , reserve R46,R48 for MUXLESS
slove Park JTAG test block 19 GPIO11
GPIO12 GPIO_11 RSET
19 GPIO12 N5
intermittently fails to initialize GPIO13 GPIO_12 +1.8V_AVDD_Q
19 GPIO13 N3 AG24 +1.8V_AVDD_Q
T41 HDMI_HP2 GPIO_13 AVDD
correctly issue Y9
GPIO_14_HPD2 AVSSQ
AE22
38 GFX_CORE_CNTRL0 GFX_CORE_CNTRL0 N1
T50 OSC_SPREAD GPIO_15_PWRCNTL_0 +VDDD1
M4 AE23 +VDDD1
VGA_ALERT GPIO_16_SSIN VDD1DI
SI , AMD Document Update change PU to PD R6
GPIO_17_THERMAL_INT VSS1DI
AD23
HPD3 W10
T48 GPIO_18_HPD3
5 TEMP_FAIL TEMP_FAIL M2 M92-S2/M93-S3
GFX_CORE_CNTRL1 GPIO_19_CTF
38 GFX_CORE_CNTRL1 P8 AM12
HPD3 GPIO_20_PWRCNTL_1 R2 / NC C644 22P/50V_4 EVGA-XTALI
T43 P7 AK12
GPIO22 GPIO_21_BB_EN R2B / NC
19 GPIO22 N8
GPIO_22_ROMCSB
1
GPIO_23_CLKREQb N7 AL11
GPIO_23_CLKREQB G2 / NC Y5 R379
G2B / NC
AJ11
27MHZ 10M_6
For Int Clk 27Mhz
CL=20PF
AK10
2
GPIO24_TRSTB B2 / NC
T54 L6 AL9
GPIO25_TDI JTAG_TRSTB B2B / NC C649 EVGA-XTALO
SI , reserve EEPROM to slove Park T52 L5
JTAG_TDI
GPIO26_TCK L3 22P/50V_4
JTAG test block intermittently T55
GPIO27_TMS JTAG_TCK
T57 L1 AH12
fails to initialize correctly GPIO28_TDO JTAG_TMS C / NC
T56 K4
JTAG_TDO DAC2 Y / NC
AM10
issue TESTEN AF24 AJ9
TESTEN COMP / NC
AB13
GENERICA DAC2_VSY
W8 AL13 DAC2_VSY 19
B
GENERICC GENERICB H2SYNC DAC2_HSY B
19 GENERICC W9 AJ13 DAC2_HSY 19 PV,reserve for M93
GENERICC V2SYNC
PV,delete workaround EEPROM W7
150 OHM GENERICD
25 EXT_TMDS_HPD AD10
GENERICE_HPD4 R514 0_4 +VDDD1
AD19 +VDDD1
*100K/F_4 R363 VDD2DI / NC R523 0_4
AC14 AC19
HPD1 VSS2DI / NC
+1.8V_VGA
1.8V+R6043(249R)=1.8V/3=0.6V R524 0_4
Thermal Sensor 781-1_3V R398 200/F_6
AE20 +A2VDD +3V_DELAY
R371 499/F_4 A2VDD / NC
+1.8V_A2VDD_Q U23 C683 0.1U/10V_4
AE17 +1.8V_A2VDD_Q
R370 249/F_4 +0.6V_M92_VREFG AC16 A2VDDQ / NC R384 *0_4/S MB_CLK2
5,32 MBCLK2 8 1
VREFG SMCLK VCC VGATHRM+
AE19
A2VSSQ R385 *0_4/S MB_DATA2
5,32 MBDATA2 7 2
SMDATA DXP C684
+3V_DELAY
BLM18PG181SN1D(180,1500MA) 1.8V(75mA DPLL_PVDD) C641 0.1U/10V_4
R2SET / NC
AG13 R369 715/F_4 M93-S3--NC
+3V_DELAY
R383 10K/F_4 VGA_ALERT 6
-ALT DXN
3 2200P/50V_4 w/s 10 / 10
PARK-S3--install
+1.8V_VGA
L52 5 4 VGATHRM-
C634 DDC/AUX GND -OVT
C614 C629 AE6 HDMI_SCL 25 G781-1P8@EV
R103 10U/6.3V_8 1U/10V_4 0.1U/10V_4 PLL/CLOCK DDC1CLK -VGATHRM
AE5 HDMI_SDA 25 +3V_DELAY
+1.8V_DPLL_PVDD DDC1DATA R396 10K/F_4
*10K/F_4 AF14
DPLL_PVDD I2C ADDRESS: 9AH
AE14 AD2
DPLL_PVSS AUX1P
AD4
AUX1N
TESTEN +1.0V_VGA L60 BLM18PG181SN1D(180,1500MA) +1.0V_DPLL_VDDC AD14 AC11
TESTEN 21 DPLL_VDDC DDC2CLK
AC13
C640 C643 C275 DDC2DATA
1.0V(125mA DPLL_VDDC)
10U/6.3V_8 1U/10V_4 0.1U/10V_4 EVGA-XTALI AM28 AD13
R165 EVGA-XTALO XTALIN AUX2P
AK28 AD11
R195 *0_4/S AC22 XTALOUT AUX2N
10K/F_4 SI , add R103 , remove R165 NC#2/XO_IN
SI , reserve R321 , R331 for MUXLESS
R196 *0_4/S AB22 AE16
from AMD update NC#1/XO_IN2 DDCCLK_AUX5P
AD16
DDCDATA_AUX5N
PV,change to short pad
PBY160808T-121Y-N(120,2.5A) 1.8V(20mA TSVDD) AC1 DDCCLK_EXT R321 *0_4 DDCCLK 10,24
VGATHRM+ DDC6CLK DDCDATA_EXT R331 *0_4
PV,change to pull low +1.8V_VGA T4
DPLUS DDC6DATA
AC3 DDCDATA 10,24
for delete workaround L57 VGATHRM- T2 THERMAL
DMINUS
AD20
C638 C646 C261 NC/DDCCLK_AUX3P
A AC20 A
NC/DDCDATA_AUX3N
R5
10U/6.3V_8 1U/10V_4 0.1U/10V_4 +1.8V_TSVDD TS_FDO
AD17
TSVDD
AC17
TSVSS
R126 *10K/F_4 LVDS_BLON

+3V_DELAY
R417 *10K/F_4 GPIO_23_CLKREQb

+3V_DELAY
PV,add it from AMD nda update

PARK-S3
PROJECT : AX2/7
EXT_LVDS_BLON R236 10K/F_4
If no contact this pin to LVDS Quanta Computer Inc.
need pull low
Custom 1A
PARK_Main
NB5/RD2
5 4 3 2 1
5 4 3 2 1
AA27
AB24
U24E
PCIE_VSS#1 GND#1 A3
A30
U24F
LVDS CONTROL
SI, R119,R381 change to
reserve only for MUXLESS
AB11
R378
*0_4
10K/F_4
R381
19
PCIE_VSS#2 GND#2 VARY_BL DPST_PWM 10,23
AB32 AA13 AB12 *0_4 R119 RECOMMENDED SETTINGS
AC24
PCIE_VSS#3
PCIE_VSS#4
GND#3 / EVDDQ#2
GND#4 AA16
DIGON DISP_ON 10,23 CONFIGURATION STRAPS 0= DO NOT INSTALL RESISTOR
1 = INSTALL 10K RESISTOR
AC26
AC27
PCIE_VSS#5
PCIE_VSS#6
GND#5
GND#6 / EVDDQ#3
AB10
AB15
Close CONN ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, X = DESIGN DEPENDANT
AD25 AB6 NA = NOT APPLICABLE
PCIE_VSS#7 GND#7 THEY MUST NOT CONFLICT DURING RESET
D
AD32 PCIE_VSS#8 GND#8 AC9 TXCLK_UP_DPF3P AH20 EXT_TXUCLKOUT+ 23 D
AE27 PCIE_VSS#9 GND#9 AD6 TXCLK_UN_DPF3N AJ19 EXT_TXUCLKOUT- 23
AF32 PCIE_VSS#10 GND#10 AD8
AG27 AE7 AL21 STRAPS PIN DESCRIPTION OF DEFAULT SETTINGS
PCIE_VSS#11 GND#11 TXOUT_U0P_DPF2P EXT_TXUOUT0+ 23
AH32 PCIE_VSS#12 GND#12 AG12 TXOUT_U0N_DPF2N AK20 EXT_TXUOUT0- 23
K28 PCIE_VSS#13 GND#13 AH10 Transmitter Power Savings Enable
K32 AH28 AH22 TX_PWRS_ENB GPIO0
L27
PCIE_VSS#14
PCIE_VSS#15
GND#14
GND#15 B10
TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N AJ21
EXT_TXUOUT1+ 23
EXT_TXUOUT1- 23
0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop) 1
M32 PCIE_VSS#16 GND#16 B12
N25 B14 AL23 PCI Express Transmitter De-emphasis Enable
PCIE_VSS#17 GND#17 TXOUT_U2P_DPF0P EXT_TXUOUT2+ 23
N27 B16 AK22 TX_DEEMPH_EN GPIO1
P25
PCIE_VSS#18
PCIE_VSS#19
GND#18
GND#19 B18
TXOUT_U2N_DPF0N EXT_TXUOUT2- 23 0: Tx de-emphasis disabled for mobile mode
1: Tx de-emphasis enabled (Default setting for Desktop) 1
P32 PCIE_VSS#20 GND#20 B20 TXOUT_U3P AK24
R27 B22 AJ23 Enable CLKREQ# Power Management
PCIE_VSS#21 GND#21 TXOUT_U3N BIF_GEN2_EN_A GPIO2 0 - CLKREQ# power management capability is disabled
T25 B24
T32
PCIE_VSS#22
PCIE_VSS#23
GND#22
GND#23 B26 1 - CLKREQ# power management capability is enabled 0
U25 B6 LVTMDP
PCIE_VSS#24 GND#24
U27 PCIE_VSS#25 GND#25 B8
V32 C1 AL15 RSVD GPIO8 0
PCIE_VSS#26 GND#26 TXCLK_LP_DPE3P EXT_TXLCLKOUT+ 23
W 25 C32 AK14 BIF_VGA_DIS GPIO9 VGA ENABLED 0
PCIE_VSS#27 GND#27 TXCLK_LN_DPE3N EXT_TXLCLKOUT- 23
W 26 E28 RSVD GPIO21 0
PCIE_VSS#28 GND#28
W 27 PCIE_VSS#29 GND#29 F10 TXOUT_L0P_DPE2P AH16 EXT_TXLOUT0+ 23
Y25 F12 AJ15 BIOS_ROM_EN GPIO_22_ROMCSB ENABLE EXTERNAL BIOS ROM 0
PCIE_VSS#30 GND#30 TXOUT_L0N_DPE2N EXT_TXLOUT0- 23
Y32 PCIE_VSS#31 GND#31 F14
F16 AL17 ROMIDCFG(2:0) GPIO[13:11] SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT 0 0 1
GND#32 TXOUT_L1P_DPE1P EXT_TXLOUT1+ 23
GND#33 F18 TXOUT_L1N_DPE1N AK16 EXT_TXLOUT1- 23
F2 VIP_DEVICE_STRAP_ENA V2SYNC IGNORE VIP DEVICE STRAPS 0
GND#34
GND#35 F20 TXOUT_L2P_DPE0P AH18 EXT_TXLOUT2+ 23
M6 GND#56 GND#36 F22 TXOUT_L2N_DPE0N AJ17 EXT_TXLOUT2- 23 0
N11 F24 RSVD GENERICC 0
GND#57 GND#37 AUD[1] HSYNC AUD[1] AUD[0]
C N12 GND#58 GND#38 F26 TXOUT_L3P AL19 11 C
N13 F6 AK18 AUD[0] VSYNC 0 0 No audio function
GND#59 GND#39 TXOUT_L3N 0 1 Audio for DisplayPort and HDMI if dongle is detected
N16 F8
N18
N21
GND#60
GND#61
GND#62
GND GND#40
GND#41
GND#42
G10
G27
1 0 Audio for DisplayPort only
1 1 Audio for both DisplayPort and HDMI
P6 GND#63 GND#43 G31
P9 G8 PARK-S3
GND#64 GND#44
R12 GND#65 GND#45 H14
R15 GND#66 GND#46 H17
R17 GND#67 GND#47 H2
R20 GND#68 GND#48 H20
T13 GND#69 GND#49 H6
T16 J27
T18
GND#70
GND#71
GND#50
GND#51 J31 +3V_DELAY AMD RESERVED CONFIGURATION STRAPS
T21 GND#72 GND#52 K11
T6 GND#73 GND#53 K2 ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
U15 GND#74 GND#54 K22
U17 K6 18 GPIO9
GPIO9 R399 *10K/F_4 THEY MUST NOT CONFLICT DURING RESET
GND#75 GND#55
U20 GND#76 GND#85 T11
U9 R11 GPIO13 R400 *10K/F_4
GND#77 GND#86 18 GPIO13
V13 H2SYNC GENERICC
GND#78 GPIO12 R420 *10K/F_4
V16 GND#79 18 GPIO12
V18 GND#80
Y10 GPIO11 R421 10K/F_4 PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
GND#81 18 GPIO11
Y15 GND#82
Y17 GND#83 VSS_MECH#1 A32 THEY MUST NOT CONFLICT DURING RESET
Y20 GND#84 VSS_MECH#2 AM1
VSS_MECH#3 AM32
GPIO21_BB_EN
B B
PARK-S3
+3V_DELAY
Power Up/Down Sequence Memory Aperture size

GPIO0 R397 *10K/F_4
GPIO9 GPIO13 GPIO12 GPIO11 18 GPIO0
GPIO1 R388 *10K/F_4
18 GPIO1
BIOSROM ROMIDCFG2 ROMIDCFG1 ROMIDCFG0 GPIO2 R389 *10K/F_4
18 GPIO2
0 128M 0 0 0 18 GPIO8 GPIO8 R394 *10K/F_4
+VGA_CORE VDDC
0 256M 0 0 1
0 64M 0 1 0 18 GENERICC R122 *10K/F_4
+VGA_CORE VDDCI R366 10K/F_4
0 32M 0 1 1 18 DAC2_VSY
R375 10K/F_4
18 DAC2_HSY
+1.5V_VGA VDDR1 0 512M 1 0 0 18 GPIO22

GPIO22 R153 *10K/F_4
GPIO5 R415 10K/F_4

A 0 1G 1 0 1 18 GPIO5
A
+3.3V_Delay VDDR3
0 2G 1 1 0
+1.8V_VGA VDDR4 0 4G 1 1 1 PROJECT : AX2/7
+1.8V_VGA VDD_CT
It is a shared pin strap with CONFIG[2:0] if BIOS_ROM_EN is set to 0.
20ms 20ms Size Document Number Rev
Custom 1A
PARK_GND / LVDS/ Straps
NB5/RD2
5 4
3 2 1
5 4 3 2 1
1.5V ( DDR3, MVDDQ = 1.5V@2.0A)

U24D
MEM I/O
PCIE
PCIE_VDDR--PCI-E I/O power. 1.8 V ± 5%
+1.8V_PCIE_VDDR
1.8V(500mA)
PV , change to
0603 part
20
PBY160808T-221Y-N(220,2A)
+1.5V_VGA
H13 AB23 +1.8V_PCIE_VDDR L25
VDDR1#1 PCIE_VDDR#1 +1.8V_VGA
H16 VDDR1#2 PCIE_VDDR#2 AC23
H19 VDDR1#3 PCIE_VDDR#3 AD24
C436 C375 C362 C373 C366 C376 J10 AE24 C293 C264 C217 C201 C200 C269 C202 C221
2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 VDDR1#4 PCIE_VDDR#4 0.1U/10V_4 0.1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3V_6
J23 VDDR1#5 PCIE_VDDR#5 AE25
D
J24 VDDR1#6 PCIE_VDDR#6 AE26 D
J9 VDDR1#7 PCIE_VDDR#7 AF25
K10 VDDR1#8 PCIE_VDDR#8 AG26
K23 VDDR1#9
K24 +1.0V_VGA
VDDR1#10
K9 VDDR1#11 PCIE_VDDC#1 L23
C750 C736 C441 C445 C449 C384 C369 C381 C377 C433 L11 L24 +1.0V_PCIE_VDDC PBY201209T-221Y-N(220,2A)
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 VDDR1#12 PCIE_VDDC#2
10U/6.3V_6S 10U/6.3V_6S 10U/6.3V_6S 10U/6.3V_6S 10U/6.3V_6S L12 VDDR1#13 PCIE_VDDC#3 L25 1.0V(2.0A)
L13 L26 +1.0V_PCIE_VDDC L14
VDDR1#14 PCIE_VDDC#4
L20 VDDR1#15 PCIE_VDDC#5 M22
L21 VDDR1#16 PCIE_VDDC#6 N22
L22 N23 C346 C332 C321 C339 C314 C365 C305 C124
+1.8V_VDD_CT VDDR1#17 PCIE_VDDC#7 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3V_6
1.8V(110mA VDD_CT) PCIE_VDDC#8 N24
PCIE_VDDC#9 R22
L22 PBY160808T-121Y-N(120,2.5A) +1.8V_VDD_CT T22
+1.8V_VGA LEVEL PCIE_VDDC#10
PCIE_VDDC#11 U22
TRANSLATION V22
C193 C208 C294 C285 C307 PCIE_VDDC#12 +VGA_CORE
Gated 3.3V AA20 VDD_CT#1 VDDC+VDDCI
60mA by R23 0_4 10U/6.3V_6 1U/10V_4 1U/10V_4 1U/10V_4 0.1U/10V_4 AA21 0.85~1.1V(15A peak )( Ripple < 87.2mV)
VDD_CT#2
VDDC AB20 VDD_CT#3 VDDC#1 AA15
+3V_DELAY AB21 CORE N15
VDD_CT#4 VDDC#2
VDDC#3 N17
+3V_VGA 1 3 +3V_DELAY M93-S3/M92-S2 R13 C598 C600 C344 C342 C330 C110 C322 C331 C595
VDDC#4
POWER
R16 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3V_6
VDDC#5
VDD_R3 --IO power for AA17 VDDR3#1 VDDC#6 R18
3.3 V pins (e.g. Q4 *AO3409 C281 C290 C295 C274 AA18 I/O Y21
2
R21 1U/10V_4 1U/10V_4 1U/10V_4 VDDR3#2 VDDC#7

GPIO’s). 3.3 V ± 5% 10U/6.3V_6 AB17 T12
*100K/F_4 VDDR3#3 VDDC#8
AB18 VDDR3#4 VDDC#9 T15
VDDC#10 T17
V12 VDDR4#1 / VDDR5 VDDC#11 T20
C Y12 U13 C596 C333 C599 C348 C597 C312 C315 C
+VDDR4 VDDR4#2 VDDC#12 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4
U12 VDDR4#3 / VDDR5 VDDC#13 U16
VDDC#14 U18
+1.8V_VGA L26 +VDDR4 AA11 V21
C306 NC#1 / VDDR4 VDDC#15
Y11 DVCLK / VDDR4 VDDC#16 V15
PBY160808T-121Y-N(120,2.5A) C243 C253 V17
10U/6.3V_6 1U/10V_4 0.1U/10V_4 VDDC#17
PV,change from main_on 1.8V(170mA VDDR4) V11 NC#3 / VDDR5 VDDC#18 V20
to VGACOREON U11 NC / VDDR5 VDDC#20 Y13
Y16 C316 C327 C329 C116 C122 C301
D8 *CH501H-40PT L-F VDDC#21 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4
VDDC#22 Y18
1 2 Q3 M93 only PV , reserve for M93 VDDC#23 /BIF_VDDC R21
3
*2N7002E U21
MEM CLK VDDC#19/BIF_VDDC
*MMZ1005D121C(120,0.35A) L48 L17
R15 *68.1K_4 VDDRHA
32,37,38 VGACOREON 2 +1.5V_VGA
C848 L16 ISOLATED
*1U/10V_4 VSSRHA CORE I/O C101 C89 C79 C605 C103 C102
1.8V(40mA PCIE_PVDD) M13 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6
PLL VDDCI#1
M15
1
L61 PBY160808T-121Y-N(120,2.5A) +PCIE_PVDD VDDCI#2

+1.8V_VGA AM30 PCIE_PVDD VDDCI#3 M16
C9 M17
VDDCI#4
VDDCI#5 M18
*0.1U/10V_4 C655 C659 C660 MPV18 L8 M20
10U/6.3V_6 1U/10V_4 0.1U/10V_4 MPV18 VDDCI#6 PBY201209T-121Y-N(120,3A)
+3V_DELAY circuit VDDCI#7 M21 0.95V~1.1V(2A VDDCI)
N20 +VDDCI L64
VDDCI#8 +VGA_CORE
1.0V_VGA(100mA SPV10) SPV18 H7 SPV18
L29 PBY160808T-121Y-N(120,2.5A) +1.0V_VGA_SPV10 H8 C361 C355 C349 C300 C680 C313
+1.0V_VGA SPV10 1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6
B
1.8V(75mA MPV18) J7 SPVSS B
C350 C378 C371
L69 BLM18PG181SN1D(180,1500MA) MPV18 10U/6.3V_6 0.1U/10V_4 1U/10V_4
+1.8V_VGA
BACK BIAS
C715 C714 L28 M11
+VGA_CORE BBP#1
1U/10V_4 0.1U/10V_4 M12
BLM18PG181SN1D(180,1.5A)_6 C351 BBP#2
C359
1U/10V_4 0.1U/10V_4
1.8V(90mA SPV18) PARK-S3
VDDCI--Isolated (clean) VDDC--Dedicated core
L27 PBY160808T-121Y-N(120,2.5A) SPV18 core power for the l/O power, provides power
+1.8V_VGA
logic. Voltage level to the internal
C326 C325 should match that of logic. 0.9 V - 1.2 V
1U/10V_4 0.1U/10V_4 VDDC. POWER Same as VDDC (± 5%)
M93-S3--NC
PARK-S3--install
PCIE_VDDC--PCI-E
Digital Power
VDDRH_1 & VDDRH_2 --Dedicated power Supply (Either 1.0
pins for memory clock pads for each V or 1.1 V) 1.0 V
channel. Should have the same -5% to 1.1 V +5%
voltage level as VDDR1.
A A
PROJECT : AX2/7
Custom 1A
PARK_Power_and_NC
NB5/RD2
5 4 3
5 4 3 2 1
22
22
22
VMA_ODT0
VMA_ODT1
VMA_RAS0#
VMA_ODT0
VMA_ODT1
VMA_RAS0#
VMA_RAS1#
VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
K27
J29
H30
H32
U24C
DQA_0
DQA_1
DQA_2
MAA_0
MAA_1
MAA_2
K17
J20
H23
G23
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
21
22 VMA_RAS1# DQA_3 MAA_3
VMA_DQ4 G29 G24 VMA_MA4
VMA_CAS0# VMA_DQ5 DQA_4 MAA_4 VMA_MA5
22 VMA_CAS0# F28 DQA_5 MAA_5 H24
22 VMA_CAS1# VMA_CAS1# VMA_DQ6 F32 J19 VMA_MA6
VMA_DQ7 DQA_6 MAA_6 VMA_MA7
MEMORY INTERFACE
F30 DQA_7 MAA_7 K19
22 VMA_WE0# VMA_WE0# VMA_DQ8 C30 J14 VMA_MA8
VMA_WE1# VMA_DQ9 DQA_8 MAA_8 VMA_MA9
D 22 VMA_WE1# F27 DQA_9 MAA_9 K14 D
VMA_DQ10 A28 J11 VMA_MA10
VMA_CS0# VMA_DQ11 DQA_10 MAA_10 VMA_MA11
22 VMA_CS0# C28 DQA_11 MAA_11 J13
VMA_DQ12 E27 H11 VMA_MA12
VMA_CS1# VMA_DQ13 DQA_12 MAA_12 VMA_BA2
22 VMA_CS1# G26 DQA_13 MAA_13/BA2 G11
VMA_DQ14 D26 J16 VMA_BA0
VMA_CKE0 VMA_DQ15 DQA_14 MAA_14/BA0 VMA_BA1
F25 L15
22
22
VMA_CKE0
VMA_CKE1 VMA_CKE1 VMA_DQ16 A25
DQA_15
DQA_16
MAA_15/BA1 Designator M9X-S2 and M93-S3 Park-S3
VMA_DQ17 C25 E32 VMA_DM0
VMA_CLK0 VMA_DQ18 DQA_17 DQMA_0 VMA_DM1
E25 E30
22
22
VMA_CLK0
VMA_CLK0# VMA_CLK0# VMA_DQ19 D24
DQA_18
DQA_19
DQMA_1
DQMA_2 A21 VMA_DM2 Ra DNI 10K
VMA_DQ20 E23 C21 VMA_DM3
VMA_CLK1 VMA_DQ21 DQA_20 DQMA_3 VMA_DM4
22 VMA_CLK1 F23 DQA_21 DQMA_4 E13
VMA_CLK1# VMA_DQ22 D22 D12 VMA_DM5
22 VMA_CLK1#
VMA_DQ23 F21
DQA_22
DQA_23
DQMA_5
DQMA_6 E3 VMA_DM6 Rb 0R/Short 51R
VMA_WDQS[7..0] VMA_DQ24 E21 F4 VMA_DM7
22 VMA_WDQS[7..0] DQA_24 DQMA_7
VMA_DQ25 D20
VMA_RDQS[7..0] VMA_DQ26 DQA_25 VMA_RDQS0
F19 H28
22 VMA_RDQS[7..0]
VMA_DQ27 A19
DQA_26
DQA_27
RDQSA_0
RDQSA_1 C27 VMA_RDQS1 Rc 2.2K DNI
VMA_DM[7..0] VMA_DQ28 D18 A23 VMA_RDQS2
22 VMA_DM[7..0] DQA_28 RDQSA_2
VMA_DQ29 F17 E19 VMA_RDQS3
VMA_DQ[63..0] VMA_DQ30 DQA_29 RDQSA_3 VMA_RDQS4
A17 E15
22 VMA_DQ[63..0]
VMA_DQ31 C17
DQA_30
DQA_31
RDQSA_4
RDQSA_5 D10 VMA_RDQS5 Ca 2.2nF 68pF
VMA_MA[13..0] VMA_DQ32 E17 D6 VMA_RDQS6
22 VMA_MA[13..0] DQA_32 RDQSA_6
VMA_DQ33 D16 G5 VMA_RDQS7
VMA_DQ34 DQA_33 RDQSA_7
F15 DQA_34
22 VMA_BA0 VMA_BA0 VMA_DQ35 A15 H27 VMA_WDQS0
VMA_BA1 VMA_DQ36 DQA_35 W DQSA_0 VMA_WDQS1
22 VMA_BA1 D14 DQA_36 W DQSA_1 A27
VMA_BA2 VMA_DQ37 F13 C23 VMA_WDQS2
22 VMA_BA2 DQA_37 W DQSA_2
VMA_DQ38 A13 C19 VMA_WDQS3
VMA_DQ39 DQA_38 W DQSA_3 VMA_WDQS4
C C13 DQA_39 W DQSA_4 C15 C
support 1Gbit VMA_DQ40 E11 E9 VMA_WDQS5 +1.5V_VGA
VMA_DQ41 DQA_40 W DQSA_5 VMA_WDQS6
VRAM ( 64M X 16 ) A11 DQA_41 W DQSA_6 C5
VMA_DQ42 C11 H4 VMA_WDQS7
VMA_DQ43 DQA_42 W DQSA_7
F11 DQA_43
VMA_DQ44 A9 L18 VMA_ODT0
VMA_DQ45 DQA_44 ODTA0 VMA_ODT1 R221
C9 K16
DIVIDER RESISTORS M93 PARK VMA_DQ46 F9
DQA_45
DQA_46
ODTA1
*2.2K_4
Rc
VMA_DQ47 D8 H26 VMA_CLK0 R202 51/F_4
VMA_DQ48 DQA_47 CLKA0 VMA_CLK0# DRAM_RST DRAM_RST_M
E7 DQA_48 CLKA0B H25 DRAM_RST_M 22
MVREF TO 1.8V (Rd) 100R 40.2R VMA_DQ49 A7
VMA_DQ50 DQA_49 VMA_CLK1
C7 G9
VMA_DQ51 F7
DQA_50
DQA_51
CLKA1
CLKA1B H9 VMA_CLK1# Rb
MVREF TO GND (Re) 100R 100R VMA_DQ52 A5 C437 R194
VMA_DQ53 DQA_52 VMA_RAS0#
E5 G22
VMA_DQ54 C3
DQA_53
DQA_54
RASA0B
RASA1B G17 VMA_RAS1# Ca 68P/50V_4 Ra 10K/F_4
VMA_DQ55 E1
VMA_DQ56 DQA_55 VMA_CAS0#
G7 DQA_56 CASA0B G19
+1.5V_VGA VMA_DQ57 G6 G16 VMA_CAS1# PV , update from AMD
VMA_DQ58 DQA_57 CASA1B
G1 DQA_58 ref136-rev10
VMA_DQ59 G3 H22 VMA_CS0#
VMA_DQ60 DQA_59 CSA0B_0
J6 DQA_60 CSA0B_1 J22
R209 PLACE MVREFD DIVIDERS VMA_DQ61 J1 DQA_61
VMA_DQ62 J3 G13 VMA_CS1#
40.2/F_4
Rd AND CAPS CLOSE TO ASIC
VMA_DQ63 J5
DQA_62 CSA1B_0
K13
DQA_63 CSA1B_1
MVREFD K26 K20 VMA_CKE0
MVREFDA CKEA0 VMA_CKE1
J26 MVREFSA CKEA1 J17
+1.5V_VGA +1.5V_VGA
R430 243/F_4 J25 G25 VMA_WE0#
B
C432 R201 TESTEN R550 0_4 Note 3 K7 MEM_CALRN0 W EA0B VMA_WE1# B
18 TESTEN NC/TESTEN#2 W EA1B H10
0.1U/10V_4 100/F_4
Re R226 R132 150/F_4 Note 2 J8 AB16
Note 1 K25 MEM_CALRP1/DPC_CALR PX_EN
Rd MEM_CALRP0 RSVD#2 G14 For PARK-S3 only
40.2/F_4 R431 243/F_4 G20 R551 0_4 VMA_MA13
PV , reserve for M93 DRAM_RST L10 RSVD#3 For M9X-S2/S3 with
DRAM_RST
MVREFS DDR3: this pin is
CLKTESTA K8 PV,reserve for M93
CLKTESTB L7
CLKTESTA not in use.
CLKTESTB
C442 R215
PARK-S3
0.1U/10V_4 100/F_4
Re
C692 C689
0.1U/10V_4 0.1U/10V_4
R402 R401
R547 R548 51.1/F_4 51.1/F_4
*4.7K_4
*4.7K_4
route 50ohms
PV , reserve for M93
single-ended/100ohms diff
and keep short
A A
For PARK-S3 only
For M93-S3 only
Note 1 :Do not Install for M9X-S2/S3, Install 240 Ohms 0.5% Resistor for PARK-S3.
Note 2 :For M9X-S2/S3,J8 Pin Connect to VSS through 240 Ohms(0.5%) resistor. PROJECT : AX2/7
For Park-S3,J8 Pin Connect to VSS through 150 Ohms(1%) resistor for DPC_CALR
Note 3 :For M9X-92/93, K7 Pin (NC_MEM_CALRP1) is Not connected. Quanta Computer Inc.
For PARK-S3, K7 Pin (TESTEN#2) connect to TEST_EN Signal At AF24
Custom 1A
PARK/MEM_Interface
NB5/RD2
5 4 3
5 4 3 2 1
VMA_MA[13..0]
22
21 VMA_MA[13..0]
512MB DDR3
21 VMA_DQ[63..0]
21 VMA_DM[7..0] 21 VMA_WDQS[7..0]
21 VMA_RDQS[7..0]
U13 U26 U12 U27
VREFC_VMA1 M9 E4 VMA_DQ20 VREFC_VMA2 M9 E4 VMA_DQ27 VREFC_VMA3 M9 E4 VMA_DQ38 VREFC_VMA4 M9 E4 VMA_DQ48

VREFD_VMA1 VREFCA DQL0 VMA_DQ18 VREFD_VMA2 VREFCA DQL0 VMA_DQ31 VREFD_VMA3 VREFCA DQL0 VMA_DQ32 VREFD_VMA4 VREFCA DQL0 VMA_DQ52
H2 F8 H2 F8 H2 F8 H2 F8
VREFDQ DQL1 VMA_DQ22 VREFDQ DQL1 VMA_DQ25 VREFDQ DQL1 VMA_DQ36 VREFDQ DQL1 VMA_DQ53
DQL2 F3 DQL2 F3 DQL2 F3 DQL2 F3
VMA_MA0 N4 F9 VMA_DQ17 VMA_MA0 N4 F9 VMA_DQ29 VMA_MA0 N4 F9 VMA_DQ34 VMA_MA0 N4 F9 VMA_DQ54
VMA_MA1 A0 DQL3 VMA_DQ23 VMA_MA1 A0 DQL3 VMA_DQ30 VMA_MA1 A0 DQL3 VMA_DQ39 VMA_MA1 A0 DQL3 VMA_DQ49
P8 H4 P8 H4 P8 H4 P8 H4
P4 H9 P4 H9 P4 H9 P4 H9
N3 A3 DQL6 G3 N3 A3 DQL6 G3 N3 A3 DQL6 G3 N3 A3 DQL6 G3
VMA_MA4 P9 H8 VMA_DQ19 VMA_MA4 P9 H8 VMA_DQ26 VMA_MA4 P9 H8 VMA_DQ35 VMA_MA4 P9 H8 VMA_DQ55
VMA_MA5 A4 DQL7 VMA_MA5 A4 DQL7 VMA_MA5 A4 DQL7 VMA_MA5 A4 DQL7
P3 A5 P3 A5 P3 A5 P3 A5
D VMA_MA6 VMA_MA6 VMA_MA6 VMA_MA6 D
R9 A6 R9 A6 R9 A6 R9 A6
VMA_MA7 R3 D8 VMA_DQ0 VMA_MA7 R3 D8 VMA_DQ15 VMA_MA7 R3 D8 VMA_DQ43 VMA_MA7 R3 D8 VMA_DQ60
VMA_MA8 A7 DQU0 VMA_DQ5 VMA_MA8 A7 DQU0 VMA_DQ10 VMA_MA8 A7 DQU0 VMA_DQ44 VMA_MA8 A7 DQU0 VMA_DQ58
T9 A8 DQU1 C4 T9 A8 DQU1 C4 T9 A8 DQU1 C4 T9 A8 DQU1 C4
VMA_MA9 R4 C9 VMA_DQ1 VMA_MA9 R4 C9 VMA_DQ13 VMA_MA9 R4 C9 VMA_DQ40 VMA_MA9 R4 C9 VMA_DQ63
VMA_MA10 A9 DQU2 VMA_DQ4 VMA_MA10 A9 DQU2 VMA_DQ9 VMA_MA10 A9 DQU2 VMA_DQ47 VMA_MA10 A9 DQU2 VMA_DQ56
L8 C3 L8 C3 L8 C3 L8 C3
VMA_MA11 A10/AP DQU3 VMA_DQ2 VMA_MA11 A10/AP DQU3 VMA_DQ12 VMA_MA11 A10/AP DQU3 VMA_DQ42 VMA_MA11 A10/AP DQU3 VMA_DQ61
R8 A11 DQU4 A8 R8 A11 DQU4 A8 R8 A11 DQU4 A8 R8 A11 DQU4 A8
VMA_MA12 N8 A3 VMA_DQ7 VMA_MA12 N8 A3 VMA_DQ8 VMA_MA12 N8 A3 VMA_DQ45 VMA_MA12 N8 A3 VMA_DQ57
VMA_MA13 A12/BC DQU5 VMA_DQ3 VMA_MA13 A12/BC DQU5 VMA_DQ14 VMA_MA13 A12/BC DQU5 VMA_DQ41 VMA_MA13 A12/BC DQU5 VMA_DQ62
T4 A13 DQU6 B9 T4 A13 DQU6 B9 T4 A13 DQU6 B9 T4 A13 DQU6 B9
T8 A4 VMA_DQ6 T8 A4 VMA_DQ11 T8 A4 VMA_DQ46 T8 A4 VMA_DQ59
A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M8 M8 M8 M8
A15/BA3 +1.5V_VGA A15/BA3 +1.5V_VGA A15/BA3 +1.5V_VGA A15/BA3 +1.5V_VGA
M3 B3 VMA_BA0 M3 B3 VMA_BA0 M3 B3 VMA_BA0 M3 B3

21 VMA_BA0 BA0 VDD#B3 BA0 VDD#B3 BA0 VDD#B3 BA0 VDD#B3
N9 D10 VMA_BA1 N9 D10 VMA_BA1 N9 D10 VMA_BA1 N9 D10
21 VMA_BA1 BA1 VDD#D10 VMA_BA2 BA1 VDD#D10 VMA_BA2 BA1 VDD#D10 VMA_BA2 BA1 VDD#D10
21 VMA_BA2 M4 G8 M4 G8 M4 G8 M4 G8
BA2 VDD#G8 BA2 VDD#G8 BA2 VDD#G8 BA2 VDD#G8
K3 K3 K3 K3
VDD#K3 VDD#K3 VDD#K3 VDD#K3
VDD#K9 K9 VDD#K9 K9 VDD#K9 K9 VDD#K9 K9
N2 N2 N2 N2
VDD#N2 VMA_CLK0 VDD#N2 VDD#N2 VMA_CLK1 VDD#N2
21 VMA_CLK0 J8 CK VDD#N10 N10 J8 CK VDD#N10 N10 21 VMA_CLK1 J8 CK VDD#N10 N10 J8 CK VDD#N10 N10
K8 R2 VMA_CLK0# K8 R2 K8 R2 VMA_CLK1# K8 R2
21 VMA_CLK0# CK VDD#R2 CK VDD#R2 21 VMA_CLK1# CK VDD#R2 CK VDD#R2
K10 R10 VMA_CKE0 K10 R10 K10 R10 VMA_CKE1 K10 R10
21 VMA_CKE0 CKE/CKE0 VDD#R10 +1.5V_VGA CKE/CKE0 VDD#R10 +1.5V_VGA 21 VMA_CKE1 CKE/CKE0 VDD#R10 +1.5V_VGA CKE/CKE0 VDD#R10 +1.5V_VGA
K2 A2 VMA_ODT0 K2 A2 K2 A2 VMA_ODT1 K2 A2
21 VMA_ODT0 ODT/ODT0 VDDQ#A2 VMA_CS0# ODT/ODT0 VDDQ#A2 21 VMA_ODT1 ODT/ODT0 VDDQ#A2 VMA_CS1# ODT/ODT0 VDDQ#A2
21 VMA_CS0# L3 A9 L3 A9 21 VMA_CS1# L3 A9 L3 A9
CS /CS0 VDDQ#A9 VMA_RAS0# CS /CS0 VDDQ#A9 CS /CS0 VDDQ#A9 VMA_RAS1# CS /CS0 VDDQ#A9
21 VMA_RAS0# J4 RAS VDDQ#C2 C2 J4 RAS VDDQ#C2 C2 21 VMA_RAS1# J4 RAS VDDQ#C2 C2 J4 RAS VDDQ#C2 C2
K4 C10 VMA_CAS0# K4 C10 K4 C10 VMA_CAS1# K4 C10
21 VMA_CAS0# CAS VDDQ#C10 VMA_WE0# CAS VDDQ#C10 21 VMA_CAS1# CAS VDDQ#C10 VMA_WE1# CAS VDDQ#C10
21 VMA_WE0# L4 D3 L4 D3 21 VMA_WE1# L4 D3 L4 D3
WE VDDQ#D3 WE VDDQ#D3 WE VDDQ#D3 WE VDDQ#D3
VDDQ#E10 E10 VDDQ#E10 E10 VDDQ#E10 E10 VDDQ#E10 E10
VDDQ#F2 F2 VDDQ#F2 F2 VDDQ#F2 F2 VDDQ#F2 F2
VMA_RDQS2 F4 H3 VMA_RDQS3 F4 H3 VMA_RDQS4 F4 H3 VMA_RDQS6 F4 H3
VMA_RDQS0 DQSL VDDQ#H3 VMA_RDQS1 DQSL VDDQ#H3 VMA_RDQS5 DQSL VDDQ#H3 VMA_RDQS7 DQSL VDDQ#H3
C8 H10 C8 H10 C8 H10 C8 H10
C DQSU VDDQ#H10 DQSU VDDQ#H10 DQSU VDDQ#H10 DQSU VDDQ#H10 C
VMA_DM2 E8 A10 VMA_DM3 E8 A10 VMA_DM4 E8 A10 VMA_DM6 E8 A10

VMA_DM0 DML VSS#A10 VMA_DM1 DML VSS#A10 VMA_DM5 DML VSS#A10 VMA_DM7 DML VSS#A10
D4 DMU VSS#B4 B4 D4 DMU VSS#B4 B4 D4 DMU VSS#B4 B4 D4 DMU VSS#B4 B4
VSS#E2 E2 VSS#E2 E2 VSS#E2 E2 VSS#E2 E2
G9 G9 G9 G9
VMA_WDQS2 VSS#G9 VMA_WDQS3 VSS#G9 VMA_WDQS4 VSS#G9 VMA_WDQS6 VSS#G9
G4 DQSL VSS#J3 J3 G4 DQSL VSS#J3 J3 G4 DQSL VSS#J3 J3 G4 DQSL VSS#J3 J3
VMA_WDQS0 B8 J9 VMA_WDQS1 B8 J9 VMA_WDQS5 B8 J9 VMA_WDQS7 B8 J9
DQSU VSS#J9 DQSU VSS#J9 DQSU VSS#J9 DQSU VSS#J9
VSS#M2 M2 VSS#M2 M2 VSS#M2 M2 VSS#M2 M2
M10 M10 M10 M10
VSS#M10 VSS#M10 VSS#M10 VSS#M10
VSS#P2 P2 VSS#P2 P2 VSS#P2 P2 VSS#P2 P2
T3 P10 DRAM_RST_M T3 P10 DRAM_RST_M T3 P10 DRAM_RST_M T3 P10
21 DRAM_RST_M RESET VSS#P10 RESET VSS#P10 RESET VSS#P10 RESET VSS#P10
VSS#T2 T2 VSS#T2 T2 VSS#T2 T2 VSS#T2 T2
VMA_ZQ1 L9 T10 VMA_ZQ2 L9 T10 VMA_ZQ3 L9 T10 VMA_ZQ4 L9 T10
ZQ/ZQ0 VSS#T10 ZQ/ZQ0 VSS#T10 ZQ/ZQ0 VSS#T10 ZQ/ZQ0 VSS#T10
Should be 240 Should be 240 Should be 240 Should be 240
Ohms +-1% A1 B2 Ohms +-1% A1 B2 Ohms +-1% A1 B2 Ohms +-1% A1 B2
NC VSSQ#B2 NC VSSQ#B2 NC VSSQ#B2 NC VSSQ#B2
T1 B10 T1 B10 T1 B10 T1 B10
R223 NC VSSQ#B10 R435 NC VSSQ#B10 R210 NC VSSQ#B10 R432 NC VSSQ#B10
A11 D2 A11 D2 A11 D2 A11 D2
NC VSSQ#D2 NC VSSQ#D2 NC VSSQ#D2 NC VSSQ#D2
243/F_4 T11 NC VSSQ#D9 D9 243/F_4 T11 NC VSSQ#D9 D9 243/F_4 T11 NC VSSQ#D9 D9 243/F_4 T11 NC VSSQ#D9 D9
E3 E3 E3 E3
VSSQ#E3 VSSQ#E3 VSSQ#E3 VSSQ#E3
J2 E9 J2 E9 J2 E9 J2 E9
NC/ODT1 VSSQ#E9 NC/ODT1 VSSQ#E9 NC/ODT1 VSSQ#E9 NC/ODT1 VSSQ#E9
L2 F10 L2 F10 L2 F10 L2 F10
NC/CS1 VSSQ#F10 NC/CS1 VSSQ#F10 NC/CS1 VSSQ#F10 NC/CS1 VSSQ#F10
J10 G2 J10 G2 J10 G2 J10 G2
NC/CE1 VSSQ#G2 NC/CE1 VSSQ#G2 NC/CE1 VSSQ#G2 NC/CE1 VSSQ#G2
L10 G10 L10 G10 L10 G10 L10 G10
NC/ZQ1 VSSQ#G10 NC/ZQ1 VSSQ#G10 NC/ZQ1 VSSQ#G10 NC/ZQ1 VSSQ#G10
100-BALL 100-BALL 100-BALL 100-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
K4W1G1646E-HC12 K4W1G1646E-HC12 K4W1G1646E-HC12 K4W1G1646E-HC12
+1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA +1.5V_VGA

B B
R439 R188 R437 R191 R231 R216 R434 R429

4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4
VREFC_VMA1 VREFD_VMA1 VREFC_VMA2 VREFD_VMA2 VREFC_VMA3 VREFD_VMA3 VREFC_VMA4 VREFD_VMA4
R438 R192 R440 R197 R230 R227 R436 R433

4.99K/F_4 C738 4.99K/F_4 C434 4.99K/F_4 C744 4.99K/F_4 C727 4.99K/F_4 C447 4.99K/F_4 C443 4.99K/F_4 C734 4.99K/F_4 C726
.1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4
VMA_CLK0 +1.5V_VGA +1.5V_VGA
R206
56.2/F_4
C429 C430 C456 C444 C438 C428 C425 C747 C721 C719 C745 C424 C748 C739 C718 C716
C440
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
VMA_CLK0_COMM
R213 .01U/16V_4 +1.5V_VGA +1.5V_VGA QCI PN

56.2/F_4
SAMSUNG AKD5LGGT502
VMA_CLK0#
A VMA_CLK1 C751 C749 C741 C448 C451 C454 C742 C746 C724 C722 C720 C729 C730 C735 C446 C450 A
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
HYNIX AKD5LZGTW00
R199
56.2/F_4
+1.5V_VGA +1.5V_VGA
C431
VMA_CLK1_COMM
PROJECT : AX2/7
R208 .01U/16V_4 C743 C723 C459 C461 C458 C725 C737 C740 C728 C457 C460 C452
56.2/F_4 10U/6.3V_6S 10U/6.3V_6S 10U/6.3V_6S 10U/6.3V_6S 10U/6.3V_6S 10U/6.3V_6S 10U/6.3V_6S 10U/6.3V_6S 10U/6.3V_6S 10U/6.3V_6S 10U/6.3V_6S 10U/6.3V_6S
Custom PARK VRAM(DDR3 BGA96) 3A
VMA_CLK1# NB5/RD2
5 4 3 2 1
1 2 3 4 5 6 7 8
1. If LCD connector near GPU, then place these series Resistors near GPU
2. If LCD connector near N/B, then place these series Resistors near N/B
10 LA_CLK
OPTION SIGNAL FROM NB to LVDS for UMA
LA_CLK
LA_CLK#
RP1 3
1
4
2
0_4P2R_4 TXLCLKOUT+
TXLCLKOUT- L11 UPB201209T-330Y-N(5A)
+VIN_BLIGHT
R36
+15VALW
AO3404 ID
C28
0.1U/10V_4
+3V
23
10 LA_CLK# +VIN
LA_DATAP0 RP2 3 4 0_4P2R_4 TXLOUT0+ current
10 LA_DATAP0
LA_DATAN0 1 2 TXLOUT0- +5V 330K_6 5.8A
10 LA_DATAN0
3
LA_DATAP1 RP3 3 4 0_4P2R_4 TXLOUT1+ C65 C73 C75 C82 C72 N-MOS,5.8A
10 LA_DATAP1
LA_DATAN1 1 2 TXLOUT1- 0.1U/50V_6 0.01U/50V_4 0.1U/50V_6 *10U/25V_12 0.1U/50V_6 Q8 +3VLCD
10 LA_DATAN1
LA_DATAP2 RP5 3 4 0_4P2R_4 TXLOUT2+ AO3404
10 LA_DATAP2
LA_DATAN2 1 2 TXLOUT2- LCDONG 2
A 10 LA_DATAN2 A
10 LB_CLK LB_CLK RP6 3 4 0_4P2R_4 TXUCLKOUT+ R31
3
10 LB_CLK# LB_CLK# 1 2 TXUCLKOUT- R32
LB_DATAP0 RP7 3 4 0_4P2R_4 TXUOUT0+ 100K/F_4
10 LB_DATAP0
1
LB_DATAN0 1 2 TXUOUT0- 22_8
10 LB_DATAN0
LB_DATAP1 RP8 3 4 0_4P2R_4 TXUOUT1+ L4 +3VLCD_CON 2
10 LB_DATAP1 +3VLCD
1
LB_DATAN1 1 2 TXUOUT1- PBY201209T-4A_8
10 LB_DATAN1
LB_DATAN2 RP4 1 2 0_4P2R_4 TXUOUT2- C22 1 2 10U/6.3V_8 Q5 Q7 C27 LCDDISCHG
10 LB_DATAN2
3
LB_DATAP2 3 4 TXUOUT2+ PDTC144EU 2N7002E 0.1U/10V_4
10 LB_DATAP2
2
C21 1 2 0.1U/10V_4
3
10,19 DISP_ON 2
SI, new option C15 1 2 0.01U/16V_4
OPTION SIGNAL FROM PARK to LVDS for discrete for MUXLESS
SI , add C21 from EMI suggest LCDON# Q6
2
1
19 EXT_TXLCLKOUT- EXT_TXLCLKOUT- RP27 3 4 *0_4P2R_4 TXLCLKOUT- R25 2N7002E
19 EXT_TXLCLKOUT+ EXT_TXLCLKOUT+ 1 2 TXLCLKOUT+ 2.2K_4
EXT_TXLOUT0- RP28 3 4 *0_4P2R_4 TXLOUT0-
19 EXT_TXLOUT0-
EXT_TXLOUT0+ 1 2 TXLOUT0+
19 EXT_TXLOUT0+
1
EXT_TXLOUT1- RP29 3 4 *0_4P2R_4 TXLOUT1-
19 EXT_TXLOUT1-
EXT_TXLOUT1+ 1 2 TXLOUT1+
19 EXT_TXLOUT1+
EXT_TXLOUT2+ RP33 1 2 *0_4P2R_4 TXLOUT2+
19 EXT_TXLOUT2+
EXT_TXLOUT2- 3 4 TXLOUT2-
19 EXT_TXLOUT2-
+3V R33 4.7K_4 EDIDCLK
EXT_TXUCLKOUT- RP32 3 4 *0_4P2R_4 TXUCLKOUT-
19 EXT_TXUCLKOUT-
19 EXT_TXUCLKOUT+ EXT_TXUCLKOUT+ 1 2 TXUCLKOUT+ R37 4.7K_4 EDIDDATA
EXT_TXUOUT0+ RP35 1 2 *0_4P2R_4 TXUOUT0+ SI, R34,R35 change to
G_0
19 EXT_TXUOUT0+
EXT_TXUOUT0- 3 4 TXUOUT0- reserve only and add +3VLCD_CON
19 EXT_TXUOUT0- 1
EXT_TXUOUT1- RP34 3 4 *0_4P2R_4 TXUOUT1- +3V_DELAY R34 *4.7K_4 EDIDCLK
19 EXT_TXUOUT1- R33,R37 for MUXLESS 2
EXT_TXUOUT1+ 1 2 TXUOUT1+
19 EXT_TXUOUT1+ 3
B EXT_TXUOUT2- RP31 3 4 *0_4P2R_4 TXUOUT2- R35 *4.7K_4 EDIDDATA +3V B
19 EXT_TXUOUT2- 4
EXT_TXUOUT2+ 1 2 TXUOUT2+ 10,18 EDIDCLK EDIDCLK
19 EXT_TXUOUT2+ 5
10,18 EDIDDATA 6
C24 TXLOUT0- 7
TXLOUT0+ 8
1000P/50V_4 9
R38 *0_4
32 EMU_LID 10 G_1
TXLOUT1-
D10 CH501H-40PT TXLOUT1+ 11
PN_BLON BLONCON C44 22P/50V_4 12
2 1 13
+3V TXLOUT2-
R49 33K_6 TXLOUT2+ 14
+3VPCU 15
R39 100K/F_4 C14
TXLCLKOUT- 16
LVDS_BLON R56 1K/F_4 LID_EC# TXLCLKOUT+ 17
10,18 LVDS_BLON 2 LID_EC# 31,32 18 G_2
0.047U/10V U3
19
5
PN_BLON 3 TXUOUT0-
DPST_PWM 2 TXUOUT0+ 20
10,19 DPST_PWM 21
1 4 R29 1K_4 VADJ1
HWPG 32,34,35,37,39 22
3
PWM_VADJ 1 TXUOUT1-
32 PWM_VADJ 23
D11 TXUOUT1+
LCD_BK BAT54A C20 24 G_3
14 LCD_BK 2
3
Q9 TC7SH08FU C19 TXUOUT2- 25
*4.7U/6.3V_6 TXUOUT2+ 26
22P/50V_4 27
PDTC144EU
1
TXUCLKOUT- 28
Vari bright function 29
TXUCLKOUT+
R27 *0_4 30
31 G_4
Do not use it 32
C 33 C
PV, add Q9 for BIOS check 34
35
VADJ1 36
+VIN_BLIGHT BLONCON 37
38
39
40
G_5
CAMERA CN2
GS12401-1011-9F
+3.9V-CAMARA
SI , update foortprint
+5V
to 88266-05001-06-5P-L-SMT
U4
3 4 EDIDCLK
VIN VOUT *DLW21HN900SQ2L(330mA)
CN1
L5 4 3 USBP2+
13 USBP2+ 1
C16 1 C17 1 2 USBP2- C25
SHDN R1 R30
13
+3.9V-CAMARA
USBP2- 2
3
1U/10V_4 *215K/F_4 4.7U/6.3V_6 Reserve for EMI *10P/50V_4
4
5
2 GND SET 5
D D
AT5231H-3.9KER C23 C18 CAM
.01U/16V_4 *4.7U/6.3V_6
R28
R2 *100K/F_4
PROJECT : AX2/7
Custom 1A
LCD CONN
NB5/RD2
1 2 3 4
5 6 7 8
5 4 3 2 1
CRT PORT PV , change footprint

to F3_2X1_65-2_8
2
F1
1
40 mils
+5VCRT
+5VCRT
C6
0.1U/10V_4
40 MIL
PV , change footprint to
dsub-dsd-15aebb-15p-v-smt
24
R20 for UAM & MUXLESS use 140 ohm +5V
16
for DIS use 150 ohm (AMD) FUSE1A6V_POLY
6
CRT_R L3 BK1608LL680(0.2A,68)_6 CRT_R1 1 11 +3V
D
7 D
CRT_G L2 BK1608LL680(0.2A,68)_6 CRT_G1 2 12 D9 BAV99W
8 1
CRT_B L1 BK1608LL680(0.2A,68)_6 CRT_B1 3 13 CRT_R1
3
9
4 14 2
10
R20 R16 R11 C13 C10 C7 C8 C11 C12 5 15
D7 BAV99W
140/F_4 150/F_4 150/F_4 5.6P/50V_6 5.6P/50V_6 5.6P/50V_6 5.6P/50V_6 5.6P/50V_6 5.6P/50V_6
1 CRT_G1
EMI
17
3
CRT CONN
close conn CN17 2
within 600mils
CRT_R D5 BAV99W
10,18 CRT_R
CRT_G
10,18 CRT_G 1
CRT_B +5V R1 *0_4/S CRTDDCCLK2 CRT_B1
10,18 CRT_B 3
PR_VSYNC R5 33_4 CRTVSYNC
+5V 2
PR_HSYNC R6 33_4 CRTHSYNC
D1 BAV99W
5
1
C3 0.1U/10V_4 R8 *0_4/S CRTDDCDAT2
U1 1 DDCCLK2
3
10,18 VSYNC_COM 2 4 2
AHCT1G125DCH C1 C2 C4 C5
D2 BAV99W
C *470P/50V_4 *47P/50V_4 *47P/50V_4 *47P/50V_4 C
1
5
CRTVSYNC
U2 AHCT1G125DCH 3
2
10,18 HSYNC_COM 2 4
D4 BAV99W
+3V_DELAY R4 *4.7K_4 +3V
1 CRTHSYNC
R3 4.7K_4 3
+3V
2
2
DDCCLK 1 3
10,18 DDCCLK D6 BAV99W
Q1
2N7002E DDCCLK2 1 DDCDAT2
R10 *4.7K_4 +3V 3
+3V_DELAY
R9 4.7K_4 DDCDAT2 2
+3V
2
DDCDATA 1 3 PV,add for ESD

10,18 DDCDATA
Q2
2N7002E
SI, R4,R10 change R2 R7
to reserve only and
6.81K_4 6.81K_4
add R3,R9 for MUXLESS
B B
+5VCRT 2 1 +5V_CRT2
+5VCRT
CH501H-40PT D3
A A
PROJECT : AX2/7
Custom 1A
CRT
NB5/RD2
5 4 3
5 4 3 2 1
UMA/DISCRETE select for HDMI

for Layout for Layout
+3V_DELAY
HDMI HPD SENSE 25
From RS880M concern concern SI, remove R72 and change
,placement close ,placement close R85 , Q12 to reserve for MUXLESS +3V
SI , all add R85
north bridge HDMI conn *10K/F_4 UMA use +3V for the detect pin
for MUXLESS
Dis use +3V_DELAY for the detect pin
RP12
D D
C_PEG_TX15 C410 0.1U/10V_4 TX2_HDMI-L TX2_HDMI-L 3 4 0_4P2R_4 TX2_HDMI- R77
9 C_PEG_TX15 18 EXT_TMDS_HPD
C_PEG_TX#15 C406 0.1U/10V_4 TX2_HDMI+L TX2_HDMI+L 1 2 TX2_HDMI+ 10K/F_4
9 C_PEG_TX#15
3
RP11
C_PEG_TX14 C408 0.1U/10V_4 TX1_HDMI-L TX1_HDMI-L 3 4 0_4P2R_4 TX1_HDMI- Q12
9 C_PEG_TX14
C_PEG_TX#14 C403 0.1U/10V_4 TX1_HDMI+L TX1_HDMI+L 1 2 TX1_HDMI+ *2N7002E
9 C_PEG_TX#14
RP10 2
C_PEG_TX#13 C399 0.1U/10V_4 TX0_HDMI-L TX0_HDMI-L 3 4 0_4P2R_4 TX0_HDMI-
9 C_PEG_TX#13
3
C_PEG_TX13 C398 0.1U/10V_4 TX0_HDMI+L TX0_HDMI+L 1 2 TX0_HDMI+ +3V
9 C_PEG_TX13
Q13
R87
C_PEG_TX#12 C394 0.1U/10V_4 TXC_HDMI-L TXC_HDMI-L 4 3 TXC_HDMI- 2N7002E
9 C_PEG_TX#12
1
C_PEG_TX12 C391 0.1U/10V_4 TXC_HDMI+L TXC_HDMI+L 1 2 TXC_HDMI+ 2 HDMI_DET_R HDMI_DET
9 C_PEG_TX12
L46 WCM2012-90 PV, change R59
to short pad 200K/F_4
10K/F_4
R64 *0_4/S R86
10 INT_TMDS_HPD
1
PV,add for EMI 200K/F_4
From PARK
3
TX2_HDMI_L- C657 *0.1U/10V_4 TX2_HDMI- SI , change to reserve only Q11
18 TX2_HDMI_L-
TX2_HDMI_L+ C652 *0.1U/10V_4 TX2_HDMI+ for MUXLESS 2N7002E
18 TX2_HDMI_L+
2
TX1_HDMI_L- C648 *0.1U/10V_4 TX1_HDMI- for Layout
18 TX1_HDMI_L-
TX1_HDMI_L+ C645 *0.1U/10V_4 TX1_HDMI+ concern Pure DIS : Add R85 , Q12
18 TX1_HDMI_L+
TX0_HDMI_L- C636 *0.1U/10V_4 TX0_HDMI-
,placement close
18 TX0_HDMI_L-
1
TX0_HDMI_L+ C637 *0.1U/10V_4 TX0_HDMI+ HDMI conn
18 TX0_HDMI_L+
UMA / MUXLESS : Add R64 , R59 , Q11
TXC_HDMI_L- C617 *0.1U/10V_4 4 3 TXC_HDMI- SI , add R64,R59,Q11
18 TXC_HDMI_L-
TXC_HDMI_L+ C632 *0.1U/10V_4 1 2 TXC_HDMI+ for MUXLESS
18 TXC_HDMI_L+
L47 WCM2012-90
C PV,add for EMI C
R380 715/F_4 TX2_HDMI+
R382 715/F_4 TX2_HDMI-

+5V
UMA RS780M UMA AND DISCRETE HDMI I2C SELECT
3
R376 715/F_4 TX1_HDMI+

Q10 上 715 ohm CS17152FB17 Close to HDMI Connector
2N7002E R377 715/F_4 TX1_HDMI-
2 0_4P2R_4
R367 715/F_4 TX0_HDMI+ RP30 3 4 HDMI_SDATA
DIS M92-S 10 HDMI_DDC_DATA
1 2 HDMI_SCLK
10 HDMI_DDC_CLK
R364 715/F_4 TX0_HDMI- 上 499 ohm CS14992FB24 SI , change power source
UMA
1
R53 R362 715/F_4 TXC_HDMI+ UMA DDC4 is 5V to +5V_HDMVCC
100K/F_4
R354 715/F_4 TXC_HDMI- Close to HDMI Connector tolerance , the MOSFET +3V_DELAY
+5V_HDMVCC
level shifter no need
SI,change to 715 ohm for MUXLESS Discrete DDC is 3V R94
tolerance,the MOSFET *4.7K_4
level shifter is need
2
1 3HDMI_SCLK
18 HDMI_SCL
+3V_DELAY
Q14
B *2N7002E DIS B
R351 +5V_HDMVCC
*4.7K_4
2
HDMI PORT 18 HDMI_SDA
1 3 HDMI_SDATA
+5V_HDMVCC +5V_HDMVCC CN22

Q15
SHELL1 20
TX2_HDMI+ 1 21 *2N7002E
D2+ SHELL2
2
TX2_HDMI- 3
D14 D15 TX1_HDMI+ D2-
4 D1+
CH501H-40PT TX1_HDMI- 6
TX0_HDMI+ D1-
7 D0+
SI, remove R93 , R350 . Add RP30
TX0_HDMI- 9 R94,R351,Q14,Q15 change to
1
CH501H-40PT D0-
D2 Shield 2 reserve only for MUXLESS
D1 Shield 5
R92 R102 8
2K_4 2K_4 TXC_HDMI+ D0 Shield
10 CK+ CK Shield 11
TXC_HDMI- 12 17
HDMI_SCLK HDMI_SDATA CK- GND
PV , change footprint
to F3_2X1_65-2_8 HDMI_SCLK 15 13
HDMI_SDATA DDC CLK CE Remote
16 DDC DATA NC 14
A A
FUSE1A6V_POLY 1A
+5V 2 1 +5V_HDMVCC 18
F2 +5V
C602 *0.1U/10V_4
HDMI_DET 19 PROJECT : AX2/7

HP DET
HDMI CONN
Custom 1A
HDMI
NB5/RD2
5 4 3
8 7 6 5 4 3 2 1
PIN 13 CLK source

+3V
Remark
R508 10K/F_4
12 CLK_48M_CR CLK_48M_CR
U34
R544 0_4 CLK_48M_CR_R
XD_CLE 43
42
SP19
SP18
SI , change CLK source
from SB internal CLK GEN Note:
SP1
SP2
SD/MMC
SD_WP
MS XD
XD_CD# PV,change to short pad

26
XD_CE# SP17 SP3 SD_CD#
Floating 12M Hz Xtal 13 XTAL_CTR XD_ALE 41
14 SP4 SD_DAT1 XD_D4
GPIO0 SP16 SP5 MS_BS XD_D5 SP7 R517 *0_4/S MS-D0_SD-D0_XD-D6
15 EEDO SD_DAT2/XD_RE# 40
Pull high 48M Hz Input to RTS5159 pin48 16 39 SP15 SP6 MS_D1 XD_D3 SP6 R515 *0_4/S MS-D1_XD-D3_SD_D1
EECS SD_DAT3/XD_WE# SP14 SP7 SD_DAT0 MS_D0 XD_D6 SP8 R520 *0_4/S MS-D2_XD-D2
17 EESK XD_RDY 38
18 37 SP13 SP8 SD_DAT7 MS_D2 XD_D2 SP16 R535 *0_4/S XD-RE#_SD-D2
D XD_CD# EEDI SD_DAT4/XD_WP#/MS_D7 SP9 MS_INS# SP5 R513 *0_4/S MS-BS_XD-D5 D
19 XD_CD#
SP2 20 36 SD_CMD_R AL005158B10 -->RTS5158E SP10 SD_DAT6 MS_D3 XD_D7 SP15 R539 *0_4/S SD-D3_XD-WE
SD_CD# SD_WP SD_CMD SP12 SP11 SD_CLK MS_SCLK XD_D1 SP11 R527 *0_4/S SD_CLK_MS_CLK
21 SD_CD# SD_DAT5/XD_D0/MS_D6 35
22 34 SP11 AL005159B00 -->RTS5159GR SP12 SD_DAT5 XD_D0
SP4 MS_D4 SD_CLK/XD_D1/MS_CLK SP10 SP13 SD_DAT4 XD_WP# SP2 R504 *0_4/S SD_WP
23 SD_DAT1/XD_D4 SD_DAT6/XD_D7/MS_D3 31
24 30 SP14 XD_R/B# SP13 R533 *0_4/S XD-WP#
MS_D5 NC MS_CD# SP15 SD_DAT3 XD_WE# SP19 R541 *0_4/S XD-CLE
MS_INS# 29
R526 6.19K/F_4 RREF 2 28 SP8 SP16 SD_DAT2 XD_RE# SP4 R507 *0_4/S XD-D4
RREF SD_DAT7/XD_D2/MS_D2 SP7 SP17 XD_ALE SP10 R521 *0_4/S MS-D3_XD-D7
SD_DAT0/XD_D6/MS_D0 27
26 SP6 SP18 XD_CE# SP14 R534 *0_4/S XD-RB#
XD_D3/MS_D1 SP5 SP19 XD_CLE SP12 R528 *0_4/S XD-D0
XD_D5/MS_BS 25
4 SP17 R540 *0_4/S XD-ALE
13 USBP11- DM
5 1 SP18 R536 *0_4/S XD-CE#
13 USBP11+ DP AV_PLL_IN C837 Vreg out 1.8V C823 SD_CMD_R R529 *0_4/S SD-CMD
0.1U/10V_4 from Internal
C840 *22P/50V_4 CLK_48M_CR_R 3.3VLDO 1U/10V_4
48 12MHZ_XTLI
2
*12MHz 10 VREG R525
R530 VREG_OUT +3VSUS_RTS *0_8/S
8 +3V
*270K_4 Y8 5V_IN
NC 3
C832 C831 SP11
Close to Chipset
1 33
XTLO D3V3_ IN 0.1U/10V_4 4.7U/6.3V_6
47 12MHZ_XTLO
C839 *22P/50V_4 0.1U/10V_4 C834
BG612000717 Can not more than 10p
11 +3V C836
D3V3_IN
SI, change power source *5.6P/50V_4
SI , change to 22P MODE_SEL 45 0.1U/10V_4 C818 C813 from +3VSUS to +3V
MODE_SEL 4.7U/6.3V_6
then change to reserve only R532
7
C *0_4 NC +3VCARD C
PV, change
SI , Add R537 from 9 +3VCARD R538 *0_4/S to short pad
CARD_3V3_OUT
vendor suggestion
AG33 6
46 C826
AG_PLL C829 C828 C827 D28
DGND2 32
+3V R537 100K/F_4 5159_RST# 44 12 1U/10V_4 5159_RST# 2 1 5159_RST_R#
RST# DGND1 5159_RST_R# 13
C838 RTS5159 max output current for .. 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
Internal have pull Hi 200K XD card 250mA
1U/10V_4 *RB501V-40
Realtek RTS5159 SD/MMC 250mA Add diode for 5158E cardreader driver lost issue
MS/MSPRO 250mA
PAD9 PAD4 H2 H19 H9 H17 H14 H13 H8 H1 H3 H18 H4

*GND PAD *GND PAD
*h-c236d118p2
*h-c236d118p2
*h-c354d118p2
*h-c354d118p2
*h-c354d354n
*h-c354d118p2
*h-c354d118p2
*h-c354d118p2
*h-c354d118p2
*h-c276d118p2
*h-c276d118p2
1
1
1
1
+3VCARD +3VCARD PV , change footprint +3VCARD
to 4in1-cm4s-125-36p-r-v-smt
CN12
*H-C236D181P2
H12
*H-C236D181P2
H7
*h-c307d181p2
H11
*H-C217D181P2
H6
*H-C217D181P2
H10
*H-C217D181P2
H5
XD-RB# 1 20 MS-D1_XD-D3_SD_D1
R325 XD-RE#_SD-D2 XD-R/B MS-DATA1 MS-BS_XD-D5 PAD5 PAD8 PAD7 PAD6 PAD3 PAD2 PAD1
2 21
XD-CE# XD-RE MS-BS *GND PAD *GND PAD *GND PAD *GND PAD *GND PAD *GND PAD *GND PAD
3 22
1
XD-CLE XD-CE 4IN1-GND2
4 23
*10K/F_4 XD-ALE XD-CLE SD-VCC SD_CLK_MS_CLK
5 24
B SD-D3_XD-WE XD-ALE SD-CLK MS-D0_SD-D0_XD-D6 B
6 25
1
XD-WP# XD-WE SD-DAT0 MS-D2_XD-D2
7 26
XD-D0 XD-WP XD-D2 MS-D1_XD-D3_SD_D1
8 27
SP11 XD-D0 XD-D3 XD-D4
XD-RE#_SD-D2
9
XD-D1 XD-D4
28
XD-D4
VGA Hole CPU Hole
10 SD-DAT2 SD-DAT1 29
SD-D3_XD-WE 11 30 MS-BS_XD-D5
SD-CMD SD-DAT3 XD-D5 MS-D0_SD-D0_XD-D6 SI , update foortprint
12 31
SD-CMD XD-D6 MS-D3_XD-D7
13 4IN1-GND1 XD-D7 32 to spad-ax2-1np
14 33
SD_CLK_MS_CLK MS-VCC XD-VCC XD_CD#
15 34
MS-D3_XD-D7 MS-SCLK XD-CD-SW SD_WP
16 35
MS_CD# MS-DATA3 SD-WP-SW SD_CD# PAD15 PAD14 PAD13 PAD12 PAD11 PAD10 PAD18
17 MS-INS SD-CD-SW 36 PAD17 PAD16
MS-D2_XD-D2 18 *GND PAD *GND PAD *GND PAD *GND PAD *GND PAD *GND PAD spad-mb-1np
MS-D0_SD-D0_XD-D6 MS-DATA2 *GND PAD *GND PAD
19
MS-DATA0
C577 37
1
SHIELD1-GND
*270P/25V_4 38
1
SHIELD2-GND
BOS 39
BOS 40
CARD READER SOCKET
SI, add CPU & VGA hold pad from EMI request SI , add for ESD testing PV,add new pad
5 IN1 CARD-READER (PUSH-PUSH) for new outline
Support SD/SD PRO/MMC/MS/MS PRO/xD Cards
A A
+3VCARD
+3VCARD
C562 R314
2.2U/6.3V_6 150K/F_4
C560 C566 C569 PROJECT : AX2/7
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 Quanta Computer Inc.
CLOSE CONN
Custom 1A
RTS5159 & CR SOCKET &HOLE
NB5/RD2
8 7 6 5
4 3 2 1
A B C D E
+3V
PV , change to short pad
R519 *0_6/S
+3V_DVDD +5V +5VAVDD
C782 PV,delete C824

PV, change to
reserve only
+5VAVDD
27
C830 C819 C821 C816 C817 C812 C810 C822 C809 C780 C784 C786 1.3A
1U/6.3V_4 .1U/10V_4 10U/6.3V_8 10U/6.3V_8 .1U/10V_4 10U/6.3V_8 .1U/10V_4 10U/6.3V_8 .1U/10V_4 10U/6.3V_6 .1U/10V_4 10U/6.3V_8 .1U/10V_4 +5V L74 C772 10U/6.3V_6
ACZ_SDIN0_R C815 *27P/50V_4 *PBY201209T-221Y-N C774 4.7U/6.3V_6
C775 1U/6.3V_4
Close to Pin1 Close to Pin9 Close to Pin46 Close to Pin39 AGND AGND AGND AGND C783 .1U/10V_4
Close to Pin25 Close to Pin38 FOR EMI
AGND
PV , change from
220 to 47 PV, change footprint and value SI , remove L79,L80,L83,L84
MIC1-VERFL MIC1-VERFR
PV , add LDO Place near CODEC SI , change L6,L7,L8,L9
MIC2-VERFO +5VAVDD to CX5AG601001 from
HP-L +5V SPKR-
28 EARP_L EMI suggest
R489 47/F_4 C778 10U/6.3V_6 AGND U33
HP-R 5 1 C802
28 EARP_R
C777
R488 47/F_4
2.2U/6.3V_6 CPVEE
C781
C779
*.1U/10V_4
.1U/10V_4
Close to Pin27
Vout Vin
C847
*180p/50V_4 SPEAKER
AGND AGND 4 BYP C806
269CBN C842 0.047U/25V_4 *1U/16V_6
AGND
1U/6.3V_4
2
GND EN
3
R571 10K/F_4 C808
Place near SPEAKER CONN CN3
269CBP +5VAVDD G9191-475T1U *180p/50V_4
C776 2.2U/6.3V_6 L9 BLM15AG601SS1D
SPKR+ L7 BLM15AG601SS1D 1
SPKL- L6 BLM15AG601SS1D 2
36
35
34
33
32
31
30
29
28
27
26
25
U32 AGND L8 BLM15AG601SS1D 3
C798 4
37
CBP
CBN
CPVEE
HP-OUT-R
HP-OUT-L
MIC1-VREFO-L
MIC1-VREFO-R
MIC2-VREFO
LDO-CAP
VREF
AVSS1
AVDD1
AGND AVSS2
+5VAVDD 38 *180p/50V_4 INT SPEAKER CONN
AVDD2
C45
C42
C46
C47
+5V 39 C796
PVDD1 MIC1-VERFL R497 4.7K_4 *1U/16V_6
24
LINE1-R
220P/50V_6
220P/50V_6
220P/50V_6
220P/50V_6
SPKL+ 40 MIC1-VERFR R491 4.7K_4 C794
SPK-L+ *180p/50V_4
23
SPKL- LINE1-L
41
SPK-L- EXT_MIC1-R_C C789 4.7U/6.3V_6 EXT_MIC1-R_R R495 1K/F_4 SPKL+
MIC1-R 22 EXT_MIC_R 28
42
PVSS1 EXT_MIC1-L_C C795 4.7U/6.3V_6 EXT_MIC1-L_R R496 1K/F_4
MIC1-L 21 EXT_MIC_L 28
43 PVSS2
MONO-OUT 20
SPKR- 44
SPKR+ 45
SPK-R-
Ditigal JDREF
19 R498 20K/F_4 AGND Place near CODEC SI , add C42,C45,C46,C47
from EMI suggestion
+5V 46
SPK-R+
PVDD2
Analog Sense-B
18
INT_MIC_R C801 4.7U/6.3V_6 INT_MIC

17
EAPD# MIC2-R
47
EAPD INT_MIC_L C803 4.7U/6.3V_6 SI , update foortprint
48
49
SPDIFO MIC2-L
16
+5VAVDD +INTMIC_BIAS Place near CODEC to 88266-020L-2P-R-SMT
PGND
50 PGND LINE2-R 15
1 51 R485 1
PGND R484 *10K/F_4
52
PGND LINE2-L
14 Place near CODEC MIC2-VERFO
53
PGND SENSEA R502 39.2K/F_4 SA_A# *10K/F_4 C768 *1U/6.3V_4
SDATA-OUT
54 13 SA_A# 28
PGND Sense A R501 20K/F_4 SA_B#
SDATA-IN
55 SA_B# 28
DVDD-IO
PGND
PCBEEP
RESET#
BIT-CLK
56 U31 R302
DVDD1
DVSS2
GPIO0
GPIO1
PGND
5
SYNC
57 *TLV2461IDBVRG4 AGND 3K_4 CN10

PD#
PGND C762 *100P/50V_4

58
PGND SA_A# -->EXT Ear Phone INT_MIC
+ 3
R481 C540
1
- 4 INT_MIC_IN_C_R INT_MIC_IN_C INT_MIC_IN L79 BLM15AG601SS1D
1
10
11
12
ALC270A-GR 1
SA_B# -->EXT MIC *10K/F_4 *.22U/25V_6 2
C165
+3V_DVDD PCBEEP C761
*100P/50V_4 R301
AGND 88266-020L
T169 ACZ_RST#_AUDIO 13 PV, change to *3K_4
*220P/50V_6
T170 reserve only
ACZ_SYNC_AUDIO 13 R480 *10K/F_4 AGND
PD# PV,add for EMI
+3V_DVDD C763 *270P/25V_4
13 ACZ_SDOUT_AUDIO
C541 R300
ACZ_SDIN0_R R512 33_4 ACZ_SDIN0 13 *1U/6.3V_4 *3K_4
13 BIT_CLK_AUDIO
R427 0_6 AGND AGND
AGND +5VAVDD
SI, remove R511 C814 SI , change to reserve only PV , add R427 TO Internal Mic
*27P/50V_4
+5VAVDD
PC-BEEP C835 close to C820 and C820 close to chip +3V_DVDD
SI,remove U35,C681 , add D40
AGND 1 2 for audio function not stable
C825 *0.047U/10V
R516
PV,add for test *10K_4
PV , remove U33,C825,C811 R566
D40
C820,R523,R524 10K/F_4
R328 0_6 EAPD# R522 0_4 EAPD#_R 2
RC0603 R510,R514 ACZ_RST#_AUDIO R518 *0_4
R315 *0_6/S C811 .1U/10V_4 R546 47K_4 3 PD#
short0603 Add this circuit same PCBBEP_R2 PCBBEP_L C820 .1U/10V_4 PCBEEP
R261 *0_6/S as AX1/3 32 VOLMUTE# 1
short0603
R473 *0_6/S
BAT54A
3
short0603 Q36 R549

Place Under R313 *0_6/S 2N7002E
short0603 4.7K_4 C835
CODEC R482 *0_6/S 13 ACZ_SPKR 2 .1U/10V_4
short0603 R549 close to R546
R506 *0_6/S PROJECT : AX2/7
short0603 Quanta Computer Inc.
1
AGND Size Document Number Rev

AGND AGND Custom 1A
Azalia 92HD75B2X5
NB5/RD2
A B C
http://laptop-schematic.com/ D E
1 2 3 4 5 6 7 8
EARP_L L50 SBK160808T-301Y-N EARP_L1

1
2
CN29
Line out
7
9
28
6
EARP_R L44 SBK160808T-301Y-N EARP_R1 3 10
EXT_MIC_L 4
27 EXT_MIC_L
SA_A# 5 8
27 EXT_MIC_R EXT_MIC_R
A A
FOX_JA6033L-B3S0-7F
R308 R293 C548 C532
Normal Open
EARP_L *1K/F_4 *1K/F_4
27 EARP_L
100P/50V_4 100P/50V_4
27 EARP_R EARP_R AGND
SA_A#
27 SA_A#
AGND PV,change to AGND
27 SA_B# SA_B# PV,let pin 6 contact from EMI suggest
to AGND from EMI suggest
SA_A# -->EXT Ear Phone C757 100P/50V_4

MIC
AGND
SA_B# -->EXT MIC CN28
1 7
EXT_MIC_L L72 SBK160808T-301Y-N MIC_IN_L 2 9
6
EXT_MIC_R L70 SBK160808T-301Y-N MIC_IN_R 3 10
4
5 8
AGND C756 100P/50V_4
FOX_JA6033L-B3S0-7F
B AGND Normal Open B
SA_B# AGND
CPU FAN G955 /FON

+5V
signal have C68 1U/10V_4

internal
pull Hi to
VIN , R420 R66
+3V maybe can
10K/F_4 U9
remove +5VFAN1
2 VIN VO 3
R98 5
FAN_SMBALERT# GND
4.7K_6 1 /FON GND 6
GND 7
32 FAN1ON 4 VSET GND 8
32 FAN1SIG
FANPWR = 1.6*VSET G991
CN21
20 mil
+5VFAN1 1 1
C
2 2 5 5 C
3 4 8 7 6 5 G995 layout notice
C125 C134 3 4
FAN CONN Gnd shape
2.2U/6.3V_6 0.1U/10V_4
1 2 3 4
Modem CONN H15 H16
h-c217d146p2
h-c217d146p2
+3V
MDC
1
CN11
1 2 C564 C563 C561
ACZ_SDOUT_AUDIO_MDC GND REV 0.1U/10V_4 2.2U/6.3V_6 1000P/50V_4
13 ACZ_SDOUT_AUDIO_MDC 3 A_SDO REV 4
5 GND VCC 6
ACZ_SYNC_AUDIO_MDC 7 8
13 ACZ_SYNC_AUDIO_MDC AC_SDIN1_MDC A_SYNC GND
D
13 ACZ_SDIN1 9 A_SDI GND 10 Nut PN:MBCA6002013 D
R316 33_4 11 12 R317 *0_4/S
A_RST# A_BCLK BIT_CLK_AUDIO_MDC 13
C565 *10P/50V_4 MDC CONN
13 ACZ_RST#_AUDIO_MDC For EMI
C567
*10P/50V_4
PROJECT : AX2/7
Custom 1A
AMP_TPA6017/MDC1.5/CPU FAN
NB5/RD2
1 2 3 4
5 6 7 8
5 4 3 2 1
BLUETOOTH +3VPCU
R329
4.7K_4
+3VSUS
6
CN16
BLUE TOOTH CONN
87213-0600-6P-L
BTCON_P1
T126
LEFT SIDE USBX2 29
1
BLUELED
5 BLUELED 32,33 +5VPCU
USBP15- 80 mils (Iout=2A)
4 USBP15- 13 U28
Q30 USBP15+
3 USBP15+ 13
2 ME2303T1 2 8 USB0PWR
2 BTV VIN1 OUT3
1 3 VIN2 OUT2 7
1
32 USBPW_ON# 4 6 C731
EN OUT1 C733 C732
D
1 GND OC 5 D
100UF_6.3V
*470P/50V_4 0.1U/10V_4
3
3
C754 G547
2
C576 1U/10V_4 (TPS2061D)
2 Q27 0.1U/10V_4
14 BT_OFF#
PDTC144EU 24mil
BTV AL000547000
1
IC(8P) G547 (MSOP-8) - 2A
C579 C580 AL000545000
10U/6.3V_8 0.1U/10V_4
IC OTHER(8P) G545A2P8U(MSOP-8) - 2A
To TOUCH
TOUCH PAD CONN USB0PWR
CN26
PAD SW board USBP0-

USBP0+
1
2
3
1
2
GND
GND
8
7
6
3 GND
4 4 GND 5
C423 C426
*47P/50V_4 *47P/50V_4 USB CONN
25 mils C416 0.1U/10V_4 *DLW21HN900SQ2L(330mA)
SI , add C409,C417 +3VSUS
from EMI suggest 4 3 USBP0+
1
13 USBP0+
1 2 USBP0-
13 USBP0-
C C
2
CN8 L38 C422
C417 10P/50V_4 CN9 *Clamp-Diode_6 C427
TP_L *Clamp-Diode_6
TPDATA L37 SBK160808T-680Y-N(0.3A,68) TPDATA-1 1 1
32 TPDATA 2 2
TPCLK L36 SBK160808T-680Y-N(0.3A,68) TPCLK-1 For layout routing
32 TPCLK 3 3
TP_R
C409 10P/50V_4 TP_R 4 4
TP_L 5
88513-044N
6 *DLW21HN900SQ2L(330mA)
4 3 USBP5+
13 USBP5+
TOUCH PAD CONN 1 2 USBP5-
13 USBP5-
close conn
L39
+3VSUS R155 4.7K_4 TPCLK CN27
R168 4.7K_4 TPDATA USB0PWR 1 8
USBP5- 1 GND
2 2 GND 7
USBP5+ 3 6
3 GND
4 4 GND 5
C455 C462
*47P/50V_4 *47P/50V_4 USB CONN
1
2
2
C453
*Clamp-Diode_6 C463
*Clamp-Diode_6
B
SATA HDD CONNECTOR B
SI , update P/N : DFHS13FS019
CN31
1 1
Right SIDE USBX1
2 SATA_TXP0 14
3 SATA_TXN0 14
SI , delete CN30 change to ANT CONN 4
5 SATA_RXN0 14
6 SATA_RXP0 14 +5VPCU
7
8 +3V_HDD1 C49 .1U/10V_4
9
CN4
Main HDD
10 PV , change USBPW_ON# from PIN2 to PIN3

11 and let PIN2 pull high to +5VPCU
12 +5V 1
13 2
14 32 USBPW_ON# 3
15 13 USBP6- 3 4 USBP6- 4
16 13 USBP6+ 2 1 USBP6+ 5
17 L10 *DLW21HN900SQ2L(330mA)
6
18
19 19 USB board
+3V_HDD1 +3V
SI , add +3V support
A A
SI , add +3V support +5V_HDD1 and new define
R542 *0_8 SATA HDD
+5V: 2 A(4 Pin)

+5V_HDD1 +5V
C805 C804 C807 C800 Gnd : (5 Pin) PROJECT : AX2/7
R503 *0_8/S
10U/6.3V_8 4.7U/6.3V_6 0.1U/10V_4 10U/6.3V_8 ANT CONN Quanta Computer Inc.
Custom 1A
BT/USBX3/TP/HDD
NB5/RD2
5 4 3
5 4 3 2 1
+CTRL12DVDD R40 *0_6/S

Power trace Layout 寬寬 > 30mil
+DVDD12 +EVDD12
+3VLANVCC
C53
Power trace Layout 寬寬 > 30mil
C109 C56
+3V_LAN
C55
30
LANVCC
SI , remove EEPROM 4.7U/6.3V_6 .1U/10V_4 .1U/10V_4 .1U/10V_4
C54 C52 C107 C88 C67 C76 U5,C48,R42,R50 1.2W
.1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 1U/10V_4 1U/10V_4 364mA
CLOSE to Pin 29,37
D D
CLOSE to Pin 10, 13, 30, 36 LAN-AGND
close to pin 19 +3V_A_LAN
C604 C601
+CTRL12DVDD XTAL2 .1U/10V_4 *.1U/10V_4
C97 10U/6.3V_8 XTAL1 1 2 +3V

C83 .1U/10V_4
C62 Y2 C69 Delete R261 and add D38 as current loss issue +3V_LAN
CLOSE to Pin 1
R97 2.49K/F_4 LANRSET 25MHZ
33P/50V_4 33P/50V_4 R44 100/F_4 C64 0.1U/10V_4
R55
*1K/F_4
+CTRL12A U6
5
C111 10U/6.3V_8 LAN_WLED# ISOLATEB 2 1 LAN_DISABLE# 13,32
C108 .1U/10V_4 +3V_LAN D13 12 LAN_PLTRST# 2 R60 *0_6/S
*RB501V-40 if ISOLATEB pin 4 LAN_REST_R#
R51 pull-low,the LAN 1 R57 *0_6/S
U7
48
47
46
45
44
43
42
41
40
39
38
37
15K/F_4 chip will not drive
TC7SH08FU
it's PCI-E outputs
3
VCTRL12A/SROUT12
GND4
RSET
VCTR12DVDDSR
NC/VDDSR
NC/ENSWREG
CKTAL2
CKTAL1
NC/AVDD33
NC/LV_PLL
LED0
VDD33B
( excluding LAN-AGND
PCIE_WAKE# pin )
DB modified to short-pad
+3V_A_LAN 1 AVDD33 DVDD12B 36 +DVDD12
C MDI0+ 2 35 EESK_LED100# C
MDI0- MDIP0 LED1/EESK EEDI_LED10# R333 3.6K_4
3 MDIN0 LED2/EEDI 34 +3V_LAN PV , add R333 pull high
4 NC/FB12 LED3/EEDO 33 and R350 pull low to fix
MDI1+ 5 32 EECS R350 1K/F_4
MDI1- 6
MDIP1 EECS
31
LAN LED behavior abnormal HP request reserve
MDIN1 GND3
7
8
GND1 RTL8103EL DVDD12A 30
29
+DVDD12
LAN_WLED#
white LED driver circuit
NC/MDIP2 VDD33A +3V_LAN
9 28 ISOLATEB
NC/MDIN2 ISOLATEB LAN_REST_R# R45 *0_4
+DVDD12 10 DVDD12/AVDD12 PERSTB 27 LAN_REST# 32
2
11 26 PCIE_WAKE#
NC/MDIP3 LANW AKEB PCIE_WAKE# 13,33
12 25 R569 0_4 LAN_CLKREQ# 13 Q31
NC/MDIN3 CLKREQB *DTC144EUA
NC/SMDATA
REFCLK_N
REFCLK_P
NC/SMCLK
DVDD12
EVDD12
PV, add for debug SI , add from HP request 1 3 R404 *10K/F_4 +3VLANVCC
HSON
EGND
HSOP
GND2
HSIN
HSIP
2
SI , add for DSM
Q32
13
14
15
16
17
18
19
20
21
22
23
24
*DTC144EUA
+DVDD12 1 3 LAN_WLED#_Q
LAN CABLE DETECT 32
LAN-AGND
9 PCIE_TXP2_LAN
PCIE_RXN2_LAN_L C70 .1U/10V_4
9 PCIE_TXN2_LAN PCIE_RXN2_LAN 9
PCIE_RXP2_LAN_L C78 .1U/10V_4 LAN_WLED# R413 *0_4/S
PCIE_RXP2_LAN 9
PCIE_LAN_CLKP
12 PCIE_LAN_CLKP
PCIE_LAN_CLKN +EVDD12
12 PCIE_LAN_CLKN
SI , change to AL08103EB01 PV, change

B B
for support DSM chip to short pad
EMI suggestion
C663 .1U/10V_4
SI , rotate 180 degree RJ45
for EMI suggestion CN25
+3V_LAN R387 330_4 LAN_AMLED 12

LAN_AMLED# 11 LED_AMBER_P
LED_AMBER_N
8 RX1-
LAN_Transformer 7 RX1+
LAN_MX1- 6 RX0-
5 TX1-
Bios need change 4 TX1+
U20 LAN_MX1+ 3
LAN_MX0- RX0+
2 TX0- GND1 14
LAN_MX1- 1 16 MDI1- LAN_MX0+ 1
RD+ RX+ EEDI_LED10# R392 *0_6 TX0+
GND 13
LAN_MX1+ 3 15 V_DAC_2
RD- CT R403 330_4 LAN_WLED
+3V_LAN 10 LED_W HITE_P
75/F_4 R112 LAN_MCT0_2 C161 LAN_MCT1 2 14 MDI1+ LAN_WLED#_Q 9
0.01U/100V_0603 CT RX- C117 EESK_LED100# R391 *0_6/S LED_W HITE_N
LAN_MX0- 6 9 MDI0+ .01U/16V_4
TD+ TX-
LAN_MX0+ 8 10 V_DAC_1 LAN_AMLED# RJ45_CONN
TD- CMT .1U/10V_4
A 75/F_4 R111 LAN_MCT0_1 C159 LAN_MCT0 7 11 MDI0- C697 Fixed RJ45 Pin define (0829) A
0.01U/100V_0603 CT TX+ LAN_WLED# LAN_WLED# Link
EMI suggestion
NS681684 C668 C699
C610
1000P/3KV_1808 *.01U/16V_4 *.01U/16V_4
C118 PROJECT : AX2/7

SI , change footprint .01U/16V_4 Quanta Computer Inc.
to CC1808
Custom 1A
RTL8102EL/RJ45
NB5/RD2
5 4 3
5 4 3 2 1
POWER BUTTON CONNECTOR KEYBOARD CONN PV,update footprint to bl135h-32rla-tand-32p-l-smt
MX1 1
CN7
31
MY5 C232 220P/50V_4 MX7 1 MY[0..17]
2 2 32 MY[0..17]
MY6 C298 220P/50V_4 MX6 3
NBSWON1# MY3 C309 220P/50V_4 MY9 3 MX[0..7]
4 4 32 MX[0..7]
+PWLEDVCC MY7 C276 220P/50V_4 MX4 5
MX5 5
6 6
MY8 C283 220P/50V_4 MY0 7 7
1
D D
G1 MY9 C174 220P/50V_4 MX2 8 8
1
C63 C58 C59 *SHORT_ PAD1 MY10 C347 220P/50V_4 MX3 9

MY11 C341 220P/50V_4 MY5 9
10 10
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 MY1 11
2
2
MX0 11
12
MY1 C237 220P/50V_4

MY2
MY4
13
14
12
13 KEYBOARD PULL-UP
MY2 C252 220P/50V_4 MY7 14
15 RP37
MY4 C265 220P/50V_4 MY8 15 MY14
16 16 +3VPCU 10 1
MY0 C213 220P/50V_4 MY6 17 MY13 9 2 MY11
MY3 17 MY12 MY10
18 18 8 3
MX4 C184 220P/50V_4 MY12 19 MY3 7 4 MY15
MX6 C169 220P/50V_4 MY13 19 MY6
20 20 6 5
+3VPCU MX3 C224 220P/50V_4 MY14 21
C61 0.1U/10V_4 MX2 C218 220P/50V_4 MY11 21
22 +3VPCU 10P8R-8.2K
MY10 22
23 23
MY15 24 RP36
CN5 MX7 C163 220P/50V_4 MY16 24 MY2
25 25 10 1
R62 *39_6 PWR BTN CONN MX0 C244 220P/50V_4 MY17 26 MY1 9 2 MY4
MX5 C195 220P/50V_4 26 MY5 MY7
+5VPCU 1 2 1. +3VPCU(LIDSWITCH PWR) MX1 C154 220P/50V_4
+3V
R140 2
27 27 8 3
32 CAPSLED# 1 200/F_6 28 28
MY0 7 4 MY8
R58 39_6 2. LEDVCC(+3VPCU) R142 2 1 200/F_6 29 MY9 6 5
1 32 NUMLED# 29
+3VPCU 1 2 +PWLEDVCC MY12 C319 220P/50V_4 WIRELESS_ON_R 30
2 MY13 C323 220P/50V_4 WIRELESS_OFF_R 30
23,32 LID_EC# 3 3. LIDSWITCH MY14 C335 220P/50V_4
31 31 +3VPCU 10P8R-8.2K
32 NBSWON1# 4 +3V 32 32
PWR_LED# 4.POWERON# MY15 C357 220P/50V_4 R406 8.2K_4 MY16
32 PWR_LED# 5 MY16 C367 220P/50V_4 R408 8.2K_4 MY17
6 MY17 C379 220P/50V_4
C60
5. PWRLED# KB CONN
SI , update P/N
C 1000P/50V_4 6. GND C
+5V SI , reserve Q34,Q35,R499,R500 +5V

for dual_LED on keyboard
R499
*1K/F_4 R500
*1K/F_4
SATA CD-ROM R145 2
SI , delete CN13 change to ANT CONN 1 200/F_6 R150 2 1 200/F_6
WIRELESS_ON_R WIRELESS_OFF_R
3
32 WIRELESS_ON 2 32 WIRELESS_OFF 2
CN15
SI , update P/N : DFHS13FS019
Q34 Q35
+5V *PDTC144EU *PDTC144EU
1
1 1
2 SATA_TXP1 14
3 SATA_TXN1 14
4 R322
B B
5 SATA_RXN1 14
6 SATA_RXP1 14 *10K/F_4
7
8 R330 2 1 1K/F_4
9 +5V_ODD 32 EJECT# R323 *0_4 ODD_EJECT#
10
11 ODD_EJECT#
12 SI , remove R328
13
14 +5V PV, change
15 +15VALW
to reserve only
16 C572
17 AO3404 ID
2
18 current *.1U/10V_4
19 R327 5.8A
19
*330K_6
3
Q29 +5V_ODD
1
*AO3404
SATA ODD
ANT CONN 2
High : ODD power down
1
3
Low : ODD power on R326
1
*22_8
32 ODD_PD 2
2
1
C578
A Q28 *.027U/25V_6 A
2
3
*2N7002E
1
120 mils
+5V_ODD +5V_ODD +5V 2
C575
10U/6.3V_8
C573
0.1U/10V_4
C574
0.1U/10V_4
C571
0.1U/10V_4
C570
0.1U/10V_4 R324 0_8
Q26
*2N7002E PROJECT : AX2/7
1

Custom 1A
KEYBOARD/SW_BOARD/ODD
NB5/RD2
5 4 3
5 4 3 2 1
+3VPCU
12 SERIRQ
12,33 LFRAME#
12,33 LAD0
SERIRQ
LFRAME#
LAD0
LAD1
3
4
10
U8
SERIRQ
LFRAME
LAD0
VCC1
VCC2
VCC3
9
22
33
C584
C143
C590
C592
C589
4.7U/6.3V_6
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
+3V
+3VPCU
R71
R78
R74
R346
10K/F_4
10K/F_4
10K/F_4
4.7K_4
HWPG
NBSWON1#
SLPBTN#
MBCLK
+3VPCU
R65
32
12,33 LAD1 8 LAD1 VCC4 96
LAD2 7 111 C586 0.1U/10V_4 R345 4.7K_4 MBDATA *10K/F_4
12,33 LAD2 LAD2 VCC5
LAD3 5 125 C591 0.1U/10V_4
12,33 LAD3 LAD3 VCC6
PCLK_LPC_KB3920 12 67 C131 4.7U/6.3V_6
12 PCLK_LPC_KB3920 PCICLK AVCC
13 Vari_ON
12 PCIRST# PCIRST/GPIO5
CLKRUN# 38 +3VPCU_EC
12 CLKRUN# CLKRUN
SCI1# 20 R68
GATEA20 SCI/GPIOE TEMP_MBAT 10K/F_4
D
13 GATEA20 1 63 TEMP_MBAT 40 D
RCIN# GA20/GPIO0 AD0/GPI38 AD_TYPE RSMRST#
13 RCIN# 2 64 RSMRST# 13
3920_RST# KBRST/GPIO1 AD1/GPI39 AD_AIR
37 ECRST AD2/GPI3A 65 AD_AIR 40
66 SYS_I C588 2.2U/6.3V_6
AD3/GPI3B SYS_I 40
MX0 55 R336 *8.2K_4
31 MX0 KSI0/GPIO30 +3VPCU
MX1 56 68 CC-SET
31 MX1 KSI1/GPIO31 DA0/GPO3C CC-SET 40
MX2 57 70 CELL_SLT 40
31 MX2 KSI2/GPIO32 DA1/GPO3D
MX3 58 71 FAN1ON
31 MX3 KSI3/GPIO33 DA2/GPO3E FAN1ON 28
MX4 59 72 D/C# SI , enable Vari-bright
31 MX4 KSI4/GPIO34 DA3/GPO3F D/C# 40
MX5 60
31 MX5 KSI5/GPIO35 need pull low
MX6 61 21 PWM_VADJ
31 MX6 KSI6/GPIO36 PWM1/GPIOF PWM_VADJ 23
MX7 62 23 KEY_BEEP (1KHz) PV , change to test point
31 MX7 KSI7/GPIO37 PWM2/GPIO10 T91
MY0 39 26
31 MY0 KSO0/GPIO20 FANPWM1/GPIO12 CV-SET 40
MY1 40 27 EC_ACLIM +3VPCU
31 MY1 KSO1/GPIO21 FANPWM2/GPIO13 EC_ACLIM 40
MY2 41 28 FAN1SIG
31 MY2 KSO2/GPIO22 FANFB1/GPIO14 FAN1SIG 28
MY3 42 29
31 MY3 KSO3/GPIO23 FANFB2/GPIO15 ODD_PD 31
MY4 43
31 MY4 KSO4/GPIO24
MY5 44 77 MBCLK Battery charge/discharge
31 MY5 KSO5/GPIO25 SCL1/GPIO44 MBCLK 5,40
MY6 45 78 MBDATA Cap button
31 MY6 KSO6/GPIO26 SDA1/GPIO45 MBDATA 5,40
MY7 46 79 MBCLK2
31 MY7 KSO7/GPIO27 SCL2/GPIO46 MBCLK2 5,18
MY8 47 80 MBDATA2 VGA thermal C80
31 MY8 KSO8/GPIO28 SDA2/GPIO47 MBDATA2 5,18
MY9 48 system thermal 0.1U/10V_4
31 MY9 KSO9/GPIO29
MY10 49
31 MY10 KSO10/GPIO2A
MY11 50 U17 R76
31 MY11 KSO11/GPIO2B
MY12 51 BIOS_CS# 1 8
31 MY12 KSO12/GPIO2C CE# VDD
MY13 52 SPI_CLK R89 33_4 6 10K/F_4
31 MY13 KSO13/GPIO2D SCK
MY14 53 6 SUSB# BIOS_WR# 5
31 MY14 KSO14/GPIO2E GPIO4 SUSB# 13 SI
MY15 54 BIOS_RD# 2 7 SPI_7P
31 MY15 KSO15/GPIO2F SO HOLD#
MY16 81 14 HWPG
31 MY16 KSO16/GPIO48 GPIO7 HWPG 23,34,35,37,39
MY17 82 15 CPU_PROCHOT# +3VPCU R84 10K/F_4 SPI_3P 3 4
31 MY17 KSO17/GPIO49 GPIO8 CPU_PROCHOT# 3 WP# VSS
M93_STRP
83 16 SUSC# MX25L1605DM2I-12G
PSCLK1/GPIO4A GPIOA SUSC# 13
SLPBTN# 84 17 M93_STRP
PSDAT1/GPIO4B GPIOB
2
Vari_ON 85 18 MAX AKE38FP0Z00 2M byte
C PSCLK2/GPIO4C GPIOC T5 C
ACIN 86 19 NBSWON1# R552
40 ACIN NBSWON1# 31
WINBOND AKE38FP0N01 SPI
TPCLK PSDAT2/GPIO4D GPIOD
29 TPCLK 87 PSCLK3/GPIO4E GPIO11 25 LAN_REST# 30 *1K/F_4
29 TPDATA TPDATA 88 30 BIOS
PSDAT3/GPIO4F GPIO16 EC_DEBUG1 33
31 EMU_LID EON AKE38ZA0Q00
EMU_LID 23
1
BIOS_RD# GPIO17 KBSMI#1
119 32
SI , add for DSM BIOS_WR# RD GPIO18
BIOS_CS#
120
WR VRON
SOCKET DG008000031
128 34 VRON 35,36,37,39
R61 *0_4/S SELMEM/SPICS GPIO19 NUMLED#
12 SERR# 89 36 NUMLED# 31
SELIO/GPIO50 GPIO1A
76 AD5/GPI43
12 VGA_ON_SB VGA_ON_SB 109
VGA_PWROK D0/GPXD0
12,37,38 VGA_PWROK 110
D1/GPXD1
PV,reserve for identify M93-LP VGA chip
T1 112 D2/GPXD2
T2 114 73 EJECT# 31
RF_LINK# D3/GPXD3 GPIO40
33 RF_LINK# 115 74 T9
BLUELED D4/GPXD4 GPIO41 OP_FAN_SEL
116 75 T10
D5/GPXD5 AD4/GPI42 DNBSWON#1
30 LAN CABLE DETECT 117 90
D6/GPXD6 GPIO52 CAPSLED#
T3 118 91 CAPSLED# 31
D7/GPXD7 GPIO53 PWR_LED#
92 PWR_LED# 31
USBPW_ON# GPIO54 ECPWROK
29 USBPW_ON# 97 93 ECPWROK 5,16
SUSON A0/GPXA0 GPIO55 RSMRST#
37,39 SUSON
MAINON
98
99
A1/GPXA1 GPIO56
95
121 VOLMUTE#
RSMRST# 13 Project Model GPIO42 R90 *10K/F_4
34,37,39,40 MAINON A2/GPXA2 GPIO57 VOLMUTE# 27 +3VPCU
LAN_POWER SPI_CLK
39 LAN_POWER
S5_ON
100
101
A3/GPXA3 GPIO58
126
127 LID_EC#
AX 14" High
35,39 S5_ON A4/GPXA4 GPIO59 LID_EC# 23,31
VR2.5_ON OP_FAN_SEL R79 10K/F_4
39 VR2.5_ON 102
103
A5/GPXA5 AX 15.6" Low
13,30 LAN_DISABLE# A6/GPXA6
VGACOREON CRY2
20,37,38 VGACOREON
MBATLED0#
104
105
A7/GPXA7 XCLKO
123
C57 27P/50V_4
AX 17.3" Middle (1.5V)
40 MBATLED0# A8/GPXA8
AC_LED_ON# 106
40 AC_LED_ON# A9/GPXA9
1
107 122 CRY1

31 WIRELESS_ON A10/GPXA10 XCLKI 32.768KHZ
31 WIRELESS_OFF 108
A11/GPXA11 Y1 GPIO42 control fan table
11
GND1
24
4
GND2
GND3 35
B 124 94 B
V18R GND4 C50 27P/50V_4
GND5
113 SI , change package
69
C585 C587 AGND 3920_RST#
3920_RST# 5
0.1U/10V_4 4.7U/6.3V_6
KB3926 PV, change from 18p to 27p C144 0.1U/10V_4
from vendor update R105 47K_4
+3VPCU
For KB3926 C version
BLUELED R41 100K/F_4

29,33 BLUELED
SCI1# D25 1 2 CH501H-40PT SCI# 13
DNBSWON#1 D12 1 2RB500V-40 Change D12, D16 to RB500

DNBSWON# 13
for current loss
+3VPCU_EC +3VPCU +3VPCU
1
KBSMI#1 D27 1 2RB500V-40 KBSMI# 13
D26
1SS355
L13
2
*SBK160808T-680Y-N(0.3A,68) +5VPCU
AD_TYPE R109 100/F_4
U19 AD_ID 40
MAINON C464 2200P/50V_4 PV,add for EMI 5 1
VOUT VIN
C114 C147 R108
C613 24.3K/F_4
4.7U/6.3V_6 3 0.1U/10V_4
A SHDN *1U/6.3V_4 A
4 NR/FB GND 2
C130
TPS73133
*1U/6.3V_4
PROJECT : AX2/7
Custom 1A
KB3926/ROM/TP
5 4 3 http://laptop-schematic.com/ 2
NB5/RD2
Date: Thursday, December 24, 2009
1
Sheet 32 of 42
A B C D E
Mini PCI-E Card 1 WLAN

+3V
+3VSUS
R110 *10K/F_4
+1.5V
33
2
SI , udpate footprint to
C583 C139 C132
MIPCI-C-1759513-52P-LDV-SMT 0.01U/16V_4 0.1U/10V_4 10U/6.3V_8
+1.5V
D D
3 1 MINICAR_PME#
13,30 PCIE_WAKE#
CN20 Q16
R43 *0_6 51 52 *PDTC144EU
+5V Reserved +3.3V
49 Reserved GND 50
47 Reserved +1.5V 48
45 46 MINI_BLED R47 *0_4 +3V
32 EC_DEBUG1 Reserved LED_W PAN# BLUELED 29,32
43 44 RF_LINK#
Reserved LED_W LAN# RF_LINK# 32
41 42 R54 10K/F_4
Reserved LED_W W AN# +3V
39 Reserved GND 40
37 Reserved USB_D+ 38 USBP10+ 13
35 36 C148 C170
GND USB_D- USBP10- 13
PCIE_TXP1 33 34 0.1U/10V_4 10U/6.3V_8
9 PCIE_TXP1 PETp0 GND
PCIE_TXN1 31 32 DAT_SMB R63 *0_4/S PDAT_SMB 6,7,13
9 PCIE_TXN1 PETn0 SMB_DATA
29 30 CLK_SMB R67 *0_4/S PCLK_SMB 6,7,13
GND SMB_CLK
27 GND +1.5V 28
PCIE_RXP1 25 26
9 PCIE_RXP1 PERp0 GND
PCIE_RXN1 23 24
9 PCIE_RXN1 PERn0 +3.3Vaux
21 22 MINI_PLTRST#
GND PERST# MINI_PLTRST# 12
PCLK_LPC_DEBUG 19 20
12 PCLK_LPC_DEBUG Reserved W _DISABLE# RF_OFF# 14
MINI_PLTRST# 17 18 INTEL WLAN
SI , add from HP request Reserved GND +3V
CARD PIN 20
15 16 LAD0 LAD0 12,32 W_DISABLE#
PCIE_MINI1_CLKP GND Reserved LAD1
12 PCIE_MINI1_CLKP 13 REFCLK+ Reserved 14 LAD1 12,32 have
PCIE_MINI1_CLKN 11 12 LAD2 LAD2 12,32
12 PCIE_MINI1_CLKN REFCLK- Reserved internal
9 10 LAD3 LAD3 12,32
WLAN_CLKREQ# GND Reserved LFRAME# pull-up 110k
13 WLAN_CLKREQ# 7 CLKREQ# Reserved 8 LFRAME# 12,32
14 BT_COMBO_EN# 5 6 ohm C81 C582
BT_CHCLK +1.5V 0.1U/10V_4 1U/10V_4
3 BT_DATA GND 4
T131 MINICAR_PME# 1 2
W AKE# +3.3V
C C
MINI PCIE H=9.0
BT_DATA,BT_CHCLK,CLKREQ# R106 DFHD52MS154
internal pull-DOWN 100k *10K/F_4 MIPCI-C-1759513-52P-LDV-SMT
ohm
PCLK_LPC_DEBUG R82 *0_4 C106 *27PF/50V_4
for EMI request
朝朝 LED1 3P WHITE LED R531 390_6

14 SATA_LED# 1 2 +3V_SATA_LED 1 2 +5V
B B
SI , change footprint to ledl-s110kgct-3p-nb5
A A
PROJECT : AX2/7
Custom 1A
Mini CARD/LED
NB5/RD2
A B C
http://laptop-schematic.com/ D E
5 4 3 2 1
DC/DC +3V_ALW/+5V_ALW/+5V_ALW2 /+15V_ALW

34
+VIN
Place these CAPs Place these CAPs
D close to FETs close to FETs D
PD14
PR100 PR99
1 2
8206ON_LDO
1K/F_4 150K/F_4
2
PC57 PC56 PC55 PC59 PC58 UDZ5V6B-7-F PC23 PC25 PC60 PC51
2200P/50V_4
2200P/50V_4
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
+5V_VCC1
*4.7U/25V_8
1
2
PC93 +3.3V +/- 5%
1
0.1U/25V_4
Countinue current:5A
1
PC99
1U/6.3V_4
Peak current:6A
2
+5V +/- 5%
OCP minimum:7.5A
Countinue current:5A +5VALW
Peak current:6A
5
6
7
8
PC96
6 *0.1U/10V_4
OCP minimum:7.5A PV modify 12/17
PC104
2
PC90 4
8
7
6
5
4.7U/6.3V_6 +5V_VCC1
+5VPCU 0.1U/10V_4 +3VPCU
PV modify 12/17 PQ52
8
7
5
4
3
2
1
4 AO4496
PL10
LDOREFIN
LDO
IN
N.C
ONLDO
VCC
TON
REF
2.2UH/8A
3
2
1
PQ57 +3.3V_ALWP
C AO4496 C
PR114
2
9 32 249K/F_4
PL3 PR73 BYP REFIN2
10 31 1 2
1
2
3
OUT1 ILIM2
5
6
7
8
2
2.5uH/7.5A 249K/F_4 5V_FB1 11 30 3V_FB2 PR192
+5V_ALWP FB1 PU6 OUT2 *2.2_8
1 2 12 ILIM1 SKIP 29
1
PGOOD1 13 RT8206B 28 PGOOD2 PR112
1
PGOOD1 PGOOD2
2
8
7
6
5
14 27 4 0_4 +
ON1 ON2
2
5V_DH 15 26 3V_DH PC216 PC215
1
DH1 DH2
1
5V_LX 3V_LX
0.1U/10V_4
PR190 PC196
220U/6.3V_7343ESR25
16 25
2
LX1 LX2
*1500P/50V_4
+ *2.2_8 4 37
PC211 PC212 PR75 PAD
36
1
PAD
AGND
PGND
0.1U/10V_4
*0_4 PQ53
220U/6.3V_6X4.5ESR18
BST1
BST2
39
VDD
PAD
PAD
PAD
PAD
PAD
PAD
2
PAD
2
DL1
DL2
N.C
40 AO4712
3
2
1
PAD
2
PC194 PR113
2
*1500P/50V_4
PQ49 PC88 PC110 *0_4
38
35
34
33
17
18
19
20
21
22
23
24
42
41
0.1U/25V_4
0.1U/25V_4
PR70 AO4712
1
2
3
1
0_4 Rds(on) 14m ohm
1
Rds(on) 17m ohm PR83 PR104
1
1 2 5V_BST1 3V_BST2
1 2
2_6 2_6
5V_DL 3V_DL
1 +5VALW
PC101
PD9 3 2 1
BAV99
1
+10VALW 2 0.01U/25V_4
PC97 PGOOD2
1U/6.3V_4
2
2
B B
2
1 PR200
PC100 PC105 *0_4/S
0.1U/25V_4
PD13 3 1 2
1
BAV99
1
2 0.01U/25V_4 PGOOD1 HWPG 23,32,35,37,39
+15VALW
1
PD6
1SS355 PC108
1 2 1U/25V_6
2
PR68
1 2 SYSON
+5VALW
100K/F_4
1
PC84
2.2U/6.3V_6
2
+5VPCU
PU9
4
5 1
OT
R217 *0_4/S REF VIN

5 SYS_SHDN#
2
PR133 PC136
*576/F_4 *0.1U/10V_4
GND 2
1
A PR135 A
NTC need place under CPU Socket 3 NTC EN 6 2 1
MAINON 32,37,39,40
CPU Thermal protection at 90 +/-3 degrreC *0_4
2
*RT9726
PR132 PR134
*10K/F_NTC_0603 *100K/F_4
PROJECT : AX2/7
1

EC_SI Size Document Number Rev
Custom 1A
+5V/+3V (RT8206B)
NB5/RD2
5 4 3
5 4 3 2 1
PR66
+5VPCU
+VIN +1.1V Volt +/- 5%
35
8208RTVDD1.1V
10_6
PC87 Peak current: 7A

PC83 1U/6.3V_4
PC193 PC192 PC195 OCP minimum: 9A
1U/6.3V_4
PR65
8208BST1.1V_1
2200P/50V_4
0.1U/25V_4
4.7U/25V_8
1 2
D 2_6 D
5
PC78
+1.1V_DYN
13
0.1U/25V_4
PU3
9
PV modify 12/17 PR71
8208CS1.1V10 12 8208RTDH1.1V 4
VDD
VDDP
BST
CS DH +1.1V_DYN_S1
12.1K/F_4
PR74 *0_4/S
2 1 8208RTPG1.1V
4 11 8208RTLX2.1V PQ50 PL9
23,32,34,37,39 HW PG
3
2
1
PGOOD PHASE AON7410 2.5uH/7.5A
PR61 10K/F_4 8208RTEN1.1V
15 16
PR64
8208TON1.1V 1 2
600 mils
32,36,37,39 VRON EN/DEM TON
232K/F_4
2
17 8 8208RTDL1
PAD DL
1
VOUT
PC76 PR194
*2.2_8 +
G0
FB
D0
14 5
*0.22U/10V_4
G1 D1 PQ51 PC218 PC204
RT8208A AON7702
0.1U/10V_4
4
390U/2.5V_6X5.8ESR10
7
2
DYN_PWR_EN High Low
PR80 EC_SI
8208RTD10.1V PC197
3
2
1
PR88
*1500P/50V_4
+3VPCU 13.3K/F_4
+1.1V_DYN 0.95 1.1 10K/F_4 8208RTFB1.1V
PR79
3
PR72 2.67K/F_4
10K/F_4
PC85 *100P/50V_4
PR95
10 DYN_PW R_EN 2 RDSon=14m ohm
0_4 Vo=0.75(R1+R2)/R2
1
C PC103 C
*2.2U/6.3V_6 +5VPCU PQ8 +VIN
2
1
Reserve for AMD tunning DMN601K-7
PR171 +1.1V Volt +/- 5%
PC178
10_6 Countinue current:5A
1U/6.3V_4
PC174 Peak current: 7A
PC182 PC180 PC179
1U/6.3V_4
OCP minimum: 9A
2200P/50V_4
0.1U/25V_4
4.7U/25V_8
RTBST_1 PR175
5
6
7
8
RTBST
RTVDD
2_6
PC177
13
4
2
PU14
0.1U/25V_4
PV modify 12/17 12 RTDH
VDD
VDDP
BST
PR177 DH
RTILIM 10 PQ65 +1.1V
PR170 *0_4/S 15K/F_4 CS AO4496 +1.1V_S2
2 1 HW PG_S2A 4 11 RTLX PL14
23,32,34,37,39 HW PG PGOOD PHASE 2.5uH/7.5A
600 mils
3
2
1
RT8209A RTTON PR173
5 NC TON 16
PR176 232K/F_4 PV modify 12/14
1
VRON RTEN 15 8 RTDL
EN/DEM DL
5
6
7
8
PGND
VOUT
+
GND
10_4
NC
17 3 PR226 PC239 PC240 PC242

PR174 PAD FB 2.2_8
0.1U/10V_4
10U/6.3V_8
390U/2.5V_6X5.8ESR10
RTFB
2
*1M/F_4 4
14
1
B
PC238 +1.5VSUS 1.2 Volt +/- 5% B
1500P/50V_4
PR168 PR169 PQ64
4.87K/F_4 AO4712 EC_SI Countinue current:0.3A
3
2
1
10K/F_4
PV modify 12/16 PC172
RDSon=20m ohm PC155 PC156
3 VIN NC 5 Peak current:0.5A
*10U/6.3V_8
*0.1U/10V_4
*100P/50V_4 Vo=0.75(R1+R2)/R2 +1.2V
PU11
*RT9025 6
+3VPCU VOUT
VRON PR140
1.1 Volt +/- 5% 2 EN
*10_4
4 8 PC158 PC159 PC160
Countinue current:0.2A +5VPCU VDD GND
*10U/6.3V_8
*10U/6.3V_8
*0.1U/10V_4
ADJ
3 5 PC152 1 9
VIN NC Peak current:0.5A PGOOD GND1
1
PC168 PC169
*0.33U/6.3V_4
PC157
10U/6.3V_8
0.1U/10V_4
7
+1.1VS5
*1U/6.3V_4
2
PU13
RT9025 1.2VADJ PR145
VOUT 6
PR164 R1 *51.1K/F_4
2
32,39 S5_ON 2 EN
10K/F_4 HW PG PR137 *0_4
+5VPCU 4 8 PC173 PC170 PC171 R2 PR141
VDD GND *100K/F_4
10U/6.3V_8
10U/6.3V_8
0.1U/10V_4
ADJ
PC166 1 9
1
PGOOD GND1
1
*0.33U/6.3V_4
A A
PC167 VO=(0.8(R1+R2)/R2)
7
PV modify 12/11
1U/6.3V_4
R2<120Kohm
2
1.1VADJ PR165
R1 38.3K/F_4
2
HW PG
PR163
2
*0_4/S
1
PROJECT : AX2/7
R2 PR162
100K/F_4
VO=(0.8(R1+R2)/R2)
R2<120Kohm
PV modify 12/17
1

Custom 1A
VGA Core/+1.8VGFX/1.0VGFX
NB5/RD2
5 4
3 2 1
A B C D E F G H
+VIN
36
5
6
7
8
PC28 PC24 PC18
2200P/50V_4
0.1U/25V_4
4.7U/25V_8
UGATE_NB 4
ISL6265 Pin1 OFS VFIXEN PQ45

3A
AO4496 +CPUVDDNB
1.2V PL1
V X 2.5uH/7.5A
3
2
1
3.3V
5
6
7
8
X V
1
PR188
1 1
5V 6265AGND 2.2_8 +
X X LGATE_NB 4 PC199 PC205 PC243
EC_SI
0.1U/10V_4
10U/6.3V_8
2
390U/2.5V_6X5.8ESR10
PC5
+5VPCU PR4
10_6 PC190
PQ44 1500P/50V_4
PR7 AO4712
VFIXEN VID Codes
3
2
1
1000P/50V_4
22.1K/F_4 PV modify 12/11
2
PR193 PR191
PC4
47/F_4
47/F_4
SVC SVD Output 1U/10V_4
1
+VIN PHASE_NB
PR3
10_6 6265AGND
1200P/50V_6
0 0 1.4 PC8
PC6
0.1U/50V_6
CPU_VDDNB_RUN_FB_H 3 +VIN
0 1 1.2
PR10
PR186 PC3 CPU_VDDNB_RUN_FB_L 3
1 0 1.0 *0_4/S 0.01U/25V_4 PR19 PR12
1
33P/50V_4
PC7
1_6 16.9K/F_4
6265AGND + +
44.2K/F_6
1 1 0.8 PC10 PC13 PC16 PC36 PC26 PC219 PC220
5
36 BOOT_NB
100U/25V L-F
100U/25V L-F
PR8 PR9
2200P/50V_4
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
4.7U/25V_8
2
+5VPCU 0_4 0_4 modify for SI 1102 D
6265AGND G
PR6 4
0_4 S
49
48
47
46
45
44
37
39
38
41
43
42
PU1
1
2
3
+3VPCU PQ43 PL8 +VCORE
GND
VIN
VCC
FB_NB
COMP_NB
FSET_NB
UGATE_NB
LGATE_NB
BOOT_NB
PHASE_NB
OCSET_NB
VSEN_NB
RTN_NB
PR5 RJK03B9DPA 0.36uH/25A_11
6265AGND *0_4
PR11 1 2
PV modify 12/17 1
OFS/VFIXEN
*10K/F_4 3 4
5
2 PR2 *0_4/S 2
1
16 VRM_PWRGD 2 1 2 34 UGATE_0 D PR187
PGOOD UGATE_0 2.2_8
G EC_SI + +
PR1 *0_4/S PC17 4 PC74 PC67
PR20 S
2 1 3 35 BOOT_0
330u_2V_7343
330u_2V_7343
3 CPU_PWRGD_SVID_REG
2
PWROK BOOT_0
1_6
1
2
3
PR13 *0_4/S 0.22U/25V_6 PQ47 PC189
3 CPU_SVD 2 1 4 33 PHASE_0 RJK03D3DPA 1500P/50V_4
SVD PHASE_0
PR15 *0_4/S ISP_0
3 CPU_SVC 2 1 5 ISL6265AHRTZ-T 32
SVC PGND_0 ISN_0
PV modify 12/17 PR45 *0_4/S
32,35,37,39 VRON 2 1 6 31 LGATE_0 +5VPCU
ENABLE LGATE_0
6265AGND
PR53 PC27
PC11 180P/50V_4 Pin 49 is GND Pin +VIN
10K/F_4 7 30 2 1 +1.1V Volt +/- 5%
RBIAS PVCC
PR21 PR22
PC19
PR29 19.6K/F_4 97.6K/F_4
8 40
4.7U/6.3V_6 Countinue current:35A
OCSET PGND_NB
255/F_4
4700P/25V_4
Peak current: 40A
PR30
5
modify for SI 1102 PC30 PC31 PC34 PC33 PC32
9
VDIFF_0 PGND_1
28
D OCP minimum: 45A
2200P/50V_4
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
4.7U/25V_8
1K/F_4
G
10 26 UGATE_1 4
FB_0 UGATE_1 S +VCORE
PC35
PR37
1
2
3
11 27 PHASE_1 PQ54
COMP_0 PHASE_1 RJK03B9DPA PL7
54.9K/F_4
PC41 1200P/50V_6 PC38 0.36uH/25A_11
PR41 PR42
12 25 1 2
VW_0 BOOT_1
6.81K/F_4 1_6
COMP_1
VDIFF_1
VSEN_0
VSEN_1
180P/50V_4 0.22U/25V_6 3 4
RTN_0
RTN_1
5
ISN_0
ISN_1
ISP_0
VW_1
ISP_1
PC39 29 LGATE_1 PR189
FB_1
LGATE_1
1
D 2.2_8
G + +
1000P/50V_4 4 EC_SI PC68 PC73
13
14
15
16
17
18
19
20
21
22
24
23
3 S 3
330u_2V_7343
330u_2V_7343
2
2
1
2
3
PQ46 PC191
RJK03D3DPA 1500P/50V_4
PR57
Close to ISP_0
18.2K/F_4
CPU
PC48
socket
PR105 PR54 PC47
3.92K/F_4 PR48 PR49
0.1U/25V_4
+VCORE 0_4
0_4
10_4 ISN_0 PR59 ISP_1
PR55
*1000P/50V_4
18.2K/F_4
3 CPU_VDD0_RUN_FB_H PR56
PC49 3.92K/F_4
3 CPU_VDD0_RUN_FB_L
0.1U/25V_4
*6.81K/F_4
PR52 ISN_1
PR102 Parallel 0_4
10_4
PR50
+1.5VSUS
1K/F_4
Close to
Reserve for uni-plane PC62
PR131 CPU socket PR51
*1200P/50V_6
*0_4
PR46
10_4 PC52
*4700P/25V_4
3 CPU_VDD1_RUN_FB_L
PC53
*180P/50V_4
+VCORE 5
*1K/F_4
3 CPU_VDD1_RUN_FB_H
4 4
PR130
PR58 PR60
+VCORE
*255/F_4 *54.9K/F_4 +CPUVDDNB5
10_4
PROJECT : AX2/7
C 1A
CPU_CORE(ISL6265)
NB5/RD2
A B C D
http://laptop-schematic.com/ E F G
Date: Thursday, December 24, 2009 Sheet
H
36 of 42
1 2 3 4 5 6 7 8
+0.75V_DDR_VTT
37
( VTT/2A )
+VIN
+5VPCU +1.5V +/- 5%
+1.5VSUS
1
PC9 PC14 PR18
25
Peak current:12A
2
0_4 PU2
10U/6.3V_8
10U/6.3V_8
2
2
1 24 PD5 PC69 PC72 PC71 PC70
OCP minimum 15A
GND
VTTGND VTT PC20 *RB501V-40
2200P/50V_4
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
PR17
*10U/6.3V_8
5
4 CPU_VTT_SENSE 2 23 modify for SI 1102
1
VTTSNS VLDOIN
D
A PC37 G A
*0_4 1116VBST PR31
3 GND VBST 22 1 2 4
+1.5VSUS_1 2_6 S
0.1U/25V_4 +1.5VSUS_1 +1.5VSUS
PR16
1
2
3
2 1 4 21 1116DRVH PQ48
MODE DRVH RJK03B9DPA PL6
*0_4/S
( 3mA ) CV-10L0MZ01/DC-10F0M102
4,6,7 DDR_VTTREF 5 20 1116LL
VTTREF LL
1
1
PC12 6 19 1116DRVL PQ56 PR197 +
COMP DRVL
1
0.033U/10V_4 RJK03D3DPA 2.2_8 PC214 PC63
2
1
D PR25
0.1U/10V_4
390U/2.5V_6X5.8ESR10
2
2
7 18 G 10K/F_4 PC15
1
NC PGND
*100P/50V_4
4
2
V5FILT PR28 1116VDDQSET S
2
*0_4 8 17 PC210
1
2
3
VDDQSNS CS_GND 1500P/50V_4 PR23
1 2 VDDIO_FB_H 3
PR227 1116CS PR44
32,34,39,40 MAINON 9 VDDQSET CS 16 EC_SI *10K/F_4
0_4 +5VPCU
7.5K/F_4
1
PC50
PR32 PR24 PR26
EC_SI 10 S3 V5IN 15 2 1
*0_4 10K/F_4 *10K/F_4
PR35 1U/6.3V_4
V5FILT PR47
32,39 SUSON 2 1 11 14
2
S5 V5FILT
*0_4/S 10_6 VDDIO_FB_L 3
1
PV modify 12/17 PR40 PR33
+VIN 1116TONSET 12 13 PC46
NC PGOOD HW PG 23,32,34,35,39
1U/6.3V_4
B 619K/F_4 0_4 B
2
RT8207AGQW
+1.5VSUS
+VIN +1.5V_VGA +10VALW
PQ19 PC146
5
PR147 PR148 PR153 AON6426L 0.1U/10V_4
1M_4 *22_8 1M_4 D
G
C
1.5V_OND 4 C
S
3
EC_SI PQ22 (6A )

1
+1.0V +/- 5%
2
3
*DMN601K-7
+1.5V_VGA
1
13 VGA_REQ 1.5V_ONG 2 2
PC153 +1.5VSUS
Peak current:3A
3
0.01U/25V_4
2
PR229 PR146 PC145

2
1
20,32,38 VGACOREON 1M_4 +1.0V_VGA

33K_4 0.1U/10V_4
3 VIN NC 5
PC241 PQ20 PQ21 PC150 PC149
1
0.47U/6.3V_4 DTC144EUA DMN601K-7
10U/6.3V_8
0.1U/10V_4
PV modify 12/17
EC_SI PU12
RT9025 6
VOUT
PR151
32,35,36,39 VRON 2 EN
*10K/F_4
PC154 +5VPCU 4 8 PC147 PC144 PC139
PR150 VDD GND
10U/6.3V_8
10U/6.3V_8
0.1U/10V_4
ADJ
0.47U/6.3V_4 1 9
20,32,38 VGACOREON PGOOD GND1
1
110K/F_4 EC_SI PC148
7
EC_SI
1U/6.3V_4
PR144
1.2VADJ1.0V
R1 25.5K/F_4
2
D PR152 D
12,32,38 VGA_PW ROK 2 1 VO=(0.8(R1+R2)/R2)
*0_4/S R2 PR149 R2<120Kohm
100K/F_4
PV modify 12/17
1
PROJECT : AX2/7
SANTOS INTEL
NB5/RD2
DDR3 (RT8207) 1A

1 2 3 4
http://laptop-schematic.com/ 5 6 7 8
1 2 3 4 5 6 7 8
VGA Core 38
+5VPCU PD10
RB501V-40 +VIN
PR87
2 18208RTBST1
8208RTVDD1
10_6
PC109
A A
PC92 1U/6.3V_4
+3VPCU PC129 PC130 PC128 PC127 +VGACORE +/- 5%
1U/6.3V_4
2200P/50V_4
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
8208BST1_1
1
PR106
2 PC111 Countinue current:8A
5
EC_SI PV modify 12/17
0.1U/25V_4
0_6 Peak current:10.5A
PR85
13
PU7 OCP minimum 12A
9
DEL PD7 10K/F_4
PR111 8208CS1 8208RTDH1
10 12 4
VDD
VDDP
BST
CS DH +VGA_CORE
14.7K/F_4
PR86
2 1 8208RTPG1 4 11 8208RTLX2 PQ63 PL13
12,32,37 VGA_PWROK
3
2
1
PGOOD PHASE AON7410 1UH/11A-PCMD063T-1R0MN
PR92
*0_4/S
8208RTEN1 15 16 8208TON1 PR90 600 mils
20,32,37 VGACOREON EN/DEM TON
232K/F_4
2
100K/F_4 17 8 8208RTDL1
PAD DL
1
VOUT
EC_SI PC102 PR217
0.22U/10V_4 14 5 8208RTD11 *2.2_8 + +
G0
FB
D0
G1 D1 PQ61 PC124 PC125 PC117 PC121 PC226 PC122
RT8208A AON7702
330u_2V_7343ESR6
0.1U/10V_4
*330u_2V_7343ESR9
*10U/6.3V_8
*10U/6.3V_8
*10U/6.3V_8
4
2
PR91
PWRCNTL1 PWRCNTL0 V-CORE PR96 56.2K/F_4
8208RTD10 EC_SI PC225
3
2
1
*1500P/50V_4
L 0 0 0.9V 8208RTFB1
150K/F_4
PR81 12.4K/F_4 PR78
M 0 1 0.96V PR101
+3VPCU PC94 *100P/50V_4
60.4K/F_4
RDSon=14m ohm
B +3VPCU B
10K/F_4 PV modify 12/24
3
10K/F_4
H 1 0 1.06V PR98
Vo=0.75(R1+R2)/R2
18 GFX_CORE_CNTRL0 2
TBD 1 1 1.12V
PQ10
DMN601K-7
3
PQ11
DMN601K-7
18 GFX_CORE_CNTRL1 2
+3V_VGA
PR232
PV modify 12/17 39 MAINON_G
0_4
1 PR14
*22_8
3
PQ24 PQ25
*DMN601K-7 *DMN601K-7
2 2
+1.8V +/- 5%
C C
Countinue current:1.2A +10VALW
1
+3VPCU
Peak current:3A
+VIN
+3VPCU +1.8V_VGA
PR154
1
2
5
6
1M_4
PC2
PR155 3VGFX_OND
0.1U/10V_4
3
3 5 1M_4
VIN NC
3
PD18 PC142 PC143 PQ23
1SS355 DMN601K-7 PQ1
10U/6.3V_8
0.1U/10V_4
4
1 2 ME3424D
1
PU10 PV modify 12/17 3VGFX_ONG 2 0.19A
RT9025 6 PC161 +3V_VGA
VOUT
3
PQ26
0.01U/25V_4
2
VGACOREON PR143 DMN601K-7
2 EN
100K/F_4 PR156 PC1
1
PR157
2
PC140 PC138 PC137 VGACOREON 1M_4
0.1U/10V_4
+5VPCU 4 VDD GND 8 2
EC_SI PC151
10U/6.3V_8
10U/6.3V_8
0.1U/10V_4
10K/F_4
ADJ
1U/10V_4 1 9
1
PGOOD GND1
1
PC141 PC162
7
1
1U/6.3V_4
0.33U/6.3V_4
2
VO=(0.8(R1+R2)/R2)
1.2VADJ1.8VPR139 R2<120Kohm
R1 127K/F_4
2
D D
R2 PR142
100K/F_4
VGA_PWROK
1
PROJECT : AX2/7
Custom 1A
+VGACORE (RT8208/1.8V)
NB5/RD2
1 2 3 4
http://laptop-schematic.com/5 6 7 8
1 2 3 4 5 6 7 8
+VIN +5V +3V +1.8V_VGA +1.5V +15VALW +5VPCU

+VIN
PR160
+3VSUS
PR158
+10VALW
PR159
+3VPCU
39
1
2
5
6
1M_4 *22_8 1M_4 PC164
PR183
0.1U/10V_4
5
6
7
8
1M_4 PC185 SUSD10V 3 2.2A
0.1U/10V_4
PR182 PR184 PR185 PR180 PR97 +3VSUS
3
1M_4 22_8 22_8 *22_8 *22_8 MAIND 4 PQ27 PQ29
4
1
*DMN601K-7 DMN601K-7
A PC165 PQ28 A
5A
2200P/50V_4
PQ37 PQ41 PQ36 PQ14 PQ40 2 2 ME3424D
2
DMN601K-7 DMN601K-7 *DMN601K-7 *DMN601K-7 DMN601K-7 PC188 PQ39 +5V PC163
2200P/50V_4
AO4496 2 PR161 0.1U/10V_4
2
32,37 SUSON 1M_4
2 2 2 2 2
3
2
1
1
PQ30
1
DTC144EUA
3
PC186 SUSON_G
1
0.1U/10V_4
2 PR181 +1.8V +/- 5%
32,34,37,40 MAINON 1M_4
MAINON_G +10VALW +3VPCU Countinue current:0.7A
PQ42
Peak current:1A
1
DTC144EUA
MAINON_G 38 +3VPCU +1.8V
5
6
7
8
PR179
PV modify 12/17 1M_4 PC184
0.1U/10V_4
MAIND10V 4
+VIN +3VLANVCC +10VALW 3 5
PC233 PC232 VIN NC
3
+3VPCU PQ35
10U/6.3V_8
0.1U/10V_4
5.65A
1
DMN601K-7
+3V PV modify 12/17
PC183 PQ38 PU15
2200P/50V_4
PR129 PR125 PR127 2 AO4496 RT9025 6
3
2
1
1M_4 *22_8 1M_4 VOUT
PR219
1
2
5
6
PC131 32,35,36,37 VRON 2 EN
0.1U/10V_4
10K/F_4
B LAN_ON 3 4 8 PC235 PC237 PC229 B
+5VPCU
1
PC187 PC227 VDD GND
10U/6.3V_8
10U/6.3V_8
0.1U/10V_4
ADJ
PQ15 0.1U/10V_4
0.1U/10V_4
1 PGOOD GND1 9
3
1
PQ62 PQ16 ME3424D
4
*DMN601K-7 DMN601K-7 PC234
7
1U/6.3V_4
0.67A
2
1
2 2 +1.5VSUS
PC134 +3VLANVCC 1.2VADJ1.8VPR221
3
2200P/50V_4
R1 127K/F_4
2
2
PR218
32 LAN_POWER 2 23,32,34,35,37 HWPG 2 1 VO=(0.8(R1+R2)/R2)
1
*0_4/S R2 PR220 R2<120Kohm
5
PR128 PC132 PC64 100K/F_4
PQ17 1M_4
0.1U/10V_4
0.1U/10V_4
D
1
1
DTC144EUA LAN_POWER_G G 2.35A PV modify 12/17
4
S +1.5V
+VIN +3VS5 +10VALW AON6426L
1
2
3
PQ7
+3VPCU
PC203 +0.9V +/- 5%
PR178
0.1U/10V_4
1M_4 Countinue current:1.5A
1
Peak current:2A
1
2
5
6
PR167 PR172 PC176

1M_4 *22_8
0.1U/10V_4
2
S5_OND10V 3 +1.5VSUS +0.9V

0.5A
3
PQ33 PQ34
C *DMN601K-7 DMN601K-7 PQ32 +3VS5 C
4
1
ME3424D
2 2 PC181 3 5
VIN NC
2200P/50V_4
PC81 PC82
2
10U/6.3V_8
0.1U/10V_4
PC175
3
PU4 PV modify 12/17

0.1U/10V_4
1
RT9025 6
PR166 VOUT
32,35 S5_ON 2 PR76
1M_4 32,35,36,37 VRON 2
S5_ONG EN
10K/F_4
PQ31 +5VPCU 4 8 PC75 PC61 PC54
1
DTC144EUA PC89 VDD GND
10U/6.3V_8
10U/6.3V_8
0.1U/10V_4
ADJ
0.1U/10V_4
1 PGOOD GND1 9
1
PC77
7
1U/6.3V_4
+2.5 Volt +/- 5%
2
PR67
1.2VADJ1.05V
Countinue current: 200mA PV modify 12/17 R1 12.7K/F_4
2
PR84
Peak current: 600mA 2 1 VO=(0.8(R1+R2)/R2)
23,32,34,35,37 HWPG
*0_4/S R2 PR77 R2<120Kohm
100K/F_4
PR223 PU16 +2.5V
1
10K/F_4 PR230
3 5 68.1K_4
32 VR2.5_ON EN VOUT
1 +
D PC236
+3VPCU VIN R1 PC228 D
PR222 PC231 1U/6.3V_4
*0.1U/10V_4
41.2VSET
*100P/50V_4
2 110K/F_4 PQ66
GND FB
3
PC230 DMN601K-7
1U/6.3V_4
RT9043GB PR231
12,16 VDDR_1.05_EN VDDR_1.05_EN 2 PROJECT : AX2/7
33_4
R2 PR225
100K/F_4
Vout=1.2(1+R1/R2)
VDDR_1.05_EN:
1 : VDDR =1.05V PC244
1
PV modify 12/16 0 : VDDR = 0.9V (Default) 220P/50V_4 Size Document Number Rev
Custom ?
DISCHARGE/3VS5/5VS5/LAN
NB5/RD2
Date: Thursday, December 24, 2009 Sheet 39of 42
1 2 3 4 5 6 7 8
For VDDR 1.05 control
1 2 3 4 5
40
EC_SI
C51 +VAD +PRWSRC EC_SI

1000P/50V_4
DC_JACK
CN19
PC217 C26
0.1U/25V_4
FOR 16"
PL4
90W PQ55
1 +VA_AC +VA P0603BDG 0.1U/25V_4 PQ58 5A/08
32 AD_ID 3 2
4 3 1 8 PL5 CN18
PD16 2 7 BATT+ 2 1
8 2 1
PL12 2 MEK100-05-DPS PC213 3 6 5A/08
7 PC206 1U/25V_6 BATDIS_G SMD
3 4 5 3 10
BATDIS_G 1
A 5A/08 3 10 A
0.1U/25V_4
1
1
PC223 PR201 ACOK_IN FDS6679AZ SMC 4 9
4 PC198 PD15 C581 4 9
0.1U/25V_4
10 5 PL11 100/F_4
PC65 PR205 +VIN
Place these short pad Place this ZVS close to
0.1U/25V_4
PR204 5 7
9 6 5A/08 RC2512-R020 *0.1U/25V_4 +3VPCU 5 7
P4SMAJ20A
0.1U/25V_4
+VH28 close to RSENSE Far-Far away +VIN
DC-IN CONN 150K/F_4 1 2 B_TEMP_MBAT 6 8
2
6 8
1
PR206 PR38 PR39 200045MR008G10JZR
100/F_4 PD17 330_4 330_4 DFAD08MR010
PR202 PR203
PR43
P4SMAJ20A
+5VPCU Place this ZVS close to *0_2/S *0_2/S bat-bp02081-b82d5-7h-8p-l-v
3
5,32 MBDATA PR34
10K/F_6 Diode away +VIN
2
WHITE_LED CSIN
10K/F_4
5,32 MBCLK
3
2 ACOK# CSIP
PC40 +ISL6251_VDD PR27
TEMP_MBAT 32
PQ59 PD3 PD4
*0.1U/25V_4
2 AC_LED_ON# 32 1K/F_4
1
DMN601K-7 PC120 Place these CAPs
UDZ5V6B-7-F
UDZ5V6B-7-F
To PWR LED PQ3 PC29 PC135
close to FETs
1
DTC144EUA
0.01U/25V_4
0.01U/25V_4
1
PR117 PR119 1U/6.3V_4

2_6 20_6
2
2
PR94 PC42 PC44 PC43
PR36
PC115 4.7_6
2200P/50V_4
4.7U/25V_8
0.1U/25V_4
+5VPCU
CSIP_1
0.1U/25V_4 PC107 PC21 PC22
CSIN_1
10K/F_6
1
AMBER_LED ISL6251_VDDP
*100P/50V_4
*100P/50V_4
1 2 Place this cap
close to EC
3
5
4.7U/6.3V_6
2
PQ5
19
20
15
1
PC45 2 MBATLED0# PD11 AON7410
MBATLED0# 32
PR120 RB501V-40
*0.1U/25V_4
CSIP
VDDP
CSIN
VDD
PQ4 20_6 4
B DTC144EUA CSOP CSOP_1 21 PR109 PC112 B
1
1
CSOP 6251B_2 6251B_1 PR196
16
BOOT RL3720WT-R020 +BATCHG
2_6
3
2
1
+VAD PR121 PC119 0.1U/25V_4 PL2
20_6 0.047U/16V_4 17 ISL6251_UGATE 6.8uH
CSON CSON1 UGATE 6251LR 1
22 2
3
CSON
5
18 ISL6251_PHASE
1
PQ2 PHASE
IMD2 PQ6 PR63
14 ISL6251_LGATE AON7702 2.2_8 PC208 PC201 PC200 PC202 PC207 PC209
ACOK# LGATE
4.7U/25V_8
4.7U/25V_8
4.7U/25V_8
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
23 4
+VA ACPRN
EC_SI
4
2
13 PR198 PR195
PR210 PGND *0_2/S *0_2/S
3
2
1
+VAD_1 32,34,37,39 MAINON DCIN 24 12 PC98 6251VREF PC66
PD1 DCIN GND *0.01U/25V_4 1500P/50V_4
1
2
1SS355 PD2 10_8 2 1
2 1 +VAD_1 2 1 PC224 PR213 11 PR116 PR93 CSOP
6251ACIN VADJ *21K/F_4 470K/F_4
1U/25V_6
1 2 2
2
1SS355 ACSET CSON

100K/F_4
PR216 10 PR122
1
150K/F_4 Setting the Vin PR214 ACLIM VADJ
3 2 1 CV-SET 32
EN
VCOMP
min to 12V 12.4K/F_4 6251EN
ICOMP
CELLS
20K/F_4
CHLIM
1
PR124
VRFE
For ACSET 1.26V ACLIM
ICM
75K/F_4 PC123 Place this cap
1
0.01U/25V_4
close to EC
2
PC106 PR110
26251ICOMP 5
9
32 AD_AIR PR215 PU8 *0.01U/25V_4 *11.8K/F_4
2
10K/F_4 Setting the Vin min to 17V ISL6251A
6251VCOMP1
PR123
PC133 For EN = 1.06V
0.1U/10V_4 +ISL6251_VDD 6251VREF EC_ACLIM 32
10K/F_4
C PR126 VREF = 2.39V C
1
12.4K/F_4 PC126
PR208
Place this cap PR212 2 1 0.1U/10V_4 V ACLIM = VREF *
100K/F_4 PC118 CC-SET 32 (Rl // 152K) / (Rhi // 152K + Rlow// 152K)
close to EC 100K/F_4
6251ICM
Input curretn = 2.9A (71.5K , 10K)
6800P/25V_4
1
2
2
Charging Curret setting = (0.05/Vref * Vaclim + 0.05 ) / Rsense
2
PR211 PR118 PC221 PR207 I chg = 165mV / Rsense * (Vchlim / 3.3V)
100P/50V_4
100K/F_4 6251CELLS_1 10K/F_4 100K/F_4
+VAD_1
3
ACOK 3 1+ISL6251_VDD
1
1
PQ60 26251VCOMP2 PR82 ACOK_IN
PR108 PQ12 2 DMN601K-7 22_6 PU5 +VH28
32 CELL_SLT PR103
10K/F_4 DDTA124EUA-7-F 2 1
1 8 PQ13 0_4
2
3
VIN Vout DTC144EUA
PR209
1
PC86 P2805MF A0 PD12
SYS_I 32
1
32 ACIN PC114 PC116 0.1U/25V_4 6251ACIN PC91

100/F_4 2 6 2D/C#_S6A
1 2 D/C# 32
2
GND PG
*100P/50V_4
0.01U/25V_4
0.1U/50V_6
1
2
PR107 CELL_SLT = 1 -- 3 S (Cells = GND 3S) PC222 *1SS355
NC
15K/F_4 3300P/50V_4 PC113
CP
CELL_SLT = 0 -- 4 S (Cells = VDD 4S) 3 5
1
6251ACIN CN D_CAP
*10U/6.3V_8
1
7
4
3
Input Current monitor PC79

V icm = 19.9 * (Vcsip - Vcsin) 1U/25V_6
2
PR89 PC95 2 1
2 2 1 ACOK#
100K/F_4 PC80
1
1U/25V_6 0.01U/25V_4
PQ9 PD8
DMN601K-7 PR69
1
1SS355
1M_4
D D
2
PROJECT : AX2/7
Custom 1A
CHARGER (ISL6251)
NB5/RD2
1 2 3 4 5
5 4 3 2 1
CPU Power 1
CPU Power 2
EC Pin98
SUSON HWPG VRM_PWRGD
+VCORE0
+1.8VSUS
D D
EC Pin99
EC Pin34 MAINON
+VCORE1
VDDA_EN
+0.9VSMVTT
+CPUVDDNB
+2.5V
HWPG
+1.2V
EC Pin101
HWPG
C S5_ON S5_OND +1.1V C
Delay +3VS5
EC Pin101 VCORE_PG
S5_ON
+1.2VS5 +VGACORE
HWPG
+5VSUS EC Pin99
MAINON
EC Pin98 Option 1.8V_OND

Delay +1.8V
SUSON SUSD
Delay +3VSUS VCORE_PG
B B
+5V
+5V
+1.5V
EC Pin99
MAINON MAIND
Delay +3V
1 2 3 4 EC Pin76
A A
S5_ON SUSON MAINON HWPG ECPWROK SB_PWRGD_IN NB_PWRGD_IN
S5_OND SUSD MAIND VCORE_PG Delay 600ms 3.3V 1.8V
RSMRST# VRM_PWRGD
PROJECT : AX2/7
Custom 3A
Power control
NB5/RD2
5 4
3 2 1
5 4 3 2 1
Power & Ground

Label ACTIVE Description Control Signal SMBUS
+VIN S0, S3, S4, S5 AC ADAPTER (19V) DEVICE ADDRESS BUS
+3VPCU S0, S3, S4, S5 ALWAYS POWER (3V) CLOCK GENERATOR
D D
+3V S0 MAINON DDR3
+3VSUS S0, S3 SUSON CPU THERMAL SENSOR
+3VS5 S0, S3, S4, S5 S5_ON CHARGER
+3VLANVCC S0 LAN_POWER
+5VPCU S0, S3, S4, S5 ALWAYS POWER (5V)
+5V S0 MAINON PCB STACK UP

+5V_VCC1 LAYER 1 : TOP
+5VALW LAYER 2 :GND
LAYER 3 : IN1
+10VALW LAYER 4 : IN2
+15VALW LAYER 5 : VCC
C LAYER 6 : BOT C
+1.8V S0 +1.5_ON
+1.8VSUS S0, S3
+1.5V S0 MAINON
PCI DEVICES IRQ ROUTING
+1.5VSUS S0, S3 DDR CORE POWER SUSON
DEVICE IDSEL # REQ/GNT # PCI_INT
+1.5VSUS_1
+1.5V_VGA S0 VGA , VRAM POWER +1.5_ON
+1.2V S0 VRON
+1.2VSUS S0, S3 SUSON
+1.1V S0 VDDPCIE - PCIE-E MAIN POWER VRON
+1.1VS5 S0, S3, S4, S5 STANDBY POWER S5_ON

B B
+1.1V_DYN S0 NB VDDC - CORE LOGIC POWER DYN_PWR_EN
+1.05V S0 HT POWER (1.05V) VRON
+1.0V_VGA S0 PARK DPX_VDD10 POWER VRON
+2.5V S0 CPU VDDA POWER VR2.5_ON
+VCORE0 S0 CPU CORE POWER (?V) VRON
+VCORE1 S0 CPU CORE POWER (?V) VRON
+CPUVDDNB S0 CPU VDDNB POWER VRON
+0.75_DDR_VTT S0 DDR COMMAND & CONTROL PULL UP POWER SUSON
DDR_VTTREF S0, S3 DDR REFERENCE POWER SUSON
+VGA_CORE S0 VGA CORE POWER MAINON

A A
+AVBAT S0, S3, S4, S5 RTC & KBC POWER (3_3V)
PROJECT : AX2/7
Custom<Doc> 1A
NB5/RD2
Date: Wednesday, December 23, 2009 Sheet 42 of 42
5 4 3

HP G56 - G42 - G62 Schematics Â - Compaq Presario CQ56 - CQ62 Schematics Â - 31AX2MB00D0 Â - DA0AX2MB6E0 Â - DA0AX2MB6E1 Â - AX2 - AX7 Motherboard Schematics

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HP G56 - G42 - G62 Schematics Â - Compaq Presario CQ56 - CQ62 Schematics Â - 31AX2MB00D0 Â - DA0AX2MB6E0 Â - DA0AX2MB6E1 Â - AX2 - AX7 Motherboard Schematics

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1 2 3 4 5 6 7 8

AX2/7 SYSTEM DIAGRAM 01

Touch Pad PAGE 31

PV,delete all external clock GEN reserve material

Q19 R170 R171 R190 1K/F_4

+1.5VSUS R224 10K/F_4

Q18 1 2 CPUTEST19 R124 1K/F_4

7 MEM_MB_DQS0_P C12 MB_DQS_H0 MA_DQS_H0 G13 MEM_MA_DQS0_P 6

1K/F_4 *0.47u/6.3V_4 R220

+VCORE U21E +VCORE

RB501V-40 D19 Q21

EC10 0.01U/16V_4 +VGA_CORE +3V

R424 R423 R416

A PV ,Change from +1.5VSUS to +1.5V MSOP CH501H-40PT A

+1.5V R428 10K/F_4

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

MEM_MA_DM3 DM2 DQ41 MEM_MA_DATA42 VSS9

No Vias Between the Trace of PIN to CAP. 10K/F_4 0.01U/16V_4

PV,add from EMI suggestion

SI , remove C100 , C136

+3V +0.75V_DDR_VTT +0.75V_DDR_VTT R347 *0_4/S VREF_CA_A

C39 C40 C31 C34

Size Document Number Rev

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

MEM_MB_DM3 DM2 DQ41 MEM_MB_DATA42 VSS6

+1.5VSUS DE-COUPLING FOR DIMM2(ONE CAP PER POWER PIN)

SI , remove C165 , C236 +1.5VSUS

+3V +0.75V_DDR_VTT +0.75V_DDR_VTT +1.5VSUS

C36 C37 C32 C43

C38 .1U/10V_4 to short pad

HYPER TRANSPORT CPU I/F

U18 HT_CPU_NB_CTL_H0 M22 M24 HT_NB_CPU_CTL_H0

SI , for routing smooth UMA can remove all GFX_TX CAP

C_PEG_TX15 C711 *0.1U/10V_4 PEG_TX15

PCIE I/F GFX

RS880 Display Port Support (muxed on GFX)

GFX_TX0,TX1,TX2 and TX3

GFX_TX4,TX5,TX6 and TX7

18,24 HSYNC_COM R361 0_4 HSYNC_INT A11 B16 LA_CLK

PBY160808T-221Y-N(220,2A) 65 mA VDDLTP18 - LVDS or DVI/HDMI PLL

R131 0_6 +1.8V_AVDDDI_NB AVDDI-DAC Digital PBY201209T-221Y-N(220,2A) 300 mA

Selects if Memory SIDE PORT is available or not +1.8V

RS880M POWER TABLE 11

VDDHTRX +1.1V AVDD +3.3V

VDDHTTX +1.2V AVDDDI +1.8V

VDDG18 +1.8V PLLVDD +1.1V

VDD18_MEM +1.8V PLLVDD18 +1.8V

VDD_MEM +1.8V/1.5V VDDLTP18 +1.8V

IOPLLVDD18 +1.8V VDDLT33 NC

PCI EXPRESS INTERFACES

TC7SH08FU Y21 AC11 AD25

GPP_RX3P AD30/GPIO30 RTC_X2

LAD2 LAD2 32,33

GPP_CLK8N LDT_PG CPU_PWRGD 3

C793 27P/50V_4 SB820M A12 PROJECT : AX2/7

ACPI / WAKE UP EVENTS

USB 1.1 USB MISC

C514 *22P/50V_4 SATA_X2 VIN6/GBE_STAT3/GPIO181 BOARD_ID4

+3V SB820M A12 0 0 0 1 1 AX7 PARK DF

TC7SH08FU 0 0 1 1 0 AX2 PARK FF