Professional Documents
Culture Documents
BJ2.4U/BJ2.5U
PA
Service Manual SDI Plasma Panels: 3122 785 14990
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©
Copyright 2006 Philips Consumer Electronics B.V. Eindhoven, The Netherlands.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic,
mechanical, photocopying, or otherwise without the prior permission of Philips.
Published by EL 0666 BG CD Customer Service Printed in the Netherlands Subject to modification EN 3122 785 15931
EN 2 1. BJ2.4U/BJ2.5U PA Technical Specifications, Connections, and Chassis Overview
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Note: The following connector color abbreviations are used Service Connector (UART)
(acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= 1 - UART_TX Transmit k
Grey, Rd= Red, Wh= White, and Ye= Yellow. 2 - Ground Gnd H
3 - UART_RX Receive j
1.2.1 Side Connections
HDMI 1 & 2: Digital Video, Digital Audio - In
Headphone (Output)
Bk - Headphone 32 - 600 ohm / 10 mW ot 19 1
18 2
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Cinch: Video CVBS - In, Audio - In
Rd - Audio R 0.5 VRMS / 10 kohm jq
Figure 1-4 HDMI (type A) connector
Wh - Audio L 0.5 VRMS / 10 kohm jq
Ye - Video CVBS 1 VPP / 75 ohm jq
1 - D2+ Data channel j
2 - Shield Gnd H
SVHS (Hosiden): Video Y/C - In
3 - D2- Data channel j
1 - Ground Y Gnd H
4 - D1+ Data channel j
2 - Ground C Gnd H
5 - Shield Gnd H
3 - Video Y 1 VPP / 75 ohm j
6 - D1- Data channel j
4 - Video C 0.3 VPPP / 75 ohm j
7 - D0+ Data channel j
8 - Shield Gnd H
USB2.0 9 - D0- Data channel j
10 - CLK+ Data channel j
11 - Shield Gnd H
1 2 3 4 12 - CLK- Data channel j
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300904
14 - n.c.
15 - DDC_SCL DDC clock j
Figure 1-3 USB (type A) 16 - DDC_SDA DDC data jk
17 - Ground Gnd H
1 - +5V k 18 - +5V j
2 - Data (-) jk 19 - HPD Hot Plug Detect j
3 - Data (+) jk 20 - Ground Gnd H
4 - Ground Gnd H
Aerial - In
1.2.2 Digital Media Reader with USB2.0 (for BJ2.4 U PA chassis) - - F-type (US) Coax, 75 ohm D
In sets with the BJ2.4U PA chassis, a 6-in-1 card reader unit is AV1 Cinch: Video YPbPrHV- In
available, which is connected via USB to the Small Signal Gn - Video Y 1 VPP / 75 ohm jq
Board (see also par. “Technical Specifications” -> Bu - Video Pb 0.7 VPP / 75 ohm jq
“Multimedia”). Rd - Video Pr 0.7 VPP / 75 ohm jq
This unit also contains two USB2.0 connectors. Bk - H-sync 0-5V jq
Bk - V-sync 0-5V jq
1.2.3 Rear Connections
AV1 Cinch: Video CVBS - In, Audio - In
POD: CableCARD Interface Ye - Video CVBS 1 VPP / 75 ohm jq
68p - See diagram B10A jk Wh - Audio L 0.5 VRMS / 10 kohm jq
Rd - Audio R 0.5 VRMS / 10 kohm jq
EN 4 1. BJ2.4U/BJ2.5U PA Technical Specifications, Connections, and Chassis Overview
SDI PDP
POWER SUPPLY
B SMALL SIGNAL BOARD
E CONTROL BOARD
SIDE I/O PANEL D
AUDIO AMPLIFIER C
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S BJ3.0E LA
You will find this and more technical information within the
"Magazine", chapter "Repair downloads".
For additional questions please contact your local repair help
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desk.
Regardless of the special lead-free logo (which is not always In September 2003, Philips CE introduced a change in the way
indicated), one must treat all sets from this date onwards the serial number (or production number, see Figure 2-1) is
according to the rules as described below. composed. From this date on, the third digit in the serial
number (example: AG2B0335000001) indicates the number of
the alternative BOM (Bill of Materials used for producing the
specific model of TV set). It is possible that the same TV model
P on the market is produced with e.g. two different types of
4. Mechanical Instructions
Index of this chapter: Notes:
4.1 Cable Dressing • Figures below can deviate slightly from the actual situation,
4.2 Service Positions due to the different set executions.
4.3 Assy/Panel Removal • Follow the disassemble instructions in described order.
4.4 Set Re-assembly
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4.3 Assy/Panel Removal 1. Remove the cables that are guided by the speaker frame
from its clamps [1].
4.3.1 Metal Back Plate 2. Remove parker T10 screws [2] that hold the frame and pull
the frame downwards.
2 2 2 2 2 2 2 2
2 2 2 2
2 2
3 3 3 3 3
3 2 2 2 2 2 2 3
2
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1 1
3 2 2 3 Figure 4-6 Speaker compartment removal
3 3 3 3 3 3 3
There are two AmbiLight Inverter Panels used in this set. The
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the set) are as follows:
Figure 4-4 Metal back plate and rear cover removal 1. Disconnect the cables [1] from the panel.
2. Push back the clamps [2] on the right side that hold the
assy.
4.3.2 Rear Cover
3. Take out the panel (it hinges on the left side).
When defective, replace the whole unit.
1. Remove screws [3].
2. Lift the plastic rear cover from the set. Make sure that wires
and flat foils are not damaged.
4.3.3 Speaker
After removing the rear cover, you gain access to the speakers.
Each speaker is fixed with four T10 screws [1]. See Figure
“Speaker removal”. After removal of these screws, the
speakers can be removed.
Caution: never disconnect the speakers with a playing set,
because otherwise the class-D audio amplifiers could be
damaged!
2
4
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Figure 4-5 Speaker removal
Figure 4-7 AmbiLight right side inverter panel removal
4.3.4 Speaker Compartment
4.3.6 Control Panel
After the speakers have been removed, the plastic speaker
compartment underneath the set can be removed. See Figure The Control Panel can be taken out by removing the two T10
“Speaker compartment removal”. screws [1] that hold the plastic frame. See Figure “Control
EN 10 4. BJ2.4U/BJ2.5U PA Mechanical Instructions
1
1
4
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The assy is packed into two plastic frames. To unpack the G_15960_098.eps
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inner frame, lift the two clamps [1] of the outer frame and take
the inner frame out. See Figure “Control panel frame removal”.
Figure 4-10 Side I/O panel removal
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To take the assy out of the inner frame, lift the two clamps of
the frame [2] and slightly pull the assy out. Only now the cable
can be disconnected.
When defective, replace the whole unit.
1
2
The Side I/O Panel can be removed together with its plastic
casing. See figure “Side I/O panel removal” for details.
1. Disconnect the USB cable and the flat cable [1] from the
panel.
2. Push the plastic frame slightly downwards towards the
bottom of the set [2], and take the frame out together with G_15960_092.eps
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the assy.
3. Push back the clamps [3] on the left side that hold the assy.
4. Take out the assy from the plastic frame, it hinges on the Figure 4-11 Audio Panel removal
right side.
When defective, replace the whole unit. 4.3.9 Small Signal Board (SSB) and Main I/O Panel
2
5 5 2 5 5 2
2
4 3
1
5 2
5
1
5 5
5
2 2
2
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Figure 4-12 Rear SSB shield Figure 4-15 SDI PDP Power supply panel
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4.3.12 Now the AmbiLight lamp units can be removed from the frame.
Each of them is fixed with four T10 parker screws: two on the
inside and two on the outside of the frame.
10
3 10
3
9 12 12 9
4.3.13 LED Panel
4
1. After the AmbiLight diffusor frame has been removed, the
LED Panel is accessible. 11 11
2. Remove the T10 mounting screws that hold the panel. 8
9 9
3. Take out the panel.
When defective, replace the whole unit. Reconnect the earth- 6 12
cable during re-assembly. 9 7 129 9
10
3 5 10
3 9
Notes:
• While re-assembling, make sure that all cables are placed
and connected in their original position. See figure "Cable
dressing".
• Pay special attention not to damage the EMC foams on the
SSB shields. Ensure that EMC foams are mounted
correctly.
EN 14 5. BJ2.4U/BJ2.5U PA Service Modes, Error Codes, and Fault Finding
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• To create a pre-defined setting, to get the same
measurement results as given in this manual. Figure 5-1 SDM service pads
• To override SW protections (only applicable for protections
detected by stand-by processor) and make the TV start up
After activating this mode, “SDM” will appear in the upper right
to the step just before protection (a sort of automatic
corner of the screen (if you have picture).
stepwise start up). See paragraph “Stepwise Start Up”.
• To start the blinking LED procedure (not valid in protection
mode). How to Navigate
When you press the “MENU” button on the RC transmitter, the
set will toggle between the SDM and the normal user menu
Specifications
(with the SDM mode still active in the background).
5.2.2 Service Alignment Mode (SAM) Note: When you have a corrupted NVM, or you have replaced
the NVM, there is a high possibility that you will not have picture
Purpose any more because your display option is not correct. So, before
• To perform (software) alignments. you can initialize your NVM via the SAM, you need to have a
• To change option settings. picture and therefore you need the correct display option. To
• To easily identify the used software version. adapt this option, use ComPair. The correct HEX values for the
• To view operation hours. options can be found in the table below.The display option
• To display (or clear) the error code buffer. code (decimal) is also available on the option code sticker
located inside the TV mentioned by “Screen Diversity” e.g. 044.
Remark: use always 3 digits for the display option code, for “7”
How to Activate SAM
=> “007”.
Via a standard RC transmitter: key in the code “062596”
directly followed by the “INFO” button. After activating SAM
with this method a service warning will appear on the screen,
you can continue by pressing the red button on the RC.
Contents of SAM:
• Hardware Info.
– A. VIPER SW Version. Displays the software version
of the VIPER software (main software) (example:
BJ24U-1.2.3.4_12345 = AAAAB_X.Y.W.Z_NNNNN).
• AAAA= the chassis name.
• B= the region: A= AP, E= EU, L= Latam, U = US.
• X.Y.W.Z= the software version, where X is the
main version number (different numbers are not
compatible with one another) and Y is the sub
version number (a higher number is always
compatible with a lower number). The last two
digits are used for development reasons only, so
they will always be zero in official releases.
• NNNNN= last five digits of 12nc code of the
software.
– B. SBY PROC Version. Displays the software version
of the stand-by processor.
– C. Production Code. Displays the production code of
the TV, this is the serial number as printed on the back
of the TV set. Note that if an NVM is replaced or is
initialized after corruption, this production code has to
be re-written to NVM. ComPair will foresee in a
possibility to do this.
• Operation Hours. Displays the accumulated total of
operation hours (not the stand-by hours). Every time the
TV is switched "on/off", 0.5 hours is added to this number.
• Errors. (Followed by maximal 10 errors). The most recent
error is displayed at the upper left (for an error explanation
see paragraph “Error Codes”).
• Defective Module. Here the module that generates the
error is displayed. If there are multiple errors in the buffer,
which are not all generated by a single module, there is
probably another defect.Take into account that not all
errors will create a defective module message.
• Reset Error Buffer. When you press “cursor right” and
then the “OK” button, the error buffer is reset.
• Alignments. This will activate the “ALIGNMENTS” sub-
menu.
• Dealer Options. Extra features for the dealers.
• Options. Extra features for Service.
• Initialise NVM. When an NVM was corrupted (or replaced)
in the former EMG based chassis, the microprocessor
replaces the content with default data (to assure that the
set can operate). However, all preferences and alignment
values are gone now, and option numbers are not correct.
Therefore, this was a very drastic way. In this chassis, the
procedure is implemented in another way: The moment the
processor recognizes a corrupted NVM, the “initialize
NVM” line will be highlighted. Now, you can do two things
(dependent of the service instructions at that moment):
– Save the content of the NVM via ComPair for
development analysis, before initializing. This will give
the Service department an extra possibility for
diagnosis (e.g. when Development asks for this).
– Initialize the NVM (same as in the past, however now it
happens conscious).
EN 16 5. BJ2.4U/BJ2.5U PA Service Modes, Error Codes, and Fault Finding
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Note: Be very careful which display option code you choose, screen, move the “CURSOR UP/DOWN” key to display the
make sure it’s the original one (“Screen Diversity” on the option next/previous menu items.
code sticker).In case the wrong display option code is used the • With the “CURSOR LEFT/RIGHT” keys, it is possible to:
TV can start rebooting. – (De) activate the selected menu item.
• Store. All options and alignments are stored when – (De) activate the selected submenu.
pressing “cursor right” and then the “OK”-button
• SW Maintenance. How to Exit SAM
– SW Events. Not useful for service purposes. In case of Use one of the following methods:
specific software problems, the development • Press the “MENU” button on the RC-transmitter.
department can ask for this info. • Switch the set to STAND-BY via the RC-transmitter.
– HW Events. Not useful for service purposes. In case of
specific software problems, the development Note: As long as SAM is activated, it is not possible to change
department can ask for this info. a channel. This could hamper the White Point alignments
because you cannot choose your channel/frequency any more.
How to Navigate Workaround: after you have sent the RC code “062596 INFO”
• In SAM, you can select the menu items with the “CURSOR you will see the service-warning screen, and in this stage it is
UP/DOWN” key on the RC-transmitter. The selected item still possible to change the channel (so before pressing the
will be highlighted. When not all menu items fit on the “OK” button).
Service Modes, Error Codes, and Fault Finding BJ2.4U/BJ2.5U PA 5. EN 17
5.2.3 Customer Service Mode (CSM) • Digital Processing. Indicates the selected digital mode.
Possible values are “STANDARD” and “PIXEL PLUS”.
Purpose Change via “MENU”, “TV”, “PICTURE”, “DIGITAL
When a customer is having problems with his TV-set, he can PROCESSING”.
call his dealer or the Customer Helpdesk. The service • TV System. Gives information about the video system of
technician can then ask the customer to activate the CSM, in the selected transmitter.
order to identify the status of the set. Now, the service – M: NTSC M signal received
technician can judge the severity of the complaint. In many – ATSC: ATSC signal received
cases, he can advise the customer how to solve the problem, • Center Mode. Not applicable.
or he can decide if it is necessary to visit the customer. • DNR. Gives the selected DNR setting (Dynamic Noise
The CSM is a read only mode; therefore, modifications in this Reduction), “OFF”, “MINIMUM”, “MEDIUM”, or
mode are not possible. “MAXIMUM”. Change via “MENU”, “TV”, “PICTURE”,
“DNR”
• Noise Figure. Gives the noise ratio for the selected
How to Activate CSM
Key in the code “123654” via the standard RC transmitter. transmitter. This value can vary from 0 (good signal) to 127
(average signal) and to 255 (bad signal). For some
software versions, the noise figure will only be valid when
Note: Activation of the CSM is only possible if there is no (user)
menu on the screen! “Active Control” is set to “medium” or “maximum” before
activating CSM.
• Source. Indicates which source is used and the video/
How to Navigate
audio signal quality of the selected source. (Example:
By means of the “CURSOR-DOWN/UP” knob on the RC- Tuner, Video/NICAM) Source: “TUNER”, “AV1”, “AV2”,
transmitter, you can navigate through the menus.
“AV3”, “HDMI 1”, “SIDE”. Video signal quality: “VIDEO”, “S-
VIDEO”, “RGB 1FH”, “YPBPR 1FH 480P”, “YPBPR 1FH
Contents of CSM 576P”, “YPBPR 1FH 1080I”, “YPBPR 2FH 480P”, “YPBPR
• SW Version (example: BJ24U-1.2.3.4_12345). Displays 2FH 576P”, “YPBPR 2FH 1080I”, “RGB 2FH 480P”, “RGB
the built-in main software version. In case of field problems 2FH 576P” or “RGB 2FH 1080I”. Audio signal quality:
related to software, software can be upgraded. As this “STEREO”, “SPDIF 1”, “SPDIF 2”, or “SPDIF”.
software is consumer upgradeable, it will also be published • Audio System. Gives information about the audible audio
on the Internet. system. Possible values are “Stereo”, ”Mono”, “Mono
• SBY Processor Version. Displays the built-in stand-by selected”, “Analog In: No Dig. Audio”, “Dolby Digital 1+1”,
processor software version. Upgrading this software will be “Dolby Digital 1/0”, “Dolby Digital 2/0”, “Dolby Digital 2/1”,
possible via a PC and a ComPair interface (see chapter “Dolby Digital 2/2”, “Dolby Digital 3/0”, “Dolby Digital 3/1”,
Software upgrade). “Dolby Digital 3/2”, “Dolby Digital Dual I”, “Dolby Digital
• Set Type. This information is very helpful for a helpdesk/ Dual II”, “MPEG 1+1”, “MPEG 1/0”, “MPEG 2/0”. This is the
workshop as reference for further diagnosis. In this way, it same info as you will see when pressing the “INFO” button
is not necessary for the customer to look at the rear of the in normal user mode (item “signal”). In case of ATSC
TV.In case you have no picture, the set type and the serial receiving there will be no info displayed.
number are also located at the bottom of the front from the • Tuned Bit. Not applicable for US sets.
TV.There you should find a sticker with the mentioned data • Preset Lock. Indicates if the selected preset has a child
on it.Note that if an NVM is replaced or is initialized after lock: “LOCKED” or “UNLOCKED”. Change via “MENU”,
corruption, this set type has to be re-written to NVM. “TV”, “CHANNELS”, “CHANNEL LOCK”.
ComPair will foresee a possibility to do this. • Lock After. Indicates at what time the channel lock is set:
• Production Code. Displays the production code (the serial “OFF” or e.g. “18:45” (lock time). Change “MENU”, “TV”,
number) of the TV. Note that if an NVM is replaced or is “CHANNELS”, “LOCK AFTER”.
initialized after corruption, this production code has to be • TV Ratings Lock. Indicates the “TV ratings lock” as set by
re-written to NVM. ComPair will foresee a possibility to do the customer. Change via “MENU”, “TV”, “CHANNELS”,
this. “TV RATINGS LOCK”. Possible values are: “ALL”,
• Code 1. Gives the latest five errors of the error buffer. As “NONE”, “TV-Y”, “TV-Y7”, “TV-G”, “TV-PG”, “TV-14” and
soon as the built-in diagnose software has detected an “TV-MA”.
error the buffer is adapted. The last occurred error is • Movie Ratings Lock. Indicates the “Movie ratings lock” as
displayed on the leftmost position. Each error code is set by the customer. Change via “MENU”, “TV”,
displayed as a 2-digit number. When less than 10 errors “CHANNELS”, “MOVIE RATINGS LOCK”. Possible values
occur, the rest of the buffer is empty (00). See also are: “ALL”, “NR”, “G”, “PG”, “PG-13”, “R”, “NC-17” and “X”.
paragraph Error Codes for a description. • V-Chip Tv Status. Indicates the setting of the V-chip as
• Code 2. Gives the first five errors of the error buffer. See applied by the selected TV channel. Same values can be
also paragraph Error Codes for a description. shown as for “TV RATINGS LOCK”.
• Headphone Volume. Gives the last status of the • V-Chip Movie Status. Indicates the setting of the V-chip
headphone volume, as set by the customer. The value can as applied by the selected TV channel. Same values can
vary from 0 (volume is minimum) to 100 (volume is be shown as for “MOVIE RATINGS LOCK”.
maximum). Change via ”MENU”, “TV”, “SOUND”, • Options 1. Gives the option codes of option group 1 as set
“HEADPHONE VOLUME”. in SAM (Service Alignment Mode).
• Dolby. Indicates whether the received transmitter • Options 2. Gives the option codes of option group 2 as set
transmits Dolby sound (“ON”) or not (“OFF”). Attention: The in SAM (Service Alignment Mode).
presence of Dolby can only be tested by the software on • AVL. Indicates the last status of AVL (Automatic Volume
the Dolby Signaling bit. If a Dolby transmission is received Level): “ON” or “OFF”. Change via “MENU”, “TV”,
without a Dolby Signaling bit, this indicator will show “OFF” “SOUND”, “AVL”. AVL can not be set in case of digital
even though a Dolby transmission is received. audio reception (e.g. Dolby Digital or AC3)
• Sound Mode. Indicates the by the customer selected • Delta Volume. Indicates the last status of the delta volume
sound mode (or automatically chosen mode). Possible for the selected preset as set by the customer: from “-12”
values are “STEREO” and “VIRTUAL DOLBY to “+12”. Change via “MENU”, “TV”, “SOUND”, “DELTA
SURROUND”. Change via “MENU”, “TV”, “SOUND”, VOLUME”.
“SOUND MODE”. It can also have been selected • HDMI key validity. Indicates the key’s validity.
automatically by signaling bits (internal software). • IEEE key validity. Indicates the key’s validity (n.a.).
• Tuner Frequency. Not applicable for US sets.
EN 18 5. BJ2.4U/BJ2.5U PA Service Modes, Error Codes, and Fault Finding
• POD key validity. Indicates the key’s validity, this will only • Switches the Ambi Light board to protection if needed (in
work with an authentic POD card. case of protection only the lamps switch off, no set
• Digital Signal Quality. not applicable protection is triggered).
How to Exit CSM There are two ways of protection: parallel arcing protection and
Press any key on the RC-transmitter (with exception of the serial arcing protection.
“CHANNEL +/-”, “VOLUME”, “MUTE” and digit (0-9) keys). Parallel arcing protection is performed by sensing the switching
frequency. In case of short circuit of the transformer output, this
5.2.4 Service Mode of Converter Boards for Ambi Light frequency > 100 kHz and the board goes into protection.
Serial arcing protection is performed by detection of arc in
ground wire of the lamp units. In this case, the protection pulse
Purpose
is transmitted via an opto-coupler.
To switch on the lamps manually in case I2C-bus triggering
fails. Protection can be disabled by short-circuiting diode 6112 or
capacitor 2173 or by connecting pin 8 of the microprocessor to
ground.
The Service Mode can be activated by disconnecting
connectors 1M59 and 1M49 and then by shorting for a moment
the two solder pads [1] on the Ambi Light Inverter Panel. See
figure “Service Mode pads AmbiLight panel”.
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Inverters +12Va
Board select
µProcessor
PWM out
I²C
Lamp unit B
Protection
Repair Tips when the TV is in a protection state detected via the Stand-by
In case only one or no lamp unit at all works, probably the Processor (and thus blinking an error) and SDM is activated via
+12Vb (12 - 13 V) is not available or the fuse is broken. Check shortcutting the pins on the SSB, the TV starts up until it
for broken MOSFETS or check if they are switched off properly reaches the situation just before protection. So, this is a kind of
by the transistors connected to the PWM outputs of the automatic stepwise start-up. In combination with the start-up
microprocessor. diagrams below, you can see which supplies are present at a
certain moment.
In case the Ambi Light switches off after two seconds, serial Important to know here is, that if e.g. the 3V3 detection fails
arcing or parallel arcing protection is active. Serial arcing (and thus error 11 is blinking) and the TV is restarted via SDM,
protection can be excluded by disconnecting the opto-coupler; the Stand-by Processor will enable the 3V3, but will not go to
check for bad solder joints on transformer or lamp units. protection now. The TV will stay in this situation until it is reset
Parallel arcing protection can be disabled by grounding pin 8 of (Mains/AC Power supply interrupted).
the microprocessor. Usually the switching frequency (normally
63 kHz) will then be too high. Possible causes are one The abbreviations “SP” and “MP” in the figures stand for:
MOSFET of the converter has no gate drive or is broken, or • SP: protection or error detected by the Stand-by
there is a short-circuit of the output of the transformer. Processor.
• MP: protection or error detected by the VIPER Main
Processor.
5.3 Stepwise Start-up
Off
Mains
“off” Mains
“on”
Stand-by Semi
(Off St-by)
Active
- No data Acquisition required
and no POD present
Stand-by
- St-by requested
- Tact SW pushed - Tact SW pushed
- WakeUp requested
- Acquisition needed
POD*
Stand-by
GoToProtection
Protection
On
* Only applicable for sets with CableCARD TM
slot (POD)
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autonomous action
Standby Supply starts running.
+5V2, 1V2Stb, 3V3Stb and +2V5D become present.
In case of PDP 3V3 Vpr to CPU PDP becomes present.
st-by µP resets If the protection state was left by short circuiting the
SDM pins, detection of a protection condition during
startup will stall the startup. Protection conditions in a
playing set will be ignored. The protection mode will
All I/O lines have a “high” default state:
- Assert the Viper reset. not be entered.
- Sound-Enable and Reset-Audio should remain “high”.
- NVM power line is “high”, no NVM communication possible.
No Audio Error
SP
Switch “low” the NVM power reset line. Add a 2ms delay
Switching the POD-MODE
low in an FHP PDP set
*
Switching the POD-MODE and the
“on” mode “low” in an
SDI PDP set
makes the PDP supplies go to the
*
before trying to address the NVM to allow correct NVM “on” mode.Within 4 seconds, a
makes the CPUGO go “high”
initialization. valid LVDS must be sent to the
and starts the PDP CPU.
display to prevent protection.
(valid for V3 version)
Switch “on” all supplies by switching LOW the POD-MODE except in an FHP PDP Cold
and the ON-MODE I/O lines. Boot
*
+5V, +8V6, +12VS, +12VSW and Vsound are switched on The availability of the supplies is checked through detect signals (delivered by
dedicated detect-IC's) going to the st-by µP. These signals are available for
+12V, +8V6, +5V, +1V2 and +2V5. A low to high transition of the signals should
occur within a certain time after toggling the standby line. If an observers is
Wait 50ms and then start polling the detect- detected before the time-out elapses, of course, the process should continue in
5V, detect-8V6 and detect-12V every 40ms. order to minimize start up time.
detect-5V
received within
2900 ms after POD-MODE
toggle?
* No FHP PDP Set?
No
detect-5V
received within
activate +5V supply detection algorithm Yes No +5V error
2900 ms after PDPGO
toggle?
SP
detect-12VSW received within
No +12V error
2900 ms after POD-mode
toggle?
Yes
detect-8V6 received
within 6300 ms after POD-mode toggle?*
Startup shall not wait for this detection
and continue startup. Yes
No
Enable the +1V2 supply (ENABLE-1V2)
SP return F_15400_096a.eps
To part B To part B 230606
autonomous action
detect-1V2
received within No +1.2V error
250ms?
Yes
SP
Enable the supply for
+2.5V and +3.3V (ENABLE-3V3)
No separate enable and
detect is present for the +2V5
supply in the Baby Jaguar.
No
Start polling the detect-3V3 every 40ms
detect-3V3
received within No +3.3V error
250 ms?
Yes
Yes
EJTAG probe
Yes
connected ?
No
No Cold boot?
Bootscript ready
No
in 1250 ms?
Yes
Viper SW initialization
Switch Viper in reset Code = 53 No
succeeded
within 20s?
Wait 5ms Wait for the +8V6 to be detected if not yet present. (if
it does not come, the standby µP will enter a
protection mode, this is not a dead end here)
3-th try?
Switch POD-MODE and ON-MODE
* Switch “on” the LVDS output of
the PNX2015 with a correct PWR-OK-PDP *
*
I/O line “high”.
SDI PDP clock frequency within 4s after received within 10s
Yes No
Set? switching the POD and “on” after POD and “on” mode
mode to prevent PDP display toggle ?
Yes supply protection.
Log display
error and enter
Yes protection mode
Log Code as
error code
Send STBYEN = 1
FHP PDP PFCON = 1
Yes Switch PDPGO “low”
Set? VCCON = 1
to PDP display (I²C)
No
AVIP needs to be started before the MPIF in order to have a good clock distribution.
AVIP default power-up mode is Standby. The Viper instructs AVIP via I²C to enable all the
PLLs and clocks and hence enter to Full Power mode.
Log appropriate
All observers present with correct state? No
Observer error
Yes
Initialize Columbus
Initialize 3D Combfilter
Initialize AutoTV
Semi-Stand-by
F_15400_096c.eps
* Only applicable for sets with CableCARD TM
slot (POD) 020206
42" FHP A1
Semi Standby
action holder: MIPS
Make PDPGOhigh:
Vs and Va become active
Power-OK detected
No
within 5s (tbc)?
Yes
Yes
Start pollingPDP-IRQ
Active G_15910_010.eps
230606
autonomous action
Semi Standby
Switch Audio-Reset and sound enable low and Log error and
demute enter protection
Yes mode
(see CHS audio LdspMute interface).
Active return SP
G_15910_011.eps
230606
Figure 5-10 “Semi Stand-by” to “Active” flowchart 42” and 50” SDI V4
Service Modes, Error Codes, and Fault Finding BJ2.4U/BJ2.5U PA 5. EN 25
42" FHP A1
action holder: MIPS
autonomous action
autonomous action
Figure 5-12 “Active” to “Semi Stand-by” flowchart 42” and 50” SDI V4
Service Modes, Error Codes, and Fault Finding BJ2.4U/BJ2.5U PA 5. EN 27
Semi Stand by
Switch ambient light to passive mode with RGB *) If this is not performed and the set is
values on zero. *) switched to standby when the ramping of
the EPLD is still ongoing, the lights will
remain lit in standby.
Wait 5ms
Wait 10ms
Wait 5ms
Stand by G_15960_133.eps
100306
Semi Stand by
action holder: MIPS This state transition is entered when standby is requested
and an authenticated POD is present. When in semi-
action holder: St-by standby, the CEservices will set the POD standby NVM
bit and ask infra to reboot. After the reboot, POD standby
autonomous action
will be entered. The Trimedia images are not started in
this case and CEsvc will ask infra to enter the Hardware
POD standby state.
Reboot
POD stand by
action holder: MIPS
+8V6
detected within
No +8V6 error
2000ms after ON-MODE
toggle?
Yes
(AVIPs must be started before the MPIFs in order to have a good clock distribution).
AVIP default power-up mode is Stand-by. The Viper instructs AVIP via I2C to enable all the
PLLs and clocks and hence enter to Full Power mode.
Initialize MPIFs
MPIF should deliver 4 observers:
POR= 0; normal operation
MSUP = 1: Main supply is present
ASUP = 1; audio supply is present
ROK = 1; reference frequency is present (coming from AVIP)
Yes
Initialize Columbus
Initialize 3D Combfilter
Initialize AutoTV
Semi-Stand-by F_15400_101.eps
230606
Semi Stand by
Switch ambient light to passive mode with RGB *) If this is not performed and the set is
values on zero. *) switched to standby when the ramping of
the EPLD is still ongoing, the lights will
remain lit in standby.
Wait 5ms
Wait 10ms
Wait 5ms
Stand by G_15960_133.eps
100306
Semi Stand by
action holder: MIPS This state transition is entered when standby is requested
and an authenticated POD is present. When in semi-
action holder: St-by standby, the CEservices will set the POD standby NVM
bit and ask infra to reboot. After the reboot, POD standby
autonomous action
will be entered. The Trimedia images are not started in
this case and CEsvc will ask infra to enter the Hardware
POD standby state.
Reboot
POD
Wait 5ms
Wait 10ms
Wait 5ms
Stand by G_15960_136.eps
100306
MP SP
Wait 10ms
Wait 5ms
Protection G_15960_137.eps
100306
5.4.1 ComPair
Introduction
ComPair (Computer Aided Repair) is a service tool for Philips
Consumer Electronics products. ComPair is a further
development on the European DST (service remote control),
I2C
which allows faster and more accurate diagnostics. ComPair PC VCR Power
9V DC
The ComPair fault finding program is able to determine the Since 2004, the LVDS output connectors in our Flat TV models
problem of the defective television. ComPair can gather are standardized (with some exceptions). With the two
diagnostic information in two ways: delivered LVDS interface cables (31p and 20p) you can cover
• Automatically (by communicating with the television): most chassis (in special cases, an extra cable will be offered).
ComPair can automatically read out the contents of the
entire error buffer. Diagnosis is done on I2C/UART level.
When operating, the tool will show a small (scaled) picture on
ComPair can access the I2C/UART bus of the television.
a VGA monitor. Due to a limited memory capacity, it is not
ComPair can send and receive I2C/UART commands to
possible to increase the size when processing high-resolution
the microcontroller of the television. In this way, it is
LVDS signals (> 1280x960). Below this resolution, or when a
possible for ComPair to communicate (read and write) to
DVI monitor is used, the displayed picture will be full size.
devices on the I2C/UART buses of the TV-set.
• Manually (by asking questions to you): Automatic
diagnosis is only possible if the microcontroller of the Generally this tool is intended to determine if the SSB is
television is working correctly and only to a certain extent. working or not. Thus to determine if LVDS, RGB, and sync
When this is not the case, ComPair will guide you through signals are okay.
the fault finding tree by asking you questions (e.g. Does the
screen give a picture? Click on the correct answer: YES / How to Connect
NO) and showing you examples (e.g. Measure test-point I7 Connections are explained in the user manual, which is packed
and click on the correct oscillogram you see on the with the tool.
oscilloscope). You can answer by clicking on a link (e.g.
text or a waveform picture) that will bring you to the next Note: To use the LVDS tool, you must have ComPair release
step in the fault finding process. 2004-1 (or later) on your PC (engine version >= 2.2.05).
By a combination of automatic diagnostics and an interactive For every TV type number and screen size, one must choose
question / answer procedure, ComPair will enable you to find the proper settings via ComPair. The ComPair file will be
most problems in a fast and effective way. updated regularly with new introduced chassis information.
Use one of the following methods: Read also paragraph "Error Codes" - "Extra Info".
• Activate the SDM. The blinking front LED will show the
entire contents of the error buffer (this works in “normal
5.8.1 Exit “Factory Mode”
operation” mode).
• Transmit the commands “MUTE” - “062500” - “OK”
with a normal RC. The complete error buffer is shown. When an "F" is displayed in the screen's right corner, this
means that the set is in "Factory" mode, and it normally
Take notice that it takes some seconds before the blinking
happens after a new SSB has been mounted.
LED starts.
• Transmit the commands “MUTE” - “06250x” - “OK” To exit this mode, push the "VOLUME minus" button on the
TV's keyboard control for 5 seconds and restart the set
with a normal RC (where “x” is a number between 1 and
5). When x= 1 the last detected error is shown, x= 2 the
second last error, etc.... Take notice that it takes some 5.8.2 MPIF
seconds before the blinking LED starts.
Important things to make the MPIF work:
• Supply.
5.7 Protections • Clock signal from the AVIP.
• I2C from the VIPER.
5.7.1 Software Protections
5.8.3 AVIP
Most of the protections and errors use either the stand-by
microprocessor or the VIPER controller as detection device. Important things to make the AVIP work:
Since in these cases, checking of observers, polling of ADCs, • Supplies.
filtering of input values are all heavily software based, these • Clock signal from the VIPER.
protections are referred to as software protections. • I2C from the VIPER (error 29 and 31).
There are several types of software related protections, solving
a variety of fault conditions:
5.8.4 PACIFIC 3
• Protections related to supplies: check of the 12V, +5V,
+8V6, +1.2V, +2.5V and +3.3V.
• Protections related to breakdown of the safety check In case the Pacific fails, the TV will go to stand-by. The reason
mechanism. E.g. since a lot of protection detections are for this is, when there is an occasional boot problem of the
done by means of the VIPER, failing of the VIPER Pacific, it will look like the TV has started up in stand-by mode,
communication will have to initiate a protection mode since and the customer can switch it "on" again. When there is an
safety cannot be guaranteed anymore. actual problem with or around the Pacific the TV will go to
stand-by every time you try to start up. So this behavior is an
indication of a Pacific problem.
Remark on the Supply Errors
The detection of a supply dip or supply loss during the normal
playing of the set does not lead to a protection, but to a cold 5.8.5 Ambilight
reboot of the set.
Note: in case of Ambilight protection, the TV itself will not go to
Protections during Start-up protection, only the Ambilight board. When you disconnect the
During TV start-up, some voltages and IC observers are TV from the mains and reconnect again, the Ambilights will
actively monitored to be able to optimize the start-up speed, work again.
and to assure good operation of all components. If these
monitors do not respond in a defined way, this indicates a In case of multiple protections, check and replace the inverter
malfunction of the system and leads to a protection. As the transformers and/or the lamp unit(s).
observers are only used during start-up, they are described in
the start-up flow in detail (see paragraph “Stepwise Start-up"). Protections on the ambilight boards:
• Then, after this voltage becomes present and is detected Note 1: If fuse 1U01 is broken, this usually means a pair of
OK (about 100 ms), the other two voltages (+2V5 and defective power MOSFETs (7U01 or 7U03). Item 7U00 should
+3V3) will be activated (via ENABLE-3V3). be replaced as well in this case.
• The current consumption of controller IC 7U00 is around 20
mA (that means around 200 mV drop voltage across Note 2: The 12V switch and 8V6 switch (see "DC/DC
resistor 3U22). CONNECTIONS" schematic) are not present on board: they
• The current capability of DC/DC converters is quite high are bypassed by jumpers.
(short-circuit current is 7 to 10 A), therefore if there is a
linear integrated stabilizer that, for example delivers 1.8V
from +3V3 with its output overloaded, the +3V3 stays 5.9 Software Upgrading
usually at its normal value even though the consumption
from +3V3 increases significantly. 5.9.1 Introduction
• The +2V5 supply voltage is obtained via a linear stabilizer
made with discrete components that can deliver a lot of The set software and security keys are stored in a NAND-Flash
current. Therefore, in case +2V5 (or +2V5D) is short- (item 7P80), which is connected to the VIPER via the PCI bus.
circuited to GND, the +3V3 will not have the normal value
but much less. The +2V5D voltage is available in standby
It is possible for the user to upgrade the main software via the
mode via a low power linear stabilizer that can deliver up to
USB port. This allows replacement of a software image in a
30 mA. In normal operation mode, the value of this supply
standalone set, without the need of an E-JTAG debugger. A
voltage will be close to +2V5 (20 - 30 mV difference).
description on how to upgrade the main software can be found
• The supply voltages +5V and +8V6 are available on
in chapter 3 "Directions For Use".
connector 1M46; they are not protected by fuses. +12VSW
is protected for over-currents by fuse 1U04.
Important: When the NAND-Flash must be replaced, a new
SSB must be ordered, due to the presence of the security
Fault Finding
keys!!! See table “SSB service kits” for the order codes.
• Symptom: +1V2, +2V5, and +3V3 not present (even for a
Perform the following actions after SSB replacement:
short while ~10ms).
1. Set the correct option codes (see sticker inside the TV).
1. Check 12V availability (fuse 1U01, resistor 3U22,
2. Update the TV software (see chapter 3 for instructions).
power MOS-FETs) and enable signal ENABLE-1V2
3. Perform the alignments as described in chapter 8.
(active low).
4. Check in CSM menu 5 if the HDMI and POD keys are valid.
2. Check the voltage on pin 9 (1.5 V).
3. Check for +1V2 output voltage short-circuit to GND that
can generate pulsed over-currents 7-10 A through coil Table 5-3 SSB service kits
5U03.
4. Check the over-current detection circuit (2U12 or 3U97 Model SSB Assy 12 NC New SSB order
interrupted). Number number code
37PF9431D/37 3104 328 48001 3104 328 48041
• Symptom: +1V2 present for about 100 ms. Supplies +2V5 42PF9431D/37 3104 328 47981 3104 328 48021
and +3V3 not rising. 42PF9631D/37 3104 328 46531 3104 328 47621
1. Check the ENABLE-3V3 signal (active "low"). 42PF9731D/37 3104 328 46541 3104 328 47631
2. Check the voltage on pin 8 (1.5 V). 42PF9831D/37 3104 328 46541 3104 328 47631
3. Check the under-voltage detection circuit (the voltage
50PF9431D/37 3104 328 47981 3104 328 48021
on collector of transistor 7U10-1 should be less than
50PF9631D/37 3104 328 46531 3104 328 47621
0.8 V).
4. Check for output voltages short-circuits to GND (+3V3, 50PF9731D/37 3104 328 46551 3104 328 47641
+2V5 and +2V5D) that generate pulsed over-currents
of 7-10 A through coil 5U00.
5. Check the over-current detection circuit (2U18 or 3U83
interrupted).
• Symptom: +1V2 OK, but +2V5 and +3V3 present for about
100 ms. Cause: The SUPPLY-FAULT line stays "low"
even though the +3V3 and +1V2 is available. The Stand-by
Processor is detecting that and switches all supply
voltages "off".
1. Check the value of +2V5 and the drop voltage across
resistor 3U22 (they could be too high)
2. Check if the +1V2 or +3V3 are higher than their normal
values. This can be due to defective DC feedback of
the respective DC/DC converter (3U18 or 3UA7).
The software image resides in the NAND-Flash, and is It will be possible to upgrade the Stand-by software via a PC
formatted in the following way: and the ComPair interface. Check paragraph "ComPair" on
how to connect the interface. To upgrade the Stand-by
software, use the following steps:
Partition 1
Trimedia2 image
1. Disconnect the TV from the Mains/AC Power.
Trimedia1 image USB CUSTOMER 2. Short circuit the SPI pins [2] on the SSB. They are located
MIPS image outside the shielding (see figure “SPI service pads”).
3. Keep the SPI pins shorted while connecting the TV to the
Mains/AC Power.
Partition 0 4. Release the short circuit after approx. two seconds.
USB Download Application USB SERVICE
5. Start up HyperTerminal (can be found in every Windows
application via Programs -> Accessories ->
uBTM (boot block) EJTAG Communications -> HyperTerminal. Use the following
settings:
E_14700_082.eps
120505
– COM1
– Bits per second = 19200 (9600*)
– Data bits = 8
Figure 5-21 NAND-Flash format
– Parity = none
– Stop bits = 1
Executables are stored as files in a file system. The boot loader – Flow control = Xon / Xoff (none*).
(uBTM) will load the USB Download Application in partition 0 *Note: when having problems with upgrading, use the
(USB drivers, bootscript, etc). This application makes it then values between brackets.
possible to upgrade the main software via USB. 6. Press “Shift U” on your PC keyboard. You should now see
the following info:
Installing "Partition 0" software is possible via an external – PNX2015 Loader V1.0
EJTAG tool, but also in a special way with the USB stick (see – 19-09-2003
description in paragraph “Partition 0“). – DEVID=0x05
– Erasing
Partition 1 (Customer) – MCSUM=0x0000
To do a main software upgrade (partition 1) via USB, the set – =
must be operational, and the "Partition 0" files for the VIPER 7. If you do not see the above info, restart the above
must be installed in the NAND-Flash! procedure, and check your HyperTerminal settings and the
connections between PC and TV.
The new software can be uploaded to the TV by using a 8. Via “Transfer” -> “Send text file ...”, you can send the
portable memory device or USB storage compliant devices proper upgrade file to the TV (e.g. *.hex). This file will be
(e.g. USB memory stick). You can download the new software distributed via the Service Organization.
from the Philips website to your PC. 9. After successful programming, you must see the following
info (this can take several minutes!):
Partition 0 (Service) – DCSUM=0xECB3
If the "Partition 0" software is corrupted, the software needs to – :Ok
be re-installed. – MCSUM=0xECB3
To upgrade this “USB download application” (partition 0 except – Programming
the bootblock), insert an USB stick with the correct software, – PCSUM=0xECB3
but press the “red” button on the remote control (in ”TV” mode) – Finished
when it is asked via the on screen text. 10. If you do not see this info, restart the complete procedure.
11. Close HyperTerminal.
Caution: 12. Disconnect and connect Mains/AC Power again.
• The USB download application will now erase both
partitions (except the boot block), so you need to reload the
main SW after upgrading the USB download application.
As long as this is not done, the USB download application
will start when the set is switched “on”.
• When something goes wrong during the progress of this 2
method (e.g. voltage dip or corrupted software file), the set
will not start up, and can only be recovered via the EJTAG
tool!
Personal Notes:
E_06532_012.eps
131004
Block Diagrams, Test Point Overviews, and Waveforms BJ2.4U/BJ2.5U PA 6. 41
8736
8735
C 2P3 2P3
1736 1735
C AUDIO AMPLIFIER
1M02
7P
8102
9P
9P10
9P
9P
8152
8005
5P
SDI PDP
POWER SUPPLY
RIGHT LEFT
1M02
SPEAKER
7P
SPEAKER
CN1M46
1M03
10P
11P
0308
10P 2P3
8900
8146
8103
8150 8120
30P
20P
4P 31P 1M36 1M20
1H01
USB 1E40
B SSB 1M49 1G50
40P
1H07
1E40
40P
1E62
1U03
1M64
8140
20P
14P
3P
4P
8162
EJTAG
E CONTROL BOARD
D SIDE I/O
1E62
20P
1M36
20P
FILTER
POD TUNER
1N62
4P
5P EXTERNAL
1M15
BE I/O
3P Compair
AC/Supply
1x
USB
1H01
8195
1M01
J LED PANEL
1M01 12P
3P
3P 1M20
8101 G_15930_070.eps
130606
Block Diagrams, Test Point Overviews, and Waveforms BJ2.4U/BJ2.5U PA 6. 42
AL AMBI AL AMBI
9P LIGHT
1M12
LIGHT
1M59 1M39
4P
3P
1M13
11P
1M16
10P
3P
5P
1M10 1M09
4P
1M15
1M49
3P
4P
1M11
11P
6P
1M10
6P
5P
1M49
10P
1M11
4P
11P
9P
1M08 1M09
4P
1M15
3P
1M39 1M59
5P
6P
SDI PDP
1M16
3P
3P
POWER SUPPLY
1M13
11P
1M05
4P
1M04
4P
1M02
AMBI LIGHT UNIT RIGHT
7P
1M46
10P
11P
8900
0308
2P3
10P
8302
8103
8549
8146
8199
8150
8136
7P
8152
1M02 MEMORY
20P
30P
1M52
9P
11P 10P 2P 5P
1735
2P3
9P 3P 6P
1M46 1M03 1M63 1M59 11P 1M01 1M21
1M52
31P 1M36
4P
1G50
USB 1E40
B SMALL SIGNAL BOARD
E CONTROL BOARD
1736
2P3
1H01 40P
1M64
4P
1E40
40P
1E62
20P
8240
D SIDE I/O
Shielding
1H01
8921
4P
8264
Only For
USB 2.0 BE USB
8509
EXTERNALS 8609
1E62
20P
8262 8201
1N62
4P
1M36
11P
1M01 AC INLET
3P 5P
8195
8101
8121
J LED PANEL 6P
1M21 8735 8736
G_15930_064.eps
140606
Block Diagrams, Test Point Overviews, and Waveforms BJ2.4U/BJ2.5U PA 6. 43
4
EF
5
3C73
120 CVBSOUTIF
B5C DVD
SDRAM 2
AUDIO/VIDEO CSS
B2A CHANNEL B3A CVBS-OUTA 19
N.C.
DECODER SOURCE SELECTION CVBS/Y RIM LPF
CVBS-OUTB 22 B4A AUDIO/VIDEO 2D DE
C LAM P N.C. B3B
7TG0
NXT2003 52 50 C-PRIM 7C32
2-Layer
CVBSOUTIF-MAIN 123 CVBS-IF AG28 DAC-CVBS EF Y-CVBS-MON-OUT
DTV CABLE AND Memory secondary
TERRESTRIAL
53 AUX-IF-AGC-MAIN AV1_CVBS 126 CVBS1 MPIF based scaler
VO-2
DV1F-CLK
video out B3f
AH16
RECEIVER N.C. DV1_CLK AD28 Dual SD
9 FAT-ADC-INP-MAIN 1 CVBS2 AF30 DV2A-CLK AH19 Temporal AJ30 C-MON-OUT
QAM 8VSB DV2_CLK single HD B3f
ADC 10 FAT-ADC-INN-MAIN AK28 DV3F-CLK AG25 noise redux AD27 VSYNC-HIRATE
Demodulator DV3_CLK MPE2 decoder B7A
12 CVBS_DTV
STROBE1N 60 STROBE1N-MAIN R4 AVP1_DLK1SN AE28 HSYNC-HIRATE
7T43 A From 250Mhz BE
DATA LINK 1
FEC UPC3220GR + B10C MIPS32
DATA STROBE1P 61 STROBE1P-MAIN R3 AVP1_DLK1SP AVIP-1
AGC MIX 1T41
7 B3f
AV2_Y-CVBS 4 CVBS|Y3 LPF D
LINK POD CPU B6B PACIFIC3: PART2
IN OUT 15 1
DATA1N 62 DATA1N-MAIN R2 AVP1_DLK1DN 7G04
5 C3 1
DV1F
119 1 AV2_C
Micro- I2C TUNER AGC 16 14 B3f Yyuv T6TF4AFG-0003
GPIO 120 8 2FH Scaler and
Controller FRONT_Y-CVBS 8 CVBS|Y4 DATA1P 63 DATA1P-MAIN R1 AVP1_DLK1DP de-interlacer
CATV
35 FS-OUTP 5 OUT OF BAND B3f MUX
FS-OUTN FRONT_C 9 C4 DV1_DATA(0-9) DV1F-DATA 0 TO 7 DV-ROUT(0-9)
36 6 TUNER B3f STROBE3N 50 STROBE3N-MAIN N4 AVP1_DLK3SN 1SD+1HD
AMP AMP LPF
DATA LINK 3
YUV
28 FDC-ADC-INP 10 OUT IN 12 AV7_Y-CVBS 15 Y_COMB A STROBE3P 51 STROBE3P-MAIN N3 AVP1_DLK3SP COLUMBUS 5 Layer
QPSK
ADC 29 FDC-ADC-INN 9 IF 13
B2f C LAM P
D
DATA
LINK 3D Comb
DV2_DATA(0-9)
Video
TS
Video in
primary DV-GOUT(0-9) PACIFIC 3
Demodulator AV7_C 16 C_COMB DATA3N 52 DATA3N-MAIN N2 AVP1_DLK3DN filter and DV2A-DATA 0 TO 7 video out PICTURE ENHANCEMENT
B3f 3 router
2nd noice HD/VGA/
Dual
SIF DATA3P 53 DATA3P-MAIN N1 AVP1_DLK3DP reduction 656
AV1-AV5-AV6_R-PR 25 R|PR|V_1 con DV-BOUT(0-9)
CVBS SEC A/D
MPEG_DATA
B7a Yyuv acces
YUV DV3_DATA(0-9) DV3F-DATA 0 TO 7
63 64 AV1-AV5-AV6_G-Y 26 G|Y|Y_1 RGB 2Fh
B7a Yyuv A G26
STROBE2N 55 STROBE2N-MAIN P4 AVP1_DLK2SN
LEVEL
B10B
DATA LINK 2
AV1-AV5-AV6_B-PB 27 B|PB|U_1 D
7P13 B7a ADAPT U U,V DATA STROBE2P 56 STROBE2P-MAIN P3 AVP1_DLK2SP AVIP-2
CLAMP INV.
MUX AV2-AV4_R-PR 30 R|PR|V_2 A LINK
B3f PAL V 2 DATA2N 57 DATA2N-MAIN P2 AVP1_DLK2DN B6B PACIFIC3: PART2
AV2-AV4_G-Y 31 G|Y|Y_2 D
B10A 7P03 B10C BUFFERING B3f DATA2P 123 DATA2P-MAIN P1 AVP1_DLK2DP
STV0701 MONO SEC.
POD AV2-AV4_B-PB 32 B|PB|U_2 RGB_UD
J27 MP-OUT-FFIELD DV-OUT-FFIELD
B3f CLP PRIM 46 HV-PRM-MAIN M3
AVP1_HVINFO1 MP-OUT-HS
FE-DATA CLP SEC
TIMING RGB_HSYNC J29 MP-HS 116
CIRCUIT 40 CLK-MPIF M4 J28 MP-OUT-VS MP-VS 115
CLP yuv MPIF_CLK RGB_VSYNC
MP-CLKOUT MP-CLK
COMMON AV2_FBL L2 Video MPEG VO-1 RGB_CLK_IN J30 109
CRX-POD-A(8) B3f AVP2_HSYNCFBL2 MP-OUT-DE MP-DE
INTERFACE AV6_VSYNC G2 decoder RGB_DE K26 114
DRX-POD-(9) HARDWARE AVP2_VSYNC2
7P76 B3f
CONTROLLER
7P77
B7A HDMI B7B HDMI: I/O + CONTROL
B4B DV I/O INTERFACE
11 7B11 RIN (0-9) MP-ROUT MP-R(0-9)
POD BUFFER DV1F TDA9975
12
1B01
1P01
RX1-A
2
7 resistance
ARX0+ 1B31 PARX0+ output
RX0+A control
9 ARX0- formatter
PARX0-
RX0-A DV5-DATA
DV5_DATA_0 T0 9 B4G PNX2015: DISPLAY INTERFACE
10 ARXC+ 1B30 PARXC+
RXC+A
12 ARXC- PARXC- D1 DV4-CLK AK8
RXC-1
18
15
19
ARX-DCC-SCL
LVDS_TX 1G50
16 ARX-DCC-SDA
B26 TXPNXA- 5J50 12
HDMI 19 ARX-HOTPLUG 7B30 LVDS_AN
C26 TXPNXA+ 13
CONNECTOR LVDS_AP
VSYNC-HIRATE
1B02 B5A A25 TXPNXB- 5J52 15
LVDS_BN
1 BRX2+ PBRX2+ VHREF DV-HREF AH9 B25 TXPNXB+ 16
1B33 A2 LVDS_BP
RX2+B timing DV-HREF
3 BRX2- PBRX2- Upsample A1 DV-VREF AJ9 DV-VREF
RX2-B generator
4 BRX1+ 1B32 PBRX1+ C2 DV-FREF AK9 D25 TXPNXC- 5J54 18
RX1+B Termination Derepeater DV-FREF LVDS_CN LVDS
6 BRX1- PBRX1- E25 TXPNXC+ 19 CONNECTOR
1
15 interface TXPNXD- 24
19
B3F MPIF MAIN: CONNECTION A BE2 EXTERNALS B D SIDE I/O BE1 EXTERNALS A
1M36 1M36
7A20 1E40 1E40 1060
FRONT_Y-CVBS 2 2 Y 1020
B3a,B7b AV2-AV4_R-PR 7A21 EF 1 1 AV2-AV4_R-PR
BE1 FRONT_C 4 4 C
AV2-AV4_G-Y EF 2 2 AV2-AV4_G-Y AV6_VSYNC AV2_Y-CVBS
B3a,B7b V
BE1 BE2 VIDEO
AV2-AV4_B_PB EF 3 3 AV2-AV4_B-PB BE2
B3a,B7b 1001
4 BE1 AV1-AV6_FBL-HSYNC
B4a AV2-FBL 4 N.C.
H BE2
Y/CVBS EXT2
AV2_C 6 6 AV2_C AV7_Y-CVBS
B3a VIDEO
BE1 VIDEO BE2 1080
B3a AV2_Y-CVBS 7 7 AV2_Y-CVBS 1
BE1 3
B3b Y-CVBS-MON-OUT 9 9 Y-CVBS-MON-OUT
S VIDEO 5 AV2_C
BE1
B5c C-MON-OUT 10 10 N.C. 1002 BE2
4
AV2-STATUS 11 11 N.C. 1 2
B4e 3 1070
N.C REGIMBEAU-AV6-VSYNC S VIDEO 5 C 1
3
B4A,B7a AV6_VSYNC 12 12 AV6_VSYNC 4 AV7_C
BE1 2 EXT1 S VIDEO 5
N.C AV1_CVBS-AV7-Y-CVBS 4 BE2
22 22 AV7_Y-CVBS 2
B3a AV7_Y-CVBS BE1
N.C AV1-STATUS-AV7-C +8V +8V
AV7_C 23 23 AV7_C
B3a BE1
CVBS-TER-OUT 25 25 N.C.
B3a
33 33 1030 1050
B3a FRONT_Y-CVBS FRONT_Y-CVBS
34 34 7010 7000
B3a FRONT_C FRONT_C PR/R PR/R
AV1-AV5-AV6_R-PR AV2-AV4_R-PR
BE2 BE2
Y/G 7012 EXT3 Y/G 7002
B3G MPIF MAIN: CONNECTIONS B 1E62 1E62 AV1-AV5-AV6_G-Y AV2-AV4_G-Y
7A01 BE2
1 BE2 7001
B3a,B7b AV1-AV5-AV6_R-PR 7A02 EF 1 AV1-AV5-AV6_R-PR PB/B 7011 PB/B
BE1
AV1-AV5-AV6_G-Y 2 2 AV1-AV5-AV6_B-PB AV2-AV4_B-PB
B3a,B7b EF AV1-AV5-AV6_G-Y BE1 BE2 BE2
B3a,B7b AV1-AV5-AV6_B-PB EF 3 3 AV1-AV5-AV6_B-PB BE1
AV1-AV6_FBL-HSYNC 5 5 AV1-AV6_FBL-HSYNC
B7b BE1
B7b AV6_VSYNC 6 6 N.C.
G_15930_066.eps
130606
Block Diagrams, Test Point Overviews, and Waveforms BJ2.4U/BJ2.5U PA 6. 44
MAIN B3C IF 3
HYBRID TUNER
1C52
7 107 VIFINP PNX2015 +12-15V LEFT
12 2 1 SPEAKER
7D05÷7D09
8 108 VIFINN 7D10-1
SEE ALSO
B2A CHANEL 7TG0 7T43
BLOCKDIAGRAM B4G AUDIO/VIDEO 7A05-4 1M52 1M52 7D00-01
99 VIDEO 1M02
DECODER
CONTROL
SIFINP 1 1 AUDIO-L LEFT-SPEAKER
NXT2003 UPC3220GR AH1 ADAC1 AUDIO-L
DATA LINK 1 ADAC1 7D10-2 1
DTV 100 3DF2 -12-15V
CATV FOR MORE MORE DETAILS SIFINN DEM DEC 2
CABLE AND SEE ALSO BLOCK DIAGRAM AUDIO
DATA LINK
OUT OF BAND 3
TERRESTRIAL VIDEO AND CONTROL PROCESSING 7A05-3 7D00-2 7DF7-1 7DF3÷7DF4 TO
TUNER I2D +12-15V
RECEIVER DATA LINK 2 5 SUPPLY
AG1 ADAC2 AUDIO-R 3 3 AUDIO-R
MPIF ADAC2
-12-15V 6
CONTROL
B10A COMMON 7P03 B10C COMMON INTERFACE: DC-PROT 7
INTERFACE: PART 1 STV0701 PART 3 7DF7-2
DATA LINK 3
7P76
COMMON 7P77
FE-DATA +12-15V
INTERFACE To 7D30÷7D34
HARDWARE DV1 VIPER AUDIO SWITCH 7D35-1
CONTROLLER BUFFER POD-DATA
3DF3
B5C A DLINK1
POD DATA LPF
CONTROL
D DLINK2 RIGHT-SPEAKER
72 DSNDR2 AC3 ADCAC12 7D35-2
73 DSNDL2 1735
DSND
AUDIO AD3 ADCAC11
AM SOUND AMPS 74 DSNDR1 AE3 3
ADCAC10
75 DSNDL1 AF3 RIGHT
ADCAC19
1 SPEAKER
AUDIO SWITCH AUDIO SWITCH -12-15V
(ANALOG OUT) SOUND-ENABLE 8 8 SOUND-ENABLE
(DIGITAL OUT) B5A
BE2 EXTERNALS B BE2 EXTERNALS B B3G MPIF MAIN: AVIP PROT-AUDIOSUPPLY 7 7 AUDIO-PROT
B4E
CONNECTIONS B
1E62 1E62 MUTE
DIGITAL 1001
SPI-OUT 10 10 SPI-OUT AUDIO-IN1-R 85 R1 40 CLK-MPIF M4
AUDIO INV-MUTE CONTROL CPROT
B3e B3f AUDIO-IN1-L 86 L1 C1
OUT C1
SPI-1 8 8 SPI-1 B3f
B3e AUDIO-IN2-R 83
B3f R2
AUDIO-IN2-L 84 L2
1040 B3f
B3F MPIF MAIN: B3f
AUDIO-IN5-L 128 L5
CONNECTIONS A AUDIO-IN5-R 127 R5
EXT 1 B3f
1E40 1E40
AUDIO IN AUDIO-IN1-R 28 28 AUDIO-IN1-R
L+R+DIG B3d
MT46V32M16P MM_DATA(0-15)
DDR
1B02 SPDIF-HDMI
RX2+ A7
RX2-
ARX2+
1
RX1+
2
RX1- Termination
Resistance
Control Audio DV4-DATA
RX0+
Formatter 3A55
18
RX0- 7A04-1
BRX2+ DV B3F CONNECTIONS A BE2 EXTERNALS B D SIDE I/O
19
INPUT 7A09
AUDIO RXC+ AB1 ADAC7
Audio PLL Audio FIFO ADAC7
MULTIPLEXED RXC- DV5-DATA
HDMI 1010
18
A-PLOP CONTROL
G_15930_067.eps
130606
Block Diagrams, Test Point Overviews, and Waveforms BJ2.4U/BJ2.5U PA 6. 45
3 3 3 USB20-DP1 PCI B8
Plus 2x USB 2.0 RESET-FE-MAIN F1 7020
4 4 4 HOST B2A
1M39
5016 GREEN
4
1
3 +3V3ET-ANA 2 2 2 AJ28 7120
32Mx16
3 2
4 PHYTER II 3 3 AH27 7111 7117 5116 GREEN
3 1
1 8 5 54 4 4 4 14
4
53 STBY-WP-NAND-FLASH NAND
6 B4A
17
FLASH
7 N.C.
USB CONNECTOR (Optional)
8 XIO-A(16-23)
ETHERNET 1x USB 1.1
CONNECTOR 1O00 Connector
(Reserved) 25M
18
PCI-AD(0-31) B3G MPIF MAIN: CONNECTIONS B BE2 EXTERNALS B
RES
B10A POD: COMMON INTERFACE B10C POD: BUFFERING B11B FIREWIRE 1394: BUFFERING
1E62 1E62
B26 GLINK-RXD 13 13 GLINK-RXD
DV1F-DATA(0-7)
7Z10 7106
7H02 7107 1010
7P31 7Z11 2
D26 EF GLINK-IR-OUT 11 11 GLINK-IR-OUT 4
1P01 7P32 7Z12 3
E24 GLINK-TXD 12 12 GLINK-TXD 1
DATOE
DATDIR 7P76
68P PCI-AD(0-31) AJ12
7P03
7P77
STV0701
1LA0
POD-DATA(0-7)
PNX2015 AH12
16M
MDOA(0-7)
43
1TG0
13M5
44 SUPPLY-FAULT AG13
B1A B10A AJ21 RESET-SYSTEM
B3F B5A B3B MPIF MAIN: SUPPLY
AH21 RESET-AUDIO
B4A
AH16 COM-SND
B3G
1M20 1M20 1E40 1E40
KEYBOARD 1 1 KEYBOARD 39 39 KEYBOARD
AK23
3061 6060 7061 1M21 1M21 7LA3
+5v2-STBY
LED1 LED1 6 3 3 LED1 38 38 LED1 EF LED1-3V3
6 AK21
BLUE/GREEN
AJ16 LAMP-ON
B6
+3V3
3H23
3H22
1H07
A25 3Q11 SDA-MM SDA-MM-BUS1
I2C1-SDA JTAG-TRST 1
C25 3Q10 SCL-MM SCL-MM-BUS1
I2C1-SCL EJTAG-DETECT 2
3B61
3B60
3P13
3P12
ERR EJTAG-TDI 3
7V00-5 F26 TXD-VIPER 01 1B01 7B00-7B01 L16 L15 16 10 EJTAG
PNX8550 16 ARX-DDC-SDA PARX-DDC-SDA K16 EJTAG-TDO 5 CONNECTOR
E27 RXD-VIPER (FACTORY USE
15 ARX-DDC-SCL PARX-DDC-SCL K15 7B11-2 7P03 5 JTAG-TRST ONLY)
1
VIPER
2
TDA9975EL STV0701 EJTAG-TMS 7
1B02 7B04-7B05
B27 EJTAG-TDI 16 BRX-DDC-SDA PBRX-DDC-SDA J16 HDMI COM. INTERFACE EJTAG-TCK 9
18
CONTROL HW CONTROLLER
19
D25 EJTAG-TDO 9U07
ERR ERR 15 BRX-DDC-SCL PBRX-DDC-SCL J15 RESET-SYSTEM 11
05 53 A29 EJTAG-TMS B5A
ERR ERR RES
3B08
3B07
3B20
3B19
A28 EJTAG-TCK 43 39
2x HDMI
CONNECTOR JTAG-TRST L14
C2 JTAG-TRST 5 6 5 6
AD4 RESET-SYSTEM 7B02 7B03
M24C02 M24C02
B1C
EEPROM EEPROM
B3B MPIF MAIN: SUPPLY B4E PNX2015: STANDBY & CONTROL B2A MAIN TUNER + OOB TUNER B2B MAIN TUNER +
+3V3 +3V3-MAIN OOB TUNER
7T10
PCA9515ADP
3TJ7
3TJ6
3H05
3H04
3LH4
3LH3
3LG9
3LH1
3LH0
3C40
3C39
3LF8
3TG8
3TG9
ERR
02 43 44 AG9 AF9 G5 G4 B27 C27
3T11
3T10
AF11 JTAG-TRST
58 59
7C00-3 7J00-6 119 I2C-SDA-TUNER-MAINNXT
AF21 EJTAG-DETECT
PNX3000HL PNX2015E 7TG0
NXT2003 120 I2C-SCL-TUNER-MAINNXT
AJ21 RESET-SYSTEM
MPIF CONTROL
COLUMBUS AVIP HD 7L50 DTV 9 8
K4D261638F RECEIVER
ERR ERR
ERR ERR ERR ERR
17 18
45 29 31 27 DDR 1T04
ERR
ERR SDRAM 37 TD1336
32 16Mx16 O/FGHP
MAIN
B6B PACIFIC3: PART 2 B12 MISCELLANEOUS DIG TUNER
SDA-DMA-BUS1 9M05 SDA-DMA-BUS1-ATSC ERR
34
3G77
3G78
B4G PNX2015: DISPLAY INTERFACE B5E VIPER: DEBUG AL AMBI LIGHT
198 200
+5V
+3V3
7G04 7G03
61 PWM-3 8 P87LPC760BDH
3Q30
T6TF4HFG
3Q29
1M59 1M59
3Q03
3Q04
3002
3001
28
7001
P87LPC760BDH 1M39
1
MICRO TO SECOND
CONTROLLER AMBI LIGHT PWB
3
B10D POD: TS BUFFERING B4E PNX2015: STANDBY & CONTROL B10D POD: TS BUFFERING
+3V3-STANDBY 7P15
74HC4066PW
B1C VTUN GENERATOR
3LE3
3LE4
TXD-VIPER 10 8
AE27 3Q15 SDA-UP-VIP B5A 1U03
I2C3-SDA 3U79
TXD-UP 9 11 TXD 1
AG29 3Q14 SCL-UP-VIP
I2C3-SCL B4E UART
3U81 CONNECTOR
3LE2
3LF0
7P17 CONNECTOR
K4D551638F M25P05-AVMN6P 6 (UART)
3LH8 RXD 3O16 3
ERR AF14 13
DDR 44 512K
FLASH 3LH9
SDRAM 2 AG14
G_15930_068.eps
130606
Block Diagrams, Test Point Overviews, and Waveforms BJ2.4U/BJ2.5U PA 6. 47
G_15930_069.eps
140606
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 48
AL1 AL1
5007 22u
5008 22u
5002 22u
2080 3050
3060
3061
3062
3K3
3K3
3K3
100p 47R
1M09 I007 3015 F043
1 A027 1M11
3019
3020
3018
4K7
4K7
4K7
2 RED 1K0 11
7
8
47n
47n
47n
3 7018 6020 10
+12Va BC847BW I008 7015-1
4 9
A 2 SI4946 A
2020
F048
2021
2022
3029 BAS316 8
B4B-PH-K 7002
1
F042 5014 7
LD1117DT 4K7 6000 6
3
1M08 I001
F025 1010 F026 5
47n
47n
47n
3 2 4 SI4946 1
1 IN OUT +5V BAS316 4
7015-2
1m0 16V
2 I003 3
F 3A
2031
2032
2002
100n
2030
2 13
2001
COM
5
6
3 I006 6001 BAS316 3014 F041 2
4 7009 1
F023 3
BZX384-C18
5 3017 F045 1K0 I030
3012 470R
3013 560R
F001
2011 6n8
2012 6n8
F022 I041 B11B-XASK-1
6 2081 3051
6006
6007
4 11
4K7
3036
B6B-PH-K
47R
47R
BZX384-C18
BC847BW 100p
1M12 I042 5
1011 2082 3052 TO
1 12-13V
47R
6 9 CCFL
2 F 3A 100p
3 I018 3011 F040
B 7019 7 B
4 I009 BD21416-00
3030 F050 BLUE 1K0
7
8
2015
B4B-PH-K
22n
47n
47n
47n
1M10 4K7 I010 7016-1
2 SI4946
2040
2041
2042
1 BAS316 A028
BC847BW
1
2 F020 6012 F038
3 I005 6002 6018
3
4 F019 STPS2L30A 7010
47n
47n
47n
4 SI4946
5 3025 F046 BAS316
3035
9001 7016-2
47R
6 F018
2051
2052
5015
2050
5
6
4K7 6003 3010 F037
B6B-PH-K
BC847BW I043 1
BAS316 1K0 2083 3053
C F003 2 13 C
+5V 5011 I002 I017 47R
BZX384-C18
BZX384-C18
100p
3009 560R
3008 470R
2009 6n8
2010 6n8
F002
6008
6009
3
3024
120R I029 A029
4K7
3031
2014
4K7
22n
3016
3028
4 11
4K7
10K
2024
1M59 5
F014 F006 100p 47R
1 I015 F060 I011 3007 F036
6 9
2 F013
F012 7020 1K0
3
GREEN
7
8
BC847BW 7
47n
47n
47n
4 3021
BD21416-00
1K0
4K7
3026
I012 7017-1
5 SI4946
F011 2
2061
2062
2060
100R 6016
0101
2017
3022
1n0
1
F035
D 7017-2 D
7011 I004 6004 BAS316
3
BC847BW
47n
47n
47n
1M49 7003 4
P87LPC764BDH BAS316 SI4946 GND-HV
15
1 I014
Φ
2071
2072
2070
VDD I031
5
6
2 F009 3041 F047 6005 3006 F034
7
3 3023 uC CLKOUT 1060 I032 I045 5016
4
F007 100R 12 4Kb OTP X2 6
220R BAS316 1K0 2085 3055 1
TXD X1
2018
11
47R
1n0
3034
BZX384-C18 47R
BZX384-C18
RXD P2<0:1> 20M 100p
3005 560R
3004 470R
10 1 2 13
2007 6n8
2008 6n8
SCL CMP2
2073
2016
6010
6011
20
15p
15p
BZX384-C10
0 1B BAS316 1n0
8 INT 17 4 11
BAS316
560R 1 1A F049 AL2
I013
2019
2013
2078
3027
6014
6019
4 16
15K
1n0
22n
10n
RST CMPREF R2
AL2 5
1M39 3 14 G2
E 6 CMP1 AL2 AL1 E
2 7 13 B2 AL2
1 AL1 T1 I022 6015 I023 6017
PROT AL3 6 9
2 3038 I026 AL2 P1<0:7> P0<0:7> 3064
3 AL3 PROT BZX384-C15
I035 BAS316 7
560R VSS 68K
BD21416-00
2023
B3B-PH-K
1n0
Ambi Light
1M13 A10 2112 B6 2131 A7 2160 D6 2177 E8 3105 E5 3113 B5 3125 C4 3137 E7 3151 A8 3161 D2 5115 C9 6106 B5 6114 E7 7110 C4 7118 A4 A128 B10 F134 E6 F143 A6 I104 E5 I112 D6 I120 D2 I129 E6 I137 B2
2101 A3 2113 E4 2132 A7 2161 D7 2180 A6 3106 E6 3114 B6 3129 A4 3140 A6 3152 A8 3162 D1 5116 E9 6107 B6 6115 D8 7111 E4 7119 C4 A129 D10 F135 D6 F145 B4 I105 C4 I113 B5 I121 D2 I130 B2 I138 E8
2102 A2 2114 D4 2140 C7 2162 D7 2181 B7 3107 D6 3115 A6 3130 C4 3141 B6 3153 B1 3163 D1 6100 A5 6108 D5 6117 C8 7115-1 A6 7120 D5 A130 D9 F136 D6 F146 C4 I106 A5 I114 E4 I122 E7 I131 B2
2107 E5 2115 B5 2141 C7 2170 E6 2182 B6 3108 D5 3117 B4 3131 D4 3142 B6 3154 B1 3164 D2 6101 B5 6109 D6 6118 E8 7115-2 A6 7130-1 B1 A131 E9 F137 C6 F147 D4 I107 A5 I115 D4 I123 A6 I132 D2
2108 E5 2120 A6 2142 C7 2171 E7 2183 C6 3109 D5 3118 A3 3132 E4 3143 C6 3155 B2 5102 A9 6102 C5 6110 E5 6119 A8 7116-1 C6 7130-2 B2 F101 B3 F138 C6 F148 A4 I108 A5 I11G A8 I124 B6 I133 D1
2109 D5 2121 A7 2150 C7 2172 E7 2184 D6 3110 C6 3119 A3 3133 C4 3144 D6 3156 B2 5107 A8 6103 C5 6111 E6 6120 B2 7116-2 C6 7132-1 D1 F102 C4 F140 B6 F150 C4 I109 B5 I11H A8 I125 B6 I134 D2
2110 D6 2122 A7 2151 C7 2173 E3 2185 E7 3111 B6 3120 A4 3134 B5 3145 E6 3157 B2 5108 A8 6104 E5 6112 E2 6121 D2 7117-1 D6 7132-2 D2 F103 D3 F141 B6 F160 D4 I110 C5 I11I A9 I127 C6 I135 B2
2111 B5 2130 A6 2152 C7 2174 E7 3104 E5 3112 B5 3124 D4 3136 E3 3150 A7 3160 D2 5114 A9 6105 E5 6113 E7 7109 B4 7117-2 E6 A127 A10 F126 A2 F142 A6 I101 A3 I111 D6 I11J A8 I128 D6 I136 B1
1 2 3 4 5 6 7 8 9 10
I101
22u
3150
3151
3152
22u
22u
3K3
3K3
3K3
1m0 16V
3140 I123 2180
2101
F126
5107
5108
5102
+5V 47R 100p
I107 3115 F143
2102
100n
A RED 1K0 A
3120
7
8
3118
3119
4K7
4K7
4K7
7118 I11I
2120
2121
2122
BC847BW 7115-1
47n
47n
47n
I108 6119 I11H 1M13
2 SI4946
3129 F148 I11G A127
1
F142 BAS316 11
4K7 I106 6100 10
3
+12Va +5V 5114
I11J 9
4 SI4946 1
BAS316 8
7115-2
2130
2131
2132
47n
47n
47n
7
2 13
5
6
6101 3114 F141 6
100R
3156
3157
33K
7109 5
I124 3
F101 3117 F145 BAS316 1K0 3141 2181 4
7130-1
AL1 R2 3
BZX384-C18
2112 560R
7130-2 4 11
6n8
6n8
2111470R
BC857BS 4K7 47R 2
BZX384-C18
BC857BS 100p
AL1
3134
6106
6107
47R
I135 G2 1
1 4 BC847BW 5
3112
3113
AL1 PROTB 3153 I136 I137
5 AL1 B2 B11B-XASK-1
B B
2 6 9
100R 3
6 6120 3142 I125 2182
I130 I131 7
I113
BD21416-00
TO
BAS316 47R 100p
F140
CCFL
3111 A128
100R
3154
3155
2115
33K
22n
I109
3130 F150 BLUE 1K0
7
8
2141
2140
2142
7116-1
47n
47n
47n
4K7 I110 6117
2 SI4946
7119
BC847BW
1
F138 BAS316
F102 I105 6102
3
5115
7110
4 SI4946 1
C 3125 F146 BAS316 C
7116-2
2150
2151
2152
47n
47n
47n
2 13
5
6
4K7 6103 3110 F137
12-13V +5V
3133
BC847BW 3
47R
BAS316 1K0 3143 I127 2183
BZX384-C18
2109 470R
2110 560R
6n8
4 11
6n8
47R 100p
100R
BZX384-C18
3160
3161
6108
6109
33K
F103 I115
5
3108
3109
7132-1 A129
2114
7132-2 6 9
22n
BC857BS
3131
BC857BS
3124
4K7
4K7
7
8
BC847BW
BAS316
2160
2161
2162
7117-1
47n
47n
47n
I112 6115
100R
3163
3164
2 SI4946
33K
F147
1
F135 BAS316 GND-HV
6104
3
5116
I104 4 SI4946 1
BAS316 7117-2
2170
2171
2172
47n
47n
47n
AL1(2X) F134 2 13
5
6
AL3 PROT 6105 3106
7111 3 A131
BZX384-C4V7
47R
E E
6112
3136
2173
4 11
47K
10n
47R I138
BZX384-C18
BZX384-C18
I114 100p 6113 2177
2107 470R
560R
I122
6n8
6n8
6110
6111
BZX384-C10
BAS316 1n0
3105
3104
2108
BAS316
2113
2174
3137
6114
6118
6 9
15K
22n
10n
7
BD21416-00
Ambi Light
1 2 3 4 5 6 7
1M15 A1
1M16 D1
A A 3205 C6
3206 D4
5200 I201 6200 3207 D5
I202 3208 E1
120R BAS316 3209 E1
3210 E2
3200
3201
1K0
1K0
I215 3211 E2
3212 B4
3
7200
5200 A1
6201 I203 3202 I204
1 SI2302ADS 5201 B1
I205
5202 B1
2
BAS316 47R
5203 D1
BZX384-C6V8
B B 5204 E1
600R
600R
220R
5201
5202
3203
6202
2200
470p
3212
1M0 5205 E1
6200 A2
6201 B1
6202 B2
6203 D2
6204 E1
6205 E2
GND-HV
6206 E4
7201 7200 B3
I206
+5V 7201 C6
7202 E3
C C
3204
10K
I207 I208 AL1(2X) I201 A2
3205
PROT AL2 I202 A1
1K0 I203 B2
TCET1102(G)
I204 B3
I205 B1
I206 C5
220R
3206
I207 C5
2201
470n
3207
22K
1M16 I208 C6
B03B-XASK-1
I209 E4
I210 D2
I211 D1
1
3
2
D D I212 E2
I213 E3
5203 I210 6203 I214 E1
I211 GND-HV I215 B4
120R BAS316
3208
3209
1K0
1K0
I209
3
BAS316 47R
BZX384-C6V8
BZX384-C12
E E
600R
600R
5204
5205
3211
6205
2202
470p
1M0
6206
GND-HV GND-HV
G_15960_143.eps
3104 313 6097.5 300306
1 2 3 4 5 6 7
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 51
Layout Ambi Light (Top Side) Layout Ambi Light (Bottom Side)
1010 C1 6012 B1 2002 B2 3011 D2 6007 D1
1011 A1 6013 E1 2007 E2 3012 D2 6008 E2
1060 C1 6014 E1 2008 E2 3013 D2 6009 E2
1M08 B1 6015 E1 2009 E2 3014 C2 6010 E2
1M09 B1 6016 E1 2010 E2 3015 D2 6011 E2
1M10 B1 6017 E1 2011 D2 3016 D2 6100 A1
1M11 D2 6018 D1 2012 D2 3017 D2 6101 A1
1M12 A1 6019 E1 2013 E2 3018 E2 6102 B1
1M13 A2 6020 D1 2014 E1 3019 D2 6103 B1
1M15 B2 6112 E1 2015 D2 3020 D2 6104 C2
1M16 E2 6113 C1 2017 D2 3021 D2 6105 C1
1M39 D1 6114 C1 2018 C2 3023 C2 6106 A2
1M49 C1 6115 B1 2019 C2 3024 E2 6107 A2
1M59 D1 6117 A1 2020 C2 3025 D2 6108 B2
2001 D1 6118 C1 2021 C2 3026 E2 6109 B2
2016 C1 6119 A1 2022 C2 3028 D2 6110 C2
2024 C1 6120 E1 2023 C2 3029 D2 6111 B2
2073 C1 6121 B1 2030 C1 3030 D2 6200 C1
2078 E1 6202 C2 2031 C1 3031 E2 6201 C1
2086 E1 6205 E2 2032 C1 3034 E2 6203 E1
2101 A1 6206 E2 2040 D2 3035 E2 6204 E1
2102 B1 7002 B1 2041 D2 3036 D2 7003 C2
2174 C1 7130 E1 2042 D2 3037 C2 7009 D2
2177 C1 7132 B1 2050 D1 3038 C2 7010 D2
2200 C2 7200 C2 2051 D1 3039 C2 7011 E2
2201 E2 7201 E2 2052 D1 3050 D2 7015 C2
2202 E2 7202 E2 2060 E2 3051 D2 7016 D2
3022 C1 2061 E2 3052 D2 7017 E2
3027 E1 2062 E2 3053 D2 7018 D2
3032 E2 2070 E1 3054 E2 7019 E2
3041 C1 2071 E2 3055 E2 7020 E2
3042 E2 2072 E2 3104 C2 7109 A2
3043 E2 2080 D2 3105 B2 7110 A2
3044 E2 2081 D2 3106 B1 7111 C2
3045 E2 2082 D2 3107 B2 7115 A2
3046 E2 2083 D2 3108 B2 7116 A2
3047 E2 2084 E2 3109 B2 7117 B2
3060 D1 2085 E2 3110 A2 7118 A2
3061 D1 2107 C2 3111 B2 7119 A2
3062 D1 2108 B1 3112 A2 7120 C2
3064 E1 2109 B2 3113 A2 9000 C2
3065 E1 2110 B2 3114 A1 9001 B2
3136 E1 2111 A2 3115 A2
3137 C1 2112 A2 3117 A2
3150 A1 2113 C2 3118 B2
3151 B1 2114 B2 3119 B2
3152 B1 2115 A2 3120 B2
3153 E1 2120 A2 3124 B2
3154 E1 2121 A2 3125 A2
3155 E1 2122 A2 3129 A2
3156 E1 2130 A1 3130 A2
3157 E1 2131 A2 3131 B2
3160 B1 2132 A2 3132 C2
3161 B1 2140 A2 3133 B2
3162 B1 2141 A2 3134 A1
3163 B1 2142 A2 3140 A2
3164 B1 2150 A1 3141 A2
3202 C2 2151 A2 3142 A2
3203 C2 2152 A2 3143 B2
3204 E2 2160 B2 3144 B2
3205 E1 2161 B2 3145 B2
3206 E2 2162 B2 3200 B1
3207 E2 2170 B1 3201 B1
3210 E2 2171 B2 3208 E1
3211 E2 2172 B2 3209 E1
3212 C2 2173 C2 3999 A1
5002 D1 2180 A2 5200 C1
5007 E1 2181 A2 5201 B1
5008 D1 2182 A2 5202 C1
5011 C1 2183 A2 5203 E1
5014 C2 2184 B2 5204 E1
5015 D2 2185 B2 5205 E1
5016 D2 3004 E2 6000 D2
5102 A1 3005 E1 6001 D2
5107 B1 3006 E1 6002 D2
5108 A1 3007 E2 6003 E2
5114 A2 3008 E2 6004 E2
G_15960_145.eps 5115 B2 G_15960_146.eps 3009 E2 6005 E2
3104 313 6097.5 300306 5116 B2 3104 313 6097.5 300306
3010 D1 6006 D2
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 52
SSB: DC / DC
1U01 A11 2U17 A5 2U27 B7 2U42 B11 2U85 B8 3U09 D5 3U19 F9 3U29 D4 3U39 G10 3U54 D10 3U69 H9 3U88 A3 3UA4 D13 6U06 E11 7U00 B4 7U11 E5 7U19 H9 FU02 B4 FU19 F12 IU09 C3 IU19 A5 IU29 B6 IU40 D8 IU50 H8 IU60 D7 IU79 B11
1U04 A12 2U18 C6 2U28 B7 2U45 A9 3U00 C2 3U10 C6 3U20 D8 3U30 D5 3U40 B12 3U55 D10 3U70 H8 3U89 B2 3UA5 D13 6U07 G11 7U01-1 A6 7U13-1 B3 7U27 C12 FU03 A7 FU23 A3 IU10 C4 IU20 A2 IU30 B6 IU41 D8 IU51 H8 IU61 G3 IU80 D12
2U09 F2 2U19 B8 2U29 D8 2U46 E13 3U01 C2 3U11 E7 3U21 B7 3U31 D3 3U41 D5 3U56 D10 3U71 H8 3U93 D9 3UA6 F10 6U08 E11 7U01-2 A6 7U13-2 A2 7U28 D11 FU05 F12 IU01 A13 IU11 C2 IU21 B8 IU31 B5 IU42 A10 IU52 H9 IU62 A3 IU81 D12
2U10 G2 2U20 D8 2U30 E8 2U47 H7 3U02 C2 3U12 B8 3U22 A4 3U32 E4 3U42 E5 3U62 H7 3U80 E4 3U94 D10 3UA7 E10 6U11 B14 7U03-1 B6 7U14-1 B13 7U29-1 B10 FU06 C9 IU02 B13 IU12 C2 IU22 B8 IU32 B5 IU43 A12 IU53 H9 IU63 A3 IU83 A15
2U11 E6 2U21 D8 2U31 A6 2U50 A13 3U03 C3 3U13 B8 3U23 A5 3U33 E3 3U43 B13 3U63 H8 3U82 C7 3U95 E10 3UA8 D7 6U12 A14 7U03-2 B6 7U14-2 B14 7U29-2 B9 FU07 E12 IU03 B2 IU13 D5 IU23 A6 IU33 B15 IU44 C6 IU54 B7 IU65 D4 IU86 A7
2U12 C5 2U22 C9 2U32 B6 2U55 E3 3U04 C3 3U14 D8 3U24 A5 3U34 B14 3U44 A13 3U64 H8 3U83 C6 3U96 C6 3UA9 D7 6U17 G11 7U05-1 C2 7U15-1 D10 9U03 H14 FU08 D12 IU04 B4 IU14 C6 IU24 A5 IU34 B14 IU45 C6 IU55 D8 IU66 D4 IU88 F9
2U13 C2 2U23 F2 2U37 F9 2U58 B11 3U05 C3 3U15 E8 3U25 B5 3U35 C14 3U45 D5 3U65 H8 3U84 B12 3U97 C6 5U00 A8 6U18 B12 7U05-2 C4 7U15-2 D10 9U04 A13 FU09 E11 IU05 B4 IU15 C5 IU25 C5 IU35 B13 IU46 B12 IU56 D10 IU67 D6 IUA0 E4
2U14 A2 2U24 B9 2U38 E5 2U71 B15 3U06 C4 3U16 E8 3U26 B6 3U36 H7 3U46 E5 3U66 H9 3U85 A3 3UA1 B10 5U02 A10 6U21 E7 7U07 E7 7U16 B13 9U05 A13 FU13 C7 IU06 B4 IU16 B5 IU26 D7 IU36 B6 IU47 B12 IU57 D10 IU68 E3
2U15 C4 2U25 A10 2U40 G8 2U72 B10 3U07 C6 3U17 E9 3U27 B5 3U37 G1 3U52 B14 3U67 H9 3U86 A3 3UA2 B10 5U03 C8 6U22 D7 7U10-1 D3 7U17 H7 9U06 E12 FU15 C14 IU07 B4 IU17 B5 IU27 E7 IU37 B14 IU48 H8 IU58 D10 IU69 E5
2U16 A4 2U26 D7 2U41 G8 2U73 D12 3U08 C6 3U18 D9 3U28 B6 3U38 G1 3U53 B14 3U68 H9 3U87 A2 3UA3 D11 6U05 E11 6U23 D7 7U10-2 D4 7U18 H8 FU01 A14 FU18 F12 IU08 C4 IU18 A5 IU28 E7 IU38 G7 IU49 H8 IU59 D10 IU78 B10
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
DC / DC
B1A IU86
5U02
10u
IU42
FU01
+12VSW
B1A
2U14
3U85
3U22
100n
10R
10K
T 3A 420
7U01-1
2U17
1U04
22u
IU18 7 8
3U86
2U45
2U25
2 SI4936ADY
IU24
BC847BPN RES
22u
22u
A IU20
7U13-2
IU62 10K 1
12V/3.3V CONVERSION 9U04
9U05
IU01
+12VS A
3U23 IU23 2U31
2U16
1u0
RES
3U44
2U50
1M0
1u0
4R7 3n3 IU43
5U00 6U12
FU03
3U87
3U24
7U01-2
10R
10K
3U21
2U19
2U85
2U24
3U52
100n
4 SI4936ADY
10R
1K0
3n3
22u
7U13-1 T 3A 420 SI4835BDY
IU03 BC847BPN 7U03-2 IU46
3 3U84 7U16
3UA1
2U72
100n
4
1K0
7U00 IU33
14
3U89
2U58
5 6
IU54
NCP5422ADR2
IU22
10K
1u0
IU29 10R IU02 6U11 0V
Φ
3U25
SI4936ADY
VCC
4 5
2R2
BC857BS BAV99 COL
FU02 3 7U29-1 IU47 6U18
IU31 2U42 3U40 BZX384-C12
3 BC847BS
2U27
3U13
3U53
330R
2U71
100n
4 1
6K8
BC857BS
1n0
BST H1 3U26 IU30 2U32 IU79 7U14-2
3U27
3U43
7U29-2
B B
10R
47K
GATE IU32 IU78 470n 100K
IU04 2 4R7 IU34
L1 3n3
3UA2
100K
IU21
7 7U03-1
1 IU17 7 8 0V3 1V0
IU35
IU05 VFB H2
16 SI4936ADY
12V SWITCH
2U28
10 6
1n0
2 GATE IU16 3U28 2
3U12
15
1K0
IU06 L2 3U34 IU37
8 1 7U14-1 2 +5V
1 2R2 IU36
IU07 5 BC847BS
COMP +1 IU14 3U08 IU44 3U82 47K
9 6 1
2 -1
3U02
2U13
220R
3U35
100n
47K
IU10 IS 3K3 6K8 0V3
3U05
220R
13 12
ROSC +2
2U18
3U83
100n
11
6K8
-2 12V/1.2V CONVERSION
GND
IU11
IU08
2U15
3U06
100n
39K
3U07 FU15
C C
3
6 3 POD-MODE
GND-SIG
3U00 3U03 IU09 IU15 6K8 3U10 IU45 3U96
IU12 2 5 FU13 FU06
7U05-1 7U05-2 VSW
BC847BS BC847BS IU25 +1V2
33K 10K 3K3 6K8
1 4
3U01
3U04
22K
22K
2U12
3U97
2U22
100n
6K8
22u
BAS316 5U03 7U27
TS2431
3UA3
3U54
10R
2K2
3U09 6U23 10u 3U55 IU56 IU80
6 1 K A 3
3UA8 IU60
3U20
2U20
2U21
3U18
1% 220R
100n
10R
3n3
GND-SIG GND-SIG GND-SIG GND-SIG GND-SIG GND-SIG GND-SIG IU13 6K8 10K
+2V5 STABILIZER
IU57
7U15-1 2 R
68R
BC847BS
3UA9
IU55
1
IU40
7U28
2
3U29
3U56
PHD38N02LT
D D
1K0
1K0
IU81
33K 1%
68R 2U73 3UA4 1%
1 4
3U30 2U26
3U41
3U45
2U29
3U14
1M0
6K8
BC857BS BC857BS
1n0
IU26 1n0 1K0
3UA5
7U10-1 2 7U10-2 5
47R
3U31 IU65 2K2 100n 3U93 IU58
1
BAS316
IU66
6U22
IU41
6 3 IU59
10K 10K 3U94 FU08
K
7U15-2 5 +3V3
TS2431
IU67
3U32
7U11
2U30
BC847BS
10K
1n0
3U33 3U11 3K3
2U11
3U15
IU68 2 4
IU27
1K0
1u0
6U06 FU09 6U05
12K 1%
IU28 FU07
3U95
res
2K2
A
2U38
100n
STPS2L30A STPS2L30A
2U55
100n
3U42
2U46
7U07
1u0
IU69 6U08
IUA0 BC817-25W res
3U80 10R
3U16
9U06
RES
3U17
E E
4K7
1% 1K0
BZX384-C18
STPS2L30A
10K
BOOSTER
6U21
12V UNDER-VOLTAGE DETECTION GND-SIG GND-SIG
3UA7 1%
1K0 +2V5D
FU05
FU18
ENABLE-3V3
0V
100p
2U37
470n
res 3UA6 1%
2U09 1K0
IU61 res 3U39 1%
100p
STPS2L30A
1K0
3U37
1% 560R
3U38
2U10
100n
6K8
6U07
G GND-SIG GND-SIG GND-SIG IU38 2U40 2U41
G
1u0 1u0
+5V2-STBY
BZX384-C3V3
6U17
3U63
150R
3U64
150R
3U65
150R
3U66
150R
3U67
150R
3U68
150R
3U62
1K0
7U17
TS2431 IU51 IU52
1n0
IU53
2
3U70
3U69
4R7
4R7
RES
3U36 IU49 3U71
1M0 1K0
+2V5D LINEAR STABILIZER G_15930_021.eps
3104 313 6145.2 120606
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 53
SSB: DC / DC Connections
1 2 3 4 5 6 7 8 1M46 D2 6U25 B6
1U10 E2 7U08 B7
B1B DC/DC CONNECTIONS B1B 1U11 E3 7U09 C7
1U12 E3 7U24 B2
1U13 E2 7U26 B4
1U14 E3 9U10 D6
A VTUN GENERATOR A
1U15 F2 9U11 E6
IU73
6U00 3U57 FU21
+VTUN
1U16 F3 9U12 B7
BAS316 100R 2U00 F3 FU04 D3
BZX384-C27
2U01 E3 FU10 D3
5U09
6U01
100n
2U08
+12VSW
47u
RES
9U12 2U02 F3 FU11 D3
VSW
IU74 7U08
3U47
2U03 E4 FU12 D2
3U58 SI4835BDY FU20
+8V6-SW
2U04 F5 FU14 D3
2K2
BZX384-C12
IU75 1R0
B IU70 B 2U05 F5 FU16 D3
3U59
2U35
6U25
3U48
100K
1K0
1u0
3U60
2U34
2U06 F5 FU17 E3
33R
1u0
7U24 BC847BW
7U26
IU76
BSH112
2U36
2U07 F5 FU20 B8
IU82 IU71
2U43
33p
2U08 B3 FU21 A5
100n
3U61
10K
2U44
3U49
220p
47K
IU77
100K 2U34 B4 FU24 E3
IU89 2U35 B6 FU60 D4
0V3
IU72 3U50
2U36 B7 FU61 D4
7U09 +5V
C BC847BW 1V0
C 2U39 F4 FU62 D4
47K
2U43 B3 FU63 D3
3U51
0V3
47K
+5V-CON
2U44 C3 FU64 E3
3U47 B7 FU65 E4
ON-MODE
5U14
3U48 B6 FU66 E4
+8V6 SWITCH 3U49 C7 IU39 D5
3U50 C7 IU70 B7
5U01
1M46
FU14
5U10
3U51 C7 IU71 B6
D 1 D 3U57 A4 IU72 C7
2 FU16 FU60 IU39
TO 1M46 3
FU12 5U04 +8V6
4
FU10 5U05 +12VS 3U58 B4 IU73 A4
FU11 FU61 5U06 +5V
5 3U59 B2 IU74 B4
6 FU63 FU62
FU04 5U07
AUDIO STANDBY
7
9U10
+5V2-STBY 3U60 B3 IU75 B3
8 FU17 FU64
5U08
9
9U11
3U61 B2 IU76 B2
FU22
10 +5V2-STBY_9V-STBY
11
FU24 FU65 5U11 RES 3UA0 C4 IU77 C4
B11B-PH-K
FU66
5U01 D4 IU82 B3
5U12
5U04 D4 IU89 C6
E 5U13 E
1U10
1U11
1U12
5U05 D4
5U06 D4
2U01
2U03
2U33
100p
100p
100p
5U07 D4
1U13
1U14
5U08 E4
2U00
2U02
2U39
2U04
2U05
2U06
2U07
100p
100p
100p
100n
100n
100n
100n
5U09 B3
1U15
1U16
5U10 D4
5U11 E4
F F 5U12 E4
5U13 E4
5U14 D3
6U00 A3
G_15930_022.eps
6U01 B4
3104 313 6145.2 120606
1 2 3 4 5 6 7 8
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 54
A A 2U66 D5
3U72 A3
3U72
150R
3U73
150R
3U73 A4
3U74
1K0
3U74 A2
IU90 3U75 B3
3U76 B3
IU91
7U20 3U77 B3
BC847B 3U79 D7
3U81 E7
2U60
10n
3 1 3U90 D3
NC
B 4 1V3 IU92
3U75 +3V3-UART
B 3U91 D2
REF
TS431AILT 3U92 E3
7U21 1K0
NC
3U98 D7
A
10u 10V
3U76
3U77
2U61
1K0
1K5
5 2 3U99 D7
9U13 7U20 B3
7U21 B2
+3V3-UART 7U22 C5
9U01 E5
9U02 E5
FU30
RES 9U07 E2
7U22
C ST3232C 16 C 9U13 B5
9U14 E5
Φ VCC
9U15 D4
+3V3
2U63 IU93 1 RS232 IU84
C1+ 6 2U65 9U16 E4
100n IU94 V-
3 FU30 C6
C1- 2 100n 2U64 FOR
2U66 IU95 4 V+ FU31 D7
C2+ IU85 100n FACTORY FU32 E7
3U91
3U90
10K
10K
100n IU96 5
C2- USE ONLY FU40 D2
1H07
FU40 1U02
FU41 D2
1 JTAG-TRST IU00 FU51
11 14 3U98 FU42 D2
2 FU41 EJTAG-DETECT GLINK-TXD 9U15
FU42 EJTAG-TDI 10 T1 IN OUT
T1 7 1
D 3
4 13
T2 T2
12
IU64 100R 3U99 FU52 2
3
D FU43 D2
FU44 D2
FU43 EJTAG-TDO IU87 100R 5 4
5 8 R1 R1 9
FOR FACTORY 6 TXD R2
IN OUT
R2 FU45 D2
GND
FU44 EJTAG-TMS B3B-PH-SM4-TBT(LF)
7 IU97 3U79 FU31
1U03 RES
FU46 E2
RXD
USE ONLY 8
FU45 EJTAG-TCK 15 FU47 E2
9 100R 1
10 IU98 3U81 FU32 2 FU48 E2
FU46 9U07 RESET-SYSTEM
11 3 FU49 E2
FU47 100R 5 4
12 IU99
13
FU48 FU49 FU50 E2
3U92
B3B-PH-SM4-TBT(LF)
10K
FU50
14 FU51 D8
147279-3 FU52 D8
GLINK-RXD 9U16
E +3V3
9U01
E IU00 D7
IU64 D7
IU84 C6
9U02
IU85 D6
9U14 IU87 D5
IU90 A3
IU91 B3
G_15930_023.eps IU92 B3
3104 313 6145.2 120606 IU93 C5
IU94 C5
1 2 3 4 5 6 7 8
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 55
A 7TG1
A
SI2306DS
3TH9 FTH0
+1V2_ATSC
2TL0 47K
100n
ITI0 3TH0
ITH1 5T55
+2V5A-XTAL-MAIN
ITG2 ITG1 1T55
+2V5A-FDC-MAIN
+2V5A-FDC-MAIN
+2V5A-FDC-MAIN
+2V5A-FAT-MAIN
+2V5A-FAT-MAIN
+2V5A-FAT-MAIN
+2V5D-PLL-MAIN
+2V5A-PLL-MAIN
ITH2 3TJ0 1K0 +2V5
7TG3-2
B 500mA F
B
100u 4V
+2V5A-MAIN
+2V5A-MAIN
+2V5A-MAIN
2T56
2T55
BC847BPN
1u0
ITH3
+1V2-MAIN
+1V2-MAIN
+1V2-MAIN
+1V2-MAIN
+1V2-MAIN
+1V2-MAIN
+1V2-MAIN
+1V2-MAIN
+1V2-MAIN
+1V2-MAIN
+2V5-MAIN
+2V5-MAIN
+2V5-MAIN
+3V3-MAIN
+3V3-MAIN
+3V3-MAIN
+3V3-MAIN
+3V3-MAIN
+3V3-MAIN
+3V3-MAIN
3TJ1 ITH4 47K RES
9TG3
+3V3 7TG3-1 7TG4
BC847BPN SI2306DS
47K 3TJ2
2TN4
3TJ3
220n
RES
47K
8K2 FTH1
3TJ4
+2V5_ATSC
47K
RES
+12VSW
100n
C
100u 4V
2TG1
IT10 5T11
+3V3-MAIN
2T31
100n
5TG1 FTG1
8
7T10
+2V5A-FAT-MAIN PCA9515ADP
I2C ADDRESS = 14/16 VCC
2TG3
10n
2TG7 100n
2TG8 100n
2TG9 100n
2TK4 100n
2TG0 100n
2TG2 100n
2TJ0 100n
2TG4 100n
2TG6 100n
2TJ3 100n
2TJ4 100n
2TJ5 100n
2TJ6 100n
2TJ1 100n
2TJ2 100n
D 68p 100R
D
3TG9 IT14
7 SCL1 SCL0 2 SDA-DMA-BUS1-ATSC
5TG2 FTG2
+2V5A-FDC-MAIN 7TG0 2T34 100R
10n
10n
10n
1 EN 5
109
121
105
125
127
117
NXT2003 NC
45
17
32
48
57
62
71
84
98
18
39
85
47
60
69
78
92
40
11
12
13
24
25
26
GND
2
3TH3 68p
2TG5
ITG8 FTH2
AVDD_OSC
AVDD_PLL
DVDD_PLL
3TG3
10n
2TJ7
2TJ8
2TJ9
AVDD
AVDD_FAT
AVDD_FDC
VDD1.2
VDD2.5
VDD3.3
220R 2TM2
4
33K
3TH5
FAT-ADC-INN-MAIN
3TG2 1u0
10n
33K
128
8 BIAS_RES Φ AUX_AGC 53 +3V3-MAIN 3TJ6 9T10 RES
5TG3 FTG3
10 FAT_INCM DTV I2C_SCL 58 1K0
59 3TJ7 9T11 RES
+2V5D-PLL-MAIN 220R 2TM3 9 N
FAT_IN
CABLE AND TERRESTRIAL I2C_SDA
FAT-ADC-INP-MAIN 104 2TK5
E 6
7
P
N
FAT_VREF
RECEIVER I2C_SLAVE_ADDR
0
1 103
50
1K0
3TG5
100n
ITI5 E
P IF_AGC FAT-IF-AGC-MAIN
3TJ5 38 1K0
FDC-AGC FDC_AGC MPEG_CLK 70 3T19-1 FE-CLK
FDC-ADC-INN 2TM5 3TG6 ITG9 1K0 29 93 3T21-3 68R FE-DATA0
ITI3 27 FDC_INCM 0 68R
10n 220R FDC_INN 1 91 3T21-2 FE-DATA1
3TG4 2TM8 2TM7 28 90 3T21-1 68R FE-DATA2
1u0 10n 31 FDC_INP 2 68R
5TG4 220R 88 3T20-4 FE-DATA3
FTG4 2TM4 N
FDC-ADC-INP ITI4 30 FDC_VREF MPEG_DATA 3 87 3T20-3 68R FE-DATA4
+2V5A-MAIN P 4
FS-OUTN 10n 36 83 68R 3T20-2 FE-DATA5
35 N 5 68R
FS-OUTP FS_OUT 77 3T20-1 FE-DATA6
P 6
100u 4V
FTG9 2TL7
3T19-2
68R
FE-SOP F
5TG5 FTG5 IRQ-FE-MAIN 5 OSC_CLK
SEL-POD 3T26 67 43 33p +3V3-MAIN
+2V5A-PLL-MAIN 6 OSC_XTAL_IN 1TG0
100R 65 GPIO 44
3TH7 108 7 OSC_XTAL_OUT
52 9TG2 13M5
+3V3-MAIN ITG5 106 8 PDET_COMP_IN
4K7 9 PDET_REF_OUT 49
3T15
RESET-FE-MAIN 107 64 2TL9
10K
102 10 POD_CRX 63
FM-TRAP 11 POD_DRX 33p
100K
3T18
101 55 IT19
ITG4 12 RF_AGC 7T11-1
99 46 BC847BPN
13
5TG6 79 NC 124 IT17 7T11-2
FTG6 POWER_RESET IT18 3T17
+2V5-MAIN 56 UC_EN BC847BPN
GND_HS
10K 3T16
TUNERAGC-MON
G G
3T24
4K7
100K
AGND DGND IT16
1
5
14
15
16
21
22
23
34
41
4
19
20
33
37
51
54
61
66
73
76
80
81
82
86
89
94
95
96
97
100
110
111
112
114
122
123
126
129
5TG7 FTG7 3T14 2T33
+3V3 +3V3-MAIN
3T22 1K0 100n
IT13
22u 6.3V
CRX-POD
2TN0
68R 3T23
DRX-POD
68R
10n
10n
10n
10n
2TK8 1u0
2TK9 1u0
2TK6 1u0
2TK7 1u0
2TK2
2TK3
2TK0
2TK1
5TG8 FTG8
H +1V2_ATSC +1V2-MAIN
H
22u 6.3V
2TN1
G_15930_060.eps
3104 313 6145.2 130606
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 56
1 2 3 4 5 6 7 8 9 10 11 12 13
1T04
MAIN DIG TUNER C0 IT00
LD1117DT
3 2 FT07
TD1316O/FGHP +8V6-SW IN OUT +5VTUN
TUNER
A 18 17
COM
A
10u 10V
2T17
2T18
2T08
100n
100n
DC_PWR
1
IF_AGC
IF_OUT
+5VTUN
RF_GC
19 16
VTUN
FM-T
OOB
DNU
SDA
IF_1
IF_2
SCL
+5V
NC
AS
IT29 10
11
12
13
14
15
3T09
1
2
3
4
5
6
7
8
9
4K7
+5VTUN
2T13 IT28
IT06 5T50 5T51 IT25
IT27 +5V +5V-OOB
2T09
2T20
9T04
330u 6.3V
IT09 3T12 IT26
2T24
2T25
100n
7T12
B BC847BW
B
10n
10n
10n
4K7
FT41
3T13
4K7
FT08 FT01
2T43
1u0
2T01
2T35
2T58
5T49
5T45
100n
100n
100n
AT41 2T45
+5VTUN
1
7T41
3T07 RES
10n UPC3218GV
+5V-OOB
AT56
5T53
2T04
VCC
RES
3K9
1u8
2p2
2T48 AT51
1T41 2 INPUT1 OUTPUT1 7 FAT-ADC-INP-MAIN
+5VTUN
+5VTUN
5T42
C C
RES
1u8
1 7
I O 2T51 10n
14 8
IGND OGND 2T53 AT52
AT43 3 6 FAT-ADC-INN-MAIN
AT57 10n
2 4 INPUT2 OUTPUT2
10n
FT09
3T10
6 9
GND1
GND2
GND GND 3T06
11 13 4 VAGC AGC CONTROL
3T11
4K7
1K0
2T98
X7351P
10n
4K7
44M
IT04 IT05
5
3T02
FT06
FT04
10n
2T11
1K0
D D
2T02
100n
I2C-SDA-TUNER-MAINNXT
I2C-SCL-TUNER-MAINNXT
AUX-IF-AGC-MAIN
FAT-IF-AGC-MAIN
TUNERAGC-MON
FM-TRAP
IF-TER2
E E
FS-OUTN
FS-OUTP
FDC-AGC
FDC-ADC-INP
FDC-ADC-INN
+5V-OOB
3T04
5T47
3T05 10R
10R
F IT01 IT02
2T12
+5V-OOB F
1u0
IT07 IT08
2T10
100n
RES
3T03
2T05
2T06
RES
3T08
10R
10R
82p
82p
FT02
FT05
5T48
FT03
2T07
1u0
7T43
G UPC3220GR G
3
7
8
AT44
VAGC
Φ VCC
CATV
IT30 2T14 OUT OF BAND 2T28 AT46
5T46
RES
1 15
1u8
1u8
1 TUNER 1 5T44
1T44
2T15 10n IT03 AGCIN 10n
2 1 7
RES
2 MIXOUT I O AT45
3T25
14 8
75R
G_15930_061.eps
3104 313 6145.2 130606
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Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 57
1 2 3 4 5 6 7 8 9 10 11 12
A A
0T00
B B
7C00-4
PNX3000HL/N2
2C02
2C04
22n
22n
22n
4 60 STROBE1N-MAIN
CVBS|Y3 STROBE1N
5 61 STROBE1P-MAIN
C3 STROBE1P
8 62 DATA1N-MAIN
2C06 CVBS|Y4 DATA1N
AV2_Y-CVBS
9 63 DATA1P-MAIN
22n 2C07 C4 DATA1P
AV2_C
D FRONT_Y-CVBS
2C08 22n
IC09
15
Y_COMB
STROBE3N
50 STROBE3N-MAIN
D
16
22n 2C09 C_COMB 51
FRONT_C STROBE3P STROBE3P-MAIN
IC08 6
2C11 22n GND_VSW 52
AV7_Y-CVBS DATA3N DATA3N-MAIN
22n 25 53
R|PR|V_1 DATA3P DATA3P-MAIN
2C12
2C13
RES
26
22n
RES
22n
G|Y|Y_1 55
STROBE2N STROBE2N-MAIN
27
B|PB|U_1
56 STROBE2P-MAIN
STROBE2P
30
2C14 R|PR|V_2 57
E AV7_C
22n
31
G|Y|Y_2
DATA2N DATA2N-MAIN
E
58 DATA2P-MAIN
DATA2P
32
2C15 B|PB|U_2
AV1-AV5-AV6_R-PR FC04
46 HV-PRM-MAIN
22n 2C16 HV_PRIM
AV1-AV5-AV6_G-Y 49 IC05
VCC_DIG
45
22n HV_SEC
48
GND_DIG
2C17 IC04
2C23
47
22n
AV1-AV5-AV6_B-PB VD2V5
22n 54
FUSE10
2C22
22n
F +5VMPIF-MAIN
5C01 FC03
64
VCC_I2D F
220R 59
GND_I2D
2C18
2C27
100n
AV2-AV4_R-PR
22n 2C19
AV2-AV4_G-Y
2C20 22n
AV2-AV4_B-PB 5C03 FC06
22n +5VMPIF-MAIN
220R
2C28
100n
G G
G_15930_024.eps
3104 313 6145.2 120606
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Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 58
2C31
100n
6
A IC36
2 7C31-1
A 2C36 C5
2C37 H4
BC847BS
3V9
1 2C39 D7
IC83 FC32
9C50 VREF-AUD-POS 2C40 D6
res
7C00-3 3V2 2C41 B5
3C30
560R
2C43
100u 4V
PNX3000HL/N2
2C41
2C42 C5
22p
2C43 A7
MPIF-SUPPLY IC37 2C44 E5
E/W & CONTROL
2C45 D7
3C32
2
1K2
VOUTO 2AB5 2C46 C5
B VAUDS
3 1n0 IC38
VREF-AUD
B 3C30 A6
3C31 I7
1V4 3C32 B6
3C34
20
1K2
VDEFLO 3C33 E4
3C34 B6
21 3C35 H3
VDEFLS
IC47 3C45 3C36 H4
13 3
RREF 3C37 H3
47K IC81
IC32 5 7C31-2 3C38 I3
7 BC847BS
BGDEC 3V9 FC41 3C39 E5
2C42
4
22p
VREF-DEFL
C 3V2 C 3C40 F5
2C35
2C36
2C46
33
100n
1u0
1u0
FUSE9 3C41 F6
3C43
1K8
10 3C42 I3
FUSE8
IC82 3C43 C6
23
FUSE7 3C44 D6
1V4
3C45 C5
3C44
11
1K2
GND_FILT 3C46 H3
29 3C47 I4
GND_RGB
5C33 D7
34
GND_VADC 5C34 D6
FC36 5C33
D VCC_FILT
14
220R
+5VMPIF-MAIN D 5C35 A7
5C36 D5
10u 10V
FC37 5C34
5C37 G2
2C45
2C39
100n
28 +5VMPIF-MAIN
VCC_RGB
220R 7C00-3 A3
FC38 5C36 7C31-1 A6
2C40
100n
35 +5VMPIF-MAIN
VCC_VADC
220R 7C31-2 C6
18
TESTPIN3 7C32-1 H3
2C44
100n
24 7C32-2 H3
TESTPIN2
9C46 G10
36 9C47 G10
EWVIN
E REW
38
IC89 3C33 E 9C48 G10
9C49 F6
820R
37 IC46 EW-DRIVE 9C50 A7
EWIOUT
FC31 A7
44 IC44 3C39
SCL-DMA-BUS2
FC32 A7
SCL
100R FC36 D6
43 IC45 3C40
SDA SDA-DMA-BUS2 FC37 D6
100R
42 IC35 IRQ-MPIF FC38 D4
IRQ
FC40 FC40 F7
40 9C49 CLK-MPIF
XREF FC41 C7
F ADR
39
+5VMPIF-MAIN F IC01 H3
3C41
10K
41 IC32 C5
FUSE6 IC33 H2
RES
IC34 H3
IC35 F7
IC36 A5
+5VMPIF-MAIN
SPI-PROG 9C47
IC37 B6
IC38 B6
SDM 9C48 IC39 H4
9C46 IC40 I3
G G IC41 G3
IC44 E4
IC45 F4
IC46 E4
IC47 C4
5C37 IC41
IC81 C6
+8V6-SW
120R IC82 C6
10u 10V
IC83 A6
2C32
2C33
3C46
3C35
3C36
100n
33R
1K0
82K
IC89 E4
IC01
H 4 IC34
H
BC847BPN
7C32-2 2C34
5 6
IC33 IC39 1u0
Y-CVBS-MON-OUT 3 7C32-1 2
BC847BPN 2C37
1
3C37
IC40 1u0 3C31
330R +8V6-SW +8VMPIF-MAIN
3C38
3C42
330R
3C47
10K
47K
10R
I +5V
1C33
+5VMPIF-MAIN
I
500mA F
DAC-CVBS
G_15930_025.eps
3104 313 6145.2 120606
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Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 59
1 2 3 4 5 6 7 8 9 10
+8VMPIF-MAIN
A 5C52 IC51
+8VaM
1C51
40M4
2C50 +5VMPIF-MAIN
3C51 +5VbM
A
220R 2 7
I O1 2R2
9C51 3 8 3
10u 16V
ISWI O2 10n
2C52
2C53
10n
1 1 7C57
9C52 4 11 BC847BW 1C54
IC85 OFWK9656L 3C71
2C55
100n
5 12 2 1 3 2NDSIFEXTM
I O
6 NC 16
IC76 IC77 1K0
9 17 IC75 2
5C53 GND
10 GND
+5VMPIF-MAIN +5VbM
3C70
100R
3C76
120R
13 220R SFSKA
IC72 4M5
330u 6.3V
14
2C57
2C75
15
10n
18
5C54
220R
IC88
2C58
IC52 1C62 +5VbM
+5VaM X7351P 44M
10n
1 7
I O
B 14
IGND OGND
8
IC86
3 CVBSOUTIF-MAIN
B
2C60
10n
109
103
104
7C00-2
112
110
6 9 BC847BW
GND GND PNX3000HL/N2 100R 3C74 3C75
11 13 2
GND1_IF
VCC_IF
DTVIFPLL
DTVIFINP
DTVIFINN
IC59 IC60
2C63 3C53 IC78 180R 180R
111 120
VIFPLL CVBSOUTIF
2AB8
330p
1C52 390R
OFWK3953L 38M9 100n
9C53 AC01 107 116
2
I1 O1
7
VIFINP IF PART DTVOUTP
3 8
I2 O2 AC02 108 117
VIFINN DTVOUTN
1
AC03 99
4 11
SIFINP
5 12 122 +5VaM
AC04 100 VCC1_VSW
IC55 6 NC 16 IC63
9C54 SIFINN 6C59 3C55
9 17 118
VCC_SUP +5VMPIF-MAIN
AC05 10 GND IC61 330R
101 BAS316
IC84 13 125 +5VaM
SIFAGC VCC2_VSW
9C59
2C65
9C56 14
10n
IC64
114
C 15
2NDSIFAGC C
2C78
2C67
105
1u0
18
1u0
9C57 TUNERAGC
2C68
2C79
102
1u0
1u0
FC52 DTVIFAGC
GND_SUP
TESTPIN1
1C63 9C61 113
GND2_IF
2NDSIFEXT IC65 +5V-AUD
FUSE5
X7351P 44M
1 7 2NDSIFEXTM 106
+8VaM I O FUSE4
14 8
IGND OGND
115
121
2C83
2 4
119
124
10n
6C51 IC74
6 9
GND GND
3C56
11 13
6K8
BA591 +8VaM
FC73 IC54
2C70
IF-TER2
1C53
10n +8VaM OFWK3955L 38M
5C57
3C57
3C66
3C58
470n
2 7
2K2
4K7
4K7
I1 O1
BA591
6C52
3 8
I2 O2
D 1
D
3C50
4K7
3C65
4 11
4K7
5 12
3C59 IC57 6 NC 16
7C53 9 17
BC847BW 10 GND
22K
IC56 13
3C60
3C61
9C58 14
47K
SEL-IF-LL2 7C54
BC847BW 15
27K
18
+8VaM
2C72
1n0
3C67
4K7
IC58
VISUAL-CHECK 7C55
E BC847BW
E
G_15930_026.eps
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Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 60
2K40 C4
2K46
2K47
2K40
100n
1u0
1u0
PNX3000HL/N2
IK03 G4
IK04 G4
91 AUDIO SOURCE SELECT
VAADCP IK10 H4
IK25
+5V-AUD
77
VCC_AADC
IK11 F8
IK23 9C60 IK24 98
IK12 F8
C +8V-AUD VCC1_ASW C
IK13 G8
88
VCC2_ASW IK14 G8
2K41
2K43
100n
100n
IK15 H8
92
MIC2N IK16 H8
93
MIC2P
IK17 I8
94 IK18 I8
MIC1N
IK19 H4
95
MIC1P IK20 H4
IK93 IK21 I4
D 89 D
VAADCREF IK22 G4
90 IK23 C3
VAADCN
2K45
100n
97
IK24 C4
GND1_ASW
IK25 C3
96
FUSE1 IK93 D4
78 IK94 B3
FUSE2
76
GND_AADC
71
FUSE3
E 87 E
GND2_ASW
SCART1R
SCART2R
SCART1L
SCART2L
DSNDR1
DSNDR2
DSNDL1
DSNDL2
AMEXT
LINER
LINEL
R1
R2
R3
R4
R5
L1
L2
L3
L4
L5
128
127
86
85
84
83
82
81
80
79
75
74
73
72
68
67
70
69
66
65
17
IK11
AUDIO-OUT2-R
F F
IK13
AUDIO-OUT1-R
G G
2K68 IK03
AUDIO-IN2-L
1u0
2K76 IK04
AUDIO-IN2-R
IK14
1u0 AUDIO-OUT1-L
IK19
IK20
H IK15 1u0 H
DSNDR2
2K60
2K65 IK10
AUDIO-IN5-L 1u0
IK16
1u0 DSNDL2
2K58
2K64 IK21
AUDIO-IN5-R 1u0
IK17
1u0 DSNDR1
2K63
IK18 1u0
DSNDL1
I 2K61 I
G_15930_027.eps
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Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 61
3A52
100K
7A08-2
BC847BPN IK30 2A85 D9 7A07 E7
BAS316
3A87
6A02
IK53 IK54 4 +5V-AUD +5V BC857BW 2A86 C9 7A08-1 A4
3A53 7A15
7A08-1 10K IK32 2A87 B6 7A08-2 A5
BC847BPN 6 5
10K 4V6 3A55 2A20 3A60 2A88 B5 7A09 A8
IK51 IK52
3A51 2A89 G3 7A10-1 C8
3A31
100K
2 3 7A04-1
IK68 TS482IST 100K 7A09 16V 100u 33R
8
680K 3 FK00 FK02 2A90 I3 7A10-2 B9
0V6 BC807-25W IK62 2AA0 3A61
1 1 AUDIO-HDPH-L-AP 2A91 B3 7A11 C11
IK67
2A91
3A28
3A54
2
47K
10K
1u0
16V 100u IK46 33R 2A93 C10 7A12-1 D11
4
2A96 H3 7A12-2 D12
RES
3A59
100K
3A62
1K0
IK33 3A88 2A98 D10 7A13-1 H10
3A32
100K
2A87
7A16-1
1u0
47u 16V
IK64 2A99 B7 7A13-2 H12
2A32
3A30
470K
BC847BS
1K0
B IK69 2A99
+5V2-STBY
B 2AA0 B8
2AA1 D10
7A13-3 I10
7A13-4 I12
2A88 RES 33p
150R
3A57
3A58
220K
ADAC7
9A82 3A38 IK63 2AA2 C12 7A13-5 H10
100n 2AA3 G9 7A13-6 H11
220K 5V3 2AA4 G9 7A14-1 E3
220R
3A33
270K
2A84
3A56
4
1u0
IK65 IK55 3A64
3A22 3A23 2V2 6 BC847BPN 2AA5 E2 7A14-2 E4
7A10-2 5
IK96 3A63 10K FK07 2AA6 E3 7A15 A11
7A10-1 2 +5V-AUD
15K IK50 27K
BC847BPN 3
2AB1 G7 7A16-1 B10
FK06 0V 10K 2AB2 E6 7A16-2 C13
1
2AB3 E4 7A18-1 F9
0V 3A65 IK66
3A34
100K
+5V
3A66 2A21 3A67
2AB7 F8 7A18-2 E8
220K 0V 3A14 F2 9A80 I3
C C
BAT54 COL
100K 16V 100u 33R 3A15 H9 9A81 H3
6A00
BC807-25W 2AA2 FK11
IK86 FK09 IK80 3A68
AUDIO-HDPH-R-AP 3A16 I13 9A82 B6
3A17 I13 9A83 D9
2A93
100n
7A11 16V 100u IK85 33R
3A35
100K
2A86
3A20 E9 9A86 D4
1u0
3A70
100K
3A69
RES
1K0
7A04-2 7A16-2 3A21 E10 9A88 H10
BC847BS
47u 16V
TS482IST 3A22 B6 9A89 I9
IK81
2AA1
3A29
470K
2A85 3A89 3A23 B7 9A90 F3
8
ADAC8 5
7 +5V2-STBY 1K0
3A24 I2 FK00 B7
100n IK87
150R
3A71
3A72
220K
6 3A25 I3 FK01 G8
IK82
3A36
270K
3A26 G2 FK02 B9
4
5V3 3A27 G3 FK03 E7
220R
3A73
4
FK17 IK56
D +12VSW +12VSW 2V2 6
IK05
BC847BPN
7A12-2 5
3A75
D 3A28 B3
3A29 D10
FK06 C7
FK07 C9
IK88 2A98 3A74 10K
+12VSW 7A12-1 2 3A30 B7 FK09 C10
+12VSW BC847BPN 3
33p IK83 0V 10K 3A31 A5 FK11 C12
9A86
RES 1
RES
9A83
RES
1K2
3A95
15R
220K
IK31 3A34 C9 FK19 I13
2A83
1u0
220K 0V
BAT54 COL
3A80
470K
RES
6A01
3A36 D9 IK05 D11
BC847BPN
IK90 11V7
+12VSW
15K IK49 27K 3A37 D10 IK30 A10
7A14-2
3A38 B7 IK31 D4
3A92
AUDIO-SW +12VSW
68R
IK89 3A39 I3 IK32 A11
E 2AB3
E
2AA6
7A05-2
3A81
120K
RES
1u0
2AB2
3A47
3A45 G8 IK46 B9
10K
1n0
RES 3V0 PROT-AUDIOSUPPLY
RES
3A82
150K
3A94
100K
IK92 1K0 6 3A46 E6 IK47 I3
1u0
2A81
RES 3A47 E6 IK48 G3
390R
3A85
3A48
RES
10K
7A18-1
+8V6-SW BC847BPN 3A48 F7 IK49 E10
0V
1 3A49 F7 IK50 C6
IK79
3A14
RES
3A50 F7 IK51 A3
33K
RES
2AB7
3A96
100n
10K
3A51 A3 IK52 A3
F F 3A52 A4 IK53 A4
3A49
3A50
3A90
3A91
18R
68R
10K
18K
IK95
9A90 +12VSW 3A53 A4 IK54 A4
RES 3A54 B5 IK55 B9
7A05-1
+12VSW
LM324 IK02 3A55 A8 IK56 D12
7A05-3 4 3A56 B7 IK57 G9
LM324 3 IK74 IK75
1 3A41 3A57 B8 IK58 I12
IK70 4 7A06
ADAC2 10 3AA1 2 BC817-25W +3V3 3A58 B8 IK59 H11
IK71 1K0 FK01
8 AUDIO-R 3A59 B8 IK60 I12
11 +5V-AUD
2AB1
3A42
9 3A60 A9 IK62 B8
10K
1n0
220R
3A61 B9 IK63 B7
3A77
11
2A79
2R2
1u0
3A62 B9 IK64 B8
3A43
10K
G 2A89
IK76
G 3A63 C8
3A64 B9
IK65 B8
IK66 C8
IK98
33p 3A65 C8 IK67 B6
3A66 C11 IK68 A6
100u 4V
3A26 3A27 3A40
2AA3
2AA4
2A22
100n
1u0
FK18 3A78 3A67 C12 IK69 B6
220K
3A45
3A44
18K
18K IK48 47K 1K0 IK57 3A68 C12 IK70 G2
22K
9A81 3A69 C12 IK71 G4
RES 7A13-1 7A13-2 3A70 C11 IK72 H2
14
14
74HCU04PW 74HCU04PW 3A71 D11 IK73 H4
2A23 IK59 3A86
+12VSW SPI-1 1 1 2 3 1 4 SPDIF-IN1 3A72 D11 IK74 F7
1n0 68R 3A73 D10 IK75 F7
7
3A74 D11 IK76 G7
3A15
3A79
75R
47K
H H 3A75 D12 IK77 E6
2A96
100n
14
14
14 AUDIO-L IK44 74HCU04PW 74HCU04PW FK19 3A81 E2 IK83 D10
1 1 2A24 3A16
13 220R SPDIF-OUT1 9A89 11 10 13 12 SPI-OUT 3A82 F2 IK84 D12
11 IK45 IK60 100n IK58 220R 3A83 D3 IK85 C12
7
3A84 E4 IK86 C9
120R
3A17
3A85 F3 IK87 D9
3A86 H12 IK88 D9
I 2A90
IK99
7A13-3 7A13-4
I 3A87 A10 IK89 E3
33p 3A88 B11 IK90 E3
14
14
74HCU04PW 74HCU04PW
3A24 3A25 3A39 5 1 6 9 1 8 3A89 D13 IK91 E2
18K IK47 47K 1K0 3A90 F8 IK92 F3
7
3A91 F8 IK95 F2
9A80
3A92 E7 IK96 C8
RES
3A93 E8 IK97 E4
3A94 F8 IK98 G3
G_15930_028.eps 3A95 D7 IK99 I3
3104 313 6145.2 120606 3A96 F8
3AA1 G3
1 2 3 4 5 6 7 8 9 10 11 12 13 14 3AA2 H3
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 62
+8V6-CONN
100p AV2_FBL 2A47 B3 FA00 B8
9A38 Y-CVBS-MON-OUT AV2_C 3A01 2A48 B3 FA01 B8
1E41 2A47 100R 2A49 B3 FA02 B8
100p
1 2A50 B3 FA03 B8
9A39 C-MON-OUT +8V6-CONN
5A06 2A51 C3 FA04 C8
B 2
3
2A48
100p
AV2_Y-CVBS
3A02
+8V6-SW
1E40
B 2A52 C3 FA05 C8
4 100R 120R
2A53 C3 FA06 C8
2A29
100n
9A40 AV2-STATUS FA00
5 1
6
2A49 Y-CVBS-MON-OUT FA01
2 2A54 C3 FA07 B8
100p FA02
7 3 2A55 D3 FA08 C8
9A41 REGIMBEAU-AV6-VSYNC FA03
8
2A50
4 2A56 D3 FA09 C8
C-MON-OUT FA07
9 100p 5 2A57 D3 FA10 C8
9A44 AUDIO-OUT1-L FA04
10 6
2A51 FA05 2A58 D3 FA11 C8
11 100p 7
12
AV2-STATUS FA06
8 2A59 E3 FA12 C8
9A45 AV6_VSYNC 9A29
13 AUDIO-OUT1-R 9 2A60 E3 FA13 C8
2A52 IA01 FA08
FOR 32" 14 100p 9A11
10 2A61 E3 FA14 C8
REGIMBEAU FA09
15 11 2A62 E3 FA15 C8
9A46 AUDIO-OUT2-L REGIMBEAU-AV6-VSYNC FA10
FOR 37",42",50"
C TO 1E40
16
17
2A53
100p
AUDIO-OUT1-L FA11
FA12
12
13 C 2A63 E3
2A64 F3
FA16 D8
FA17 D8
18 9A47 14
19 AUDIO-OUT2-R 15 2A65 F3 FA18 D8
2A54 AUDIO-OUT1-R FA13
20 9A58 16 2A66 F3 FA19 D8
21
100p
2A33
AUDIO-HDPH-L-AP FA14
17 TO 1E40 2A67 F3 FA20 D8
22 18
100p AUDIO-OUT2-L FA15 2A68 F3 FA21 D8
EXTERNALS 23 9A59 19
24 +5V2-CONN AUDIO-HDPH-R-AP FA16
20 3A01 B6 FA22 E8
2A40 3A02 B6 FA23 D8
25
26
100p
9A60
AUDIO-OUT2-R FA17
21
22
EXTERNALS 3A03 D6 FA24 E8
AV1_CVBS-AV7-Y-CVBS +5V2-CONN FA18
27 5A07 23 3A04 E6 FA25 E8
2A55 AUDIO-HDPH-L-AP 9A06
28 100p
FA28
FA31
24 OR 3A05 E6 FA26 E8
29 9A54 120R 25
AV1-STATUS-AV7-C +5V2-STBY 3A06 F6 FA27 E8
D 30
31
2A56 AUDIO-HDPH-R-AP 9A01 FA32
26
27 D 3A13 A6 FA28 D8
2A31
10p
100n
FA19
32
9A52
28 0A02 3A18 A6 FA29 E8
33 CVBS-TER-OUT 29
2A57 FA20 3A19 A7 FA30 E8
34 9A62 30
100p AUDIO-IN1-L AV1_CVBS IA02 9A16 FA21 3A97 A7 FA31 D8
35 31
36
2A58 AV7_Y-CVBS IA03 3A03
32 3A98 A7 FA32 D8
100p 9A63 AV1_CVBS-AV7-Y-CVBS 100R FA23
37 AUDIO-IN1-R 33 3A99 A8 IA01 C6
2A59 AV1-STATUS IA05 9A19 FA22
38 100p IA04 3A04
34 5A06 B7 IA02 D6
AV7_C
39 9A64 35 0A00 5A07 D7 IA03 D6
AUDIO-IN2-L AV1-STATUS-AV7-C 100R FA25
40 36
2A60 FA26 5A08 A5 IA04 E6
100p 37
40FMN-BMT-A-TFT CVBS-TER-OUT FA27
38 7A20-1 A6 IA05 E6
9A65 FA24
AUDIO-IN2-R 39 7A20-2 A8 IA15 A6
2A61 AUDIO-IN1-L FA29
7A21 A7 IA16 A5
E 100p
9A66
FRONT_Y-CVBS AUDIO-IN1-R
FA30
40
40FMN-BMT-A-TFT 0A01 E 9A01 D6 IA17 A6
2A62 9A06 D6 IA18 A7
100p AUDIO-IN2-L 9A11 C6 IA19 A8
9A67
FRONT_C 9A16 D6 IA20 A6
2A63 AUDIO-IN2-R
100p 9A19 E6 IA21 B6
IA22
9A61
AUDIO-IN5-L FRONT_Y-CVBS
3A05 0A03 9A29 C6 IA22 E6
2A64 100R
9A32 A4 IA23 F6
100p 3A06
FRONT_C 9A33 A4
9A68
AUDIO-IN5-R IA23 100R 9A34 A4
2A65 AUDIO-IN5-L
100p 9A35 A4
9A55 LED1 AUDIO-IN5-R 9A36 A4
F 2A66
100p LED1
F 9A37 B4
9A38 B4
9A56 KEYBOARD 9A39 B4
2A67 KEYBOARD
100p 9A40 B4
9A57 RC RC 9A41 B4
2A68 9A44 C4
100p 9A45 C4
G_15930_029.eps 9A46 C4
3104 313 6145.2 120606
1 2 3 4 5 6 7 8 9
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 63
3
FA48
9A02 COM-SND
2A78 2A78 B3 FA57 C6
FA49
100p 9A03 LIGHT-SENSOR 2A80 D3 FA58 C6
2A82
100p
FA50 2A82 B3 FA60 F3
9A04 LED2
2A92 2A92 B3 FA61 F2
IA10 100p 9A05 SDA-MM-BUS1_MPIF 2A97 C3 FA62 F2
IA11 2AA8 C3 IA00 A6
9A07 SCL-MM-BUS1_MPIF
IA12 FA58 2AA9 C3 IA10 B3
9A08 P50 2AAA C3 IA11 C3
2A97
1E63 FA54 1n0 9A09 2AAB D3 IA12 C3
C 20
2AA8
100p
FA55
A-PLOP
C 2AB6 C3 IA25 E8
9A10 GLINK-RXD
19 3A07 F6 IA26 F6
2AA9
18 FA56
100p 9A21 GLINK-TXD 3A08 F6 IA27 F7
17
2AAA
3A09 F7 IA28 F8
FOR 32" 16
15
100p 9A22
FA57
GLINK-IR-OUT
2AB6 3A10 F7 IA44 D9
14 FA39
100p 9A69 SPI-OUT
13 3A11 F8 IA45 E9
TO 1E62 12 FA40
2A69
10p 9A70
FA47
9A79 3A12 F8 IA46 E9
11 HSYNC-HIRATE
10 FA41
2A70 3AA3 A6
100p 9A71 SPI-1
9 5A01 A6
2A71
EXTERNALS 8
10p 9A77 5A02 A6
D 7
6
FA42
9A78
AV1-STATUS
AV6_VSYNC D 5A03 A6
2AAB
5 FA43 5A04 A6
100p 9A75 AV1-AV6_FBL-HSYNC
4
3
2A80 5A05 A6
100p
2 IA44 5A10 E9
9A72 AV1-AV5-AV6_B-PB
1
2A72 6A10-1 B3
100p
IA45 6A10-2 B4
9A73 AV1-AV5-AV6_G-Y
2A73 7A01-1 E6
100p 7A01-2 E8
IA46
9A74 AV1-AV5-AV6_R-PR 7A02 E7
2A74
1E62 100p 9A02 B3
E 20
E 9A03 B3
19 IA25 5A10 9A04 B3
18 +8V6-SW
FOR 37",42",50" 17
6 3
600R 9A05 C3
16 9A07 C3
2A01
100n
15
2 7A01-1 7A02 5 7A01-2 9A08 C4
14
BC847BS BC847BW BC847BS
13 9A09 C4
1 4
12 3A07 3A09 3A11 9A10 C3
TO 1E62 11 IA26 IA27 IA28
10 100R 100R 100R 9A21 C3
9 9A22 C3
560R
560R
560R
3A08
3A10
3A12
8
9A69 D3
F EXTERNALS 7
6
F 9A70 D3
5 9A71 D3
4
3
FA60 9A72 D4
FA61
2 9A73 E4
1
FA62 9A74 E4
G_15930_030.eps 9A75 D4
3104 313 6145.2 120606 9A77 D4
9A78 D4
1 2 3 4 5 6 7 8 9
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 64
120R
+1V2
B4A
0E03 F1
2J01 A1
5J02 A6
5J03 A6
5J13 IJ08 2LT6 2J03 A6 5J04 E6
100n 5J01 +3V3 2J06 A6 5J05 E6
220R 100n 2J08 A6 5J06 F6
2J06 120R 7J08
CY2305SC-1
6
2J10 A6 5J07 F6
A VREF-AUD-POS
IJ01
100n IJ02 5J02 Φ VDD A 2J13 E6 5J13 A8
IJ00
+3V3 ZERO 3
3J02
M27-MOP 2J16 E6 5J15 B7
2J08 120R DELAY 1
100n
2J01
BUFFER 22R 3J05 2J18 F6 5J16 C7
7J00-7 5J03 2 M27-POD
PNX 2015 100n 2 2J20 F6 6J07 D9
M27-CLK 1 22R
+1V2 REF CLK
Φ
3J06
5 M27-PNX 2J22 D1 6J08 D9
2J10 120R 3
Y5
AUDIO / VIDEO 7
22R 3J14
M27-HIRATE
2J23 D1 7J00-7 A3
ADAC_CLK 100n 4
AVP1_DLK_VDDA N5 22R 2J24 E1 7J01-1 E8
ADAC1 AH1 AVP1_DLK_VDDD M5 8
ADAC1 2J30 5J15 CLKOUT 2J25 E1 7J02-1 F9
AH2 AVP1_DLK_VSSA P5 GND
2LA5 ADAC1N +3V3
2J30 B6 7J02-2 E9
4
AH3 AVP1_DLK_VSSD R5 3J60
ADAC1P 100n IJ26 120R
AVP1_DLK1DN R2 DATA1N-MAIN 2J31 B7 7J08 A8
3n3
ADAC2 AG1 AVP1_DLK1DP R1 DATA1P-MAIN 100K
ADAC2 2J32 C7 7J10-1 B6
B 2LA6
AG2
AG3
ADAC2N AVP1_DLK1SN
AVP1_DLK1SP
R4
R3
STROBE1N-MAIN
STROBE1P-MAIN BC857BS
4 IJ27 3J62 IJ25 3J61 B 2J33 C6 7J10-2 B5
ADAC2P 7J10-2 IJ28
AVP1_DLK2DN P2 DATA2N-MAIN 5 10K 1 IJ30 3J63
3n3 680R 2J31 2J34 D7 7J11 C6
AF1 AVP1_DLK2DP P1 DATA2P-MAIN BC857BS AV1-AV6_FBL-HSYNC
ADAC3 7J10-1 2J35 D7 7J12-1 D6
AF2 AVP1_DLK2SN P4 STROBE2N-MAIN 3 IJ31 2 10K
ADAC3N 1u0
AG4 AVP1_DLK2SP P3 STROBE2P-MAIN 2LA5 B1 7J12-2 D5
ADAC3P
680K
3J64
AVP1_DLK3DN N2 DATA3N-MAIN 6
3J65 2LA6 B1 7J13 D6
ADAC4 AE1 AVP1_DLK3DP N1 DATA3P-MAIN IJ32
ADAC4
3J66
2LA7 C1 9J20 C7
1K0
AE2 AVP1_DLK3SN N4 STROBE3N-MAIN 220R IJ33 3J67
2LA7 ADAC4N 2J32 FJ20
AB5 AVP1_DLK3SP N3 STROBE3P-MAIN 7J11
ADAC4P BC847BW 2LA8 C1 9J21 C6
AVP1_DTC_CLVSS T6 10K IJ34
3n3 1u0 2LA9 D1 9J22 C4
AD1 AVP1_DTC_VDD3 T3 IJ35 3J68
ADAC5
AD2 AVP1_DTC_VDDA T4 2LT0 E9 9J24 C5
ADAC5N
AB4 AVP1_DTC_VSSA T5 9J22 IJ03 100K
ADAC5P 2LT6 A9 FJ20 C8
C AC1
AVP1_HSYNCFBL1
AVP1_HSYNCFBL2
T1
T2 9J24
9J20
AV2_FBL
C 3J01 E4 FJ42 D7
ADAC6
AC2 AVP1_HVINFO1 M3 HV-PRM-MAIN
ADAC6N 3J02 A9 FLA8 E7
AB3 AVP1_VSYNC1 M1
ADAC6P 3J03 E4 IJ00 A4
9J21
120R
AVP1_VSYNC2 M2
+12VS +5V2-STBY
ADAC7 AB1 5J16 3J05 A9 IJ01 A4
ADAC7 2J33
AB2 AVP2_DLK_VDDA H5 +3V3
2LA8 ADAC7N 3J06 A9 IJ02 A6
AA4 AVP2_DLK_VDDD G6 3J69
ADAC7P 100n IJ39 120R
3J12
3n3 AVP2_DLK_VSSA J5 3J07 F4 IJ03 C5
ADAC8 AA1 AVP2_DLK_VSSD K5 100K
ADAC8
4
3J08 F4 IJ04 E6
AA2 AVP2_DLK1DN K2 IJ40 3J71 IJ38 3J70
2LA9 ADAC8N 3J09 F4 IJ05 E6
3L05
3L04
10R
2R2
AA3 K1 BC857BS
120R
ADAC8P AVP2_DLK1DP
K4 7J12-2 5 1 IJ41
3n3 AVP2_DLK1SN 10K 680R IJ43 3J72 2J34 AV6_VSYNC
3J11 F2 IJ06 F6
DSNDL1 AF3 AVP2_DLK1SP K3 BC857BS
ADAC9 7J12-1 3J12 D4 IJ07 F6
D 2J22
AF4
ADAC9N AVP2_DLK2DN J2 3 IJ44 2
10K 1u0 FJ42
IJ53 IJ54
D 3J13 D4 IJ08 A8
3J13
AF5 AVP2_DLK2DP J1
ADAC9P
680K
3J73
AVP2_DLK2SN J4 6
3n3 3J74 3J14 A9 IJ09 E9
BAT54 COL
DSNDR1 AE3 J3 IJ45
AVP2_DLK2SP
BAS316
ADAC10 3J60 B7 IJ11 E8
3J75
6J07
6J08
1K0
AE4 AVP2_DLK3DN H2 220R IJ46 3J76
2J23 ADAC10N 2J35
AE5 AVP2_DLK3DP H1 7J13 3J61 B6 IJ25 B6
ADAC10P BC847BW
AVP2_DLK3SN H4 10K
3n3 IJ47 1u0 3J62 B6 IJ26 B6
DSNDL2 AD3 AVP2_DLK3SP H3 3J77 IJ09
ADAC11
2J24
AD4
ADAC11N AVP2_DTC_CLVSS K6 3J63 B7 IJ27 B5
AD5 AVP2_DTC_VDD3 L3
ADAC11P 100K 3J64 B7 IJ28 B7
AVP2_DTC_VDDA L4
3n3 3J65 B6 IJ30 B7
2LT0
AC3 L5
1u0
DSNDR2 ADAC12 AVP2_DTC_VSSA IJ04 5J04
AC4 L1 3JA2 120R
2J25 ADAC12N AVP2_HSYNCFBL1 +1V2 3J66 C5 IJ31 B5
100K
100K
3L01
3L00
AC5 AVP2_HSYNCFBL2 L2 AV2_FBL
ADAC12P 120R 3J67 C7 IJ32 B6
E
100n
E
2J13
AVP2_HVINFO1 G3
3n3
I2S-MCH-LR U2
I2S_IN_SD1 AVP2_VSYNC1 G1 3J01 120R 3J68 C7 IJ33 C7
I2S-MCH-CSW U3 G2 AV6_VSYNC IJ55 11V0
I2S_IN_SD2 AVP2_VSYNC2 3J69 C7 IJ34 C7
I2S-MCH-SLR U4 4
I2S_IN_SD3 IJ05 5J05 3L02
I2S-MAIN-D V4 I2S_OUT_SCK Y2 3J03 68R I2S-BCLK-AVIP 6 10V3 BC847BPN 3J70 D6 IJ35 C7
I2S_IN_SD4 7J02-2
I2S-SUB-D V5 I2S_OUT_SD1 W1 IJ11 5 3J71 D6 IJ38 D6
I2S_IN_SD5 120R FLA8 3L03 10K
100n
2J16
W5 I2S_OUT_SD2 W2 RESET-AUDIO 2 7J01-1
I2S_IN_SD6 BC847BPN 3J72 D7 IJ39 D6
I2S_OUT_SD3 V1 3
470K 1V3
I2S-BCLK-MAIN V2
I2S_SCK_SYS I2S_OUT_SD4 W3 3J07 68R I2S-MAIN-ND 1 11V1 11V0 3J73 D7 IJ40 D5
I2S_OUT_SD5 W4 3J08 68R I2S-SUB-ND
IJ06 5J06 3J74 D6 IJ41 D7
I2S-WS-MAIN V3 I2S_OUT_SD6 Y4 6
I2S_WS_SYS +3V3 3J75 D6 IJ43 D7
I2S_OUT_WS Y3 3J09 68R I2S-WS-AVIP A-PLOP
120R
100n
2J18
CLK-MPIF M4 2 7J02-1 3J76 D7 IJ44 D5
MPIF_CLK BC847BPN
0V7 3J77 D7 IJ45 D6
F I2S-BCLK-SUB
I2S-WS-SUB
U1
U5
I2S_SCK_XTRA
1
F 3JA2 E4 IJ46 D7
I2S_WS_XTRA IJ07 5J07
0E02 0E03
+1V2 3L00 E9 IJ47 D7
120R 3L01 E8 IJ53 D9
100n
2J20
3L02 E9 IJ54 D9
3J11 68R
3L03 E8 IJ55 E8
3L04 D9
G_15930_031.eps
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3L05 D9
5J00 A6
1 2 3 4 5 6 7 8 9
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 65
2LT7
AG29 33R 3LS0-3 DV3F-DATA2_0 H28
22p
DV3_DATA2 MP-BOUT-7 BIN7
AG30 33R 3LR9-4 DV3F-DATA3_1 MP-BOUT-8 H30
DV3_DATA3 BIN8
AH30 33R 3LS1-4 DV3F-DATA4_2 MP-BOUT-9 J26
DV3_DATA4 BIN9
AG28 33R 3LS0-4 DV3F-DATA5_3
DV3_DATA5
AH27 33R 3LR9-2 DV3F-DATA6_4
DV3_DATA6
AJ28 33R 3LS1-3 DV3F-DATA7_5
DV3_DATA7
AK29 33R 3LS1-1 DV3F-DATA8_6
DV3_DATA8
AH28 33R 3LS0-2 DV3F-DATA9_7
DV3_DATA9
E E
G_15930_032.eps
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Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 66
100n
2L01
100n
E E
5L01 IL03
+2V5
600R
3L38
2L07
100n
1K0
2L06
100n
RES
IL05
VREF-PNX
F 1V4
F
3L39
2L08
100n
1K0
G_15930_033.eps
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Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 67
2L56
100n
2L57
100n
2L58
100n
2L50
100n
2L51
100n
2L52
100n
2L53
100n
2L54
100n
2L61
A A
1n0
33R DDR INTERFACE 2L60 C5
PNX-MA-0 C12
3L41 33R 3L40 D12 MA_0 2L61 A9
PNX-MA-1
PNX-MA-2 33R D11 MA_1 2L62 E6
3L43 33R 3L42 C10 MA_2 2L63 E7
PNX-MA-3
33R MA_3 3L95 33R
PNX-MA-4 D21
MBA_0
D14 PNX-MBA0 3L40 A1
3L45 33R 3L44 C21 MA_4 C13
PNX-MA-5 MBA_1 PNX-MBA1 3L41 A1
MA_5 7L50
18
33
15
55
61
PNX-MA-6 33R D20 3L90 3L94 33R
9
3L47 33R 3L46 D19 MA_6 C17 1K0 MT46V16M16D3TG-7L 3L42 A1
PNX-MA-7 MCKE_0 PNX-MCKE
PNX-MA-8 33R C19 MA_7 A16 PNX-MCLK-N 14 3L43 A1
MCLK_N VDD VDDQ
PNX-MA-9
PNX-MA-10 3L49
33R 3L48
33R
D18
D13
MA_8
MA_9 A17 3L51
100R
PNX-MCLK-P
PNX-MA-0
PNX-MA-1
29
30
0 Φ 17
19
3L44 A1
3L45 A1
PNX-MA-11 33R 3L91 C18 MA_10 MCLK_P
C14 PNX-MCS-0 PNX-MA-2 31
1 DDR 25
3L92 33R MA_11 MCS_0 2 SDRAM NC 3L46 B1
PNX-MA-12 D17 PNX-MA-3 32 43
3L93 MA_12 3L52 3 3L47 B1
B PNX-MDATA-0 A11
MD_0
MDQM_0
MDQM_1
B15
D16 22R 3L99
PNX-MDQM-0
PNX-MDQM-1
PNX-MA-4
PNX-MA-5
35
36
4
5 A
16Mx16 50
53 B 3L48 B1
PNX-MDATA-1 B12 22R PNX-MA-6 37 3L49 B1
MD_1 6 3L50
PNX-MDATA-2 C11
MDQS_0
A15 PNX-MDQS-0 PNX-MA-7 38
7 0
2 PNX-MDATA-0 3L50 B8
A12 MD_2 B16 39 4 22R 3L56
PNX-MDATA-3 MDQS_1 PNX-MDQS-1 PNX-MA-8 8 1 PNX-MDATA-1 3L51 B4
A10 MD_3 40 5 3L57 22R
PNX-MDATA-4 ILN1 PNX-MA-9 PNX-MDATA-2
B13 MD_4 E21 28
9 2
7 22R 3L58 3L52 B4
PNX-MDATA-5 Mem_DLL0 PNX-MA-10 10 3 PNX-MDATA-3
PNX-MDATA-6 B10 MD_5 E10 PNX-MA-11 41 8 3L59 22R PNX-MDATA-4 3L56 B9
MD_6 Mem_DLL1 VREF-PNX 11 4
600R
3L57 B8
2L60
100n
5L50
PNX-MDATA-7 A13 PNX-MA-12 42 10 22R 3L60 PNX-MDATA-5
MD_7 12 5
PNX-MDATA-8 A18 C16 AP 11 3L61 22R PNX-MDATA-6 3L58 B9
MD_8 MM_VREF 6
PNX-MDATA-9 B21 PNX-MBA0 26 13 22R 3L62 PNX-MDATA-7
MD_9 3L98 0 D 7 3L59 B8
PNX-MDATA-10 B18 A14 PNX-MRAS PNX-MBA1 27 BA 54 3L63 22R PNX-MDATA-8
MD_10 MRAS 1 8 3L60 C9
2L59
100n
PNX-MDATA-11 A21 D15 3L97 33R PNX-MCAS 56 22R 3L64 PNX-MDATA-9
MD_11 MCAS 9 3L61 C8
A19 C15 33R 3L96 3L65 22R
+1V2
PNX-MDATA-12 PNX-MWE PNX-MDQM-0 20 57 PNX-MDATA-10
MD_12 MWE L 10
3L62 C9
C PNX-MDATA-13
PNX-MDATA-14
C20
B19 MD_13
MD_14
33R PNX-MDQM-1
VREF-PNX
47
U
DM
11
12
59
60
22R
3L67
3L66
22R
PNX-MDATA-11
PNX-MDATA-12 C 3L63 C8
PNX-MDATA-15 A20 49 62 22R 3L68 PNX-MDATA-13
MD_15 2L55 100n VREF 13 3L64 C9
63 3L69 22R PNX-MDATA-14
46
14
65 22R 3L70 3L65 C8
PNX-MCLK-N CK PNX-MDATA-15
15 3L66 C9
PNX-MCLK-P 45 22R
CK
PNX-MCKE 44 3L67 C8
CKE 3L89
PNX-MCS-0 24 16 PNX-MDQS-0 3L68 C9
CS L
PNX-MRAS 23 DQS 51 3L71 22R PNX-MDQS-1 3L69 C8
RAS U
PNX-MCAS 22 22R
21
CAS 3L70 C9
PNX-MWE WE 3L71 D8
VSS VSSQ
3L89 C9
34
48
66
12
52
58
64
3L90 A4
6
D D 3L91 B1
3L92 B1
3L93 B1
3L94 A4
3L95 A4
3L96 C4
5L52 IL04 3L97 C4
+2V5-DDRPNX
+2V5
3L98 C4
220R
5L51 3L99 B4
5L50 C5
220R 5L51 E6
5L52 E6
2L62
2L63
100p
E E
1n0
7J00-3 A3
7L50 A6
IL04 D6
ILN1 B5
G_15930_034.eps
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1 2 3 4 5 6 7 8 9
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 68
l 2LA1 D7 3LN6 C4
3LB5
3LC3 10K 3LG6 100R
10K
SUPPLY-FAULT AG13 100R
P1_3 3LE4 3LA7 B1 3LU0 I12
3LC4 10K P50 POWER-OK-DISPLAY-3V3 +3V3-STANDBY 3LD2 10K AK14 AH10 SPI-CLK SDA-UP-VIP
P1_4
B 3LC5
3LC6
100K
4K7 RES
POWER-OK-DISPLAY
AMBI-SEL-1
AMBI-SEL-1
AMBI-SEL-2
3LG8
3LH9
100R
100R
AH14
AG14
P1_5
SPI_CLK
AG10 SPI-CSB SPI-SDI
4K7 B 3LA8 E2
3LA9 B1
3LU1 I11
3LU2 I11
P1_6 SPI_CSB
3LC7 4K7 RES AMBI-SEL-2 3LH8 100R AF14 3LB1 E2 3LU3 I10
P1_7
ILC3 DETECT-1V2 AJ10 SPI-SDI 3LB2 E3 3LU4 G8
SPI_SDI
3LA9 10K 3LN0 100R P2.0 AF16 3LB3 E3 3LU5 G7
3LN1 P2_0
100R P2.1 AK17 AK10 SPI-SDO 3LB4 E8 3LU6 G7
P2_1 SPI_SDO
DETECT-3V3 3LN2 100R P2.2 AH17
P2_2 FLA0 5LA2 3LB5 B9 3LU7 G6
DETECT-5V 3LN3 100R P2.3 AG17 AK12
3L06 RES P2_3 XTAL_MC_VDD 3LB6 D7 3LU8 G6
DETECT-8V6 3LN4 100R P2.4 AK18
P2_4 600R +1V2-STANDBY 3LB7 A8 3LU9 H6
2LB0
100n
DETECT-12V 3LN5 100R P2.5 AJ18 AJ12
100K P2_5 XTALI_MC 3LB8 A8 3LV0 H6
CTRL4-STBY 3LN6 100R P2.6 AH18
PROT-AUDIOSUPPLY 9LC7 P2_6 3LB9 C8 3LV1 H7
3LG2 10K POWER-OK-PLATFORM-3V3 3LN7 100R P2.7 AG18 AH12
P2_7 XTALO_MC 3LC0 B1 3LV2 H7
PROT-AUDIOSUPPLY
3LC9 10K 3LJ0 100R 3LC1 D1 3LV3 H8
POWER-OK-PLATFORM-3V3 RXD-UP AK19 AG12
P3_0 XTAL_MC_VSS
C 3LD0
3LD1
10K
10K
RESET-MIPS
RESET-PNX2015
TXD-UP
9LC6
3LJ1
3LJ4
100R
100R
AJ19
AH19
P3_1
AH25
3LQ6
PSEN PSEN
3LB9 C 3LC2 B1
3LC3 B1
3LV4 I8
3LV5 I7
P3_2 PSEN
ILB9 FLB7 SDM IRQ-POD RES 3LJ5 100R AG19 100R 10K 3LC4 B1 3LV6 I7
P3_3
RESET-MIPS 3V2 3LJ6 100R AK20 AK25 3LC5 B1 3LV7 I6
3LR2 10K P3_4 PWM0
RESET-PNX2015 3V2 3LJ7 100R AH20
P3_5 2LA0 3LC6 B1 3LV8 I6
SDM 3LJ8 100R AG20 +3V3-STANDBY
3LD3 10K P3_6 3LC7 B1 5LA1 D11
LED2-3V3 LED2-3V3 3LJ9 100R AK21
P3_7 22p 3LC8 D1 5LA2 B7
3LB6
RES
1M0
3LD4 10K LED1-3V3 LED1-3V3
1LA0
FLA5 3LC9 C1 5LA3 F10
8
16M
3LD5 10K RESET-SYSTEM RESET-SYSTEM 3V2 3LK0 100R AJ21 7LA7
P4_0 3LD0 C1 6L00 I6
100R
RES
3LF2
3LD6 10K RESET-AUDIO RESET-AUDIO 3LK1 100R AH21 M25P05-AVMN6
P4_1 2LA1
3LD7 10K DEBUG-BREAK DEBUG-BREAK 3LK2 100R AG21 VCC 3LD1 C1 6L01 H6
Φ
P4_2 FLA1
3LD8 10K EJTAG-DETECT EJTAG-DETECT 3LK3 100R AF21 DSX840GA SPI-SDO 5 2 3LD2 B4 6L02 G6
P4_3 22p D Q +1V2
3LD9 10K CTRL3-STBY CTRL3-STBY 3LK4 100R AK22 512K 3LD3 C1 6L03 I12
P4_4 FLA2
3LE7 10K 3LK5 100R AJ22 SPI-CLK 6 3LD4 D1 7J00-5 A5
P4_5 C FLASH
D 3LE8 10K
ILC2
RESET-MAIN-NVM RESET-MAIN-NVM 3LK6 100R
AH22
AG22
P4_6
SPI-CSB
FLA3
1
D 3LD5 D1
3LD6 D1
7J00-6 D12
7LA2-1 G3
P4_7 S
3LE9 10K STBY-WP-NAND-FLASH STBY-WP-NAND-FLASH 3LK7 100R
FLA4 3LD7 D1 7LA2-2 G3
600R
5LA1
3LS2 680R KEYBOARD KEYBOARD 3LK8 100R AK23 BACKLIGHT-CONTROL_RESET-P3 SPI-WP 3 FLB0
ILB3 P5_0 W 3LD8 D1 7LA3-1 I2
2LB4 100n LIGHT-SENSOR 3LK9 100R AH23 M27-PNX
3LC1 P5_1 3LD9 D1 7LA3-2 I3
10K TEMP-SENSOR TEMP-SENSOR 3LL0 100R AG23 7
3LC8 3LL1 P5_2 HOLD 3LE0 A8 7LA7 D8
10K FRONT-DETECT FRONT-DETECT 100R AF23 ILB8 ILB6 7J00-6
P5_3 3LE1 A6 7LB0 I8
180R
2LA2
3LL8
3LL2 100R AK24 VSS PNX 2015
10p
AV1-STATUS P5_4
Φ
RES
3LF9
3LL3 100R 3LE2 B7 7LB1 H8
10K
AV2-STATUS AJ24
P5_5
3LB4
2LB1
100n
3LE5 10K 3LL4 100R 3LE3 B8 7LB2 G8
10K
AH24
4
3LE6 10K 3LL7 100R AG24
P5_6 ILB5 CONTROL 3LE4 B8 7LB3 I1 1
P5_7
FJ40 3LE5 E1 7LB4 H11
3LH5 10K SPI-PROG SPI-PROG 3LL5 100R AK27 Y29 3LE6 E1 7LB5 H12
P6_4 XTAL_SYS_VDD FLA6
120R
3LL9
3LH6 10K SPI-WP SPI-WP 3LL6 100R AJ27 AF9 3LF8 100R SCL-DMA-BUS2 3LE7 D1 7LB6 F6
P6_5 SCL_COL
E +3V3-STANDBY Y28 XTALI_SYS FLA7 E 3LE8 D1 7LB7 F8
10K RES
10K RES
10K RES
10K RES
3LB1
3LB2
3LB3
JTAG-TCK
JTAG-TD-VIPER-PNX2015 Y26 C27 3LH0 100R SCL-DMA-BUS2
3LF1 A7 9LA2 E10
+3V3 XTAL_SYS_VSS SCL_HD
IL16 3LF2 D6 9LA3 F10
9LA2
3L37
3LH1 100R 3LF8 E13 9LA5 H3
10K
POWER-OK-DISPLAY-3V3 10K 3LJ3 AH11 JTAG_TCK B27 SDA-DMA-BUS2
SDA_HD
3L36
9LA0 3LF9 E6 9LA6 I3
10K
AK11 JTAG_TDI
JTAG-TD-DVB-HDMI 9LA1 AJ11 JTAG_TDO F4 IRQ-HIRATE 3LG2 C1 9LC5 G7
HD_EXINT1
JTAG-TMS AG11 JTAG_TMS F5 3LJ2 10K +3V3 3LG3 B4 9LC6 C3
HD_EXINT2
JTAG-TRST AF11 JTAG_TRSTN 3LG5 B4 9LC7 C3
IL35 RESET-MIPS 9LA3 C22 IRQ-HD1 3LG6 B4 FJ40 E3
+5V2-STBY +5V2-STBY INT_HD1
7LB7 RESET-PNX2015 AA27 RESET_IN D22 IRQ-HD2
PDTC114EU INT_HD2 3LG7 B4 FLA0 B7
5LA3 ILB7 3LG8 B4 FLA1 D8
F 7LB6
PDTC114EU +1V2
AD6
AE6
SDAC_VDDD
SDAC_VSSD
SCL_AVIP
G4 3LH3 100R SCL-DMA-BUS2 F 3LG9 E13 FLA2 D8
600R 3LH0 E13 FLA3 D8
330R
3LS3
3LS7
3LH4 100R
10K
G5 SDA-DMA-BUS2
SDA_AVIP 3LH1 E13 FLA4 D8
2LA4
100n
D10 NC_1
Y1 A22 IRQ-AVIP 3LH2 A6 FLA5 D9
NC_3 INT_AVIP1
IL12 Y30 NC_4 B22 IRQ-AVIP-SUB 3LH3 F13 FLA6 E14
INT_AVIP2
IL15 AJ1 NC_5 3LH4 F13 FLA7 E14
IL11 4 POWER-OK-DISPLAY 9LC5 AJ2 3LH5 E1 FLB0 D10
3LS6 NC_6
BC847BPN RES 3LH6 E1 FLB1 H10
IL10 7LA2-2 +3V3-STANDBY
5
10K +3V3-STANDBY 3LH7 A7 FLB2 I1 0
6
3LH8 B4 FLB3 G8
IL13 3
3LS4
2
3LH9 B4 FLB4 H8
LED1-3V3 7LA2-1
BC847BPN 3LJ0 C4 FLB5 I8
10K
G G 3LJ1 C4 FLB7 C2
3LU6
3LU4
1
68K
10K
7LB2
IL20 IL21 NCP303LSN10T1 3LJ2 F13 IL10 G2
3LU8 3LU7 6L02
2 3LJ3 E11 IL11 G3
3LS5 +5V IN FLB3
10R 180K 1 DETECT-5V 3LJ4 C4 IL12 F4
BAS316 RST
3 3LJ5 C4 IL13 G2
10K GND 3V4
3LU5
22K
3LT8
3LT3
10R
10K
+5V2-STBY +5V2-STBY +3V3-STANDBY 3LK1 D4 IL21 G7
3LK2 D4 IL22 G7
100K
3LK3 D4 IL23 H6
3LT7
H H
3LV1
3LK4 D4 IL24 H7
68K
560R
3LS8
3LS9
3LV3
3LT4
3LK5 D4 IL25 H7
10K
10K
4K7
7LB1
+8V6-SW IL23 IL24 NCP303LSN10T1 7LB4 7LB5 3LK6 D4 IL26 I7
3LU9 3LV0 6L01 BC847BW
2 NCP303LSN10T1 IL30 3LK7 D4 IL27 I6
IN FLB4 IL31
IL41 1 DETECT-8V6 2
47K 330K BAS316 RST FLB1 IN 3LK8 D4 IL28 I7
3 DETECT-1V2 1
GND 3V4 RST 3LK9 D4 IL29 I11
3LV2
4 3
22K
180K
3LT5
3LT6
5 4
68K
BC847BPN IL29
7LA3-2 CD NC 2LT1 3LL1 D4 IL31 H12
5 4 5
10K 100n NC CD 3LL2 E4 IL32 I12
6
100n 3LL3 E4 IL33 I11
IL17 IL43 3
3LT1 2 3LL4 E4 IL34 I11
LED2-3V3 7LA3-1 LED2
BC847BPN +3V3-STANDBY 3LL5 E4 IL35 F7
10K +3V3-STANDBY
1 +3V3-STANDBY +3V3-STANDBY
3LL6 E4 IL40 H2
3LL7 E4 IL41 H3
3LT2 3LL8 E10 IL42 H3
I I
3LU1
3LV6
68K
68K
3LL9 E10 IL43 I2
3LU3
3LV4
10K
10K
10K 7LB0 7LB3 3LM0 A4 ILB3 D3
IL27 IL26 NCP303LSN10T1 NCP303LSN10T1 IL33 IL32
RES 3LV8 3LV7 6L00 6L03 3LU0 3LT9 3LM1 A4 ILB5 E10
+12VSW 2 2
IN FLB5 FLB2 IN +3V3 3LM2 A4 ILB6 D11
9LA6 10R 560K 1 DETECT-12V DETECT-3V3 1 100K 10R
BAS316 RST RST BAS316 3LM3 A4 ILB7 F11
3 3V4 3
GND 3V4 GND 3LM4 A4 ILB8 D8
3LU2
3LV5
22K
22K
2LT5 IL28 IL34 2LT2
5 4 4 5 3LM5 A4 ILB9 C1
CD NC NC CD
3LM6 A4 ILC2 D1
100n 100n
G_15930_035.eps 3LM7 B4 ILC3 B1
3104 313 6145.2 120606
3LN0 B4
3LN1 B4
3LN2 B4
1 2 3 4 5 6 7 8 9 10 11 12 13 14 3LN3 C4
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 69
47u 4V
2LN2
2LN3
2LN4
2LN5
2LN6
2LN7
2LN8
+3V3
100n
100n
100n
100n
100n
100n
B2 R16 2L92 E3
VSS_1 VSS_36
B5 R17 E9
B8
VSS_2 VSS_37
R18 E11
C1V2_VDD_1 2LN2 A7
VSS_3 VSS_38 C1V2_VDD_2 2LN3 A7
B11 E12 F25
VSS_4 C1V2_VDD_3 P3V3VDD_1
B14
VSS_5 VSS_40
T13 E16
C1V2_VDD_4 P3V3VDD_2
G25 2LN4 A7
B17 T14 E17 H26 2LN5 A8
VSS_6 VSS_41 C1V2_VDD_5 P3V3VDD_3
B20 T15 F9 M6 +1V2 2LN6 A8
VSS_7 VSS_42 C1V2_VDD_6 P3V3VDD_4
B29 T16 F10 N6
C25
VSS_8 VSS_43
T17 F12
C1V2_VDD_7 P3V3VDD_5
V6
2LN7 A8
VSS_9 VSS_44 C1V2_VDD_8 P3V3VDD_6
100u 4V
2LN8 A8
2LP0
2LP2
2LP3
2LP4
100n
100n
100n
D24 T18 F16 W6
VSS_10 VSS_45 C1V2_VDD_9 P3V3VDD_7
D26
VSS_11 VSS_46
J6 F17
C1V2_VDD_10 P3V3VDD_8
AF8 2LP0 B7
E2 U6 AA6 AA26 2LP2 B8
VSS_12 VSS_47 C1V2_VDD_11 P3V3VDD_9
B E23
E26
VSS_13 VSS_48
U13
U14
J25
K25
C1V2_VDD_12
AB26
B 2LP3 B8
E29
VSS_14 VSS_49
U15 AB6
C1V2_VDD_13 P3V3VDD_11
AC26
2LP4 B8
VSS_15 VSS_50 C1V2_VDD_14 P3V3VDD_12 2LP7 B8
H29 U16 P6 AD25
VSS_16 VSS_51 C1V2_VDD_15 P3V3VDD_13 +2V5
L29
VSS_17 VSS_52
U17 R6
C1V2_VDD_16 P3V3VDD_14
AE7 2LP8 B8
N13 U18 AB25 AE13 2LP9 B8
VSS_18 VSS_53 C1V2_VDD_17 P3V3VDD_15
100u 4V
2LR0
2LP7
2LP8
2LP9
100n
100n
100n
N14 U29 F22 AE14 2LR0 B8
VSS_19 VSS_54 C1V2_VDD_18 P3V3VDD_16
N15 V13 F21 AE24
N16
VSS_20 VSS_55
V14 AA5
C1V2_VDD_19 P3V3VDD_17
AE25 +1V2-STANDBY 2LR2 C8
VSS_21 VSS_56 C1V2_VDD_20 P3V3VDD_18 2LR4 D8
N17 V15 AE10 AF26
VSS_22 VSS_57 C1V2_VDD_21 P3V3VDD_19
N18
VSS_23 VSS_58
V16 AE12
C1V2_VDD_22
2LR5 D8
P13 V17 AF10 AE15 5LN0 ILN3 2LR6 D8
VSS_24 VSS_59 C1V2_VDD_23 SB1V2VDD_1
P14 V18 AF12 AE16 PLL-3V3 2LR8 E8
VSS_25 VSS_60 C1V2_VDD_24 SB1V2VDD_2 +3V3
P15 AC29 AF13 AE17
VSS_26 VSS_61 C1V2_VDD_25 SB1V2VDD_3 600R 2LR9 E8
C P16
VSS_27 VSS_62
AF29 E20
C1V2_VDD_26 SB1V2VDD_4
AE18 C 2LS5 E6
2LR2
100n
P17 AJ5 E22 AF15 +3V3-STANDBY
VSS_28 VSS_63 C1V2_VDD_27 SB1V2VDD_5
P18
VSS_29 VSS_64
AJ8 AA25
C1V2_VDD_28 SB1V2VDD_6
AF17 5LN0 C7
U26 AJ14 AF18 5LN1 C7
VSS_30 VSS_65 +2V5-DDRPNX SB1V2VDD_7
U25 AJ17 AE19 5LN2 D7
VSS_31 VSS_66 +2V5 SB3V3VDD_1
P29 AJ20 AE21 5LN1 ILN4
R13
VSS_32 VSS_67
AJ23
SB3V3VDD_2
AE22
5LN3 E7
VSS_33 VSS_68 SB3V3VDD_3 +1V2 PLL-1V2
R14 AJ26 E5 AF19 5LN4 E6
VSS_34 VSS_69 P2V5VDD_1 SB3V3VDD_4 600R
R15
VSS_35 VSS_70
AJ29 E6
P2V5VDD_2 SB3V3VDD_5
AF20 7J00-8 A5
2LR4
100n
E7 7J00-9 A2
P2V5VDD_3
E8 A23 ILN2 E6
P2V5VDD_4 VDD_LVDS_1
E13 A24
E14
P2V5VDD_5 VDD_LVDS_2
A26
LVDS-3V3 ILN3 C8
P2V5VDD_6 VDD_LVDS_3 ILN4 C8
E15 B23 5LN2 ILN5
P2V5VDD_7 VDD_LVDS
D E18
E19
P2V5VDD_8
AE9
+3V3-STANDBY
UP-3V3 D ILN5 D8
ILN6 E8
P2V5VDD_9 VDDA_SYS_PLL PLL-1V2 600R
F6 T25
P2V5VDD_10 VCCA_LVDS_PLL LVDS-3V3
2LR5
2LR6
100n
100n
F7 V25
P2V5VDD_11 VDDA_1_7_MCAB +3V3
F13 P26
P2V5VDD_12 VCCA_U5PLL PLL-3V3
F14
P2V5VDD_13
F15 AF24
P2V5VDD_14 ADC_VSSA
F18 AF22 UP-3V3 5LN3 ILN6
P2V5VDD_15 ADC3V3VDDA
F19 LVDS-3V3
P2V5VDD_16 +3V3
2L87
2L80
2L81
2L82
2L83
2L84
100n
2L85
100n
2L86
100n
100n
2L88
100p
2L89
2L90
2L92
2L91
L26 V26
2u2
2u2
2u2
2u2
1n0
1n0
1n0
1n0
2LR8
2LR9
100n
100n
M26 5LN4
P2V5VDD_19 ILN2
N25 AK1
P2V5VDD_20 SDAC_3V3
R26
P2V5VDD_21 600R
E P25
P2V5VDD_22 E
2LS5
100n
T26
P2V5VDD_23
R25 P2V5VDD_24
G_15930_036.eps
3104 313 6145.2 120606
1 2 3 4 5 6 7 8
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 70
100n
2J74
RES 5J09 RES 2J47 H9 IJ16 C3
2J48 H9 IJ18 G2
220R
2J49 I9 IJ19 G2
2J57 D4 IJ20 G2
IJ14 5J10
+5VDISP 2J60 C10 IJ21 H2
220R
5J11 FJ13
I2C-BUFFER * 2J64 H5 IJ22 H2
2J66 E4 IJ23 H2
VDISP
220R 2J67 D12 IJ24 H2
5J12 2J71 2J68 E12 IJ50 E3
B B
9J18
RES
220R 100n 5J82 RES 2J75 RES 2J69 H5 IJ51 E3
+5V2-STBY 2J70 H5 IJ61 B12
6J06 30R
IJ67 3J86 100n
2J71 B5 IJ67 B3
7J06 1K0 2J72 I9 IJ68 C4
SML-310
SI3441BDV RES IJ10 RES IJ61
5J85 2J73 I9 IJ69 D4
9J15
+12VSW +3V3
30R 2J74 A5 IJ70 C3
RES 2J75 B1 1 IJ71 I2
3J31
3J32
100n
RES 7J04
2J60
4K7
4K7
RES RES RES 6J03
PCA9515DP 2J76 C2 IJ72 E4
3J92 VCC BAV99 COL
3J23 G2 IJ73 D5
47K 3J24 G2 IJ81 H3
C 6J01 SDA-I2C4 3 SDA0 SDA1 6
C 3J25 C3
VDISP-SWITCH BZX384-C5V6 DISABLE-12V 3J26 D2
IJ12 3LQ7 FJ15
SCL-I2C4 2 SCL0 SCL1 7 SCL-I2C4-DISP 3J28-1 E4
3J99 IJ15 2J76 3J25 IJ16
3 100R 3J28-2 E3
IJ70 IJ68 5 EN 1
47R 1u0 47K 10K NC 3J28-3 C4
3 3J28-3 6
100p
2J67
7J07-2 5 GND
BC847BS
+3V3
5 3J28-4 4 IJ69 3J28-4 C4
10K
4
3J31 C10
100n
2J57
4
3J32 C11
RES
3J42 F4
6J04
3J43 F5
D FJ33 BAV99 COL
D 3J44 F5
3J47 H2
3J49 G2
9J16 3LQ8 FJ16
IJ73 SDA-I2C4-DISP 3J50 H2
3J26
ENABLE-5V 100R
9J17 IJ13 3J51 H2
22K 0V
100p
2J68
3J52 H4
3J53 H2
6 3J55 I2
IJ50 10K 3J56 I3
7J07-1 2 1 3J28-1 8
+3V3 3J86 B4
E BC847BS
1
7 3J28-2 2 IJ72 10K E 3J88 F5
3J91 G2
100n
2J66
5J08 A4
5J09 A4
3J42
3J43
3J44
3J88
47R
47R
47R
10K
RES
5J10 B4
2J40 5J11 B4
F FHP SDI TXPNXA- 10p
F 5J12 B4
1 5J50 4
3
DLW21S
FJ12
(IRQ) RESET 5J50 F8
CTRL-DISP1
5J52 G8
1G50
TXPNXA+ 5J54 G8
2
FJ11 (PDWIN) 2J41
CTRL-DISP2 VDISP 1 5J56 H8
10p 2J42 2
3J49 FJ10 (CPU-GO) 3 5J58 I8
CTRL-DISP3 TXPNXB- 10p 4 5J60 I8
1 5J52 4
3
DLW21S
100R VDISP2 5
(PDP-GO) 5J82 B9
FJ09 6
CTRL-DISP4 CTRL-DISP1 7 5J85 B9
TXPNXB+ CTRL-DISP2
2
2J43 8 6J01 C2
G CTRL1-VIPER
IJ18 3J91
10p 2J44
CTRL-DISP3
CTRL-DISP4
9
10
G 6J03 C11
100R
FJ23
11 6J04 D11
TXPNXC- 10p 12
IJ19 RES 3J24 6J06 B5
1 5J54 4
3
CTRL2-VIPER FJ24
DLW21S
13
47R 14 7J04 C9
FJ25
CTRL4-VIPER
IJ20 RES 3J23
TXPNXC+ FJ26
15 LVDS 7J06 B3
2
+3V3-STANDBY 2J45 16
47R 17 7J07-1 E3
CONNECTOR
2J37
2J70
2J69
2J64
FJ27
1n0
1n0
1n0
1n0
1 5J56 4
3
FJ29
DLW21S
IJ22 RES 3J47 21 9J15 C10
3J52
FJ30
4K7
2
IJ23 3J51 2J47 24
CTRL4-STBY FJ32
25 9J18 B2
47R 10p 2J48 26
IJ81 FJ36 FJ09 G5
IJ24 RES 3J53 27
POD-MODE TXPNXD- FJ37 FJ10 G5
10p 28
1 5J58 4
3
DLW21S
100K 29 FJ11 F5
IJ71 7J09 SCL-I2C4-DISP 30
3J55
ON-MODE BC847BW SDA-I2C4-DISP 31 FJ12 F5
100K
TXPNXD+ 33 32
2
3
DLW21S
FJ23 G10
FJ24 G10
TXPNXE+
2
2J73
FJ25 G10
10p FJ26 H10
FJ27 H10
G_15930_037.eps FJ28 H10
3104 313 6145.2 120606 FJ29 H10
FJ30 H10
1 2 3 4 5 6 7 8 9 10 11 12 13 FJ31 H10
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 71
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
B5A
1M00
EMC HOLE
3H05
3H04
1K8
1K8
7V00-5
VIPER REV C SCL-DMA SCL-DMA-BUS1
2H08 3H79 AH10 3H06
C4 D28 PLL-OUT PLL-OUT SDA-DMA SDA-DMA-BUS1
A 27p
DSX840GA
3H75
A2
XTALI
CONTROL PLL_OUT
D29
22R
3H74
22R A
XTALO M135_CLK M135-CLK PCI-CLK-VPR
9Q66
9Q65
1H00
3H82
27M
1M0
100R C30 3H73 68R M27-CLK RES
3Q48 M27_CLK 3H12 0H01 RES
RESET-SYSTEM AD4 22R PLL-OUT
RESET_IN
100R 22R
2H09 AK12
SDA-MM A25 I2C1_SDA PCI_AD0 PCI-AD0 SDA-I2C4
SCL-MM 100R 3Q11 C25 AJ12 PCI-AD1 PCI-CLK-ETHERNET
27p AH11 100R 3Q10 I2C1_SCL PCI_AD1 AH12
PCI_AD2 PCI-AD2 SCL-I2C4
+3V3 SDA-DMA AF29 AG12 PCI-AD3 SCL-DMA FQ41 SCL-DMA-BUS2
100R 3Q13 AD26 I2C2_SDA PCI_AD3 AJ11 3H14
SCL-DMA I2C2_SCL PCI_AD4 PCI-AD4 PLL-OUT FQ42
100R 3Q12 AG11 PCI-AD5 SDA-DMA SDA-DMA-BUS2
3Q03 IQ50 PCI_AD5 22R 0H00 0H04 0H02
SCL-I2C4 SDA-UP-VIP AE27 AK10 PCI-AD6
+3V3 100R 3Q15 AG29 I2C3_SDA PCI_AD6
SCL-UP-VIP AJ10 PCI-AD7 PCI-CLK-USB20
4K7 100R 3Q14 I2C3_SCL PCI_AD7 +3V3 +3V3
3Q27
3H90
AG10
4K7
4K7
PCI-AD8
B 3Q04 IQ51
SDA-I2C4 SDA-I2C4
100R 3H99
A3
B4
I2C4_SDA
PCI_AD8
PCI_AD9
AK9
AJ9
PCI-AD9 B
4K7 SCL-I2C4 I2C4_SCL PCI_AD10 PCI-AD10
100R 3H98 AH9 PCI-AD11
PCI_AD11 0H05
3H22
3H23
RES JTAG-TD-VIPER-PNX2015 9H03 AG9
4K7
4K7
JTAG-TD-VIPER-PNX2015 D2 JTAG_TDO PCI_AD12 PCI-AD12
9H04 JTAG-TD-CON-VIPER 9H16 C1 AK8 +3V3
JTAG-TD-CON-VIPER JTAG_TDI PCI_AD13 PCI-AD13
JTAG-TCK E4 AG8 PCI-AD14
JTAG_TCK PCI_AD14 FQ43
JTAG-TMS JTAG-TMS D3 AK7 PCI-AD15 SCL-MM SCL-MM-BUS1
JTAG_TMS PCI_AD15 AJ5
JTAG-TRST C2 JTAG_TRST PCI_AD16 PCI-AD16 FQ44
JTAG-TRST AG5 PCI-AD17 SDA-MM SDA-MM-BUS1
FQ19 PCI_AD17
JTAG-TD-P3-CON 4K7 EJTAG-TDO D25 AJ4 PCI-AD18
4K7
4K7
4K7
FQ20 DBG_TDO PCI_AD18
JTAG-TD-CON-VIPER 4K7 3H16 EJTAG-TDI B27 AH4 PCI-AD19
FQ21 DBG_TDI PCI_AD19
JTAG-TMS 4K7 3H08 EJTAG-TCK A28 AK3 PCI-AD20
FQ22 DBG_TCK PCI_AD20
JTAG-TCK 3H03 EJTAG-TMS A29 AJ3 PCI-AD21
3H17 FQ23 DBG_TMS PCI_AD21 AK2 PCI-AD22
3H80-2
3H80-4
3H81-2
C +3V3
10K 3H01 4K7 IRQ-IEEE1394
POWERDOWN-1394 B5
E5 GPIO0
PCI_AD22
PCI_AD23
AJ1
AH2
PCI-AD23 C
SEL-IF-LL1 GPIO1 PCI_AD24 PCI-AD24
+3V3 D4 AG2
SEL-IF-LL2 GPIO2 PCI_AD25 PCI-AD25
3H71 B1 AG3 PCI-AD26
4K7
4K7
4K7
4K7
+3V3 FQ50 E7 GPIO3 PCI_AD26 AG4
4K7 IRQ-IEEE1394 PCI-AD27
A5 GPIO4 PCI_AD27 AF1
IRQ-MPIF 9H08 PCI-AD28
FQ54 GPIO5 PCI_AD28
IRQ-FE-MAIN 9H07 IRQ-MAIN IRQ-MAIN A26 AF2 PCI-AD29
GPIO6 PCI_AD29 AF4
IRQ-AVIP 9H13 RESET-ETHERNET B25 PCI-AD30
3H80-1
3H80-3
3H81-1
3H81-3
GPIO7 PCI_AD30 AF5
POWER-OK-PLATFORM-3V3 3Q50 D5 PCI-AD31
GPIO8 PCI_AD31
RESET-USB20 100R E26
3H10 4K7 CTRL4-VIPER GPIO9 AH7
+3V3 CTRL4-VIPER D27 GPIO10 PCI_PAR PCI-PAR
3H09 4K7 REGIMBEAU REGIMBEAU B29 AF7 PCI-PERR
3H11 4K7 GPIO11 PCI_PERR
RES DEBUG-BREAK DEBUG-BREAK 3Q52 B28 AK6 PCI-STOP
IH09 GPIO12 PCI_STOP
RES SOUND-ENABLE-VPR SOUND-ENABLE-VPR 100R C27 AH6 PCI-TRDY
D +3V3 3H13 4K7 IRQ-ETHERNET IRQ-ETHERNET E25
D26
GPIO13
GPIO14
PCI_TRDY
PCI_IRDY
AG6
AF6
PCI-IRDY D
GLINK-IR-OUT-VIP GPIO15 PCI_FRAME PCI-FRAME
3H27 RES AJ6
+3V3 GLINK-IR-OUT-VIP PCI_DEVSEL PCI-DEVSEL
F3 AJ2 3H72 100R PCI-AD16
10K SC1_SCCK PCI_IDSEL
G4 AD2 PCI-CLK-VPR
SC1_OFFN PCI_CLK
E2 AH1 PCI-CBE3
SC1_RST PCI_CBE3
G5 AK5 PCI-CBE2
SC1_CMD PCI_CBE2
F4 AJ7 PCI-CBE1 +5V
SC1_DA PCI_CBE1
PCI_CBE0 AG7 PCI-CBE0
3H87 IRQ-USB20 IRQ-USB20 H4 AH10 PCI-SERR
4K7 SC2_SCCK PCI_SERR
3H85 RESET-FE-MAIN RESET-FE-MAIN F1 +3V3
4K7 SC2_OFFN 3H70
3H83 IRQ-POD IRQ-POD G3 AD1 PCI-INTA PCI-INTA 4K7 +3V3
+3V3 SC2_RST INTA
2Q67
100n
4K7 RES IRQ-HD2 9H06 F2 SC2_CMD AE1 FQ32
RESET-TM E1 PCI-REQ PCI-REQ 3H84 4K7
E FQ03 SC2_DA PCI_REQ AE2 PCI-REQ-A PCI-REQ-A 3H86 4K7 E
BAS316
PCI_REQ_A
3Q24
6H01
3H89
AE4
10K
10K
3H29 PCI_REQ_B PCI-REQ-B PCI-REQ-B 3H88 4K7
+3V3 HSYNC-HIRATE AE28
QVCP2L_DATA_OUT0 AD5 3H93 4K7
4K7 VSYNC-HIRATE AD27 QVCP2L_DATA_OUT1 PCI_GNT PCI-GNT PCI-GNT
9H30 IRQ-SUB IRQ-SUB AF30 AE3 PCI-GNT-A USB20-OC1 9Q13
QVCP2L_DATA_OUT2 PCI_GNT_A
7
RESET-POD-CI AE29 AE5 7Q01
IQ30 3H31 QVCP2L_DATA_OUT3 PCI_GNT_B IQ27 IQ14
IRQ-HIRATE IRQ-HIRATE AD28 USB-OVERCUR 9Q14 LM3526MX-LNOPB
+3V3 QVCP2L_DATA_OUT4
4K7 FQ52 AC27 AA3 3Q38-1 XIO-D8 IQ15 IN
QVCP2L_DATA_OUT5 XIO_D8
IRQ-HD1 9H05 AE30 AA4 100R 3Q38-2 XIO-D9 1 5H03
QVCP2L_DATA_OUT6 XIO_D9 ENA_
FQ53 AD29 AB1 3Q38-3 100R XIO-D10 IQ16 8
9H14 QVCP2L_DATA_OUT7 XIO_D10 OUTA
47u 6.3V
RESET-1394 AD30 AB2 100R 3Q38-4 XIO-D11 2
QVCP2L_DATA_OUT8 XIO_D11 FLGA IQ17
2Q69
IRQ-AVIP-SUB HDMI-COAST 9H15 AB27 AB3 3Q40-1 100R XIO-D12 USB20-PWE1 9Q15
QVCP2L_DATA_OUT9 XIO_D12
AB28 AB4 100R 3Q40-3 XIO-D13 3
QVCP2L_CLK_OUT XIO_D13 FLGB
AC1 3Q40-2 100R XIO-D14 IQ32 5
F XIO_D14
XIO_D15 AC4
W3
100R 3Q40-4
100R
XIO-D15 USB-BUS-PW 9Q16 4
ENB_
OUTB
F
SOUND-ENABLE XIO_ACK XIO-ACK 5H04
W4 IQ28 GND
XIO_A25
47u 6.3V
FQ10 AA2 IH16 3H24 100R XIO-SEL0
6H03 XIO_SEL0 IQ21
2Q70
A-PLOP AA1 IH17 3H15 100R XIO-SEL1
6
XIO_SEL1
Y4 IH18 3H26 100R XIO-SEL2
BAS316 XIO_SEL2
Y2 IQ22 3H25 100R XIO-SEL0
XIO_SEL3
3H97
4K7
W2 IQ23
XIO_SEL4
E24 GLINK-TXD +5V
UA1_TX
UA1_RX B26 GLINK-RXD
DLW21S
IQ03 22R
USB1-DM FQ00 1
USB1_DM AJ28 USB1-DM IQ04 3Q20 22R FQ01 2
USB1_DP AH27 USB1-DP 2H07 USB1-DP FQ02 3
3H40
RES
10K
DLW21S
IQ61 IQ06 3Q22 22R
GLINK-IR-OUT
USB_BUS_PWR
AG27 USB-OVERCUR
USB-OVERCUR 2H06
USB2-DP FQ06
6 CONNECTOR
USB_OVRCUR 7
IQ60 3Q19
3Q23
3Q16
3Q17
3Q18
FH12 1n0 8
GLINK-IR-OUT-VIP 7H02 AD3 RESET-MIPS 1M64 9 11
PDTC114EU SYS_RSTN_OUT
10 12
RES BAV99S 1 TO 1N62 BAV99S
H H
SML-310
2
3H41
3H94
1-1470168-1
10R
RES 4K7
+5V 3
15K
15K
15K
15K
6H00
4
6H06-2 6 5 6H06-1
SSB
9Q17
9Q18
9H40
B4B-PH-SM4-TBT(LF)
3H95
330R
+3V3 G_15930_038.eps
3104 313 6145.2 120606
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 72
2Q01
2Q03
2Q21
2Q23
7V00-2
1u0
1u0
1u0
1u0
VIPER REV C +2V5D-DDR +2V5D-DDR +2V5D-DDR +2V5D-DDR 2V23 G12
2V24 G12
2V25 G12
* 2V26 G12
DDR INTERFACE 7V01* 7V02
2V27 G13
18
33
15
55
61
61
55
15
33
18
MT46V32M16P-5BTR MT46V32M16P-5BTR
1
VDD VDDQ 14 14 VDDQ VDD
2V28 G13
B MM_A0 B13 D19 MM_DATA_7
MM_A0
MM_A1
29
30
0 Φ 17
25
17
25
Φ 0
29
30
MM_A0
MM_A1 B 2V29 G13
MM_A1
MM_ADDR0 MM_DATA0
MM_DATA_3 MM_A2
1 DDR NC NC DDR 1
MM_A2
2V30 G13
D15 B19 31 43 43 31
MM_A2 B14
MM_ADDR1 MM_DATA1
C19 MM_DATA_5 MM_A3 32
2 SDRAM 53 53 SDRAM 2
32 MM_A3 2V31 G13
MM_ADDR2 MM_DATA2 3 3 2V35 G14
MM_A3 A15 A21 MM_DATA_4 MM_A4 35 8Mx16 19 19 8Mx16 35 MM_A4
MM_ADDR3 MM_DATA3 4 4
MM_A4 C15
MM_ADDR4 MM_DATA4
D20 MM_DATA_1 MM_A5 36
5
DNU 50 50 DNU
5
36 MM_A5 2V36 G4
MM_A5 B15 D21 MM_DATA_6 MM_A6 37 A A 37 MM_A6
MM_ADDR5 MM_DATA5 6 6 2V37 G4
MM_A6 A16 B21 MM_DATA_2 MM_A7 38 2 3V00 22R MM_DATA_0 MM_DATA_16 3V01 22R 2 38 MM_A7
MM_A7 MM_ADDR6 MM_DATA6 MM_DATA_0 MM_A8 7 0 MM_DATA_1 MM_DATA_17 0 7 MM_A8
2V38 G4
D16 C21 39 4 3V02 22R 3V03 22R 4 39
MM_A8 B16
MM_ADDR7 MM_DATA7
A24 MM_DATA_13 MM_A9 40
8 1
5 3V04 22R MM_DATA_2 MM_DATA_18 3V05 22R 5
1 8
40 MM_A9 2V39 G6
MM_A9 MM_ADDR8 MM_DATA8 MM_DATA_12 MM_A10 9 2 MM_DATA_3 MM_DATA_19 2 9 MM_A10 2V40 G6
C16 B22 28 7 3V06 22R 3V07 22R 7 28
MM_ADDR9 MM_DATA9 10 3 3 10
MM_A10 D14
MM_ADDR10 MM_DATA10
A22 MM_DATA_10 MM_A11 41
11 4
8 3V08 22R MM_DATA_4 MM_DATA_20 3V09 22R 8
4 11
41 MM_A11 2V41 G6
MM_A11 C18 D22 MM_DATA_8 MM_A12 42 10 3V10 22R MM_DATA_5 MM_DATA_21 3V11 22R 10 42 MM_A12 2V42 F10
MM_A12 MM_ADDR11 MM_DATA11 MM_DATA_11 12 5 MM_DATA_6 MM_DATA_22 5 12
B17 C24 11 3V12 22R 3V13 22R 11
MM_ADDR12 MM_DATA12 AP 6 6 AP 2V43 F10
C 2V02
VREF-VPRDDR
C12
MM_AVREF
MM_DATA13
MM_DATA14
C22
B24
MM_DATA_14
MM_DATA_15
MM_BA0
MM_BA1
26
27
0
1
BA
D 7
8
13
54
3V14 22R
3V16 22R
MM_DATA_7
MM_DATA_8
MM_DATA_23
MM_DATA_24
3V15 22R
3V17 22R
13
54
7
8
D
BA
0
1
26
27
MM_BA0
MM_BA1 C 2V44 F10
1n0 D23 MM_DATA_9 56 3V18 22R MM_DATA_9 MM_DATA_25 3V19 22R 56 2V45 F10
MM_DATA15 9 9
MM_BA0 D13
MM_DATA16
C6 MM_DATA_21 MM_DQM_0 20
L
57 3V20 22R MM_DATA_10 MM_DATA_26 3V21 22R 57
L
20 MM_DQM_2 2V46 F11
MM_BA0 MM_DATA_17 MM_DQM_1 10 MM_DATA_11 MM_DATA_27 10 MM_DQM_3
MM_BA1 A13 B6 47 DM 59 3V22 22R 3V23 22R 59 DM 47 2V47 F11
MM_BA1 MM_DATA17 MM_DATA_23 2V00 1n0 U 11 MM_DATA_12 MM_DATA_28 11 U
D7 60 3V32 22R 3V33 22R 60 2V01 1n0
MM_DATA18 MM_DATA_16 12 MM_DATA_13 MM_DATA_29 12 2V48 F11
MM_CS0 B12 C7 VREFD-DDR 49 62 3V34 22R 3V35 22R 62 49 VREFD-DDR
D17 MM_CS0 MM_DATA19
B7 MM_DATA_20
VREF 13
63 3V36 22R MM_DATA_14 MM_DATA_30 3V37 22R 63
13 VREF 2V49 F11
IH20 MM_CS1 MM_DATA20 14 14
C9 MM_DATA_22 MM_CLK_N 46 65 3V38 22R MM_DATA_15 MM_DATA_31 3V39 22R 65 46 MM_CLK_N 2V50 F11
MM_DATA21 CK 15 15 CK
MM_DQM_0 A19
MM_DQM_0 MM_DATA22
D8 MM_DATA_19 MM_CLK_P 45
CK CK
45 MM_CLK_P 2V51 F12
MM_DQM_1 D24 A7 MM_DATA_18 MM_CKE 44 44 MM_CKE 2V52 F12
MM_DQM_1 MM_DATA23 CKE CKE
MM_DQM_2 D6 A8 MM_DATA_24 MM_CS0 24 16 3V42 22R MM_DQS0 MM_DQS2 3V43 22R 16 24 MM_CS0
B11 MM_DQM_2 MM_DATA24 MM_DATA_26 MM_RAS CS L MM_DQS1 MM_DQS3 L CS MM_RAS
2V53 F12
MM_DQM_3 B9 23 DQS 51 3V40 22R 3V41 22R 51 DQS 23
MM_DQM_3 MM_DATA25
D10 MM_DATA_27 MM_CAS 22
RAS U U RAS
22 MM_CAS 2V54 F12
MM_DATA26 CAS CAS 2V55 F12
D MM_DQS0
MM_DQS1
B20
A23
MM_DQS_0
MM_DQS_1
MM_DATA27
MM_DATA28
A9
D9
MM_DATA_28
MM_DATA_30
MM_WE 21
WE
VSS VSSQ VSSQ VSS
WE
21 MM_WE
D 2V56 F13
MM_DQS2 A6 C10 MM_DATA_29 2V57 F13
MM_DQS_2 MM_DATA29 MM_DATA_31
34
48
66
12
52
58
64
64
58
52
12
66
48
34
MM_DQS3 B10 A10
MM_DQS_3 MM_DATA30 MM_DATA_25
2V58 F13
D11
MM_RAS C13
MM_DATA31 3V00 B9
MM_CAS A12 MM_RAS 3V01 B11
MM_CAS
MM_WE D12 3V02 C9
MM_WE
3V03 C11
MM_CKE D18
MM_CKE 3V04 C9
MM_CLK_N A18
MM_CLK_P B18
MM_CLK_N 3V05 C11
MM_CLK_P 3V06 C9
3V07 C11
3V44
E E 3V08 C9
3V78
1K0
2V42
2V43
2V44
2V45
2V46
2V47
2V48
2V49
2V50
2V51
2V52
2V53
2V54
2V55
2V56
2V57
2V58
10n
10n
10n
10n
10n
10n
10n
10n
10n
10n
10n
10n
10n
10n
10n
10n
10n
3V22 C9
3V23 C11
3V32 C9
560R
560R
3V46
3V47
3V33 C11
3V34 C9
IQ35 VREF-VPRDDR VREFD-DDR
5V01 IH21 3V35 C11
IH22 +2V5D-DDR
+2V5D +2V5D-DDR 3V36 C9
3V37 C11
5V02 3V38 D9
560R
560R
2V36
2V37
2V38
2V39
2V40
2V41
100n
100p
100n
100p
3V45
3V48
1u0
1u0
3V39 D11
G RES
G
47u 4V
2V16
2V17
2V18
2V19
2V20
2V21
2V22
2V23
2V24
2V25
2V26
2V27
2V28
2V29
2V30
2V31
2V35
3V40 D9
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
2V03
2V04
2V05
100n
100p
3V41 D11
1n0
3V42 D9
3V43 D11
3V44 E2
3V45 G3
3V46 F3
3V47 F6
3V48 G6
3V78 E2
5V01 G9
H H 5V02 G9
7V00-2 A4
7V01 B7
7V02 B13
IH20 D2
IH21 G9
IH22 G6
IQ35 G4
G_15930_039.eps
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Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 73
3Q06
2Q25
2Q31
68R 3Q05-2
560p
DV3F-DATA2_0 6 3
39R
12p
AK24 DV3_DATA0 QVCP5L_DATA_OUT26 N28 DV-ROUT-6
DV3F-DATA3_1 AJ24 N27 7 2 68R 3Q05-1 DV-ROUT-7 3Q05-3 C9
DV3_DATA1 QVCP5L_DATA_OUT27
DV3F-DATA4_2 AK25 M30 8 1 68R 3Q25-4 DV-ROUT-8
DV3F-DATA5_3 DV3_DATA2 QVCP5L_DATA_OUT28
68R 3Q25-3 5 4
3Q05-4 C9
AG23 M29 DV-ROUT-9
C DV3F-DATA6_4
DV3F-DATA7_5
AH24
DV3_DATA3
DV3_DATA4
QVCP5L_DATA_OUT29
QVCP5L_CLK_OUT E30 6 3 68R
2
3H02
1 68R 3Q54
DV-CLKIN C 3Q06 C11
AJ25 DV3_DATA5 QVCP5L_VSYNC F28 DV-OUT-VS 3Q07-1 B8
DV3F-DATA8_6 AK26 F27 68R 3Q56 2 1 DV-OUT-DE_HS
DV3_DATA6 QVCP5L_HSYNC 3Q07-2 B9
DV3F-DATA9_7 AG24 G26 2
DV-OUT-HS 1 68R 3Q58 DV-OUT-FFIELD
4K7 DV3_DATA7 QVCP5L_AUX1 5Q06
DV3F-VALID DV3F-VALID AJ26 E29 2 1 68R 3Q60 3Q07-3 B9
DV3_VALID QVCP5L_AUX2
DV3F-CLK AG25 DV-OUT-DE 2 1 3Q07-4 B8
3H18 DV3_CLK 2u2
DV3F-DATA1_ERR AF24 AH30 IH08 3H19 1K0 IH12 IH13 IH14
DV3F-DATA0_SOP DV3_ERR DAC_IRSET IH07 3H21 39R
120R 2H11 3Q08-1 B9
AH25 DV3_SOP DAC_RDUMPY AF27 C-MON-OUT
AH29 IH06 3H20 39R 3Q01
3Q08-2 B9
DAC_RDUMPC 100p
I2S-MAIN-ND IH10 AG26 AG28 3Q08-3 B8
DV_FREF DAC_CVBS RES
I2S-SUB-ND IH11 AK28 AJ30
DV_VREF DAC_CHROMA 3Q08-4 B9
3H92
2H13
2H12
RES
IH15
75R
12p
27p
AJ27 DV_HREF
AJ22 TS-DATA0 3Q09 E8
TS_DATA0
AA30 AG21 TS-DATA1 3Q25-1 B8
D I2S-WS-AVIP 9H18
9H19
IH01 AA29
AA28
I2S_IN1_SD
I2S_IN1_WS
TS_DATA1
TS_DATA2 AK22
AH21
TS-DATA2 D 3Q25-2 B9
I2S-BCLK-AVIP I2S_IN1_SCK TS_DATA3 TS-DATA3
IH03 AB30 I2S_IN1_OSCLK TS_DATA4 AJ21 TS-DATA4 3Q25-3 C8
TS_DATA5 AK21 TS-DATA5 3Q25-4 C9
W28 I2S_IN2_SD TS_DATA6 AG20 TS-DATA6
9H32 W27 AJ20 TS-DATA7
3Q26-3 A9
I2S_IN2_WS TS_DATA7
9H33 Y29 I2S_IN2_SCK TS_VALID AK23 TS-VALID 3Q26-4 A8
IH00 Y27 AH22 TS-SOP 3Q28-1 A9
I2S_IN2_OSCLK TS_SOP 3Q09
AG22 TS-CLK
TS_CLK 3Q28-2 A8
SPDIF-HDMI AA27 33R
SPDIF_IN2
SPDIF-IN1 AC30 SPDIF_IN1 I2S_OUT1_SD0 U27 I2S-SUB-D 3Q28-3 A9
V30 3H07 22R BACKLIGHT-CONTROL_RESET-P3
I2S_OUT1_SD1 3Q28-4 A9
I2S_OUT1_SD2 V29 CTRL1-VIPER
V28 3Q33 H5
E I2S_OUT1_SD3
I2S_OUT1_WS V27
W30
E 3Q34-1 A9
CTRL2-VIPER
I2S_OUT1_SCK 3Q34-2 A9
I2S_OUT1_OSCLK W29 IH04 3Q34-3 A8
I2S_OUT2_SD0 T28 I2S-MCH-LR 3Q34-4 A9
I2S_OUT2_SD1 T27 I2S-MCH-CSW
3Q35 H5
I2S_OUT2_SD2 R30 I2S-MCH-SLR
I2S_OUT2_SD3 R29 I2S-MAIN-D 3Q37 H6
I2S_OUT2_WS T29 I2S-WS-MAIN 3Q39 H5
I2S_OUT2_SCK T30 I2S-BCLK-MAIN
U29
3Q41 H5
I2S_OUT2_OSCLK IH05
IQ12 IQ13 3Q43 H6
2Q68 3Q64
SPDIF_OUT AB29 SPDIF-OUT1 3Q44-1 B9
F 100n 68R
F 3Q44-2 B8
3Q62
120R
3Q44-3 B9
3Q44-4 B9
3Q45 H5
3Q47 H5
68R 3H49 I2S-WS-SUB 3Q49 H6
68R 3H48 I2S-BCLK-SUB
3Q51 H5
3Q53 H5
9H26
9H27
3Q54 C9
3Q55 H6
9H34 3Q56 C8
G 9H29 G 3Q57 H5
3Q58 C9
7V00-4
VIPER REV C 3Q59 I5
3Q60 C9
3Q61 I6
TUNNELBUS 3Q62 F9
TUN-VIPER-TX-DATA0 3Q33 47R N2 G2 TUN-VIPER-RX-DATA0
N1 TUN_TX_DATA0 TUN_RX_DATA0 G1 TUN-VIPER-RX-DATA1 3Q63 I5
IH24 TUN-VIPER-TX-DATA1 3Q35 47R
5H05 TUN_TX_DATA1 TUN_RX_DATA1 J4
+2V5-VPR TUN-VIPER-TX-DATA2 3Q37 47R P4 TUN-VIPER-RX-DATA2 3Q64 F9
P2 TUN_TX_DATA2 TUN_RX_DATA2 J3 TUN-VIPER-RX-DATA3
TUN-VIPER-TX-DATA3 3Q39 47R 3Q65 I9
R1 TUN_TX_DATA3 TUN_RX_DATA3 H1 TUN-VIPER-RX-DATA4
TUN-VIPER-TX-DATA4 3Q41 47R
TUN_TX_DATA4 TUN_RX_DATA4 K4 3Q66 I5
2H03
3H50
2H00
R2 TUN-VIPER-RX-DATA5
100n
100n
H FQ15
TUN-VIPER-TX-DATA6
TUN-VIPER-TX-DATA7
3Q45 47R
3Q47 47R
R3
R4
TUN_TX_DATA5
TUN_TX_DATA6
TUN_RX_DATA5
TUN_RX_DATA6
J2
J1
TUN-VIPER-RX-DATA6
TUN-VIPER-RX-DATA7
H 3Q67 I6
T3 TUN_TX_DATA7 TUN_RX_DATA7 K1 TUN-VIPER-RX-DATA8
3Q68 I8
TUN-VIPER-TX-DATA8 3Q49 47R
1V3 VREF-VPR T4 TUN_TX_DATA8 TUN_RX_DATA8 L4 TUN-VIPER-RX-DATA9 5H05 H2
TUN-VIPER-TX-DATA9 3Q51 47R
U2 TUN_TX_DATA9 TUN_RX_DATA9 L2 TUN-VIPER-RX-DATA10
TUN-VIPER-TX-DATA10 3Q53 47R
TUN_TX_DATA10 TUN_RX_DATA10
5Q05 B12
M4
3H51
2H02
U4 TUN-VIPER-RX-DATA11
100n
100n
FQ15 H3
IH00 E4
IH01 D4
G_15930_040.eps
3104 313 6145.2 120606
IH03 D4
IH04 E8
1 2 3 4 5 6 7 8 9 10 11 12 13
F
E
D
C
B
A
2Q04 C11
2Q02 C11
2Q00 C10
1
1
7V00-3
V18 VSSC_36
VIPER REV C
V17
B5D
VSSC_35
2Q07 C12
2Q06 C12
2Q05 C12
+1V2
V15 M13
VSSC_33 VDDC_2
V14 VSSC_32 VDDC_3 M14
V13 M15
VSSC_31 VDDC_4
U18 VSSC_30 VDDC_5 M16
U15 M19
VSSC_27 VDDC_8
U14 VSSC_26 VDDC_9 N12
U13 VSSC_25 VDDC_10 N19
T18 VSSC_24 VDDC_11 P12
T17 P19
2
2
VSSC_23 VDDC_12
T16 VSSC_22 VDDC_13 R12
SSB: Viper: Supply
P18 W14
VSSC_12 VDDC_23
P17 VSSC_11 VDDC_24 W15
P16 W16
VSSC_10 VDDC_25
P15 W17
3
3
VSSC_9 VDDC_26
P14 W18
VSSC_8 VDDC_27
P13 VSSC_7 VDDC_28 W19
N18
VIPER: SUPPLY
VSSC_6
N17 VSSC_5
2Q19 C15
2Q18 C15
2Q17 C15
N16
VSSC_4 J26
N15 VSSC_3 VDD_1 L26
+3V3
4
4
AF3
2Q33 E13
2Q32 E13
2Q30 E12
5
5
2Q40 D10
U3
6
6
P1 C3
VSS_30 VDD2_43 C26
M5
2Q44 D11
2Q43 D11
2Q42 D11
+2V5-VPR
7
7
H2 VSS_21 VDD_2V5_6
E22 E21
VSS_20 VDD_2V5_7 J5
E20 VSS_19 VDD_2V5_8
E18 L5
VSS_18 VDD_2V5_9 N5
E16 VSS_17 VDD_2V5_10
E14 R5
VSS_16 VDD_2V5_11 U5
E12
74
VSS_15 VDD_2V5_12 W5
E10
2Q50 D13
2Q49 D13
2Q48 D12
VSS_14 VDD_2V5_13 H3
E8 VSS_13 VDD_2V5_14
E3 L1
VSS_12 VDD_2V5_15 P3
D30 VSS_11 VDD_2V5_16
C28 U1
VSS_10 VDD_2V5_17 A11
C23 VSS_9 VDD_2V5_18
C17 A17
8
8
C5
VSS_6 VDD_2V5_21 C14
B8 VSS_5 VDD_2V5_22 2Q63
A27 C20
VSS_4 VDD_2V5_23
A20 VSS_3
IQ09
100n
A14 VSS_2 VDDA_3V3 F5
+3V3
A1 VSS_1 VDDA_1V2 E6
5Q01
VDDA_1_7_MCAB B3
B2 VSSA_1_7_MCAB AE26
IQ10
2Q56 D14
2Q55 D14
2Q54 D14
VDD_DAC 2Q64
AF25 VSS_DAC
+1V2
100n 5Q02
9
9
2Q65
IQ07
+1V2
100n 5Q03
2Q59 D15
2Q58 D15
2Q57 D15
2Q66
IQ08
+3V3
100n 5Q04
2Q62 F11
2Q61 F11
2Q60 F10
+2V5
10
10
2Q60
47u 4V 47u 4V 47u 4V
100n
RES
5Q08
5Q07
2Q43
2Q61
11
11
1u0 16V
1n0
2Q62 2Q24 2Q44 2Q04
5Q03 B9
5Q07 E11
5Q04 B10
IQ11
+1V2
+3V3
100n 100n
7V00-3 C1
100n
+2V5-VPR
2Q47 2Q07
12
12
2Q28
100n 100n
100n
2Q48 2Q08
IQ10 B9
IQ09 C8
IQ08 C9
2Q30
100n 100n
100n
2Q49 2Q09
2Q32
100n 100n
100n 2Q50 2Q10
IQ11 E11
2Q57 2Q17
100n 100n
2Q58 2Q18
100n 100n
15
15
2Q59 2Q19
100n 100n
B5D
120606
G_15930_041.eps
F
E
D
C
B
A
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 75
1 2 3 4 5 6 7 8 9 10
RESERVED
10K 7Q06-1
3Q85
2K2
I2C AMBILIGHT *
+3V3
A 1D40
2Q87 3Q89 IQ44
ENABLE-5V
1 6
+5V
A
5Q10 FQ08 100p 47R IQ62
+12VSW AMBI-SEL-1 9Q64
1
FQ09 RES RES
2 3Q90 RES 6H04
FQ11 3 +3V3-STANDBY IQ56 2Q92
2Q84
100n
2Q95
4 100R 3Q91 +5V2-STBY
5Q09
FQ12 BACKLIGHT-CNTRL-OUT
5 470p 470p
FQ13 100R BAV99 COL
6 3Q84 5 BC847BS 3Q31
FQ14 IQ49 IQ40
7 3Q42 7Q06-2
FQ16 MP-OUT-VS 10K 10K
8 +5V +5V +5V
3Q86
FQ17
2K2
9 100R 7Q05-1
3Q97
1D42
4K7
10 IQ47 BC847BS
FQ40 3Q96 4 3
1 11 SUPPLY-FAULT
FQ24 47R IQ55 RES
2 12 3Q36
2Q85
3Q30
3Q95
3Q99
RES
100R
100R
100n
9Q67
4K7
3 DISABLE-12V AMBI-SEL-2 RES
B 4
B12P-PH-K
3Q93 100R
SCL-I2C4 SCL-AMBI
IQ41 9Q62
RES 1M59
B
5 FQ25
100R 100R 3Q72
2Q36 3Q92 1
2Q89
100p
100p
B5B-PH-K SDA-I2C4 +3V3 IQ42 2
2H20 100R 100R 3Q73 FQ26
3
+5V FQ07+5V 2Q91 4
1u0 +5V +5V FQ55 5
RES 470p
2H21 3Q32 B5B-PH-K
5Q11 IQ43 FQ18
+5VDISP 10K
9Q20
9Q19
2Q72
2Q71
100p
100p
5Q12 1u0 7Q05-2
3Q98
3Q29
4K7
4K7
RES RES BC847BS
RES TO 1M49
5Q13
BAV99 COL
BAV99 COL
6H08
6H09
C IQ45
C
6H05
SDA-AMBI 9Q63
RES
BAV99 COL
RES
IQ46
AMBI LIGHT
2Q86
2Q83
2Q88
10n
10n
10n
TO 1M63
MEMORY 1 +5V-CON
CARD 2
2Q41
100n
READER B2B-PH-K
D 2Q73 D
FQ46 FQ27 3Q74
100p BACKLIGHT-CNTRL-OUT
2Q74 100R
FQ47 FQ28 3Q75
1n0 POWER-OK-PLATFORM
2Q75 100R
FQ48 FQ29 3Q76
1n0 LIGHT-ON-OUT
100R
2Q93
FQ49 FQ30
100p
+5V-CON
1M03
1 3Q02
2 CTRL1-VIPER
2Q79 RES 100R
TO 1M03 3 FQ56 FQ61
1n0 3Q79
4 STANDBY
E 5
6
FQ57 FQ62
2Q80
1n0 100R 3Q80
PROT-AUDIOSUPPLY
E
2Q82 100R IQ54
FQ63
AUDIO STANDBY 78 100p
RES
+5V2-STBY_9V-STBY
3Q46
BACKLIGHT-CONTROL
FQ58 2Q81 RES 100R
9 FQ31 100n 3Q81
FQ59 POWER-OK-DISPLAY
10
100R 2Q76
B10P-PH-K-S
G_15930_042.eps
3104 313 6145.2 1u0
120606
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Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 76
1 2 3 4 5 6 7 8 9 10
3G21
4K7
MP-CLK 3G08 MP-CLKOUT IG01
MP-HS 3G09 68R MP-OUT-HS 7G33
MP-VS 3G10 68R MP-OUT-VS IG15 3G20
MP-DE 3G11 68R MP-OUT-DE +3V3
DV-OUT-FFIELD 3G12 68R MP-OUT-FFIELD 10K
68R BC847BW
MP-R0 3G13 MP-ROUT-0 9G35
B MP-R1 3G14 68R
68R
MP-ROUT-1 B
MP-R2 3G55-1 1 8 MP-ROUT-2
MP-R3 3G55-2 2 7 68R MP-ROUT-3
MP-R4 3G55-3 3 6 68R MP-ROUT-4 IG02
MP-R5 3G55-4 4 5 68R MP-ROUT-5 +8V6-SW +8V6-SW +8V6-SW LAMP-ON
68R
MP-R6 3G56-1 1 8 MP-ROUT-6 LIGHT-ON-OUT
MP-R7 3G56-2 2 7 68R MP-ROUT-7
3G51
3G56-3 3 6 68R
47K
MP-R8 MP-ROUT-8 7G31-1
*
3G23
3G56-4 4 5 68R 6
12K
MP-R9 MP-ROUT-9 BC847BPN
68R 7G31-2
MP-G0 3G15 MP-GOUT-0 2
IG03
BC847BPN* 2G60
MP-G1 3G16 68R MP-GOUT-1 4
IG04
C MP-G2 3G57-4 4
68R
5 MP-GOUT-2
1
5
IG05 3G25
470p C
10K IG06 3G26
MP-G3 3G57-3 3 6 68R MP-GOUT-3 7G34 BACKLIGHT-CONTROL
MP-G4 3G57-2 2 7 68R MP-GOUT-4 3 BC847BW IG07
4K7
3G27
3G57-1 1 8 68R
2K2
MP-G5 MP-GOUT-5
68R
MP-G6 3G58-4 4 5 MP-GOUT-6
MP-G7 3G58-3 3 6 68R MP-GOUT-7
3G58-2 2 7 68R +8V6-SW
+3V3
MP-G8 MP-GOUT-8
IG08 3G32
MP-G9 3G58-1 1 8 68R MP-GOUT-9 9G30
68R 1K0
*
MP-B0 3G17 MP-BOUT-0
3G34
3G35
2G37
2G36
3G02
68R
1K0
33K
22K
10K
3G18
1u0
1u0
MP-B1 MP-BOUT-1
3G03
3G05
68R
10K
D MP-B2
MP-B3
3G59-4
3G59-3
4
3
5
6 68R
MP-BOUT-2
MP-BOUT-3 IG11 6 IG10 3
D
MP-B4 3G59-2 2 7 68R MP-BOUT-4 BACKLIGHT-CNTRL-OUT IG09 10K
MP-B5 3G59-1 1 8 68R MP-BOUT-5 7G36-1 2 7G36-2 5
68R BC847BS BC847BS
3G01
MP-B6 3G60-4 4 5 MP-BOUT-6 7G35 1 4
MP-B7 3G60-3 3 6 68R MP-BOUT-7 PDTC114EU
MP-B8 3G60-2 2 7 68R MP-BOUT-8
MP-B9 3G60-1 1 8 68R MP-BOUT-9 CTRL1-VIPER
68R
E E
G_15930_043.eps
3104 313 6145.2 120606
1 2 3 4 5 6 7 8 9 10
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 77
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
B6B
2G59
100n
9G13 +5V
7G01
A LD2985BM25R
IG33
6G01
7G03 A
11
+3V3-P3 1 5 P87LPC760BDH
+3V3 5G01 FG00 +3V3 IN OUT +2V5-PF BAS316
VDD
IG35 3G70 FG26
120R
3
INH BP 4 PWM-3 Φ
2G44
2G46
2G49
1u0
1u0
1n0
10K FG27 MICROCONTROLLER 3G89
2G56
2G00
2G01
2G02
2G03
2G04
2G05
2G06
2G07
2G08
2G09
2G10
2G11
2G12
2G53
COM 9 14
1u0
10n
10n
10n
10n
10n
10n
10n
10n
10n
10n
10n
10n
10n
10n
TXD CIN1B SDA-AMBI
8 13 FG16 100R 3G90 SCL-AMBI
RXD CIN1A
2G45
100n
7 12
2
SCL CMPREF FG17 100R
T0 10 FG40
3G71 CMP1
PWM-OR 6
INT0
P0<3:6> 1G02
1K0 +3V3 +3V3 SDA
5 9G11
CLKOUT
P1<0:3>
FG18 X2 10M
B 7G07
LD1117DT +2V5-PF 5G03 FG03 +2V5-PLL
2
RST
P1.5
X1
4
B
2G54
2G55
1 P2<0:1>
10p
10p
P1.7
3G64
3G65
4K7
4K7
IG31 5G04 FG01 +1V5-P3 600R IG39
IN OUT VSS
+3V3 IN OUT
2G50
2G51
2G52
3
1u0
10n
10n
30R
2G40
100n
COM AMBI-SEL-1
47u 4V
2G41
2G42
2G13
2G14
2G15
2G16
2G17
2G18
2G19
2G20
2G21
2G22
2G23
2G24
2G25
100n
3G91
1K0
1u0
10n
10n
10n
10n
10n
10n
10n
10n
10n
10n
10n
10n
GND AMBI-SEL-2
IG32
3G66
3G67
RES 4K7
RES 4K7
100R
3G92
+3V3-P3 +3V3-P3
+3V3
2G43
+2V5-PF
1u0
C 5G05 FG10
+1V5-PLL 600R
C
600R
2G47
2G48
2G58
3G72
100R
100K
3G93
1u0
10n
10n
2G26
2G27
2G28
1u0
10n
10n
3G61
3G62
3G63
4K7
4K7
4K7
3G73 IG25 100R
1G01
2G57
1
1u0
47R
3G74
9G51
60M
1M0
2
7G04-2
T6TF4HFG-0002
3
7G02
8
7G04-3 M25P05-AVMN6 165 109
OSC_Z CLKO MP-CLK 3G84
D
T6TF4HFG-0002 VCC FG25
MISC 115 MP-VS MP-G1 * D
2 Φ 5 FG21 164
VSO
116
GND_HS
104
SCK
11
30
42
63
70
79
91
18
50
64
73
88
54 239 T6TF4HFG-0002 3 192 117 MP-G0
+2V5-PLL PLL2_VCCA_2V5 W 3G95 SO 0 4K7
212 238 194 120 MP-G1
PLL1_VCCA_2V5 +3V3
VDD_RX_1V5
VDD_TX_1V5
VDD_RX_3V3
VDD_TX_3V3
CS 1 3G86
237 DV-CLKIN 7 61 7 121 MP-G2 MP-G7
CLKI 3 HOLD 10K 2
58 236 DV-OUT-DE_HS 8 62 DV-OUT-VS 4 122 MP-G3
SSCG_VCC_1V5 HSI 4 VSI 3 4K7
235 66 VSS JTAG-TCK 3G83 FG19 123 MP-G4
5 4 3G87
56 234 DV-BOUT-9 9 PWM 67 JTAG-TD-POD-P3 173 PD 126 MP-G5 MP-G8
+1V5-PLL PLL2_VCCD_1V5 N 6 1K0 T1 5
214 233 DV-BOUT-8 10 ORX0 68 207 127 MP-G6
4
PLL1_VCCD_1V5 P 7 TCK 6 4K7
E 210
232
231 DV-BOUT-7 13
N LVDS
8
69
FG20 JTAG-TD-P3-CON
9G50
* 3
205
TDI
TDO
7
8
128
129
MP-G7
MP-G8 E
201 230 DV-BOUT-6 14 ORX1 74 JTAG-TMS 1 132 MP-G9
196 P P TMS 9
229 OTX0 75 JTAG-TRST 9G10 2
N FG37 FG36 TRST
VIA
*
*
174 P P 1
226 OTX1 78 177 135 MP-B2
N IG28 MINTN 2
3G76
3G75
100R
100R
167 225 DV-BOUT-2 20 137 MP-B3
N PE 3
VDD_3V3
6G02
130 220 83 187 A<19:0>
124 P 04
219
BAV70W
B<9:0> OTX3 84 188 143 MP-B7
118 N 05 RXD
F +3V3-P3
113
218
217
DV-GOUT-9
DV-GOUT-8
25
26
N
P
ORX4
P
86
SCL
SDA
RDN
TXD
145
146
MP-B8
MP-B9 F
110 OTX4 87 100R
199 N 3G77 IG29
DV-GOUT-7 28 PWM-3 SDA-DMA-BUS1 198 PE<7:9>
166 216 N MSDA
DV-GOUT-6 29 ERX0 89 SCL-DMA-BUS1 200 148
6 211 P P IG30 MSCL 7
VDD_2V5 OTX5 90 3G78 149
+2V5-P3 N 100R 6
208 DV-GOUT-5 31 PWM-OR 202 151
209 203 N FG14 SSDA 5
DV-GOUT-4 32 ERX1 92 204 153
197 195 P P SSCL 4
ETX0 93 FG15 D 154
N 3
6G03
190 189 DV-GOUT-3 34 MP-DE 114 155
182 186 N DEO 2
BAV70W
DV-GOUT-2 35 ERX2 PB<0:9> 159
176 181 P 1
95 MP-R0 160
156 175 P 0
DV-GOUT-0 38 ETX1 96 MP-R1 161
GND
DV-ROUT-9 N
105 142 DV-ROUT-8 41 ERX3 100 MP-R4
94 131 P P
ETX3 101 MP-R5
85 125 N
DV-ROUT-7 44
72 N IG38
6G04
112 DV-ROUT-6 45 ERX4 102 MP-R6
65 108 P P
BAV70W
ETX4 103 MP-R7
43 5 N
DV-ROUT-5 46
39 DV-ROUT-4 47 106 MP-R8
33 59 P
DV-ROUT-3 48 ETX5 107 MP-R9
24 SSCG_GND N
3G94
49
4K7
DV-ROUT-2
21 55 DV-ROUT-1 52 PC<0:9>
12 PLL2_GNDA 213 DV-ROUT-0 53
PLL1_GNDA
H +1V5-P3
PLL2_GNDD
57
215
R<9:0>
GND
H
PLL1_GNDD
17
27
36
51
60
71
76
82
97
G_15930_044.eps
3104 313 6145.2 120606
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 78
SSB: HDMI
1 2 3 4 5 6 7 8 9 10 11 12 13 14
1B00 B3
1B01 A1
100n
2B02
220R
3B00
5B02
IB12 1B21 I11
4K7
3B01
3B13
4K7
4K7
1B30 D4
3B12
4K7
1B31 E4
A 1B01
ARX2+ ARX-DDC-SCL
IB63 PARX-DDC-SDA
PARX-DDC-SCL BRX-DDC-SCL
IB60
PBRX-DDC-SCL
A 1B32 G4
1
1B33 H4
2 IB64 IB14
ARX2- ARX-DDC-SDA +3V3 BRX-DDC-SDA PBRX-DDC-SDA 1B34 D10
3
4 ARX1+ 5B00 5B01 IB13 1B35 E10
5 AIN-5V BIN-5V 1B36 G10
ARX1- BSH112 BSH112
6 30R 30R 7B05 1B37 H10
0001-0015
0001-0015
0001-0015
ARX0+ 7B00 7B01 7B04
7 BSH112 2B00 B4
1B00
1B03
1B04
2B00
2B01
1B05
1B06
1B07
2B04
2B05
BSH112
100n
100n
100n
100n
8 IB66
9 ARX0-
3B02 3B14 IB10
2B01 B4
10 ARXC+ 2B02 A9
IB65 IB11
11 100R 3B03 100R 3B15 2B04 B10
12 ARXC-
FB09 9B00 P50-HDMI 2B05 B11
13 100R 100R
B 14
FB10
RES
ARX-DDC-SCL 7B02 7B03
B 2BA0 I5
2BA1 I4
15
3B04
3B16
FB11 M24C02-WDW6 M24C02-WDW6
10K
10K
ARX-DDC-SDA
8
16 2BA2 I12
Φ Φ
3B05
3B06
3B17
3B18
47K
47K
47K
47K
17
FB12
2BA3 I10
18 AIN-5V (256x8) FB35 (256x8) FB34 3B00 A6
19
FB13 ARX-HOTPLUG DDC NVM WC
7 DDC NVM WC
7
3B01 A6
21 20 EEPROM 3B07 EEPROM 3B19
23 22 FB14 HDMI 1 1
2
0 SCL
6
HDMI 2 1
2
0 SCL
6 3B02 B5
1 ADR 100R 3B08 1 ADR 100R 3B20 3B03 B7
1-1734011-2 3 5 3 5
2 SDA 2 SDA 3B04 B5
100R 100R 3B05 B5
4
3B06 B6
HDMI CONNECTOR 1 3B07 B5
C C 3B08 C5
3B09 C5
V
3B09
3B10 D5
3B11 E5
3BA2 3B12 A12
3B13 A13
ARXC- PARXC- 1B02 V
1 1B30 4
3B14 B12
1 BRX2+
4 1B34 1 3B15 B14
2 BRXC+ PBRXC+
2 3 BRX2- 3B16 B12
3
ARXC+ ACM PARXC+ BRX1+ BRXC- 3 2 PBRXC- 3B17 B12
4
5 ACM 3B18 B12
BRX1-
6 3B19 B11
D 7 BRX0+ D 3B20 C12
3B10
8
3B21 F5
V
9 BRX0-
BRXC+ 3B22 F5
V
10
11 3B23 I3
BRXC-
12
FB28
3B24 I10
13 P50-HDMI
9B03 RES 3B90 I4
14
FB29 BRX-DDC-SCL 3B91 I4
15
V
16
17 3B93 I10
FB31 BIN-5V
18 3BA0 G5
FB32 BRX-HOTPLUG 3BA3
19 3BA1 H5
21 20
E ARX0-
1 1B31 4
PARX0- 23 22 FB36 V E 3BA2 C11
3BA3 E11
ACM
1-1734011-2 BRX0- PBRX0- 3BA4 F11
2 3 3 2
3BA5 F11
ARX0+ ACM PARX0+ BRX0+ PBRX0+
4 1 3BA6 H11
1B35
HDMI CONNECTOR 2 3BA7 H11
3BA8 H11
V
3BA9 E11
3B21
3BA5
3BB0 H5
V
5B00 A4
5B01 A11
5B02 A8
F F 6B20 I4
6B21 I3
V
3B22
6B22 I10
6B23 I10
3BA4 7B00 A6
7B01 A7
ARX1+ PARX1+ V
ACM 3 7B02 B4
2 ACM 7B03 B10
BRX1- PBRX1-
3 2 7B04 A12
ARX1- 1 4 PARX1- BRX1+ PBRX1+ 7B05 A13
1B32
4 1B36 1 7B30 I5
7B31 I11
G G 9B00 B2
3BA0
9B03 E8
V
9B10 A5
V
9B30 I6
9B31 I12
FB09 B1
3BA6 FB10 B1
V
FB11 B1
FB12 B1
3BA1
FB13 B1
3BA7 FB14 C1
H ARX2+
ACM
PARX2+ V H FB28 D8
FB29 E8
2 3 ACM
BRX2- PBRX2- FB30 E8
3 2
1 4
FB31 E8
ARX2- 1B33 PARX2- BRX2+ PBRX2+
4 1 FB32 E8
1B37
3BA8
FB34 B11
FB35 B5
3BB0
V FB36 E8
V
IB10 B1 4
3B92 IB61
BRX-HOTPLUG IB11 B1 2
IB62 22R IB50 IB12 A1 3
3B90 9B31
ARX-HOTPLUG 7B31 VSYNC-HIRATE IB13 A1 1
I 22R
7B30
IB51
9B30 VSYNC-HIRATE
BC847BW
I IB14 A1 3
IB50 I12
2BA2
BC847BW
10n
IB51 I5
BAS316
BAS316
2BA0
2BA3
3B24
IB60 A1 3
6B23
6B22
3B93
100K
1B21
1K0
10n
4n7
IB61 I11
BAS316
BAS316
2BA1
3B23
6B21
6B20
3B91
100K
1B20
1K0
4n7
IB62 I5
BIN-5V IB63 A6
IB64 A7
AIN-5V IB65 B6
G_15930_045.eps IB66 B7
3104 313 6145.2 120606
1 2 3 4 5 6 7 8 9 10 11 12 13 14
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 79
3B65
15p
E2
T16 VPA1 F1 3B56-1 33R DV4-DATA0_SOP
1 VPA2 2BA5 C1 IB00 F3
9B18
9B16
9B17
R16 F2 DV4-DATA1_ERR
HCSYNC VPA3 7B11-2
P16
3
G1 3B56-3 33R 33R 3B56-2 DV4-DATA2_0 2BA6 D1 IB01 F3
VPA4
3B45
DV4-DATA3_1 TDA9975
10K
5B31 IB68 G2 JTAG-TD-DVB-HDMI
3B95 2B26 N16 VPA5 H1 3B59-1 33R 3B56-4 DV4-DATA4_2 IB43 2BA7 D1 IB02 F3
AV1-AV5-AV6_R-PR 1 VPA6 IB42
9B15
M16 H2 33R DV4-DATA5_3 2BA8 E1 IB05 A4
470R 2u2 10n VSYNC VPA7 CTRL
3B66
15p
9B19
R12 K2 33R DV4-DATA9_7 A11 K14 JTAG-TMS
2B43 T11
SOG VPA11 33R 3B57-2
TM3 TMS
J14
3B26 E6 IB21 D3
3 TCK JTAG-TCK
3B27 E6 IB22 D3
C 3B96 5B23 IB69 2B30
10n
T14 1
VPB0
VPB1
L1
L2
H12
H13
AUX0
AUX1 OR G/Y
D3 C 3B28 E6 IB23 D4
AV2-AV4_G-Y R14 M1 3B57-3 DV5-DATA0_SOP G12 C3
R/Pr VPB2 3B57-4 DV5-DATA1_ERR AUX2 OR B/U
470R 2u2 10n
2B44 T13
3 VPB3
M2 33R G15
AUX3 OR R/V
B3 3B29 E6 IB24 D12
2BA9
3B67
N1 F15
6p8
15p
10n
T9
VPB4
N2 33R 3B62-2 DV5-DATA3_1 E14
AUX4
R4
3B30 G3 IB41 E8
1 AUX5 X0
2B34
VPB5 DV5-DATA4_2
R9 G/Y VPB6
P1 3B62-3 33R E15
AUX6 X1
P4 3B32 G3 IB42 C9
2B45 T8 P2 33R 3B62-4 DV5-DATA5_3 E16 N4
3 VPB7
R1 33R DV5-DATA6_4 AUX7 X2 3B34 F3 IB43 B10
10n 3B58-1
VPB8 DV5-DATA7_5
3B97 5B22 IB70 2B29
T7 1 VPB9
R2 33R L12
CCLK CTL0
C6 3B36 A3 IB46 D12
AV1-AV5-AV6_G-Y R7 T1 3B58-3 3B58-2 33R DV5-DATA8_6 C5
2B46 T6
B/Pb VPB10
T2 33R DV5-DATA9_7 M13
CTL1
C4
3B37 F3 IB67 B2
470R 2u2 10n 3 VPB11 CKEXT CTL2 IB46
2BA6
3B68
B4
6p8
15p
3B69
1K0
A13 M3 B7
6p8
15p
PARX1- RX1-A WS
VPC7
9B12
PARX0+ A15 N3 M135-CLK M15 3B56-2 B7
2B36
3B70
E DV-HREF L16
E
1K0
15p
PBRX2+ 100R
RX2+B HREF 3B57-3 C6
2B37
J16 B1
10n
PBRX-DDC-SDA IRQ-HIRATE
HSDA B /VAI
A3
3B59-1 B6
3B371K0 IB06 D15 DE 10K
RRXB PL
A4 3V3-DIG 3B59-2 C7
IB02 3B38 IB20 D16 RRXA 3B43 3B59-3 C6
3B59-4 C7
F 1K0 F
2B22
2B25
10n
10n
3B60 E10
3B34
39R
3B61 E10
IB01 3B62-1 C6
IB00
3B62-2 C7
3B62-3 C6
3B30
3B32
39R
39R
3B62-4 C7
3B65 B2
3B66 C2
3B67 C2
G G 3B68 D2
3B69 D2
3B70 E2
3B94 B1
3B95 B1
3B96 C1
3B97 D1
G_15930_046.eps 3B98 D1
3104 313 6145.2 120606 3B99 E1
1 2 3 4 5 6 7 8 9 10 11 12 13
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 80
2B52
2B40
2B41
2B42
100n
100n
100n
100n
N11 VDDR N8
P6 2B67 B1
M10 P7
N10 VDDG P8
2B69 C2
P9 2B77 F4
M9 GNDAVI R10
3V3-AVI
N9 R11
2B79 C5
5B10 FB50 VDDB
+3V3-AV 3V3-AVI M12 2B80 C5
220R P10 P12
B VDDBIAS
P13 B 2B81 C5
47u 4V
2B67
2B79
100n
B8 3B51 E2
2B69
2B49
2B51
2B53
100n
100n
100n
100n
C8
D8 B9
3B52 D1
VDDRX2A
D9
VDDRX2B
B10 3B53 D2
C D10 B11 C
D11
VDDRX1A
GNDHDMI B12
3B54 D2
3V3-DIG VDDRX1B
D12
VDDRX0A
B13 3B55 D2
+1V8
D13 VDDRX0B B14
5B12 FB52
D14 B15
5B10 B1
+3V3 3V3-DIG 3V3-DIG VDDRXC
2B80
2B81
100n
100n
220R B16 5B11 C1
5B12 C1
2B62
2B64
100n
100n
G13 1 E7
+1V8
E6
2
VDD18CORE E8 5B17 A1
E9
GNDCORE
E10
5B18 E3
IB45
+3V3 T4 E11 7B11-3 A8
OTP7V
F13
7B12 E1
D VDDIN D
GNDI2C
F12 7B13 E2
7B38 F5
3B52
3B53
3B54
3B55
33R
33R
33R
1K0
D4
VDDQ0 C7
E4
VDDQ1
9B38 E5
F4 D6
G4
VDDQ3 D7 FB48 E6
3V3-DIG VDDQ4
H4 E5 FB50 B2
IB47 VDDQ5
J4 F5
IB48 K4
VDDQ6 D5 FB51 C2
VDDQ7 GNDOUT G5
7B13 FB55 L4
VDDQ8
FB52 C2
BC817-25 M4 J5
+1V8 VDDQ9 FB55 E4
K5
L5 FB56 E4
IB44 H5
E THERMAL GROUNDS E FB57 A2
3B51
IB44 E2
TS431L
4R7
3
2B89
7B12
10n
NC
F6
G6
H6
J6
K6
L6
F7
G7
H7
J7
K7
L7
F8
G8
H8
J8
K8
L8
F9
G9
H9
J9
K9
L9
F10
G10
H10
J10
K10
L10
F11
G11
H11
J11
K11
L11
IB49 3B50 5B18 FB56
4 1V3
REF
1V8-PLL IB48 E1
470R 220R
47u 4V
NC
2B90
IB49 E2
A
7B38
3B48
3B49
2B92
2B77
100n
100n
LD1117DT33
1K0
47K
5
3 2 +3V3-AV
+5V IN OUT
COM 330u 6.3V
2B38
2B39
1u0
F F
1
G_15930_047.eps
3104 313 6145.2 120606
1 2 3 4 5 6 7 8 9
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 81
+3V3
2N05 A6
A A 2N06 A7
2N07 A7
5N02
2N08 A7
2N03
2N04
2N05
2N06
2N07
2N08
2N09
2N10
2N11
100n
100n
100n
100n
100n
100n
100n
100n
100n
+5V2-STBY 2N09 A7
2N10 A8
2N11 A8
2N12 B8
2N13 B8
3N30
150R
3N31
150R
3N32
150R
+3V3 IN11 3N08 G6
B B 3N09 D5
2N13
1n0
2N02
5N01
100n
3N12 E5
IN13 3N13 E5
+3V3-STANDBY-B-TRANS 7N10 IN10 2N12 3N14 E5
BC847B
3N33 3N15 E5
+3V3-STANDBY 1n0
IN14 4R7 3N20 D2
3N25 D2
7N00
108
115
121
VAUXA_PLL 101
10
17
25
33
41
49
57
65
73
80
85
93
ISP1561BM 3N30 B4
VAUX_T1
VAUX_T2
VAUXA_T3
VAUXA_T4
+3V3 VCC VAUX 3N31 B4
3N32 B5
C Φ
C 3N33 B5
1
SEL48M PCI PME
4 3N90 E2
2 7
3
SCL HOST IRQ1
8 3N92 E2
SDA IRQ12
+3V3
9
ADP_SEL
CONTROLLER A20OUT
11 5N00 H7
12 15
3N25 13
KBIRQ1 SMI
16 5N01 B8
RESET-USB20 RESET-USB20 MUIRQ12 INTA IRQ-USB20
4K7 PCI-CLK-USB20 18
RST REQ
22 IN02 PCI-REQ 5N02 A8
19 72
3N20 IN01 20
CLK C0 7N00 C6
PCI-GNT PCI-GNT GNT BE0 PCI-CBE0
4K7 PCI-AD22 3N09 IN04 35
IDSEL C1
60 PCI-CBE1 7N10 B4
PCI-FRAME 100R 48 BE1
50
FRAME
47 FN01 G8
PCI-IRDY PCI-CBE2
D PCI-TRDY 51
52
IRDY
TRDY
C2
BE2
34
D FN10 F2
PCI-DEVSEL PCI-CBE3
54
DEVSEL C3 FN11 G2
PCI-STOP STOP BE3
55
CLKRUN 0
84 PCI-AD0 IN01 D6
PCI-PERR 56 82 PCI-AD1
59
PERR 1
81 IN02 D9
PCI-PAR PAR 2 PCI-AD2
3N90
107
RREF 3
79 PCI-AD3 IN03 E5
USB20-OC1 USB20-OC1 IN07 89 78 PCI-AD4
IN12 90
OC1 4
77 IN04 D5
4K7 USB20-PWE1 PWE 5 PCI-AD5
USB20-DM1 102
DM1 6
75 PCI-AD6 IN05 F6
USB20-DP1 103 74 PCI-AD7
91
DP1 7
71 IN06 G7
GL1 8 PCI-AD8
92
AMB1 9
70 PCI-AD9 IN07 E4
95 68 PCI-AD10
E 3N92
USB20-OC2 USB20-OC2 IN08 96
GRN1
OC2
10
11
67 PCI-AD11 E IN08 E4
4K7 97
PWE2 12
66 PCI-AD12 IN09 E5
IN09 109 64 PCI-AD13
IN03 110
DM2 13
63 IN10 B8
DP2 14 PCI-AD14
98
GL2 15
62 PCI-AD15 IN11 B8
99 AD 46 PCI-AD16
AMB2 16 IN12 E5
3N13
3N12
3N14
3N15
100 44 PCI-AD17
GRN2 17
105
OC3 18
43 PCI-AD18 IN13 B4
15K
15K
15K
15K
106 42 PCI-AD19
116
PWE3 19
40 IN14 C4
DM3 20 PCI-AD20
117 39 PCI-AD21
DP3 21
112 38 PCI-AD22
GL3 22
113 36 PCI-AD23
AMB3 23
114 32 PCI-AD24
F 119
120
GRN3
OC4
24
25
31
30
PCI-AD25 F
PWE4 26 PCI-AD26
122 28 PCI-AD27
DM4 27
IN05
123 27 PCI-AD28
DP4 28
1N62 125 26 PCI-AD29
GL4 29
TO 1M64 1 FN10
USB20-DM1
126
127
AMB4 30
24
23
PCI-AD30
PCI-AD31
2 GRN4 31
3N08
USB20-DP1 58 PCI-SERR
12K
3 SERR
FN11 87
4 XI 2N00
5 6 88
XO
SSB
94 AGND_REF
33p
AGND_T1
AGND_T2
AGND_T3
AGND_T4
B4B-PH-SM4-TBT(LF)
1N00
12M
G DGND
G
FN01
2N01
6
14
21
29
37
45
53
61
69
76
83
86
128
104
111
118
124
33p
IN06
5N00
H H
G_15930_059.eps
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Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 82
SSB: Ethernet
1O00 C8 2O02 H4 2O06 D12 2O12 G10 2O16 C8 2O20 G11 2O24 G11 2O28 G10 3O03 C7 3O07 D1 3O11 D8 3O21 A8 3O25 C9 5O00 G9 7O00-1 B3 FO01 A10 FO05 C10 FO12 H9 IO04 G10 IO08 A12 IO13 F7
1O10 A10 2O03 H3 2O07 D11 2O13 B9 2O17 H9 2O21 G11 2O25 G10 3O00 C8 3O04 E8 3O08 E1 3O12 D9 3O22 A9 3O26 C9 5O01 H9 7O00-2 H7 FO02 B10 FO06 F9 IO01 E7 IO05 A9 IO10 C8 IO14 F8
2O00 D8 2O04 A11 2O10 E3 2O14 B9 2O18 H10 2O22 G11 2O26 G10 3O01 C7 3O05 F8 3O09 A11 3O13 D9 3O23 A9 3O27 C9 6O00 F8 9O16 C9 FO03 C10 FO07 F9 IO02 C7 IO06 C9 IO11 F7
2O01 D8 2O05 A12 2O11 G9 2O15 B10 2O19 G12 2O23 G11 2O27 G10 3O02 D3 3O06 F8 3O10 C11 3O14 D9 3O24 A9 3O28 C9 6O01 F8 AO01 C8 FO04 C10 FO08 E3 IO03 H3 IO07 D12 IO12 F7
1 2 3 4 5 6 7 8 9 10 11 12 13 14
A 1n0 1n0
A
+3V3-ET-ANA
FO01
11
12
IO05 1O10
3O21 3O22 3O23 3O24 5-1605403-8
SH1
D1
D2
27R 27R 27R 27R
2O13
100n
1 RDP RJ-1
FO02
39
47
69
80
94
107
117
21
27
33
56
58
137
2 RDN RJ-2
2O15
3 RCT RJ-3
B 7O00-1
DP83816AVNG
+3V3-ET-ANA
2O14 100n 100n RJ-45
B
IAUXVDD PCIVDD AUXVDD
59 MacPhyter II
PMEM
10/100 Mb/s 54 ETHERNET
CLKRUN TPTDP
123 53 4 TCT RJ-4
CONNECTOR
PWRGOOD TPTDM
3O25
3O26
100R
100R
122 46 FO03 5 TDP RJ-5
3VAUX TPRDP
3O27
3O28
100R
100R
99 18 8 C1 RJ-8
SH2
C PCI-PAR PAR X2
C
D3
D4
470R
PCI-IRDY 92 40
IRDY VREF
10
13
14
IO02 3O00
PCI-TRDY 93 28
TRDY COL
3O03
10K
1M0 3O10
PCI-PERR 97 29 +3V3-ET-DIG
PERR CRS
1O00 270R
PCI-SERR 98 5
SERR MDC 2O07 2O06
PCI-FRAME 91 4 DSX840GA
FRAME MDIO 1n0 IO07 1n0
25M
PCI-GNT-A 63 6
3O07 GNT RXCLK
PCI-GNT-A
+3V3-ET-DIG
22p
96 31
D PCI-STOP
D
3O11
3O12
3O13
3O14
10K STOP TXCLK
2O01
22p
3O02 76 13
PCI-AD23
V
IDSEL RXOE
2O00
100R
PCI-DEVSEL 95 30
DEVSEL TXE
100n
100n
100n
100n
100n
2O28 100n
2O27 100n
2O26 100n
2O25 100n
2O24 100n
4u7 6.3V
PCI-AD26 72 41
2O11
2O12
100n
PCI-AD27 71
PCI-AD28 70 50
2O20
2O19
2O23
2O22
2O21
RESERVED
PCI-AD29 68
PCI-AD30 67 127
PCI-AD31 66
31
VSS
C1
5O01 FO12
+3V3 +3V3-ET-ANA
103
114
136
2O17
2O18
19
16
20
26
32
35
38
44
49
51
52
55
57
65
77
90
100n
H IO03 7O00-2
H
8
4u7
DP83816AVNG
34 84
NC1 NC6
36 85
10u 16V
NC2 NC7
2O03
2O02
100n
37 124
NC3 NC8
42 125
NC4 NC9
43 126
NC5 NC10
G_15930_048.eps
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Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 83
SSB: UART
1M15 B6 1O02 C5 2O51 C5 3O16 C2 6O02-2 D4 FO11 C4
1O01 B5 2O50 B5 3O15 B3 6O02-1 A4 FO10 B4 Personal Notes:
1 2 3 4 5 6 7
BAV99S
6
B B
1O01
2O50
100p
1M15
3O15 FO10
TXD 1
UART
3O16 100R FO11 2 SERVICE
RXD 3
100R 5 4
CONNECTOR
C C
1O02
2O51
100p
S3B-PH-SM4-TB
BAV99S
+3V3-STANDBY
D 4
6O02-2
5
D
G_15930_049.eps
3104 313 6145.2 120606
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E_06532_012.eps
131004
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 84
1 2 3 4 5 6 7 8 9 10
VCC_EXTO
B10A
5P02
3P15 10K
3P16 10K
3P17 10K
3P18 10K
3P19 10K
3P20 10K
2P09
5P08
1n0
IP06
VCC_EXTO
RESET-POD-CI
IP07
2P06
2P07
2P10
2P02
2P03
2P04
100n
100n
100n
100n
100n
100n
A A
RDY_IRQA
3P11
2P15
2P16
100n
100n
10K
WAITA
CD1
CD2
VS1
VS2
+3V3
7P03
90
40
13
86
63
38
89
STV0701
IP20 VCC_CORE
Φ VCC_EXT CABLE CARD INTERFACE
3P45
10K
COMMON INTERFACE ROW_B ROW_A
14 HARDWARE 1P01-B 1P01-A
3P14 RESET CONTROLLER
M27-POD IP05 12 6 9P01 JTAG-TCK GND3 GND1
CLK TCK 35 1
100R 17 4 9P06 JTAG-TMS CD1 CD1 D3 POD-D(3)
0 TMS 36 2
18 SA 2 9P07 JTAG-TD-HDMI-POD MDOA(3) D11 D4 POD-D(4)
3P12 1 TDI 37 3
SCL-MM-BUS1 10 5 9P08 JTAG-TRST MDOA(4) D12 D5 POD-D(5)
SCL TRST 38 4
B SDA-MM-BUS1 3P13 100R 16
SDA TDO
3 9P09 MDOA(5) D13
39 5
D6 POD-D(6) B
XIO-SEL2 100R 7 37 MDOA(6) D14 D7 POD-D(7)
CS TEST_MODE 40 6
9P05
XIO-RWn_WEn 8 MDOA(7) D15 CE1 CE1
RD 41 7
CE2 CE2 A10 POD-A(10)
XIO-AS_REn DIR 3P35 22R JTAG-TD-POD-P3 42 8
9 VS1 VS1 OE OE
WR 43 9
58 RSTA IORD IORD A11 POD-A(11)
STR RSTA 44 10
PCI-REQ-B 19 68 CE1 IOWR IOWR A9 DRX_POD-A(9)
WAIT 1 45 11
CE 69 CE2 MISTRTA A17 A8 CRX_POD-A(8)
ACK 2 46 12
IRQ-POD 20 70 REG MDIA(0) A18 A13 POD-A(13)
INT REG 47 13
62 71 OE MDIA(1) A19 A14 MOCLKA-POD
10K EXTCS OE 48 14
64 72 WE MDIA(2) A20 WE|P WE
VCC_EXTO EXTINT WE 49 15
3P32 73 IORD MDIA(3) A21 RDY|BSY RDY_IRQA
IP18 IORD 50 16
2P25
74 VCC2 VCC1
10n
IOWR
2P24
+5V 7P00 IOWR POD-VCC 51 17 POD-VCC
TPS2211AIDB 22 IP00 VPP2 VPP1
10n
VCCEN POD-VPP 52 18 POD-VPP
2P19
100n
C CD1 52
1 VPPEN
21 IP01 VCCEN MDIA(4) A22
53 19
A16 MIVALA C
2P20
100n
100n
100n
MOCLKA
MOSTRTA
MOVALA
MDOA(0)
MDOA(1)
MDOA(2)
MDOA(3)
MDOA(4)
MDOA(5)
MDOA(6)
MDOA(7)
GND
MDIA(1) 95 81 MDOA(1)
7
MDIA(2) 96 80 MDOA(2)
E MDIA(3) 97 79 MDOA(3) E
3P21 10K
3P22 10K
3P23 10K
3P24 10K
3P25 10K
3P26 10K
3P27 10K
3P28 10K
3P29 10K
3P30 10K
3P31 10K
IP23 MDIA(4) 98 MDIA<0:7> MDOA<0:7> 78 MDOA(4)
3P40 6P00
SUPPLY-FAULT MDIA(5) 99 77 MDOA(5)
220R MDIA(6) 100 76 MDOA(6)
BAS316
MDIA(7) 1 75 MDOA(7)
2P40
2P41
100n
100n
GND_CORE GND_EXT
15
65
11
88
61
36
39
87
G_15930_050.eps
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Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 85
B10B 3P51 F3
3P52 F3
3P53 F4
7P10-1 D2
7P10-2 E2
7P13 C2
POD-A(7) 9P30 QTX_POD-A(7) 9P30 A2
9P31 A2
A POD-A(6) 9P31 ETX_POD-A(6) A 9P32 A2
9P33 B2
9P32 9P34 B2
POD-A(5) ITX_POD-A(5)
9P35 B2
9P36 B3
9P37 B3
9P38 B3
+3V3
2P50
100n
7P13
16
74LVC257APW
PDIR 1
G1
ADOE 15
EN
C C
2
MUX
POD-A(4) 1
CTX-POD 3 4 CTX_POD-A(4)
1
POD-A(9) 5
DRX-POD 6 7 DRX_POD-A(9)
POD-A(8) 11
CRX-POD 10 9 CRX_POD-A(8)
14
13 12
8
D D
+3V3
7P10-1
20
74LVC244APW
PDIR 1
EN
POD-A(7) 2 18 QTX_POD-A(7)
POD-A(6) 4 16 ETX_POD-A(6)
POD-A(5) 6 14 ITX_POD-A(5)
8 12
10
E E
+3V3
2P51
100n
7P10-2
20
74LVC244APW
PDOE 19
EN
RES 3P50
17 3 QTX-POD
QTX_POD-A(7) 15 5 33R
ETX_POD-A(6) 13 7
RES 3P51
ITX_POD-A(5) 11 9 ETX-POD
33R
F F
10
RES
G_15930_051.eps
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E_06532_012.eps
131004
1 2 3 4
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 86
3P78
10K
+3V3 3P61-1 B4
1K0
7P76 3P61-2 B3
IP21
20
74LVC245A
2P76
100n
3P61-3 B4
1
3EN1 3P61-4 B3
FP31 3EN2 3P62-1 D3
2P31
100n
SEL-POD 19
G3 3P62-2 D4
POD-DATA0 2
1
18 DV1F-DATA0 3P62-3 D3
7P31 3P62-4 D4
74LVC573APW 2
POD-DATA1 3 17 DV1F-DATA1 3P63-1 E4
20
POD-DATA2 4 16 DV1F-DATA2
ADOE 1 1
3P61-1
8 POD-A(0) POD-DATA3 5 15 DV1F-DATA3
3P63-2 E3
EN 3P73 D7
11 POD-DATA4 6 14
B ADLE C1
2
3P61-2
7
47R
POD-A(1) POD-DATA5 7 13
DV1F-DATA4
DV1F-DATA5 B 3P76 A6
2 19 POD-DATA6 8 12 DV1F-DATA6 3P77 C6
1D 3P61-3
XIO-A0_CLE 3 18 3 6 POD-A(2) POD-DATA7 9 11 DV1F-DATA7 3P78 A6
4 17
3P61-4 3P79 D8
10
XIO-A1_ALE 5 16 4 5 POD-A(3)
6 15 7P31 B2
3P60-1
XIO-A2 7 14 1 8 POD-A(10) 7P32 D2
8 13 +3V3
3P60-2 47R 7P34 E6
XIO-A3 9 12 2 7 POD-A(11)
3P77 7P76 A7
3P60-3 7P77 C7
10
20
74LVC245A
2P77
100n
XIO-A11 4 5 POD-A(13) FP31 A6
1
C XIO-A12
3EN1
3EN2
C IP21 A6
IP22 C6
SEL-POD 19
G3
XIO-A13
+3V3 POD-SOP 2 18 DV1F-DATA9_SOP
1
2
3 17
2P32
100n
180R
270R
3P73
3P79
7P32 8 12
20
74LVC573APW 9 11
ADOE 1
EN
10
11
D ADLE C1 3P62-4
3104 313 6145.2
4 5 POD-A(4)
G_15930_056.eps
120606
D
XIO-A4 2 19 47R
1D 3P62-3
XIO-A8 3 18 3 6 POD-A(8) +3V3
XIO-A9 4 17 +3V3
3P62-2
XIO-A7 5 16 2 7 POD-A(9)
XIO-A6 6 15
3P62-1
XIO-A5 7 14 1 8 POD-A(7)
2P33
100n
8 13
3P63-1
9 12 1 8 POD-A(6)
3P63-2 47R
10
2 7 POD-A(5)
7P34
20
74LVC245A
1
E 3EN1
3EN2
DATDIR
E
19 DATOE
G3
PCI-AD24 18 2 POD-D(0)
1
2
PCI-AD25 17 3 POD-D(1)
PCI-AD26 16 4 POD-D(2)
PCI-AD27 15 5 POD-D(3)
PCI-AD28 14 6 POD-D(4)
PCI-AD29 13 7 POD-D(5)
PCI-AD30 12 8 POD-D(6)
PCI-AD31 11 9 POD-D(7)
F 10
F
G_15930_052.eps
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Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 87
3P36
3P37
100K
3P37 A4
10K
3P38
3P38 A2
RESET-MAIN-NVM BC857BW
10K
7P18 3P57 F3
+3V3-STANDBY 3P80 B9
2P34
+3V3-STANDBY 3P81 C9
100n
7P14 3P82 F8
9P16
M24C64
8
Φ 3P83 D2
B (8Kx8) 7 +3V3 B 3P84 D2
WC FP22 RES
EEPROM 1P02
1 6
FP34
SCL-UP-VIP SCL-UP-VIP 9P39
RES 3P80
XIO-SEL0
3P85 D2
0 SCL 1
2
3
1 ADR
5
FP35
9P40
RES 2
FOR FACTORY USE 10K 3P86 E2
SDA-UP-VIP SDA-UP-VIP
2 SDA 3
5 4 3P88 E2
4
+3V3 3P81
7P14 B3
9P17
B3B-PH-SM4-TBT(LF) XIO-ACK
2K2 7P15-1 D2
+3V3
MAIN NVM 2P80 2P81
2P82 7P15-2 D3
100n 100n
7P81 100n 7P15-3 E2
20
74LVC245A
C RES C
RXD 9P18 RXD-VIPER XIO-AS_REn 1
3EN1 7P80 7P15-4 E2
12
37
TC58DVM92F1TGI0
RES 3EN2
TXD 9P19 TXD-VIPER XIO-SEL0 19
G3
VCC
Φ VCCQ 7P16 F1
+5V2-STBY 2 18 16 Bit EEPROM 7P17 F2
2P35 PCI-AD31 1 NAND-AD7
NAND-AD0
* 26 (32Mx16)
7P15-1 PCI-AD30 3
2
17 NAND-AD6 NAND-AD1 28
0
8 XIO-AS_REn
7P18 A3
100n 1 RE
14
10
XIO-A17_D9 9P47 29
7P15-2 XIO-A18_D10 9P48 31
9 BY 9P18 C1
10
14
74HC4066PW XIO-A19_D11 33
4 9P49 41
11
1
9P19 C1
1 XIO-A20_D12 12
3P85 1 3 RXD-VIPER XIO-A21_D13 9P50 43
13
2 9P39 B5
UART-SWITCHn 5 XIO-A22_D14 45 3
X1 14
100R XIO-A23_D15 47
15
4 9P40 B5
7
5
3P86 23 10 9P41 A3
TXD NAND-AD0 9P51 24 NC 11
7P15-3 34 14 9P42 A3
100R
14
GND
10K
9P48 D7
10K 6
48
25
13
NAND-AD6 9P55
UART-SWITCHn
FP32
7P15-4 NAND-AD7 9P56 9P49 D7
14
74HC4066PW
11
9P50 D7
1
UART-SWITCH 10 9P51 E7
3P82
1 TXD-VIPER
FP33
12
X1 * 8 Bit 9P52 E7
7
7P16 9P53 E7
PDTC114EU
F 10K F 9P54 E7
3P57 9P55 E7
7P17 9P56 E7
PDTC114EU
FP22 B4
FP23 D1
G_15930_053.eps
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Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 88
B11A +3V3-VCCD
5Z02 IZ00
B11A 1Z10 C14
1Z11 E14
1Z55 I7
IZ05 G13
IZ06 G13
IZ07 D8
2Z20
2Z21
2Z22
2Z23
2Z24
2Z25
2Z26
2Z27
2Z28
100n
100n
100n
100n
100n
100n
100n
100n
100n
+3V3-VCCA
2Z04 B9 IZ08 B5
12
18
24
35
44
54
61
70
78
84
90
95
107
113
120
132
138
7Z00
PDI1394L41BE 2Z05 B10 IZ12 F8
VDD 2Z06 B10 IZ13 F8
DV2A-DATA2_0 108 AV1D0 PHYD0 82 PHY-D(0) +3V3-VCCD 2Z07 B10 IZ14 F8
DV2A-DATA3_1 109 AV1D1 PHYD1 81 PHY-D(1) IZ01
2Z08 B11 IZ15 F8
A 5Z00 A
+3V3 +3V3-VCCD 2Z09 B11 IZ16 F8
DV2A-DATA4_2 110 AV1D2 PHYD2 80 PHY-D(2)
10u 16V
2Z38
DV2A-DATA5_3 111 AV1D3 PHYD3 79 PHY-D(3) 2Z17 F13 IZ19 C2
+3V3 2Z18 G12 IZ20 H1
DV2A-DATA6_4 114 AV1D4 PHYD4 76 PHY-D(4)
2Z19 G12 IZ21 E1
DV2A-DATA7_5 115 AV1D5 PHYD5 75 PHY-D(5) IZ02
2Z20 A5 IZ22 F1
3Z11
3Z10
116 AV1D6 PHYD6 74
10K
10K
DV2A-DATA8_6 PHY-D(6) 2Z21 A6 IZ25 H1
270R
5Z01
9KB BUFFER 2Z22 A6 IZ26 C6
2Z09
3Z47
100n
DV2A-DATA9_7 117 AV1D7 PHYD7 73 PHY-D(7)
MEMORY 2Z23 A6 IZ27 C6
DV2A-CLK DV2A-CLK 9Z47 99 AV1CLK LINK PHYCTL0 86
CORE +3V3-VCCD +3V3-VCCA
2Z24 A6 IZ28 C7
B
100 AV1FSYNC ISOCH & ASYNC PHYCTL1 85
B 2Z25 A7
180R
3Z48
DV2A-VALID 102 AV1VALID PACKETS LREQ 87 2Z26 A7
FZ04 3Z07 2Z27 A7
101 AV1SY SCLK 88
2Z28 A7
33R
2Z04
2Z05
2Z06
2Z07
2Z08
100n
100n
100n
100n
100n
DV2A-DATA0_SOP 103 AV1SYNC LPS 91 2Z29 H13
98 AV1ENDPCK CYCLEIN 56
IZ08 3Z08
+3V3-VCCD
FIREWIRE 2Z30 H13
10K CONNECTOR 1 2Z38 A10
AV1 LAYER
DV2A-DATA1_ERR 96 AV1ERR0 CYCLEOUT 57
FZ01 3Z00 H1
1Z10
97 AV1ERR1 CLK50 55 1 5Z05 2 FZ05
FZ02 1 3Z01 H1
+3V3-VCCD
IZ26 FZ06 2 3Z07 B6
104 AV1EMI0 1394MODE 47 4 3
C 3 C
IZ27 DLW31S 5Z06 4 3Z08 C6
2 FZ07
25
26
61
62
30
31
42
51
52
56
105 AV1EMI1 PD 48 7Z01 1 5 7
+3V3-VCCD IZ19 IZ28
PDI1394P23 6 8
3Z10 B7
3Z12 3 FZ08
DVDD1
DVDD2
DVDD3
DVDD4
AVDD1
AVDD2
AVDD3
AVDD4
AVDD5
PLLVDD
118 AV1READY LINKON 92 LINKON LINKON 4 3Z11 B7
10K 16 DLW31S 353388-1
NC1 3Z12 C2
3Z13
ISON 93 54
10K
NC2
TS-DATA0 133 AV2D0 55 3Z13 C8
3Z55
3Z57
3Z50
3Z56
NC3
V
POWERDOWN-1394 15 LPS RECEIVED CABLE POWER CPS 24 3Z20 E12
TRANSMITTER AND RECEIVER
3Z60
6 D0 TPA0+ 37 3Z25 F13
3Z51
PHY-D(0)
TS-DATA6 141 AV2D6 51 PHY-D(1) 7 D1 TPA0- 36 3Z26 F13
3Z58
3
3Z59
PHY-D(2) 8 D2
TS-DATA7 142 AV2D7 52 PHY-D(3) 9 D3 ARBITRATION 3Z27 F13
V
4
PHY-D(4) 10 D4 3Z28 F13
3Z23
3Z24
124 AV2CLK 58 11 D5
56R
56R
TS-CLK 5 PHY-D(5) CONTROL
PHY-D(6) 12 D6 1 5Z07 2 FZ09 1Z11 3Z29 F14
3Z40 125 AV2FSYNC 59 PHY-D(7) 13 D7 STATE TPB0+ 35
ASYNC 6 FZ10 1 3Z30 F2
+3V3-VCCD +3V3-VCCD 10K
MACHINE TPB0- 34 4 3
TS-VALID 127 AV2VALID TRANSMITTER RESERVED 72 LOGIC 2 3Z33 F8
7 DLW31S 3
AND
3Z20
3Z21
56R
56R
E 3Z41 FZ11 4 E 3Z35 E8
126 AV2SY RECEIVER 71 20 PC0 1 5Z08 2 5
8 7
3Z37 E8
3Z44
3Z46
21 PC1
10K
10K
6
AV2 LAYER
10K FZ12 8
TS-SOP 128 AV2SYNC 65 22 PC2 TPA1+ 46 4 3 3Z38 F8
10
3Z35 3 CNA TPA1- 45 DLW31S 353388-1
123 AV2ENDPCK
11
66 +3V3-VCCD 10K FZ03
CABLE PORT 1 TPB1+ 44 3Z40 E2
IZ21 TPB1- 43 3Z41 E2
3Z37
121 AV2ERR0|LTLEND
12
67 FIREWIRE 3Z44 E1
IZ22 12K IZ03
CONNECTOR 2
3Z38
3Z25
3Z26
3Z28
3Z29
122 AV2ERR1|DATINV 68
56R
56R
56R
56R
82K
13 +3V3-VCCD IZ13 3Z46 E1
3Z22
2Z16
270p
5K1
129 AV2EMI0 144 3Z18 40 R0
BIAS 3Z47 B1
IZ04
16
6K8 41 R1 VOLTAGE
3Z48 B1
130 AV2EMI1 62 IZ12 AND
TESTPIN1 3Z50 D14
F +3V3-VCCD 3Z30 IZ18 38 TPBIAS0 CURRENT F
3Z33
3Z27
2Z17
270p
143 AV2READY 63 47 TPBIAS1 GENERATOR
10K
5K1
TESTPIN2 CRYSTAL 3Z51 D14
10K
64 IZ14 OSCILLATOR, XI 59 3Z55 D14
TESTPIN3
28 BRIDGE PLL SYSTEM, XO 60 3Z56 D14
24M576
1Z05
HIFAD0 22 XIO-D0 AND CLOCK
IZ15 27 TWOPORT TRANSMIT 3Z57 D14
HIFAD1 21 XIO-D1 DATA GENERATOR
IZ16 3Z58 D14
2Z18
14 PD ENCODER
8p2
33 HIFA0 HIFAD2 20 XIO-D2 3Z59 D14
PLLGND1
PLLGND2
RESET-1394 53 RESET_ 29 3Z60 D14
TEST0
DGND1
DGND2
DGND3
DGND4
AGND1
AGND2
AGND3
AGND4
AGND5
AGND6
2Z19
32 HIFA1 HIFAD3 19
8p2
XIO-A1_ALE XIO-D3
5Z00 A10
XIO-A10 31 HIFA2 HIFAD4 16 XIO-D4 5Z01 B10
G G 5Z02 A10
17
18
63
64
32
33
39
48
49
50
57
58
XIO-A11 30 HIFA3 HIFAD5 15 XIO-D5
8-BIT 5Z05 C13
XIO-A1_ALE XIO-A12 29 HIFA4 HIFAD6 14 XIO-D6
INTERFACE 5Z06 C13
+3V3-VCCD 7Z02 XIO-A13 28 HIFA5 HIFAD7 13 XIO-D7
74LVC1G86GW IZ06 IZ05 5Z07 E13
+3V3-VCCD +3V3-VCCD XIO-A14 27 HIFA6 HIFD8 10 XIO-D8 5Z08 E14
7Z00 A3
26 HIFA7 HIFD9 9
5
XIO-A15 XIO-D9
2 7Z01 C9
2Z29
1u0
4 25 HIFA8 HIFD10 8 XIO-D10 7Z02 G1
3Z00
3Z01
1
10K
1K0
H XIO-RWn_WEn H FZ01 C6
37 HIFWR_ HIFD12 4 XIO-D12
IZ25 XIO-RWn_WEn FZ02 C6
IRQ-IEEE1394 IRQ-IEEE1394 38 HIFINT_ HIFD13 3 XIO-D13 FZ03 E8
XIO-AS_REN 40 HIFRD_ HIFD14 2 XIO-D14 FZ04 B6
IZ20 FZ05 C13
2Z30
1u0
45 HIF16BIT HIFD15 1 XIO-D15
FZ06 C13
46 HIFMUX HIFALE 39 FZ07 C13
HIFWAIT 41 FZ08 C13
1Z55 FZ09 E14
GND FOR 1 SCL-DMA-BUS1
FZ10 E14
I FACTORY 2
SDA-DMA-BUS1
I
FZ11 E14
106
112
119
131
137
3
11
17
23
34
43
53
60
69
77
83
89
94
USE 4 5
5
FZ12 E14
S3B-PH-SM4-TB IZ00 A10
IZ01 A10
IZ02 A10
IZ03 F12
G_15930_054.eps
3104 313 6145.2 120606
1 2 3 4 5 6 7 8 9 10 11 12 13 14
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 89
20
74LVC245A
A 3EN1
1 PCI-CBE1
A 5Z50 A1
3EN2
G3
19 XIO-SEL1 7Z10 A3
PCI-AD28 18 2 XIO-D4 XIO-D4 9Z51 PCI-AD28 7Z11 B2
1
PCI-AD29 17
2
3 XIO-D5 XIO-D5 9Z52 PCI-AD29
7Z12 D3
PCI-AD25 16 4 XIO-D1 XIO-D1 9Z53 PCI-AD25
15 5 9Z54
9Z51 A6
PCI-AD24 XIO-D0 XIO-D0 PCI-AD24
PCI-AD26 14 6 XIO-D2 XIO-D2 9Z55 PCI-AD26 9Z52 A6
PCI-AD27 13 7 XIO-D3 XIO-D6 9Z65 PCI-AD30
PCI-AD30 12 8 XIO-D6 XIO-D3 9Z57 PCI-AD27 9Z53 A6
PCI-AD31 11 9 XIO-D7 XIO-D7 9Z66 PCI-AD31
9Z54 B6
10
B B 9Z55 B6
XIO-SEL0 9Z56 C6
PCI-CBE2
+3V3BUFF 9Z57 B6
2Z51
9Z58 C6
7Z11 100n 9Z60 C6
20
74LVC245A
1
3EN1 9Z61 C6
3EN2
19
G3 9Z62 C6
PCI-AD16 2
1
18 XIO-A16_D8 XIO-A21_D13 9Z60 PCI-AD21 9Z63 C6
C PCI-AD18 3
2
17 XIO-A18_D10 XIO-A19_D11 9Z61 PCI-AD19
C 9Z64 C6
PCI-AD17 4 16 XIO-A17_D9 XIO-A20_D12 9Z62 PCI-AD20
PCI-AD20 5 15 XIO-A20_D12 XIO-A17_D9 9Z63 PCI-AD17 9Z65 B6
PCI-AD19 6 14 XIO-A19_D11 XIO-A18_D10 9Z64 PCI-AD18
PCI-AD21 7 13 XIO-A21_D13 XIO-A22_D14 9Z58 PCI-AD22
9Z66 B6
PCI-AD22 8 12 XIO-A22_D14 XIO-A23_D15 9Z56 PCI-AD23
9 11 9Z67
9Z67 C6
PCI-AD23 XIO-A23_D15 XIO-A16_D8 PCI-AD16
9Z70 E6
10
9Z71 E6
9Z72 E6
+3V3BUFF
9Z73 E6
D 2Z52 D
9Z74 E6
100n 7Z12
20
74LVC245A 9Z75 E6
1
3EN1
3EN2
9Z76 E6
19
G3 9Z77 E6
PCI-AD15 18 2 XIO-A15 XIO-A15 9Z70 PCI-AD15
1 IZ50 A2
2
PCI-AD13 17 3 XIO-A13 XIO-A13 9Z71 PCI-AD13
16 4 9Z72
cZ01 F3
PCI-AD11 XIO-A11 XIO-A11 PCI-AD11
PCI-AD10 15 5 XIO-A10 XIO-A10 9Z73 PCI-AD10 cZ02 F3
PCI-AD14 14 6 XIO-A14 XIO-A14 9Z74 PCI-AD14
PCI-AD12 13 7 XIO-A12 XIO-A12 9Z75 PCI-AD12 cZ03 F3
E PCI-AD1 12 8 XIO-A1_ALE XIO-A1_ALE 9Z76 PCI-AD1
E
PCI-AD0 11 9 XIO-A0_CLE XIO-A0_CLE 9Z77 PCI-AD0 cZ04 F3
cZ05 F3
10
cZ06 F3
cZ07 F3
PCI-AD2 cZ01 XIO-A2
PCI-AD3 cZ02 XIO-A3 cZ08 F3
PCI-AD4 cZ03 XIO-A4
PCI-AD5 cZ04 XIO-A5
PCI-AD6 cZ05 XIO-A6
PCI-AD7 cZ06 XIO-A7
PCI-AD8 cZ07 XIO-A8
F PCI-AD9 cZ08 XIO-A9
F
PCI-CBE1 3Z53 100R XIO-RWn_WEn
PCI-CBE2 3Z54 100R XIO-AS_REn
G_15930_055.eps
3104 313 6145.2 120606
1 2 3 4 5 6
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 90
3M72
3M09
10K
10K
3M00 E1
3M70
2K2
FM10 3M01 E1
7M03 9M06 RESET-STBY A
NCP303LSN10T1 RES 3 3M02 E2
FM70 2
IN IM11 3M03 E1
1 1 7M01
RST PDTC114EU
3 3M04 E2
GND
IM12 2
5 4 3M05 F2
CD NC
3M09 A4
3M14 C3
3M71
2M90
100n
1K2
3M70 A1
3M71 B1
+5V2-STBY 3M72 A3
B
+5V2-STBY 3M73 B1
3M74 B3
3M75 B3
3M74
3M75
3M82
150R
150R
150R
3M76 D2
3M73
470R
3M77 D2
3M80
3M81
150R
150R
3M79
1K0
IM14 3M78 D2
IM13 3M79 C4
3M80 C5
IM15 IM16
+3V3-STANDBY-B-TRANS 7M04 7M07 3M81 C5
1V6 BC847B 1V9 BC847B C 3M82 B3
3M85 E4
2M93
10n
3M86 E4
NC
TS431AILT FM71 +1V2-STANDBY
6M10 E3
2M91
3M14
4
4R7
REF
7M06
10n
3 1
1V3 6M11 F3
NC
K
NC
10u 10V
3M78 FM72
4 IM17 7M01 A4
2M94
REF
TS431AILT +3V3-STANDBY
4V 7M03 A3
2
7M05 1K0
NC
A
10u 10V
7M04 C3
3M76
3M77
2M92
1K0
1K5
5 2
7M05 D1
D 7M06 C4
7M07 C5
7M10 E1
+3V3-STANDBY +5V2-STBY
7M11 E1
IM00 7M12 E2
9M00 F1
+3V3
9M01 E5
BAS316
3M00
3M01
3M02
6M10
10K
10K
10K
9M02 E5
IM01 SCL-DMA-BUS1-ATSC 9M04 E4
3M03
SDA-DMA-BUS1-ATSC 9M05 E5
IM05 IM04 33K IM06
E
3M04 9M06 A3
3M85
3M86
9M04
9M05
4K7
4K7
IM02
7M10 7M11 18K 7M12 FM07 F1
1TG1 FM10 A3
9M01 SDA-DMA-BUS1 FM70 A1
1
9M02 SCL-DMA-BUS1
BC847B BC847B BC847B 2 FM71 C5
3
+5V FM72 D3
BAS316
FM07 0V 4
3M05
6M11
1K0
0V3 IM03 5 6
9M00 IM00 D2
IM08
RES 0V3 B4B-PH-SM4-TBT(LF) IM01 E2
FOR FACTORY IM02 E3
USE F IM03 F3
IM04 E1
POD-MODE
ON-MODE
STANDBY
IM05 E1
IM06 E1
IM08 F2
IM11 A3
G_15930_056.eps
3104 313 6145.2 120606
IM12 A2
1 2 3 4 5
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 91
G_15930_063.eps
3104 313 6145.2 130606
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 93
Part 1
G_15930_057a.eps
120606
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 95
Part 2
G_15930_057a.eps
120606
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 96
Part 1
G_15930_058a.eps
120606
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 98
Part 2
G_16290_058b.eps
270106
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 99
2036
100n
2004
100n
SPDIF OUT 1014 I6 3061 B3 I022 C12
1001
3070
3006
1015 F6 3065 F11 I023 C11
22K
22K
I050 3061 I051 2042
2 1 SPI-OUT PR PR 1016 E1 3070 A7 I024 E11
220R 1030-3 I037 1050-3 I018
100n
5 6
F017 2035 3071 5 6
F026 2007 3007 1017 G6 3071 B7 I025 D12
YKC21-3894N 6040 F016 7010 F025 7000
1018 C1 3072 B8 I026 E12
RES
120R
1027
3060
2030
100p
BC847BW BC847BW
BLACK 6045 22u 16V I048 100R 3072 AV1-AV5-AV6_R-PR 6004 22u 16V I020 100R 3010
YKC21-5637 YKC21-5637 AV2-AV4_R-PR 1019 D1 3073 B8 I028 B3
PDZ6.8-B
3074
3011
1020-1 I5 3074 B6 I029 C1
75R
75R
I036 RED I038 100R RED I019 100R
B 6041
B 1020-2 G5 3075 C6 I030 D1
560R
560R
3073
3014
I039 BAV99 COL I034 BAV99 COL 1020-3 F5 3076 C7 I031 C3
2024
100p
1024
2029
100p
1022
PDZ6.8-B 1021 H10 3077 C7 I032 I2
PDZ6.8-B
PDZ6.8-B
1022 B10 3078 C8 I033 C10
6007
6046
1023 G11 3079 C8 I034 B10
2037
100n
2014
100n
3044 I028 10u 16V 1024 B5 3080 E6 I035 E10
AUDIO-OUT2-L
LEFT VREF +8V VREF +8V
1025 C5 3081 D7 I036 B2
1002 150R 2019 1026 E5 3082 E7 I037 B7
2 1 F006 3046 I006 +8V +8V 1027 B2 3083 E8 I038 B8
6
1030-1 E5 3084 E8 I039 B5
PDZ6.8-B
3076
3017
2 A-PLOP
22K
22K
YKC21-3894N 7004-1 1030-2 C5 5000 I3 I040 C7
BC847BS PB PB
WHITE I008 1K0 1030-3 B5 6000 G1 I041 C8
1 1030-2 1050-2
C F019 2038 3077 I040 F027 2015 3020 I021
C 1040-1 I1 6001 H10 I042 C5
100K
1018
3048
2021
100p
1040-3 F1
6024
3075
3023
75R
75R
BLUE I041 100R BLUE I022 100R 1050-1 D9 6004 B10 I045 E7
1050-2 C9 6005 G1 I046 E5
560R
560R
3079
3024
I042 BAV99 COL I033 BAV99 COL
1050-3 B9 6006 I10 I047 C7
2025
100p
1025
2031
100p
1007
3049 10u 16V
1060-1 I9 6007 B10 I048 B7
PDZ6.8-B
PDZ6.8-B
AUDIO-OUT2-R
6011
RIGHT
1003 150R I009 2022 6048 1060-2 H9 6008 H1 I050 A2
3050 I011 1060-3 F9 6009 I10 I051 A3
2 1 F007 3
+8V
1070 H5 6010 C10 I052 I3
PDZ6.8-B
3052
2023
100p
2016
100n
I030 2004 A12 6014 E10
2039
100n
2005 H11 6015 E10
3027
PDZ6.8-B
22K
Y 2007 B11 6017 I6
6026
2010 H2 6018 F6
3081
1050-1
22K
F029 2017 3030 I025
Y 1 2 7002 2012 I11 6019 F6
1030-1 BC847BW
+8V F021 2040 3082 I043 6014 22u 16V I024 100R 3031 2014 B11 6020 E1
1 2 7012 YKC21-5637 AV2-AV4_G-Y
2015 C11 6021 G6
3032
BC847BW
75R
6049 22u 16V I045 100R 3084 GREEN I026 100R
YKC21-5637 AV1-AV5-AV6_G-Y 2016 D12 6022 G6
I005 3038 Y-CVBS-MON-OUT
560R
2017 D11 6023 C1
3080
3033
75R
7003 GREEN I044 100R I035 BAV99 COL
2032
100p
1012
BC847BW 2018 F7 6024 C1
100R
560R
3083
CVBS
PDZ6.8-B
BAV99 COL
E 1004 I046
E 2019 C3 6025 D1
2026
100p
1026
6015
F024 F005 3040 I004 2020 G6 6026 D1
2 1 9005
PDZ6.8-B
RES 6050
2021 C2 6027 F10
68R
YKC21-3893N 2022 D3 6029 I2
+8V 2023 D2 6030 I2
YELLOW
560R
3042
3043
PDZ6.8-B
10K
2024 B5 6040 B2
1016
6020
+8V
2025 C5 6041 B2
PDZ6.8-B
AV2_Y-CVBS
F YKC21-5637 6018
100R F 2031 C10 6050 E5
PDZ6.8-B
2033
100p
1005
3018
6027
2033 F10 7001 C12
75R
YELLOW
I016
1015
3039
2018
1K0
LEFT
47p
2034 G11 7002 D12
1040-3 I001 PDZ6.8-B
3000 2035 B7 7003 E2
6019
5 6 F000 AUDIO-IN1-L
2036 A8 7004-1 C2
PDZ6.8-B
100R
2037 B6 7004-2 D2
6000
YKC21-5637
WHITE SVHS 2038 C7 7010 B8
100K
3004
2002
100p
AV6_VSYNC
2041 I3 9005 E2
6002
PDZ6.8-B
5 3
2042 B3 F000 F1
6021
YKC21-5637
G BLACK 6 4
F002 3025 AV2_C G 2I24 I3 F001 G1
100R 3000 F2 F002 G11
I017
1017
3045
2020
RIGHT
PDZ6.8-B
1K0
2
47p
1008
2034
100p
1023
3028
6012
1040-2
PDZ6.8-B
75R
F001 3008 I003 3004 G2 F005 E1
6022
3 4 AUDIO-IN1-R F003
3005 H11 F006 C1
PDZ6.8-B
100R
6005
2010
100p
SVHS LEFT
3008 G2 F009 I10
1090
I002 1070 1060-2 F008 3002 I012 3010 B13 F010 F10
YKF51-5535 3 4
PDZ6.8-B
1 AUDIO-IN2-L
3011 B11 F011 I1
6008
PDZ6.8-B
5
100R
6001
3 YKC21-5637 3012 I10 F012 H7
WHITE
H F012 3026
H 3014 B12 F013 I6
100K
3005
2005
100p
6 4 AV7_C
I014 3015 H2 F014 F6
1021
100R 3016 I11 F015 G6
PDZ6.8-B
PDZ6.8-B
2
3017 C11 F016 B4
1009
2027
100p
1011
3029
6013
6003
75R
SPDIF IN
1040-1
EXTERNAL I/O 3 RIGHT
BLACK
1060-1
3020 C12
3021 I2
3022 C13
F018 I4
F019 C5
F020 I9
F023 F011 5000 I052 2041 F009 3012 I013
1 2 SPI-1 F020 1 2 AUDIO-IN2-R 3023 C11 F021 E5
PDZ6.8-B
100n 100R 3024 C12 F023 I1
6006
YKC21-5637 CVBS YKC21-5637
6029 3025 G12 F024 E1
1006
3021
2I24
1020-1
75R
12p
BLACK RED
F013 3035 3026 H8 F025 B9
100K
3016
2012
100p
1 2 AV7_Y-CVBS
I PDZ6.8-B F018
I015 I 3027 D11 F026 B10
1013
I032 100R
YKC21-5637 3028 G12 F027 C10
PDZ6.8-B
6030
6009
YELLOW
PDZ6.8-B
100p
1014
6017
3037
75R
100u 16V
4 37 I124 FRONT_Y-CVBS 1M21 F4 F114 B3
2124
100n
2125
2126
2252
100p
1u0
A AV2_C
AV2_Y-CVBS
F103
5
6
36
35 5100
9211
I125 AUDIO-IN5-L A 1M36 B9 F115 B3
2249
100p
F104
7 34 +8V6 I110 1X01 F5 F117 C3
+8V6 F105 33 9212 1X02 F6 F118 C3
8 I126 AUDIO-IN5-R
2248
100p
Y-CVBS-MON-OUT F106 9111
9 32
9213 1X03 F7 F119 C3
10 31 1X04 F8 F120 E2
2247
100p
11 30 3154 I101
AV6_VSYNC VREF
1X05 F8 F121 F3
12 29
2124 A6 F122 F3
BZX384-C2V7
13 28 680R F217 F200 F201
22u 10V
14 27 TO 1E40 F214 2125 A6 F124 C3
6102
2127
2128
100n
15 26 2126 A7 F125 C3
AUDIO-OUT2-L F109 25
16 2127 B6 F126 C3
AUDIO-OUT2-R F110 24
17
2128 B7 F127 D3
18 23 1M36
AUDIO-HDPH-L F111 SSB Bx2.x 2129 C6 F128 E8
B AUDIO-HDPH-R F112
19
20
22
21 1 B 2130 C7 F133 D3
21 20 2 2131 D7 F134 D3
AV7_Y-CVBS F113 19
22 3 2132 D6 F136 D3
AV7_C F114
F115
23 18 I120 I121 3156 I122 I102 4 TO 1M36 2133 E2 F137 E3
+5V2-STBY 24 17 +5V2-STBY +5V 5
25 16 1R0 6 2134 E2 F138 E3
100u 16V
26 15 7 2135 F2 F139 E2
2129
100n
2130
AUDIO-IN1-L F117
27 14 8 2136 F3 F140 E2
AUDIO-IN1-R F118
28 13 9 SIDE I/O 2137 F3 F141 F9
29 12 10
AUDIO-IN2-L F119 2138 F2 F142 F9
30 11 11
AUDIO-IN2-R F146 2139 F2 F143 D3
31 10
B11B-PH-K 2140 F2 F144 E8
32 9
FRONT_Y-CVBS GNDB
C FRONT_C
33
34
8
7
F204
9220
AUDIO-HDPH-L
C 2141 F2
2247 A9
F145 E8
F146 C3
35 6
2248 A8 F147 F2
2250
100p
AUDIO-IN5-L 36 5
+5V
+5V
AUDIO-IN5-R 37 4 2249 A8 F148 F2
LED1 F124 2250 C9 F149 F2
38 3
KEYBOARD F125
F126
39 2 2251 D8 F150 F2
RC GNDB
GEMSTAR
40 1 AUDIO-HDPH-R 2252 A8 F151 E3
F127 F203
40FMN-BMT-A-TFT 4-1735042-0 9221 3153 A6 F152 E3
2131
3157
2251
100p
1E62 3154 A6 F153 E3
4K7
AV1-AV5-AV6_R-PR F156 3156 B6 F154 E3
1 16V 10u
AV1-AV5-AV6_G-Y F157
AV1-AV5-AV6_B-PB
2 3157 D6 F155 E3
F158 I103 I104
3 3158 3158 D6 F156 D3
GNDB
D AV1-AV6_FBL-HSYNC F159
4
5 4K7 6101
D 3159 D7
3160 E6
F157 D3
F158 D3
6 2132
F133 BC857BW 3161 E6 F159 D3
7 7106 PLVA2650A
SPI-1 F134
9222
8 TO 1E62 7107
100p 3159 I108 3999 F9 F200 B8
9 GLINK-IR-OUT
SPI-OUT F136 PDTC114EU 5100 A6 F201 B8
10 10R
GLINK-IR-OUT F143 I105 6100 E6 F203 D8
11
GLINK-TXD F137 6101 D9 F204 C8
12
GLINK-RXD F138
13 SSB Bx2.x 6102 B6 F205 F9
A-PLOP F151
14 7106 D7 F214 B8
15 F128 7107 D6 F217 B7
SCL-MM-BUS2 F152 9112
16
SDA-MM-BUS2 F153 9113 1 1010 9100 E1 I100 A6
17
LED2 F154 2 9101 E1 I101 A7
E LIGHT-SENSOR F155
18
19 GLINK-TXD
RES
220R
3160 F144
5
4
GEMSTAR
CONNECTOR
E 9104 F3 I102 B6
KEYBOARD 9100 F139
20 3161
F145
3
9105 F3 I103 D6
GLINK-RXD
2133 20FMN-BMT-A-TFT 220R LGY3319-0111 9106 E1 I104 D7
RES 1100
LED1 9101 100p F140 1M01 9107 F1 I105 D7
1M20
2134 6100 9108 F1 I108 D8
1 1101
RC 9106 100p F120 9109 F1 I109 A6
1 2
2135 PLVA2650A
LIGHT-SENSOR
9107 100p F147 2 3 RES 1102 9110 F1 I110 A6
2138
3
B3B-PH-K
TO 1M20 F141 3999 F142 9111 A3 I111 A6
4
100p 1M21 100R
9112 E3 I120 B5
5
+8V6 9105 F121 1X01 1X02 1X03 1X04 1X05 9113 E3 I121 B6
6 1
2136 EMC HOLE EMC HOLE EMC HOLE EMC HOLE EMC HOLE 9205 F9 I122 B6
7 2 LED PANEL 9205
100p
F LED2 9108
2139
F148
9104 F122
8
9
3
4 I213
F205
F 9210 A9
9211 A9
I123 A9
I124 A9
+5V2-STBY 10 5
100p 2137 9212 A9 I125 A9
SCL-MM-BUS2 100p 11 6
9109 F149 9213 A9 I126 A9
12 GNDB
2140 B6B-PH-K 9220 C9 I213 F9
SDA-MM-BUS2 9110 100p F150
2141 B12P-PH-K
9221 D9
100p 9222 D3
F100 A3
G_15970_014.eps F101 A3
3104 313 6139.2 160306 F102 A3
1 2 3 4 5 6 7 8 9
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 101
Layout External I/O Panel (Top Side) Layout External I/O Panel (Bottom Side)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
A A
2D20
2D40
100n
100n
ID17 5D01
+12-15V ID47 5D26
80R
1m0 25V
GND-L 80R
3D03
3D06
2D06
2D07
100n
+12-15V
3K3
1K2
1m0 25V
3D69
3D28
3D31
2D31
2D32
100n
22K
3K3
1K2
5D06 ID29 -14V3
3D70
22K
-12-15V VN 3D05 ID05
80R SI4532ADY 3D30 ID35
22K 7D10-1 SI4532ADY
3
2D21
100n
3
4 FEEDBACK-L
BC807-25W ID07 7D31 GND-LR GND-LR
4 FEEDBACK-R
B ID18
BC807-25W ID37
B
5
6
3D16
CPROT ID48
5
6
3D41
GND-L 22K CPROT
7D12
IDB4 LEFT-SPEAKER 22K
BC857BW 7D37
MUTE 7D05 IDB5 RIGHT-SPEAKER
BC847BW 1736 BC857BW
ID08 5D00 ID25 MUTE 7D30
VP 3D17
2 2D11 1
7D07 1 BC847BW 1735
ID38
*
BC847BW ID19 VP 3D42 5D25 ID55 FD25
*1
ID61 2 3 7D32 FD26 1
ID06 0R1 22u FD00 BC847BW ID49
2D41
IN-L ID36 0R1 ID60 2 3
22u GND-LR
3D15
330R
3D18
2D10
470n
3
4R7
ID20 2D00 ID01 8 7D00-1 IN-R
3D01
3D40
330R
3D43
2D35
470n
3 B3B-EH-A 3
4R7
AUDIO-L LM393PT ID04 ID50 ID31 8 7D00-2
2
2D02 3D08 3D26 2D25
1 FD01 AUDIO-R 5 LM393PT B3B-EH-A
18K 47n
2
10n 22K ID09 ID21
TO 18K 47n
7
2D27 ID34 3D33
TO
3D02
2D01
GND-LL 6
22K
1n0
7
8
3D27
2D26
GND-LR SPEAKER
22K
1n0
BC857BW GND-LL 4 7D33 ID52
7
8
3D07
680R
2D08
3D32
680R
2
1n5
ID40
2D33
2
1n5
VN
1
7D10-2
SI4532ADY 2D09 VN
1
GND-SA GND-SA 3D09 ID11 7D35-2
ID03 GND-SA GND-SA 3D34 ID41 SI4532ADY 2D34
22K ID23 1n5 ID33
7D09 22K ID53 1n5
3D46
3D48
22K
22K
BC817-25W 7D34
2D46
3D10
220n
1K2
22p
2D14
BC817-25W
3D35
2D39
220n
1K2
2D47
22p
ID12 5D02
25V 1m0
ID45 3D36 3D37 80R
2D12
2D13
100n
-12-15V
25V 1m0
3K9 100K ID13
2D37
2D38
100n
3K9 100K ID43
2D03
2D04
2D05
1n5
1n5
1u0
2D28
2D29
2D30
1n5
1n5
1u0
3D13
ID16 VN 3D38 GND-LR GND-LR
GND-LL GND-LL
10K ID46
10K
2D44
3D14
560R
100n
2D45
3D39
560R
100n
15K
2D16 3D20 2D19
FEEDBACK-L IN-L
2p2 3D19 1p0
E GND-SA GND-SA
2D18
ID14
33K
ID02
2D17 GND-SA GND-SA
E
FEEDBACK-R IN-R
2p2 1p0
2D43
INV-MUTE
2p2
G_15690_067.eps
3104 313 6125.4 020306
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 103
*1
2DF2 A4 IDF7 C6
A A
2DF2
3DF6
2DF4
100n
3
5K6
1M52 2DF3 B4 IDF8 E4
FDH4
AUDIO-L 2DF4 A12 IDF9 E5
2
IDE3 1
FDH5 2 2DF6 C11 IDG0 F6
AUDIO-R 3
7DF7-1 2DF9 G10 IDG1 F6
LM393PT GND-L FDH6 4
3DD3
3999 G10 IDG3 E3
22K
IDF1 8 GND-S 5
3DF4
3
+12-15V 6 3DD0 D10 IDG4 F3
47K 1 AUDIO-PROT FDH8
7 3DD1 D10 IDG5 F2
2 IDF2 SOUND-ENABLE FDH9
8
3DF5
9DD3 3DD2 E10 IDG6 F2
2K7
+3V3-STANDBY 9
4
FDG1 3DD3 A4 IDG7 E3
B9B-PH-K
3DD4 F2 IDG8 F1
2DF3
100n
0V SOUND-ENABLE 9DD2
+12-15V
B -12-15V
B 3DD5 F2 IDG9 E5
GND-L +3V3-STANDBY +3V3-STANDBY 3DD7 C10 c001 E10
BAS316
3DF2 3DF0 C6 c002 F10
6DF0
LEFT-SPEAKER
220K GND-L 3DF1 C6 c003 E10
3DF2 B2 c004 F10
2DF0
1u0
VP1
3DH1
3DF0
3DF3 C2 c005 F10
2K2
10K
3DH0
47K
3DF4 A3
7DF7-2 0V
1M02
0V FDH0 3DF5 B3
LM393PT 9DF0 AUDIO-PROT -12-15V
1
1
8 3DF6 A4
*
3DF3 FDG2 GND-L 2
2DF6
RIGHT-SPEAKER 5 FDH1 3
IDF4 3 3DF7 C3
3DF1
7
47K
220K IDF3 0V6 7DF3 7DH0 GND-L 4 3DF8 C3
C 6 BC847BW BC847BW +12-15V 5 C
3DH3
3DF9 C5
2
3K9
3DD7 6DF2 FDH2 6
3DG9
4
3DF9
47K
22K
AUDIO-PROT 7 3DG0 E2
3DF7
3DF8
47K
2K7
100R IDF5 BAS316 FDH3
B7B-EH-A 3DG1 F2
GND-L IDF7 0V
2DD8
3DG2 E3
10n
-12-15V
7DF4
3DG3 E5
GND-L BC847BW GND-L GND-L 3DG4 F3
3DG8
2DD2
10K
10n
GND-L
GND-L 3DG5 F5
GND-L 3DG6 F6
9DD1
3DG7 F6
GND-L GND-L
3DD0 IDE0 14V4 3DG8 D6
D +12-15V
+12-15V
IDE2
VP1 D 3DG9 C6
10R 3DH0 C5
+12-15V
3DD1
-12-15V
15K
7DD0 3DH1 C5
BC817-25W
3DH2 E4
3DH4
33K
7DF8
IDE1
3DH3 C7
BC847BW
3DG3 3DH4 D4
3DH5
3DH6
2K2
47K
47K
-13V7 3DH5 E6
3DD2
2DE0
47K
1n5
IDF8
IDG3 3DH6 E3
3DH7 E4
3DH2
3DH7
100K
47K
-12-15V 6DF0 B5
E E 6DF1 F1
3DG2
-14V4 c001
47K
3DG7
-13V7 IDG5 GND-LL 7DF3 C5
47K
7DF1 +13V7
+12-15V BC847BW c002
BZX384-C18 10K 7DF4 D5
INV-MUTE
7DF5 F6
3DD4
22K
IDG0
GND-LR 7DF6 E5
-14V4 IDG4
3DG1
c004
2K2
2DD1
GND-S
6K8
7DF8 D4
1n5
BC847BW
3DG6
3DD5
2DD4
7DF9 c005
1K0
47K
1n5
BC847BW 7DF9 F2
7DH0 C6
-12-15V GND-S
9DD1 D11
9DD2 B10
GND-L GND-L GND-L GND-L 9DD3 B11
9DF0 C6
2DF9 FDG1 B11
1 0002
100p GND screw
FDG2 C3
G G FDG8 G10
GND-L FDG9 G11
FDH0 C11
FDH1 C11
FDG8 3999 FDG9 FDH2 C11
2K2 FDH3 C11
FDH4 A11
FDH5 A11
G_15690_068.eps FDH6 A11
3104 313 6125.4 020306 FDH8 B11
FDH9 B11
1 2 3 4 5 6 7 8 9 10 11 12 IDE0 D10
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 104
Layout Audio Panel (Top Side) Layout Audio Panel (Bottom Side)
2D00 B2 2D17 A2 2D35 A1 2DE0 B1 3D09 B2 3D31 B1 3D69 A2 3DF5 B3 3DG9 B3 7D06 A2 7DF0 A3 9D14 A2
2D01 B2 2D18 A2 2D37 A1 2DF0 A3 3D10 B2 3D32 B1 3D70 A1 3DF6 B3 3DH0 B3 7D07 A2 7DF1 A3 9D15 A1
2D02 A2 2D19 A2 2D39 A1 2DF2 A3 3D11 A2 3D33 A2 3DD0 B1 3DF7 A3 3DH1 B3 7D08 A2 7DF2 B3 9D24 B3
2D03 B2 2D20 A1 2D40 A1 2DF3 B3 3D12 A2 3D34 A2 3DD1 B1 3DF8 A3 3DH2 B3 7D09 B2 7DF3 B3 9D29 B2
2D04 B2 2D21 B2 2D41 A1 2DF4 B1 3D13 A2 3D35 A1 3DD2 B1 3DF9 B3 3DH3 B2 7D10 A3 7DF4 B3 9DD1 B1
2D05 B2 2D25 A2 2D43 B2 2DF6 A1 3D14 B2 3D36 A2 3DD3 B3 3DG0 B3 3DH4 B3 7D12 A2 7DF5 B3 9DD2 B3
2D07 A3 2D26 A2 2D44 B2 2DF9 A1 3D16 A2 3D37 A2 3DD4 B3 3DG1 B3 3DH5 B3 7D30 B1 7DF6 B3 9DD3 B1
2D08 A3 2D27 A2 2D45 A2 3999 A3 3D17 A2 3D38 A2 3DD5 B3 3DG2 B3 3DH6 B3 7D31 B1 7DF7 A3 9DF0 B2
2D09 A3 2D28 A2 2D46 A2 3D01 B2 3D18 A3 3D39 A2 3DD7 B1 3DG3 B3 3DH7 B3 7D32 A1 7DF8 B3
2D10 A2 2D29 A2 2D47 A2 3D02 B2 3D19 A2 3D41 A2 3DF0 B1 3DG4 A3 6DF0 B3 7D33 A1 7DF9 B3
0002 A3 1M52 B3 2D38 A3 3D40 A3 5D05 B3 5D27 B3 9D09 B2 9D18 A2 9D23 A2 9DD4 A3 2D11 A2 2D30 A2 2DD1 A3 3D05 B2 3D20 A2 3D42 A1 3DF1 B2 3DG5 B3 6DF1 B3 7D34 A1 7DH0 B2
1735 A3 2D06 A1 3D03 A2 5D00 A1 5D06 B2 9D01 B1 9D11 B1 9D20 B3 9D27 B3 2D12 A3 2D32 B1 2DD2 B3 3D06 A2 3D26 A2 3D43 A1 3DF2 A3 3DG6 B3 6DF2 B1 7D35 A1 9D03 B3
1736 A2 2D13 A1 3D15 B2 5D01 B1 5D25 A3 9D02 B1 9D16 B2 9D21 A2 9D30 B2 2D14 A3 2D33 A1 2DD4 B3 3D07 B2 3D27 A2 3D46 A2 3DF3 A3 3DG7 B3 7D00 A2 7D37 A2 9D04 B3
1M02 A3 2D31 A3 3D28 A3 5D02 B2 5D26 B3 9D07 B2 9D17 A2 9D22 B2 9D31 B1 2D16 A2 2D34 A1 2DD8 B2 3D08 A2 3D30 B1 3D48 A1 3DF4 B3 3DG8 B3 7D05 B2 7DD0 B1 9D05 B3
G_15690_069.eps G_15690_070.eps
3104 313 6125.4 020306 3104 313 6125.4 020306
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 105
D 1001 B2
1002-1 B2
PDZ6.8-B
1002-2 C2
1007
6900
3902
2901
220n
RES
1002-3 C2
75R
6901 1003 D3
1004 C3
A I106 PDZ6.8-B A 1005 B3
2 I113 1006 B3
C I100
9901 1007 A3
SVHS IN 4 I102 0936 1M36 1008 E3
Y/CVBS
PDZ6.8-B
5 1 1
1009 F4
6902
3 Y-CVBS-FRONT-IN 2 2
3 3 1010 E2
I104
1M36 A7
1006
3904
2902
220n
RES
C-FRONT-IN
75R
1 4 4
9902
I108 5 5 2901 A5
YKF51-5564 L-FRONT-IN 6 6 2902 B5
PDZ6.8-B
1001 FRONT-DETECT 7 7
I105 2903 C5
6903
R-FRONT-IN 8 8
9 9 2904 D5
HEADPH-L 10 10 2905 F4
B 3905
11 11 B 2906 F5
1005
YKC21-5617 HEADPH-R 2907 C4
B11B-PH-K
Headph_gnd
1002-1 2K2 I101 B11B-EH-A 2908 D4
CVBS 1 3902 A4
2 I103
(YELLOW)
3904 B4
3905 B4
3906 C4
1002-2 I114 3906 3907 C4
YKC21-5617 (WHITE) 3908 D4
1K0
4 5 3909 D4
PDZ6.8-B
LEFT
6904
3910 E5
100p
1004
2907
680p
2903
3907
6
33K
C C 3911 F3
3912 F5
I121 3999 E7
Audio_in_gnd 6900 A3
PDZ6.8-B
6905
1002-3 6901 A4
YKC21-5617 (RED)
I120 6902 A3
9904
7 8
6903 B3
RIGHT Audio_in_gnd Audio_in_gnd Audio_in_gnd Audio_in_gnd 6904 C3
9 Audio_in_gnd 6905 C3
Audio_in_gnd
I115 3908 I107 6906 D3
6907 D3
Audio_in_gnd 1K0 6908 F3
PDZ6.8-B
D I119
D 6909 F3
1003
6906
9903
100p
2904
6910 F5
2908
680p
3909
33K
6911 F5
I122
Headph_gnd 9900 A5
9901 A4
PDZ6.8-B
Audio_in_gnd 9902 B3
6907
Audio_in_gnd F101 E7
I100 A5
F100 3999 F101
I101 B5
E Headph_gnd 1K0 E I102 A6
I116 HP-DETECT 3910 I103 B5
1010 5
HEADPHONE 4
I104 A2
3K9 I105 B2
2 Headph_gnd I117 I109 LEFT I106 A4
3 I107 D5
7 I118 I108 B4
RIGHT I110
8
1
I109 E4
YKB21-5101A I110 F5
PDZ6.8-B
PDZ6.8-B
I111 A5
1000
6908
1009
6910
2905
2906
3911
3912
I112 A3
33n
33n
10K
10K
Headph_gnd
F Headph_gnd I123 I124 F I113 A3
I114 C3
I115 D3
PDZ6.8-B
PDZ6.8-B
6911
G_15990_071.eps
3104 313 6123.2 080506
G_15990_072.eps
3104 313 6123.2 080506
E_06532_012.eps
131004
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 107
D
1001 B1
1002-1 B2
I117 E3
I118 E4
PDZ6.8-B
1002-2 C2 I119 F6
1007
6900
3902
2901
220n
RES
75R
6901 1002-3 C2 I120 E6
1003 D3 I121 C3
1004 C3 I122 D3
A I106 PDZ6.8-B
A 1005 C6 I123 F3
2 I113 I100
C 9901 1006 A3 I124 F4
SVHS IN 4 I102 0936 1M36 1007 A3
Y/CVBS
PDZ6.8-B
5 1 1 1008 E3
6902
Y-CVBS-FRONT-IN 2 2
3 1009 F4
I104 3 3
1010 E2
1006
3904
2902
220n
RES
C-FRONT-IN
75R
1 4 4
5 5 1011 C7
YKF51-5564 I108
L-FRONT-IN 6 6 1012 B2
PDZ6.8-B
1001
I105
FRONT-DETECT 7 7 1H01 C8
6903
R-FRONT-IN 8 8 1M36 A7
9 9
HEADPH-L 10 10
2901 A5
11 11 2902 A4
B B 2903 C4
1012
1002-1 HEADPH-R
HP-GND B11B-EH-A B11B-PH-K 2904 D4
CVBS 3905 2905 F3
1 2
(YELLOW) 2906 F5
2K2 I101
2907 C4
2908 D4
I114 3906 3902 A4
1002-2 3904 A4
4 5
1K0 I103 3905 B4
AUDIO LEFT
PDZ6.8-B
F102 5001 F103 3906 C4
6904
(WHITE)
100p
3907 C4
1004
2907
680p
2903
3907
6
33K
220R
3908 D4
C C
1011
I121 3909 D4
A_GND 3910 E5
PDZ6.8-B
3911 F3
6905
1005 1H01
USB 1 F104 1
3912 F5
1002-3 GND_U
2 2 TO 3999 F1
7 8 CONNECTOR
AUDIO RIGHT 3 3 SSB 5001 C7
4 F105 4 6900 A3
9 6 5 5 6
(RED)
A_GND 6901 A4
3908 I107
292303-4 292303-4 6902 A3
A_GND I115 1K0
F106 6903 B3
PDZ6.8-B
6904 C3
1003
6906
D D 6905 C3
100p
2904
2908
680p
3909
33K
GND_U GND_U 6906 D3
I122 6907 D3
6908 F3
PDZ6.8-B
6909 F3
6907
6910 F4
6911 F4
9900 A4
9901 A4
A_GND 9903 F6
9904 F6
1008 F100 F1
E 1010 5
I116 HP-DETECT 3910
E F101 F1
F102 C7
4
3K9 F103 C7
2
HP-GND I117 I109 LEFT F104 C7
HEADPHONE F105 D7
3
7 I118 I120 F106 D6
RIGHT I110
8 9904 I100 A4
1
I101 B5
YKB21-5101A
PDZ6.8-B
PDZ6.8-B
I102 A6
1000
6908
1009
6910
A_GND I103 C5
2905
2906
3911
3912
33n
33n
10K
10K
I104 A2
I105 B2
F I123 I124
I119
9903
F I106 A3
PDZ6.8-B
PDZ6.8-B
6911
I108 B3
1K0
I109 E4
HP-GND I110 F5
I111 A5
G_15960_147.eps
3104 313 6141.2 HP-GND 040406
I112 A2
I113 A2
I114 C3
1 2 3 4 5 6 7 8
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 108
Layout Side I/O Panel (Entry & Step) (Top Side) Layout Side I/O Panel (Entry & Step) (Bottom Side)
2901 A1 2906 A1 3905 A1 3910 A1 6900 A1 6905 A1 6910 A1 9904 A1
0936 A2 1001 A2 1002 A2 1005 A1 1010 A1 1H01 A1 1M36 A2 2902 A1 2907 A1 3906 A1 3911 A2 6901 A1 6906 A1 6911 A1
2903 A1 2908 A1 3907 A1 3912 A1 6902 A1 6907 A1 9900 A1
2904 A1 3902 A1 3908 A1 3999 A2 6903 A1 6908 A2 9901 A1
2905 A2 3904 A1 3909 A1 5001 A2 6904 A1 6909 A2 9903 A1
G_15960_148.eps G_15960_149.eps
3104 313 6141.2 040406 3104 313 6141.2 040406
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 109
Control Board (Top B & Step) Layout Control Board (Top Side) Layout Control Board (Bot Side)
1701 A1 1704 A2 1M01 A4 3004 C1 3007 C1 3999 C4 9003 C2 F003 C4 I007 C1 I010 C2 I102 B1 I105 B3
G_15690_075.eps
020306
G_15690_076.eps
020306
1702 A1 1705 A1 3002 C2 3005 C1 3008 C1 9001 C3 F001 A4 F004 C4 I008 C1 I100 B1 I103 B2
1703 A2 1706 A3 3003 C2 3006 C1 3009 C2 9002 C1 F002 A4 I006 C1 I009 C2 I101 B1 I104 B2
1 2 3 4
E CONTROL BOARD E
1M01
F001
KEYBOARD
F002 1
2
A 3 A
SKQNAB
SKQNAB
SKQNAB
SKQNAB
SKQNAB
SKQNAB
1701
1702
1705
1704
CHANNEL+ 1703
1706
CHANNEL-
VOLUME-
VOLUME+
MENU
ON / OFF
B I100 I101 I102 I103 I104 I105 B
3005
3004
3002
3006
3003
* * * * *
I006 I007 I008 I009 I010
F003 F004
C 3999
C
9002
3007
3008
3009
9003
9001
10K
* * * * * *
D D
G_15690_074.eps
3104 313 6135.2 060306
1 2 3 4
Control Board (Entry) Layout Control Board (Top Side) Layout Control Board (Bot Side)
1701 A1 1704 A2 1M01 A4 3004 C1 3007 C1 3999 C4 9003 C2 F003 C4 I007 C1 I010 C2 I102 B1 I105 B3
G_15950_018.eps
040406
G_15950_019.eps
040406
1702 A1 1705 A1 3002 C2 3005 C1 3008 C1 9001 C3 F001 A4 F004 C4 I008 C1 I100 B1 I103 B2
1703 A2 1706 A3 3003 C2 3006 C1 3009 C2 9002 C1 F002 A4 I006 C1 I009 C2 I101 B1 I104 B2
1 2 3 4
E CONTROL BOARD E
1M01
F001
KEYBOARD
F002 1
2
A 3 A
SKQNAB
SKQNAB
SKQNAB
SKQNAB
SKQNAB
SKQNAB
1701
1702
1705
1704
CHANNEL+ 1703
1706
CHANNEL-
VOLUME-
VOLUME+
MENU
ON / OFF
B I100 I101 I102 I103 I104 I105 B
3005
3004
3002
3006
3003
* * * * *
I006 I007 I008 I009 I010
F003 F004
C 3999
C
9002
3007
3008
3009
9003
9001
10K
* * * *
D D
G_15950_017.eps
3104 313 6129.1 040406
1 2 3 4
J LED PANEL J
1M20 B1
2040 G3
2070 G4
3040 F3
3041 G3
A A 3042 F3
3051 C7
3053 D6
3055 C7
3058 C7
1M21
F006 3059 E6
1 LIGHT-SENSOR
2 F005
3061 C5
RC
TO 3
4 F004 LED2 "GREEN" "RED"
3063 D3
F010 3065 C4
SSB 5
6
+5V2-STBY F009
LED1 3068 C5
B B
+5V2-STBY
8
+5V2-STBY
+5V2-STBY
7
+5V2-STBY
F008 3069 E4
3071 G4
3072 G5
3074 G7
3077 G5
3078 G7
3079 G6
330R
330R
3065
3061
3055
3051
10K
10K
3999 D2
6051-1 D5
6051-2 D8
C I010 I011 I013 I012
C 7051 D7
7052 C7
7062 7052 7061 D4
BC857B BC857B 7062 C5
3068 3058 7070 G6
9120
9121
TLMV3100-GS08
TLMV3100-GS08
I017 I014
9063 * 9121 C2
2
9053 *
3
6051-1
6051-2
GREEN RED F004 B2
F005 B2
9065 *
1
7061
9055 *
7051 F006 B2
3063
3053
10K
10K
BC847BW BC847BW
I001 3999 I002 F008 B1
F009 B2
3069
3059
10K
10K
10K
F010 B2
I001 D2
I002 D2
I010 C1
E E
LED1
LED2
I011 C2
I012 C8
I013 C5
RC
LIGHT-SENSOR
I014 D6
+5V2-STBY
I015 C7
I016 C4
I017 D4
I018 D5
I019 D7
330R
3040
I020 G7
F F I021 G6
+5V2-STBY
+5V2-STBY
+5V2-STBY
I022 I022 F3
I023 G5
G_15690_074.eps
3042
6K8
7070
1040 020306 TEMT6000-GS08
TSOP6136TT
3 I021
VS 7071
3078 *
BC847BW
100K
4
OUT
1
GND1 3072
G 2
I023 I020 G
100u 16V
GND2 10K
3041
2040
10K
100u 16V
2070
3071
3077
3079
3074
4M7
33K
10K
10K
G_15690_077.eps
3104 313 6101.4 020306
1 2 3 4 5 6 7 8 9
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 112
G_15690_078.eps
3104 313 6101.4 020306
G_15690_079.eps
3104 313 6101.4 020306
E_06532_012.eps
131004
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 113
STATUS-POWER
LED1
TO 1M20 2071 G12 F016 B3
1 F011 3011
"BLUE" or
+5V2-STBY
COM-SND 3011 A4 F017 B3
2
3 100R 3030 G4 F018 B2
+8V
SSB 4
JL2.x / LC4.x 5
6
F012
F015
9016
9017
LED1
RC
"GREEN" 3031 G5
3032 G5
F021 C3
F038 B12
OR 3033 G5 F039 B12
+5V2-STBY
TO 1M20 7 F017
3034 G6 F083 D3
9120
9121
8 LIGHT-SENSOR
9 F013 3035 G6 F084 D3
+8V
10 +8V 3036 G7 F086 E3
330R
560R
(RES)
3051
3052
EXTERNALS 11 F014 3037 G7 F089 E3
9064
FTx2.x / Bx2.x 12 3040 F9 I010 F2
B 13 14
F016
9012 LED2 B 3041 G9 I011 G2
F018 F038 3999 F039 3042 F9 I012 E3
330R
560R
3061
3062
I053 3051 B8 I013 E4
+5V2-STBY 10K 3052 B8 I026 F12
9065
SML512BC4T
3053 C8 I033 G4
1
OPT_LED
3054 C8 I037 G7
3055 C8 I038 G6
6051
I062
3056 D6 I039 G4
2
9053 3061 B6 I040 G5
7062 3062 B6 I041 G9
TO 1M01 7051 I065
BC857B BC847BW 3063 D5 I042 G9
1M01
C C 3064 D5 I043 F9
9011
9052
1 F021 3070 G11 I044 F9
KEYBOARD
CONTROL 2 3071 F12 I045 F9
3 I052 3072 G13 I046 E9
BOARD 4 5 I095
3073 G13 I047 G4
100n
SML512BC4T
2014
100R
3053
3054
3055
3074 F13 I048 G5
10K
10K
6060
3075 F14 I049 G7
(RES) 3076 G14 I051 D8
I063
9063 3077 G12 I052 C8
I061 7061
3078 G11 I053 B9
BC847BW 7052 3091 G2 I054 D7
(RES)
100R
3063
3064
9062
10K
BC847BW 3092 F2 I061 D6
9066
D D 3093 F3 I062 C6
9054
3094 F2 I063 D7
+5V2-STBY 9083 3096 G3 I064 D5
I054
(RES)
3056
9056
I051 3999 B12 I065 C9
10K
I064
0345 6030 G4 I071 F11
F083
9110 9111 LIGHT-SENSOR
TO 0345 9112
1
F084 9113
6031 G4 I072 F14
2 KEYBOARD
9114 I012 9115 RC 6051 C8 I073 G12
3
LED1
LED1
LED2
9116 F086 9117 I013 BLACKLIGHT-TC 6060 C6 I074 G12
4 9081
TOP CONTROL 9118 LED1 6070 G11 I075 F12
5 9082 F089
9119 LED2 7030 G6 I076 F13
6
7 8 7031 G7 I093 F2
RC
LIGHT-SENSOR
LIGHT-SENSOR
+5V2-STBY
7032 G4 I094 F3
E E 7051 C8 I095 C6
7052 D8
7061 D6
I046 7062 C6
+5V2-STBY
7070-1 F12
+5V2-STBY
330R
7070-2 G13
3040
7092 F2
2070 I026 9011 C6
I044 9012 B4
3092
10K
470n 9015 A4
I094
+5V2-STBY
+5V2-STBY
9016 A4
+5V2-STBY
9041
9043
9122
9070
F F 9017 A4
100u 16V
3042
2040
6K8
I010 3094 I093 4M7 +8V 10K 9031 G4
3093
10K
COM-SND 7092
BC847BW 9040 G9
10K 1040 I043 9041 F9
4
9071
VS I045 I071
8
I075 2 5 I076
9042 G9
"LED DIMMING" OUT
1 7 3075
9043 F9
6070
LM358P
TEMD5000
3030
3035
3036
3037
3 6
2R2
2R2
4K7
4K7
9052 C9
8
7070-1 7070-2 4K7
+8V LM358P
4
GND 9053 C8
TSOP34836YA1 I042 9054 D9
I073 +8V 3073 9056 D7
9093
3041
9031
10K
I038 I049 I074
3034
9040
9042
I011 3096 I037 3K3 9062 D7
3076
3K3
STATUS-POWER
10u 16V
I039 6030 I047 3031 I040 3033 I048 1K0 9063 D6
3078
9072
3070
2071
3077
3072
2M2
4M7
G G
3K3
1K0
10K BC857BW BCP53
7030 7031 9064 B7
3091
10K
I041
2030
1 2 3 4 5 6 7 8 9 10 11 12 13 14
Circuit Diagrams and PWB Layouts BJ2.4U/BJ2.5U PA 7. 114
Layout LED Panel (Entry) (Top Side) Layout LED Panel (Entry) (Bottom Side)
1040 -- 0345 --
G_15950_024.eps
050406
G_15950_025.eps
050406
3031 -- 1M01 --
3032 -- 1M20 --
3033 -- 2014 --
3055 -- 2030 --
3056 -- 2040 --
3070 -- 2070 --
6030 -- 2071 --
6031 -- 3011 --
6051 -- 3030 --
6060 -- 3034 --
6070 -- 3035 --
7030 -- 3036 --
7031 -- 3037 --
7052 -- 3040 --
7062 -- 3041 --
9011 -- 3042 --
9031 -- 3051 --
9054 -- 3052 --
9056 -- 3053 --
9066 -- 3054 --
9110 -- 3061 --
9112 -- 3062 --
9114 -- 3063 --
9116 -- 3064 --
9118 -- 3071 --
9119 -- 3072 --
9120 -- 3073 --
3074 --
3075 --
3076 --
3077 --
3078 --
3091 --
3092 --
3093 --
3094 --
3096 --
3999 --
7032 --
7051 --
7061 --
7070 --
7092 --
9012 --
9015 --
9016 --
9017 --
9040 --
9041 --
9042 --
9043 --
9052 --
9053 --
9062 --
9063 --
9064 --
9065 --
9070 --
9071 --
9072 --
9081 --
9082 --
9083 --
9093 --
3104 313 6074.3
8. Alignments
Index of this chapter: With the software alignments of the Service Alignment Mode
8.1 General Alignment Conditions (SAM), “Tuner AGC” and the “Whitepoint” settings can be
8.2 Hardware Alignments aligned.
8.3 Software Alignments To store the data:
8.4 Option Settings • Press OK on the RC before the cursor in moved to the left!
• In main menu, select “Store” and press OK on the RC.
8.4.1 Introduction
Notes:
• After changing the option(s), save them with the STORE
command.
• The new option setting is only active after the TV is
switched "off" and "on" again with the Mains switch (the
NVM is then read again).
Alignments BJ2.4U/BJ2.5U PA 8. EN 117
Select this sub menu to set all options at once (expressed in The first line (group 1) indicates hardware options 1 to 4, the
two long strings of numbers). second line (group 2) indicates software options 5 to 8.
An option number (or "option byte") represents a number of Every 5-digit number represents 16 bits (so the maximum value
different options. When you change these numbers directly, will be 65536 if all options are set).
you can set all options very quickly. All options are controlled When all the correct options are set, the sum of the decimal
via eight option numbers. values of each Option Byte (OB) will give the option number.
When the NVM is replaced, all options will require resetting. To See next table for the option overview.
be certain that the factory settings are reproduced exactly, you
must set both option number lines. You can find the correct
option numbers on a sticker inside the TV set.
Byte Bit (dec. value) Subject Options Settings (in decimal values) Remarks
1 0 (1) Video Repro Picture Processing 0= No Spider, 1= Spider Spider availability, influences,
digital options.
1 (2)
2 (4)
3 (8) Comb Filter 0= None, 8= 2D Comb (Columbus without DRAM),
16= 3D Comb (Columbus with DRAM)
4 (16)
5 (32) Ambient Light 0= None, 32=Ambi-light Stereo, 64= Ambi-light Mono
6 (64)
7 (128)
8 (256) Dual Screen 0= None, 256= One Tuner DS, 512= Two Tuner DS
9 (512)
10 (1024) MOP 0= Off, 1024= On Matrix Output Processor (or EBILD)
11 (2048) JOP 0= Off, 2048= On Jaguar Output Processor (or EBILD)
Reserved for future use
12 (4096) POD 0= Off, 4096= On
13 (8192) n.a.
14 (16384) n.a.
15 (32768) n.a.
2 0 (1) Sound Repro Acoustic System (Cabinet) 0= None, 1= Entry_ ME5_5W, 2= Entry_ME5_15W, 3= (Soft)Wrap, 4= Top, Cabinet design, used for setting dy-
5= Entry+, 15= Others namic audio parameters.
1 (2)
2 (4)
3 (8)
4 (16) Aux Headphone Sound 0= Off, 16= On Dual AC3 sound in Aux available.
5 (32) n.a.
6 (64) n.a.
7 (128) n.a.
8 (256) n.a.
9 (512) Sub woofer Internal 0= Not Present, 512= Present
10 (1024) Centre Mode Support 0= Not Supported, 1024= Supported
11 (2048) n.a.
12 (4096) n.a.
13 (8192) n.a.
14 (16384) n.a.
15 (32768) n.a.
3 0 (1) Source Select HDMI1 0= None, 1= With analog audio, 2= Without analog audio
1 (2)
2 (4) HDMI2 0= None, 4= With analog audio, 8= Without analog audio
3 (8)
4 (16) n.a.
5 (32) USB Version 0= None, 32= USB 1.1, 64= USB 2.0 + Card reader USB support.
6 (64)
7 (128) IEEE1394 0= Not Present, 128= Present
8 (256) Ethernet 0= LAN not present, 256= LAN present
9 (512) n.a.
10 (1024) S/PDIF Inputs 0= None, 1024= 1 Connector, 2048= 2 Connectors
11 (2048)
12 (4096) LCOS I/O 0= Not Present, 4096= Present
13 (8192) n.a.
14 (16384) n.a.
15 (32768) n.a.
4 0 (1) Region Region 0= EU, 1= AP-P, 2= AP-N, 3= US, 4= Latam
1 (2)
2 (4)
3 (8) Interconnect China IF 0= Off, 8= On
4 (16) Alternative Tuner 0= Philips, 16= Alps Tuner make.
5 (32) Tuner Type 0= TD1336s (B-Chassis US), 32= TD1331(J-Chassis US), Tuner type
64= UV1318 (Analogue EU), 96= TD1316 (Hybrid EU) (B-chassis US is e.g "BP2.3U").
6 (64)
7 (128) Source Select n.a.
8 (256) AV1 0= CVBS/RGB, 256= CVBS/YC/LR, 512= CVBS/YC/YPbPr/HV/LR Input type.
9 (512)
10 (1024) AV2 0= CVBS/YC/RGB/P50, 1024= CVBS/YC/LR Input type.
11 (2048)
12 (4096) AV3 0= Not Available, 4096= CVBS, 8192= YPbPr Input type.
13 (8192)
14 (16384) AV4 0= Not Available, 16384= YPbPr Input type.
15 (32768)
Alignments BJ2.4U/BJ2.5U PA 8. EN 119
Byte Bit (dec. value) Subject Options Settings (in decimal values) Remarks
5 0 (1) Display Screen 000 (0000)= 42-inch PDP (SDI) HD V3, 001 (0256)= 50-inch PDP (SDI) HD V3, Screen size, type, and resolution.
002 (0512)= 42-inch PDP (FHP) ALiS, 003 (0768)= 30-inch LCD (LPL),
1 (2) 004 (1024)= 37-inch LCD (LPL), 005 (1280)= 42-inch LCD (LPL),
2 (4) 006 (1536)= 32-inch LCD (Sharp), 007 (1792)= 42-inch PDP (SDI) SD,
008 (2048)= 37-inch PDP (FHP) ALiS, 009 (2304)= Reserved,
3 (8) 010 (2560)= 30-inch LCD (AUO), 011 (2816)= 32-inch LCD (LPL),
4 (16) 012 (3072)= 32-inch LCD (AUO), 013 (3328)= 37-inch LCD (Sharp),
014 (3584)= 42-inch LCD (LPL) HD, 015 (3840)= 37-inch PDP (SDI) SD,
5 (32) 016 (4096)= 37-inch PDP (FHP) ALiS, 017 (4352)= 42-inch PDP (FHP) ALiS,
018 (4608)= 55-inch PDP (FHP), 019 (4864)= Reserved,
6 (64)
020 (5120)= Reserved, 021 (5376)= 26-inch LCD (LPL),
7 (128) 022 (5632)= 32-inch LCD (LPL) scan. BL, 023 (5888)= 42-inch PDP (LG) SD,
024 (6144)= 42-inch PDP (SDI) SD V4, 025 (6144)= 42-inch PDP (SDI) HD V4,
026 (6400)= 42-inch PDP (FHP) HD A2, 027 (6656)= 50-inch PDP (SDI) HD V4,
028 (6912)= 37-inch LCD (Sharp) HD
8 (256) n.a.
9 (512) n.a.
10 (1024) Dimming Backlight 0= Off, 1024= On
11 (2048) Scanning Backlight 0= Off, 2048= On
12 (4096) n.a.
13 (8192) n.a.
14 (16384) n.a.
15 (32768) n.a.
6 0 (1) Miscellaneous Monitor 0= Off, 2= On Reserved for future use
1 (2) n.a.
2 (4) Stand Alone 0= Off, 4= On Reserved for future use
3 (8) n.a.
4 (16) n.a.
5 (32) n.a.
6 (64) Proximity Sensor 0= Off, 64= On
7 (128) n.a.
8 (256) Touch Pad 0= Off, 256= On Reserved for future use
9 (512) n.a.
10 (1024) n.a.
11 (2048) n.a.
12 (4096) n.a.
13 (8192) n.a.
14 (16384) n.a.
15 (32768) n.a.
7 0 (1) Personal Self Learning TV 0= Off, 1= On Reserved for future use
1 (2) Auto Store Mode 0= None, 2= PDC/VPS, 4= TXT Page, 6= PDC/VPS/TXT Page Fixed to: "None" in the AP-N and
US versions.
2 (4)
3 (8) 2CS Korea 0= Off, 8= On, 16= Auto
4 (16)
5 (32) Picture Mute 0= Off, 32= On
6 (64) n.a.
7 (128) Virgin Mode 0= Off, 128= On
8 (256) Hotel Mode 0= Off, 256= On
9 (512) Content Browser 0= Not Present, 512= Present
10 (1024) Connected Planet 0= Off, 1024= Full Connected Planet + logo support
11 (2048)
12 (4096) n.a.
13 (8192) EPG 0= None, 8192= TXT Guide only, 16384= NextView 2C3, 24576 = NexTView 2
14 (16384)
15 (32768) TV Guide USA (Gemstar) 0= Off, 32768= On
8 0 (1) n.a. n.a.
1 (2) n.a. n.a.
2 (4) n.a. n.a.
3 (8) n.a. n.a.
4 (16) n.a. n.a.
5 (32) n.a. n.a.
6 (64) n.a. n.a.
7 (128) n.a. n.a.
8 (256) n.a. n.a.
9 (512) n.a. n.a.
10 (1024) n.a. n.a.
11 (2048) n.a. n.a.
12 (4096) n.a. n.a.
13 (8192) n.a. n.a.
14 (16384) n.a. n.a.
15 (32768) n.a. n.a.
EN 120 9. BJ2.4U/BJ2.5U PA Circuit Descriptions, Abbreviation List, and IC Data Sheets
USB LVDS
DISPLAY
INTERFACE
DC / DC & CONV SIGNAL PROCESSING SOURCE SELECTION
MPIF
RS232
POD
TUNER
I/O
G_15930_085.eps
200606
LVDS USB
SIGNAL PROCESSING
SOURCE SELECTION
DISPLAY INTERFACE DC/DC CONV.
2V5
SAW
1V2
RS232
AVIP
COLUMBUS STBY VIPER
CONTROLLER
POD
TUNER
SAW
I/O
DECODER
DEMODU- HDMI
LATOR RECEIVER
NAND
FLASH
(SET SW
SAW
XTAL + KEYS)
F_15400_010.eps
300505
9.2.1 Introduction • The +12V switch is activated when the POD-MODE signal
is "low".
• The rise time of the output voltage is set by components
The Main Power Supply is a buy-in module (it belongs to the
2U42, 3U43, and 3U95 at about 30 ms.
PDP), and therefore is a “black box” for Service. When
defective, a new panel must be ordered and after receipt, the • The switch "off" is fast, because there can be fault currents
that must be interrupted.
defective panel must be sent for repair.
• When the input voltage (+12VS) is higher than 15 V, the
This Power Supply delivers the following supply voltages to the
chassis: switch is disabled via circuit 6U12, 3U52, 3U53, 2U71, and
7U14-2.
• +12VS.
• +8V6.
• +5V2. 9.2.6 Internal Protection
• +5V.
• Provides a SUPPLY-FAULT signal (active "low"), when the
As the VIPER and many other ICs on the SSB require low output voltage of any DC/DC converter is out of its limits (±
supply voltages at high current (up to 3 A for the main 10% of the normal value). In such cases, the Stand-by
voltages), onboard DC/DC converters are implemented. Processor will immediately stop the supplies by sending a
The circuit on the SSP provides the 3.3 and 1.2 voltages. "high" control signal towards the external and internal
A DC/DC converter has the following advantages: supplies: ENABLE-xVx, POD-MODE, ON-MODE, and
• The DC/DC converter is directly on the SSB near the STAND-BY.
circuits that needs to be powered. Note: The SUPPLY-FAULT control signal is "low" when
• Some circuits on the SSB need high current by low voltage, any DC/DC converter is disabled by its control signal
so there is no risk to have power dips or voltage loss in (ENABLE-xVx) and +12VSW is present, therefore it is
connections between the PSU and the SSB panel. ignored during start-up!
• The internal protection works together with the output over-
9.2.2 Block Diagram voltage detector transistors 7U15-1, 7U15-2, 7U29-1, and
7U29-2.
+5V
8V6 +2V5D Introduction
+8V6 +5V2_STBY LINEAR +2V5D
ON-MODE
SWITCH
(Reserved) STABILISER The circuit used is a so-called "synchronous buck converter".
Some characteristics:
+12VS
+5V
12V +12VSW +2V5
+2V5
• Switching frequency: approx. 250 kHz.
SWITCH LINEAR
POD-MODE (Reserved) STABILISER • Efficiency: approx. 90%.
+12VSW
• Built-in output over-voltage and over-current protections
VTUN VSW 12V/1V2 12V/2V5 12V/3V3
• Soft start.
GENERATOR
(Reserved)
DC/DC CONV. DC/DC CONV. DC/DC CONV. • Software controlled “on/off” (via ENABLE line).
SUPPLY-FAULT
Block Diagram
VTUN +1V2 +2V5 +3V3
F_15400_004.eps TS1
ENABLE-1V2 ENABLE-2V5 ENABLE-3V3 280905
D S L1
Vin Vout
Figure 9-3 DC/DC converter block diagram
G
9.2.3 PSU Start-up Sequence FB TS2 D
PWM GENERATOR
C1
1. If the input voltage of the DC/DC converters is around 12 V & MOSFET DRIVER G
Voltage Booster
This circuit is build around capacitors 2U11 and 2U26, resistor
3U11, diodes 6U22 and 6U23, and transistor 7U07.
It generates the +18 V boost voltage on pin 4 of item 7U00, to
drive the "high-side" power MOS-FET 7U01. The voltage is
generated only during normal operation of the converter;
therefore, any drop in its value means an internal fault
condition, which is sensed by the internal protection circuit.
The AC component of the voltage on the source of transistor
7U01 is rectified by the diodes and added to the input voltage,
resulting into the boost voltage. The resistor 3U11 limits the
peak current through the rectifier diodes.
Over-current Detection
Over-current detection is done via components 3U07, 3U08,
3U82, 3U83, and 2U18 for the 3.3 V converter and 3U09, 3U10,
3U96, 3U97, and 2U12 for the 1.2 V converter.
Under-voltage Detection
There is an additional circuit (7U10 and 7U11) to switch "off"
the 3.3 V converter in case the +12VS drops below 9 V.
Service Tips
• When a power MOS-FET is found defective, replace the
other power MOS-FET and fuse 1U01 as well.
• For a normal operation of the converter, it is important to
check the switching frequency, the value of the boost
voltage, and the amplitude of the gate voltage of transistor
7U04 (it should be close to the boost voltage).
SSB
DC-DC DC-DC
12V/3.3V 12V/1.2V
(mA)
1.2V 15 Stdb uP
and 12 (PNX2015)
3.3V
stabilizers 1 Serial Flash
(mA) 0 0 45 0 0 0 0 0
LEDs + IR sensor
8
(outside SSB)
+12V switch
0
0 NXT2003
0
0 STV701
CAM
0
+2V5D stabilizer
0
0 Viper2
0
9 DDR
0 NAND Flash
0 Tuner
0 IF amplifier
0
PNX3000
0
0 HDMI
0
0 PNX2015
0
0 DDR
0 MOP
0 Ethernet
0 1394 Link
0 1394 Physical
0
USB 2.0
0
0
0
Audio + I/O
0
0
+12VSW +12VS +8V6 +5V2 +5V +3V3 +2V5D +2V5 +1V2
F_15400_006.eps
100505
Figure 9-5 Supply distribution: STANDBY Mode (mentioned values are indicative)
Circuit Descriptions, Abbreviation List, and IC Data Sheets BJ2.4U/BJ2.5U PA 9. EN 125
SSB
DC-DC DC-DC
12V/3.3V 12V/1.2V
(mA)
1.2V 30 Stdb uP
and 18 (PNX2015)
3.3V
stabilizers 10 Serial Flash
53
120 NXT2003
16
24 STV701
CAM
760
+2V5D stabilizer
190
85 Viper2
70
100 DDR
1 NAND Flash
0 Tuner
0 IF amplifier
200
PNX3000
50
28 HDMI
190
85 PNX2015
70
8 DDR
80 MOP
17 Ethernet
10 1394 Link
50 1394 Physical
130
USB 2.0
0
10
31
Audio + I/O
0
50
+12VSW +12VS +8V6 +5V2 +5V +3V3 +2V5D +2V5 +1V2
F_15400_007.eps
100505
Figure 9-6 Supply distribution: POD STDBY Mode (mentioned values are indicative)
EN 126 9. BJ2.4U/BJ2.5U PA Circuit Descriptions, Abbreviation List, and IC Data Sheets
SSB
DC-DC DC-DC
12V/3.3V 12V/1.2V
(mA)
1.2V 30 Stdb uP
and 18 (PNX2015)
3.3V
stabilizers 10 Serial Flash
285
235 NXT2003
40
30 STV701
CAM
780
+2V5D stabilizer
1110
250 Viper2
180
250 DDR
30 NAND Flash
130 Tuner
34 IF amplifier
300
PNX3000
50
330 HDMI
1200
125 PNX2015
300
125 DDR
500 MOP
116 Ethernet
314
USB 2.0
1900
10
31
Audio + I/O
90
50
+12VSW +12VS +8V6 +5V2 +5V +3V3 +2V5D +2V5 +1V2
F_15400_008.eps
100505
9.3 Inputs drawn from the USB ports, the protection becomes active (=
"high").
9.3.1 USB During stand-by, when there is no +5V available (and VIPER is
not active), the USB port does not work. This is controlled by
the VIPER via the USB_BUS_PW line (see diagram B5A),
These chassis have different USB specifications:
which switches the 5V input to the outputs of IC7Q01.
• Top and step styling (chassis BJ2.5 and BJ2.4) features
USB2.0. This USB version is hosted by a separate IC
USB2.0
(7N00) which communicates with the VIPER via a PCI bus.
• Entry styling (chassis BJ2.5) features USB1.1. This USB
version is hosted directly by the VIPER.
Each USB port has four lines: POWER Cardreader USB 2.0
+5V
1. 5V (red). GND SUPPLY
2. D- (white).
3. D+ (green).
4. GND (black).
Card slot 0
media CF I, CFII, MD
USB 1.1 interface Card slot 1
VIPER MS, MSpro, SD,
MMC, SM, xD
USB 1.1 5V
HOST USB
2.0
EN
Current
OC limiter USB A
conn Card
Reader
overcurrent protec USB 2.0 slot A
enable 5V +5V
USB USB 2.0
tion D-
USB USB 2.0 D+
cable USB 2.0 GND
D+ 2.0
HUB
D-
overcurrent prote USB 2.0 slot B
enable 5V
USB 2.0
ction +5V
D-
D+
GND
F_15400_109.eps
180505
Introduction
5V
power Note: Text below is an excerpt from the ”HDMI Specification”
PCI cable that is issued by the HDMI founders (see http://www.hdmi.org).
Card
USB A Reader
conn This High-Definition Multimedia Interface is developed for
ISP1561 transmitting digital television audiovisual signals from DVD
USB
cable players, set-top boxes and other audiovisual sources to
Not used
television sets, projectors and other video displays.
USB 2.0 HDMI can carry high quality multi-channel audio data and can
HOST
carry all standard and high-definition consumer electronics
video formats. Content protection technology is available.
F_15400_108.eps HDMI can also carry control and status information in both
250505
directions.
Figure 9-8 USB configurations As shown in the HDMI block diagram, the HDMI connector
carries four differential pairs that make up the TMDS
USB1.1 (Transition Minimized Differential Signalling) data and clock
The USB1.1 is a hardware block in the VIPER. There are two channels. These channels are used to carry video, audio, and
USB ports. Each port has a D+ and D- line; this is the auxiliary data. In addition, HDMI carries a VESA DDC channel.
differential signal path for USB. There is also one over-current The DDC is used for configuration and status exchange
detect and power enable line that is used for both ports (these between a single source device and a single sink device.
lines are controlled by VIPER).
A tandem USB connector is mounted on the SSB, on which you
can connect two USB devices; one device will be the SCM
digital media card-reader. Only USB mass storage class device
is supported, so other USB devices (card-readers) have to be
compliant with this class.
The host (= SSB) needs to provide the power supply to the
attached devices (like memory cards or other USB devices).
Since it is not known what the customer will attach (e.g. a USB
hub with multiple USB devices), and these USB devices draw
current from the SSB, these supply lines must be protected
against over-current and/or too many connected devices.
This is controlled by the VIPER via the USB_OVERCUR line
(see diagram B5A): when more then 500 mA per channel is
EN 128 9. BJ2.4U/BJ2.5U PA Circuit Descriptions, Abbreviation List, and IC Data Sheets
Data Content
Figure 9-10 HDMI block diagram HSYNC
vertical blanking
45 lines
Control
Audio, video, and auxiliary data is transmitted across the three
Period Video
TMDS data channels. The video pixel clock is transmitted on V
S
Y Data
the TMDS clock channel and is used by the receiver as a N
C Period
frequency reference for data recovery on the three TMDS data
Video pixel rates can range from 25 MHz to 165 MHz. Video
formats with rates below 25 MHz (e.g. 13.5 MHz for 480i/ Figure 9-11 Typical video frame
NTSC) can be transmitted using a pixel-repetition scheme. The
video pixels can be encoded in either RGB, YCBCR 4:4:4, or A typical video frame is built up with the following info blocks:
YCBCR 4:2:2 formats. In all three cases, up to 24 bits per pixel • Control Period.
can be transferred. – Transmission of the pre-amble.
– Character synchronization.
In order to transmit audio and auxiliary data across the TMDS • Data Island Period.
channels, HDMI uses a packet structure. In order to attain the – Audio and auxiliary information are carried in packets
higher reliability required of audio and control data, this data is within a Data Island.
protected with a BCH error correction code and is encoded – HSYNC, VSYNC are also carried during Data Island
using a special error reduction coding to produce the 10-bit Period.
word that is transmitted. – Packet Types:
Basic audio functionality consists of a single IEC 60958 audio – Audio Sample.
stream at sample rates of 32 kHz, 44.1 kHz, or 48 kHz. This can – Audio Clock Recovery.
accommodate any normal stereo stream. Optionally, HDMI can – InfoFrame: Aux. Video IF, Audio IF, MPEG IF,
carry a single such stream at sample rates up to 192 kHz or vendor-defined IF.
from two to four such streams (3 to 8 audio channels) at sample • Video Data Period.
rates up to 96 kHz. HDMI can also carry IEC 61937 – Carries the pixels of an active video line.
compressed (e.g. surround-sound) stream at sample rates up – TMDS encoding.
to 192 kHz.
Data Islands: Audio Formats
The DDC is used by the source to read the sink’s Enhanced • All current CE audio formats can be transmitted.
Extended Display Identification Data (E-EDID) in order to • Supports compressed formats like:
discover the sink’s configuration and/or capabilities. – Dolby Digital.
– Dolby Digital EX (THX-EX).
HDMI is backward compatible with DVI (1.0). Compared with – DTS.
DVI, HDMI offers extra: – Etc.
• YUV 4:4:4 (3 x 8-bit) or 4:2:2 (up to 2 x 12-bit), where DVI • Supports uncompressed formats (“discrete” PCM audio):
offers only RGB 4:4:4 (3 x 8 bit). – Up to 8 channels, up to 192 kHz, up to 24 bits.
• Digital audio in CD quality (16-bit, 32/44.1/48 kHz), higher • CD-quality audio is always available, so the user will
quality available (8 channels, 192 kHz). always hear sound.
• Remote control via CEC bus (Consumer Electronics – 2 channel, 16 bit at 32 kHz (STB), 44.1kHz (CD), or 48
Control): allows user to control all HDMI devices with the kHz (DVD)
TV's remote control and menus.
• Smaller connector (SCART successor). Data Islands: InfoFrames (EIA/CEA-861B)
• Less cables: e.g. from 10 audio/9 video cables to 3 HDMI • Auxiliary Video Information (AVI):
cables. – Specifies active aspect ratio, colorimetric info, pixel
encoding, etc.
Implementation • Audio InfoFrame:
The IC used is the TDA9975 (triple 10-bit video converter – Describes audio stream, speaker/channel allocation,
interface), item 7B11 on the SSB. etc.
• Power supply: 3V3 and 1V8. • Source Product Info:
• Inputs:
Circuit Descriptions, Abbreviation List, and IC Data Sheets BJ2.4U/BJ2.5U PA 9. EN 129
1. The receiver receives the digital data stream. Copy Protection (CP)
2. The data flows into the Conditional Access Module, which • Every TV-set has its own unique Host-certificate (with
contains the content provider's unscrambling algorithms. Host-ID). These certificates are stored on a dedicated PC
3. This module verifies the existence of a smart card (POD) at the TV supplier.
that contains the subscriber's authorization code. • The CP-key is refreshed at the following times:
4. If the authorization code is accepted, the CAM – At the end of the authentication process.
unscrambles the data and returns the data to the receiver – Periodically at a rate set by max_key_session_period.
(if the code is not accepted, the data remains scrambled, – At every power cycle.
restricting access). – When initiated by the CA System.
5. The receiver then decodes the data and outputs it for – At every hard reset.
viewing. – At power-up, the POD checks the Auth-key to see if the
host is still the same, after this the re-authentication
takes place.
– During CP-refresh is the transport stream in the clear
(<1s)
EN 130 9. BJ2.4U/BJ2.5U PA Circuit Descriptions, Abbreviation List, and IC Data Sheets
– In-the-Clear channels.
• NTSC analog channels:
– 8-VSB modulation (3 bits/symbol). Figure 9-15 MPIF block diagram
– 54 - 806 MHz (UHF and VHF)
– 6 MHz bandwidth. 9.6.3 IF Processing
– Not via POD, but via MPIF.
– With VBI (Vertical Blanking Interval) signals for closed The MPIF is capable of demodulation of RF signals.
captioning.
Analogue Vision IF Processing
Out Of Band (OOB) Some specifications:
• Forward Data Channels (FDC): • Synchronous demodulation of the IF vision carrier.
– DQPSK modulation (2 bits/symbol). Selectable frequency and auto-calibration of the VCO
– 70 - 130 MHz. (Voltage controlled oscillator).
– 6 MHz bandwidth. • Group delay correction for BG system.
– Spaced between 6 MHz FAT and analog channels.
Circuit Descriptions, Abbreviation List, and IC Data Sheets BJ2.4U/BJ2.5U PA 9. EN 131
Jaguar system
tuner.
MPIF-
SCART1 out
• AGC gating for bad reception conditions.
Line out
Source Selection
Primary/
external crystal frequency as reference. The frequency setting Secondary
A/D datalink1
audio
for the various standards (33.4, 33.9, 38.0, 38.9, 45.75 and selector Secondary audio
A/D datalink2
58.75 MHz) is realized via the I2C bus.
The AFC output is generated by the digital control circuit of the SIF
switch
SIF
A/D datalink3
IF-PLL demodulator and can be read via the I2C bus. SIF
external
AUDIO
The AGC-detector operates on "top sync" or "top white" level. datalinks - video block
The MPIF IC has an integrated sound trap filter. The trap CVI1
CVI switch
Y
U
A/D
Y
Switch datalink1
CVI2 V
frequencies can be switched via the I2C-bus. A/D
YC_COMB
Also, a group delay correction filter is integrated. The filter can CVBS_IF
Primary
UV datalink2
CVBS1 Primary video
be switched between the PAL BG curve and a flat group delay CVBS2
video
selector
A/D
CVBS/YC3
response characteristic. This has the advantage that in multi- CVBS/YC4
Below the main functions and features of the main blocks in the Audio Selectors
MPIF for video and audio are explained. The primary audio selector is selecting a signal from five
external stereo inputs and one stereo input that handles two
mono signals (AM internal and AM external). The AM internal
signal is demodulated in the IF part and is internally routed, so
not available as external input. Additionally, the AM internal
signal is available on the left channel whereas the AM external
signal is available on the right channel.
The secondary audio selector is selecting a signal from the
same range as the primary audio selector; the second audio
selector can work in stereo or mono mode. In case the stereo
mode is selected, it is alike the primary audio selector. In mono
mode, the input stereo signal L+R is transformed into a mono
signal (L+R)/2 and put on the left channel of the stereo output.
When the stereo input (handling two mono signals) is selected
and the selector works in mono mode, the AMint and AMext
can be swapped on the primary as well as on the secondary
audio channel. It is also possible to digitize the mono + AM on
the secondary audio channel.
Further it is possible to select the AM signal on the analog
audio outputs independently from the AM signal that is selected
for the secondary (digital) audio channel.
Three audio output selectors are responsible for the content of
the Line, SCART1, and SCART2 outputs. These selectors
EN 132 9. BJ2.4U/BJ2.5U PA Circuit Descriptions, Abbreviation List, and IC Data Sheets
allow selection of the output out of five L+R inputs, two mono In the normal mode the data links can handle up to three video
signals (AM internal or AM external) and two externally signals: CVBS or YC signal from the primary video selector,
connected DSND streams. CVI 1fH source selected on the CVI switch, and CVBS signal
from the secondary video selector.
SIF Switching
SIF (Sound Intermediate Frequency) switching allows YUV 2fH Mode
selecting between internal or external SIF signals. In the YUV 2fH mode (higher bandwidth signal) the data links
content is as follows:
AD Converters
The second part of the MPIF is responsible for conversion of Table 9-3 YUV 2fH mode
the chosen signals into digital signals and grouping them into
three data streams. Each data stream handles both video and Data Stream Video Audio
audio. These data streams are fed into three data links and
1 Y 2fH (L+R) primary
send via I2D to the outside.
2 UV 2fH (L+R) secondary
The MPIF contains four video ADCs for analog and digital 3 CVBS secondary SIF
video broadcast signals. The clock frequency for these ADCs Data link Mode bit: DM= 1
is either 27 MHz or 54 MHz. In some cases, two analog signals
are multiplexed at the input of one ADC. In these cases, the
The data link 1 can output only one of two input signals: the
clock frequency of the ADCs is 54 MHz, while the sample
frequency for each of the two signals is 27 MHz. output of the primary video selector or the Y output of the CVI
switch. Only one can be active at a moment, and that is
determined by the data link mode bit (DM). It means, that for
The sample frequency for standard 1fH video signals is 27
MHz. For the YUV channel the sample frequency of the U and data links working in YUV 2fH mode, the data link 1 carries the
Y component of the YUV 2fH signal, the data link 2 carries the
V components is half the sample frequency of the Y signal.
UV component, and the data link 3 contains the signal that is
For 2fH YPbPr or RGB input signals (for instance 480p or 1080i
ATSC signals), the frequency that is used to sample the YUV connected through the secondary video selector.
signals is twice as high as for 1fH signals. The sample
frequency is 54 MHz for Y and 27 MHz for U and V. 9.7 PNX2015
Due to the high sample frequency, two data links are needed
for transport of the video data to the digital video processor.
The functional blocks of the PNX2015 (item 7J00) are:
2
• Audio Video Input Processor (AVIP).
I D Data Link • 3D Comb Filter (COLUMBUS).
The digital interface between MPIF and AVIP is called Data • High Definition MPEG Decoder (HD Subsystem).
Link (or I2D Link). This is a serial interface that transfers the • LVDS transmitter.
data from MPIF to AVIP over three Data Link interfaces. Each • Stand-by Processor for low-power control.
Data Link has a data signal and a strobe signal. The
synchronization information is distributed over the data and the BLOCK DIAGRAM
strobe signal. To minimize EMC, both signal outputs are low
DLINK1
voltage differential swing signals, with a swing of about 300 D
L
I
N
K
VIDDEC DCU ITU
656
PNX2015
PNX3000-1 AUDIO
mV. SYNC DSP/DEMDEC
AVIP-1
Each Data Link has four lines, one differential pair for the data, COLUMBUS
DV1
PNX8550
and one differential pair for the strobe. The data rate is 594 DLINK2 D
L
I
N
VIDDEC DCU ITU
656
K COLMUX
Mbit/s. Each Data Link can carry two 27 MHz sampled video PNX3000-2
SYNC
AUDIO
DSP/DEMDEC
DV1MUX
memory
streams (or one 54 MHz sampled 2fH video stream) and two AVIP-2
controller
SYNC DV3
audio channels sampled at 6.75 MHz. PNX8550
DV4
direct 0-9
video VIP VO-1
DV5 DV3MUX
10-19
In the MPIF, the (video and audio) data to be transmitted is
HUB
multiplexed in an output register of 44 bits (including the 2 bit RX/TX 0-9 DV2
PNX8550 SOUTH PNX8550
sync information). The content of that 44 bits register is serial TUNNEL
VO-2
10-19
transmitted on one of the three data links. In the AVIP, the DV2MUX
HD SUBSYSTEM
9.8 PNX2015: AVIP The receiver block gets the serial data stream and converts it
to a parallel stream. This parallel data is fed to the "de-
9.8.1 Introduction multiplexer and formatter " block where the selected audio/
video stream is forwarded to the video and audio decoder for
further processing. This communication bus is completely
The AVIP (Audio Video Input Processor) receives the digital
digital and very difficult to monitor.
data via the I2D link (coming from MPIF). It reformats this data
and maps (synchronizes) the data to the clock of the AVIP.
The I2D link has the following characteristics.
Then a digital AGC is passed. After this, the video decoding is
• The data-link runs at 297 MHz / 594 Mbps.
performed in the VIDDEC-block of the AVIP. The decoded • The driver rise/fall time is around 200 ps.
video is sent to an output block, which formats the data to an
• The data-link uses differential signals.
ITU-656 compatible standard data stream.
The AVIP power supply is 1.2 V and 3.3 V. To ensure
synchronization of video streams processed across the VIPER VIDDEC (Video Decoder)
and PNX2015 devices, a 27 MHz is coming from the VIPER. Video Decoder
The AVIP is I2C driven.
Initialization of this IC begins with a hard reset (MIPS-RESET) Yyc
CVBS/Yyc
YUV
provided by the VIPER. Besides video decoding, the AVIP is Digital Multi
also used for decoding and presentation of all audio output Standard Decoder
Yuv/Cyc
Cyc (DMSD)
streams in the system. AGC
Yuv mux YUV
Uyuv Uyuv (Fast blank)
9.8.2 Block Diagrams Vyuv Vyuv
Sync FBL1
Below the main functions and features in the AVIP for video FBL1/Hsync1
FBL2/Hsync2 sync FBL2
and audio are given.
Vsync1
Vsync2 HVsync
E_14700_071.eps
021104
I2D1 CVBS/YC/YUV Cvbs_yyc
VIDDEC
Figure 9-20 VIDDEC block diagram
ITU-656
I2D2 ITU-656
I2D
The CVBS/YC/YUV signals (coming from the I2D receiver
DCU
I2D3 VBI bytes block) enter the DMSD block (Digital Multi Standard Decoder)
via the AGC (Automatic Gain Control) block. The multiplexer
SIF or L/R
L block (MUX) takes care of the correct output signal. The sync
DemDec Audio signals are processed in the sync block.
Processing
R
GP The VIDDEC has the following main functions:
• Multi standard color decoder.
• Automatic system recognition.
I2SIn E_14700_069.eps • Fully programmable static or automatic (AGC) for all
I2Sout 310505
analog video base band signals.
• AGC on sync amplitude in digital domain.
Figure 9-18 AVIP block diagram
• Selectable peak white control.
• AGC for chrominance (PAL and NTSC only).
Main AVIP function: • Programmable Luminance and Chrominance bandwidth
• I2D receiver. for CVBS and Y/C sources.
• Color decoding into ITU-601 compatible format (1fH/2fH). • Programmable clamp window for the selected video base
• Interface with 3D comb filter (called Columbus in this band signals.
chassis). • Digital PLL for synchronization on 2fH and ATSC
• VBI data capture via DCU (Teletext, CC, etc.). standards.
• ITU-656 formatting. • Horizontal (including 3-level sync for 2fH) and vertical sync
• Audio demodulation and decoding via DEMDEC. detection.
• Audio processing and D/A conversion. • Automatic detection of 50/60Hz ATSC field frequency.
• Adaptive 2/4-line delay comb filter for two-dimensional
I2D Receiver Chrominance/Luminance separation.
• Copy protected source detection according to MacroVision
I2D transmitter I2D AVIP
up to version 7.01
CVBSpri /YC/
Yyuv • Possibility of RGB insertion through fast blanking in CVBS
I2D I2D CVBSpri /Yyc
transmitter receiver input mode, not in Y/C.
v id e o d e m u lti p le x e r /
L1/R1
Yyuv / Cyc
fo r m a t te r
VAL1 UVyuv
CVBSsec
YUV/ UVyuv
I2D I2D VAL
VAL2
transmitter L2/R2 receiver
a u d i o d e m u lt i p le x e r /
L1/R1
f o r m a tt e r
VAL3
CVBSsec L2/R2
I2D I2D
transmitter SIF receiver SIF
E_14700_070.eps
300505
E_14700_072.eps
hardware DDEP (DemDec Easy Programming)
310505 control &
status reg.
control / status registers (XMEM)
The purpose of this block is to acquire digital data (containing Figure 9-23 DEMDEC block diagram
Teletext, Closed Captions, ...) from a CVBS/Y/C video input
source. It performs processing on the received data and
The demodulator and decoder (DEMDEC) is responsible for
provides the data to the ITU-656 formatter unit.
demodulating and decoding incoming SIF signals.
The decimator reduces the sample rate (from 27 MHz to 13.5
MHz) of the incoming digitized CVBS or Y data stream from the
The main features of the DEMDEC are:
I2D receiver. From the video input, the data slicer reconstructs
• Auto Standard Detection (ASD).
the transmitted bit stream and associated clock. The SERPAR
• DQPSK demodulation for different standards,
block converts the serial bits, coming from the data slicer, into
simultaneously with 1-channel demodulation.
parallel bytes. The packet processor performs data decoding
• NICAM decoding (B/G, I, D/K, and L standard).
and some error correction, assembles received bytes into
• Two-carrier multi standard FM demod. (B/G, D/K and M).
packet structure, and streams out the data to the ITU-656
• Optional AM demodulation for system L, simultaneously
formatter.
with NICAM.
The acquisition-timing block locks onto sync signals, and
• Identification A2 systems (B/G, D/K and M standard) with
provides timing information to the other blocks of the data
different identification time constants.
capture unit.
• FM pilot carrier present detector.
• BTSC MPX decoder.
ITU656 Output Formatter • SAP decoder.
ITU656 Formatter