SOC designs in the energy conscious era

Bangalore, India August 11-August 13 ISBN: 978-1-60558-109-5

Srikanth Jadcherla, Synopsys Inc., Mountain View, CA, USA

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1145/1393921.1394001 Many of us are aware of the impact of mobile and consumer era SOCs on Low Power Design. What is less known is the impact of proliferation in volumes unimaginable ever before and how that impacts already scarce energy resources in various parts of the world. Today, the energy consumption of installed semiconductors is responsible for more CO2 emissions than the entire airlines industry. Ironically, this problematic trend is being noticed not by the semiconductor industry itself, but by governments worldwide. Further, technology migration does not help combat this problem, it only makes it worse - leading to unprecedented regulatory pressures on the semiconductor industry. In parallel to this trend, lies the fact that semiconductor proliferation in developing economies comes with challenges in power generation and distribution - a fact that is fundamentally being altered by the advent of solar power and Direct DC power supply. This trend is amply supplemented by Power over Ethernet and Media convergence over Ethernet. All in all, the SOC/system of the future will look dramatically different in its architecture. How will all if these market forces impact the SOC designs of the next generation? How hard will it be to design and verify these SOCs? We try to identify these trends and their impact in this talk. Index Terms: energy efficiency, low power, regulations, soc design, soc verification, trends Citation: Srikanth Jadcherla, "SOC designs in the energy conscious era," islped, pp.305-306, Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08), 2008