LG LCD 32lw470s Chassis Ld12p

Internal Use Only
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LED LCD TV SERVICE MANUAL

CHASSIS : LD12P
MODEL : 32LW470S
CAUTION
32LW470S-ZB
BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL67002344 (1107-REV00)
Printed in Korea
CONTENTS
CONTENTS .............................................................................................. 2 PRODUCT SAFETY ................................................................................. 3 SPECIFICATION ....................................................................................... 4 ADJUSTMENT INSTRUCTION .............................................................. 10 BLOCK DIAGRAM.................................................................................. 17 EXPLODED VIEW .................................................................................. 18 SCHEMATIC CIRCUIT DIAGRAM ..............................................................
Copyright 2011 LG Electronics. Inc. All rights reserved. Only for training and service purposes
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LGE Internal Use Only
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks. It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation. If any fuse (or Fusible Resistor) in this TV receiver is blown, replace it with the specified. When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1 W), keep the resistor 10 mm away from PCB. Keep wires away from high voltage or high temperature parts.
Leakage Current Hot Check (See below Figure) Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check. Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor between a known good earth ground (Water Pipe, Conduit, etc.) and the exposed metallic parts. Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms/volt or more sensitivity. Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each exposed metallic part. Any voltage measured must not exceed 0.75 volt RMS which is corresponds to 0.5 mA. In case any measurement is out of the limits specified, there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer.
Leakage Current Hot Check circuit

AC Volt-meter
Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed metallic parts of the cabinet, such as antennas, terminals, etc., to be sure the set is safe to operate without damage of electrical shock.
Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1 M and 5.2 M. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.
To Instruments exposed METALLIC PARTS
0.15 uF
Good Earth Ground such as WATER PIPE, CONDUIT etc.
1.5 Kohm/10W
When 25A is impressed between Earth and 2nd Ground for 1 second, Resistance must be less than 0.1 *Base on Adjustment standard
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SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range
This specification is applied to the LCD TV used LD12P chassis.
3. Test method
1) Performance: LGE TV test method followed 2) Demanded other specification - Safety : CE, IEC specification - EMC :CE, IEC
2. Requirement for Test

Each part is tested as below without special appointment. 1) Temperature: 25 C 5 C(77 F 9 F), CST: 40 C 5 C 2) Relative Humidity : 65 % 10 % 3) Power Voltage : Standard input voltage (AC 100-240 V~, 50 / 60 Hz) * Standard Voltage of each products is marked by models. 4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with BOM. 5) The receiver must be operated for about 5 minutes prior to the adjustment.
4. Model General Specification

No. Item 1 Market Specification EU(PAL Market-36Countries) DTV & Analog (Total 36 countries) DTV (MPEG2/4, DVB-T) : 31 countries (England/Italy/Germany/France/Spain/Sweden/Finland/Netherlands/Belgium/Luxemburg/ Greece/Denmark/Czech/Austria /Hungary/Swiss/Croatia/Turkey/Norway/Slovenia/Poland/ Ukraine/Portugal/Ireland/Moroco/Latvia/Estonia/Lithania/Rumania/Russia/Slovakia) DTV (MPEG2/4, DVB-T2): 5 countries (England/Sweden/Finland/Denmark/Norway) DTV (MPEG2/4, DVB-C): 10 countries (Sweden/Finland/Denmark/Norway/Austria/Swiss/Germany/Netherlands/Hungary/Slovenia) DTV (MPEG2/4, DVB-S) : 31 countries Albania/Austria/Belgium/Bosnia/Bulgaria/Croatia/Czech/Estonia/France/Germany/Greece/ Hungary/Ireland/Italy/Kazakhstan/Latvia/Lithuania/Luxembourg/Morocco/Netherlands/Poland/ Portugal/Romania/Russia/Serbia/Slovenia/Spain/Slovakia/Switzerland/Turkey/Ukraine Analog Only - 5 countries (Bosnia/Serbia/Bulgaria/Albania/Kazakhstan) Supported satellite : 22 satellites HISPASAT 1C/1D, ATLANTIC BIRD 2, NILESAT 101/102, ATLANTIC BIRD 3, AMOS 2/3, THOR 5/6, IRIUS 4, EUTELSAT-W3A, EUROBIRD 9A, EUTELSAT-W2A, HOTBIRD 6/8/9, EUTELSAT-SESAT, ASTRA 1L/H/M/KR, ASTRA 3A/3B, BADR 4/6, ASTRA 2D, EUROBIRD 3, EUTELSAT-W7, HELLASSAT 2, EXPRESS AM1, TURKSAT 2A/3A, INTERSAT10 2 Broadcasting system 1) PAL-BG 2) PAL-DK 3) PAL-I/I 4) SECAM DK,BG,I,L/L 5) DVB-T/C 6) DVB-T2 7) DVB-S - DVB-T2/S is supported in specific models. 1. DVB-T2 : Model name : xxxxxxxT 2. DVB-S : Model name : xxxxxxxS - SECAM L/L is not supported in DVB-T2 models. Remarks
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No. Item 3 Receiving system
Specification Analog : Upper Heterodyne Digital : COFDM , QAM

G DVB-T
Remarks - Guard Interval(Bitrate_Mbit/s) 1/4, 1/8, 1/16, 1/32 - Modulation : Code Rate QPSK : 1/2, 2/3, 3/4, 5/6, 7/8 16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8 64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
G DVB-C
- Symbolrate : 4.0Msymbols/s to 7.2Msymbols/s - Modulation : 16QAM, 64-QAM, 128-QAM and 256-QAM

G DVB-T2
- Guard Interval(Bitrate_Mbit/s) 1/4,1/8,1/16,1/32,1/128,19/128,19/256, - Modulation : Code Rate QPSK : 1/2, 2/5, 2/3, 3/4, 5/6 16-QAM : 1/2, 2/5, 2/3, 3/4, 5/6 64-QAM : 1/2, 2/5, 2/3, 3/4, 5/6 256-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
G DVB-S
- Symbolrate DVB-S2 (8PSK / QPSK) : 2 ~ 45Msymbol/s DVB-S (QPSK) : 2 ~ 45Msymbol/s - viterbi DVB-S mode : 1/2, 2/3, 3/4, 5/6, 7/8 DVB-S2 mode : 1/2, 2/3, 3/4, 3/5, 4/5, 5/6, 8/9, 9/10 4 5 6 7 8 Scart Jack (1EA) PAL, SECAM Scart Jack is Full scart and support RF-OUT(analog & DTV) Not support DTV Auto AV. Video Input RCA(1EA) PAL, SECAM, NTSC Component Input(1EA) Y/Cb/Cr, Y/Pb/Pr RGB Input HDMI Input (3EA) RGB-PC HDMI1-DTV (DVI) HDMI2-DTV HDMI3-DTV 9 Audio Input (3EA) RGB/DVI Audio, Component, AV SPDIF out Antenna, AV1, AV2, AV3, Component, RGB, HDMI1, HDMI2, HDMI3, USB 12 USB (1EA) EMF For Service (download) DivX HD JPEG, MP3 L/R Input 10 SDPIF out (1EA) 11 Earphone out (1EA) Analog(D-SUB 15PIN) PC(HDMI version 1.3) Support HDCP 4System : PAL, SECAM, NTSC, PAL60
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5. Component Video Input (Y, CB/PB, CR/PR)

No. 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. Specification Resolution 720x480 720x480 720x480 720x480 720x576 720x576 1280x720 1280x720 1280x720 1920x1080 1920x1080 1920x1080 1920x1080 1920x1080 H-freq(kHz) 15.73 15.63 31.47 31.50 15.625 31.25 45.00 44.96 45.00 31.25 33.75 33.72 56.250 67.5 V-freq(Hz) 60.00 59.94 59.94 60.00 50.00 50.00 50.00 59.94 60.00 50.00 60.00 59.94 50 60 SDTV,DVD 480i SDTV,DVD 480i 480p 480p SDTV,DVD 625 Line HDTV 576p HDTV 720p HDTV 720p HDTV 720p HDTV 1080i HDTV 1080i HDTV 1080i HDTV 1080p HDTV 1080p Remark
6. RGB Input (PC)

No. 1. 2. 3. 4. 5. 6. Specification Resolution 720*400 640*480 800*600 1024*768 1360*768 1920*1080 H-freq(kHz) 31.468 31.469 37.879 48.363 47.72 66.587 V-freq(Hz) 70.08 59.94 60.31 60.00 59.8 59.93 Pixel Clock(MHz) 28.321 25.17 40.00 65.00 84.75 138.625 VESA VESA VESA(XGA) WXGA WUXGA FHD model Proposed Remarks For only DOS mode Input 848*480 60 Hz, 852*480 60 Hz -> 640*480 60 Hz Display
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7. HDMI Input
(1) DTV Mode
No. 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. Resolution 720*480 720*576 1280*720 1280*720 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 H-freq(kHz) 31.469 / 31.5 31.25 37.500 44.96 / 45 33.72 / 33.75 28.125 26.97 / 27 33.716 / 33.75 56.250 67.43 / 67.5 V-freq.(Hz) 59.94 / 60 50 50 59.94 / 60 59.94 / 60 50.00 23.97 / 24 29.976 / 30.00 50 59.94 / 60 Pixel clock(MHz) 27.00 / 27.03 54 74.25 74.17 / 74.25 74.17 / 74.25 74.25 74.17 / 74.25 74.25 148.5 148.35 / 148.50 Proposed SDTV 480P SDTV 576P HDTV 720P HDTV 720P HDTV 1080I HDTV 1080I HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P Remark
(2) PC Mode
No. 1. 2. 3. 4. 5. 6. 7. Resolution 720*400 640*480 800*600 1024*768 1360*768 1280*1024 1920*1080 H-freq(kHz) 31.468 31.469 37.879 48.363 47.72 63.595 67.5 V-freq.(Hz) 70.08 59.94 60.31 60.00 59.8 60.0 60.00 Pixel clock(MHz) 28.321 25.17 40.00 65.00 84.75 108.875 138.625 VESA VESA VESA(XGA) WXGA SXGA WUXGA Proposed HDCP HDCP HDCP HDCP HDCP HDCP/FHD model HDCP/FHD model Remark
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8. 3D Mode
(1) HDMI Input (1.4a)
No. 1 2 3 4 5 6 7 8 9 10 11 Resolution 1920*1080 1280*720 1280*720 1920*1080 1920*1080 1280*720 1280*720 1920*1080 1920*1080 1920*1080 1920*1080 H-freq(kHz) 53.95 / 54 89.9 / 90 75 67.5 56.3 45 37.5 33.7 28.1 27 33.7 V-freq.(Hz) 23.98 / 24 59.94/60 50 60 50 60 50 60 50 24 30 Pixel clock(MHz) 148.35/148.5 148.35/148.5 148.5 148.5 148.5 74.25 74.25 74.25 74.25 74.25 89.1 Proposed HDTV 1080P HDTV 720P HDTV 720P HDTV 1080P HDTV 1080P HDTV 720P HDTV 720P HDTV 1080i HDTV 1080i HDTV 1080P HDTV 1080P 3D input proposed mode Frame packing Frame packing Frame packing Side by Side(half), Top and bottom Side by Side(half), Top and bottom Side by Side(half), Top and Bottom Side by Side(half), Top and Bottom Side by Side(half), Top and Bottom Side by Side(half), Top and Bottom Side by Side(half), Top and Bottom Side by Side(half), Top and Bottom
(2) HDMI Input (1.3)

No. 1 2 3 4 5 6 7 8 Resolution 1280*720 1280*720 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 1920*1080 H-freq(kHz) 45.00 37.500 33.75 28.125 27.00 33.75 67.50 56.250 V-freq.(Hz) 60.00 50 60.00 50.00 24.00 30.00 60.00 50 Pixel clock(MHz) 74.25 74.25 74.25 74.25 74.25 74.25 148.5 148.5 Proposed HDTV 720P HDTV 720P HDTV 1080I HDTV 1080I HDTV 1080P HDTV 1080P HDTV 1080P HDTV 1080P 3D input proposed mode Side by Side, Top & Bottom Side by Side, Top & Bottom Side by Side, Top & Bottom Side by Side, Top & Bottom Side by Side, Top & Bottom, Checkerboard Side by Side, Top & Bottom, Checkerboard Side by Side, Top & Bottom, Checkerboard, Single Frame Sequential Side by Side, Top & Bottom, Checkerboard, Single Frame Sequential
(3) RF 3D Input(DTV)
No. 1 2 Resolution 1280*720 1920*1080 H-freq(kHz) 37.500 28.125 V-freq.(Hz) 50 50 Pixel clock(MHz) 74.25 74.25 Proposed HDTV 720P HDTV 1080I 3D input proposed mode Side by Side, Top & Bottom Side by Side, Top & Bottom
(4) USB Input

No. 1 Resolution 1920*1080 H-freq(kHz) 33.75 V-freq.(Hz) 30.000 Pixel clock(MHz) 74.25 3D input proposed mode Side by Side Top & Bottom Checkerboard Proposed HDTV 1080P
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(5) RGB-PC Input

No. 1 Resolution 1920*1080 H-freq(kHz) 67.5 V-freq.(Hz) 60 Pixel clock(MHz) 148.5 Proposed HDTV 1080P 3D input proposed mode Side by Side, Top & Bottom
(6) DLNA
No. 1 Resolution 1920*1080 H-freq(kHz) 33.75 V-freq.(Hz) 30 Pixel clock(MHz) Proposed HDTV 1080P 3D input proposed mode Side by Side, Top & Bottom, Checkerboard
(7) 3D Input mode

No. 1.
L R L
Side by Side
Top & Bottom
Checkerboard
Single Frame Sequential
Frame Packing
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ADJUSTMENT INSTRUCTION
1. Application Range
This specification sheet is applied to all of the LCD TV with LD12P chassis.
2. Designation
(1) Because this is not a hot chassis, it is not necessary to use an isolation transformer. However, the use of isolation transformer will help protect test instrument. (2) Adjustment must be done in the correct order. (3) The adjustment must be performed in the circumstance of 25 C 5 C of temperature and 65 % 10 % of relative humidity if there is no specific designation. (4) The input voltage of the receiver must keep AC 100-240 V~, 50 / 60Hz. (5) The receiver must be operated for about 5 minutes prior to the adjustment when module is in the circumstance of over 15. In case of keeping module is in the circumstance of 0 C, it should be placed in the circumstance of above 15 C for 2 hours In case of keeping module is in the circumstance of below 20 C, it should be placed in the circumstance of above 15 C for 3 hours. [Caution] When still image is displayed for a period of 20 minutes or longer (especially where W/B scale is strong. Digital pattern 13ch and/or Cross hatch pattern 09ch), there can some afterimage in the black level area.
3.2. LAN Inspection

(1) Equipment & Condition A Each other connection to LAN Port of IP Hub and Jig
3. Automatic Adjustment
3.1. MAC Address
(1) Equipment & Condition - Play file: Serial.exe - MAC Address edit - Input Start / End MAC address (2) Download method 1) Communication Prot connection
PCBA PC(RS-232C)
(2) LAN inspection solution A LAN Port connection with PCB A Network setting at MENU Mode of TV A setting automatic IP A Setting state confirmation -> If automatic setting is finished, you confirm IP and MAC Address.
RS-232C Po rt
Connect: PCBA Jig-> RS-232C Port== PC-> RS-232C Port 2) MAC Address & CI+ key & Widevine key download - Com 1,2,3,4 and 115200(Baud rate) - Mode check : Online Only - Check the test process: DETECT -> MAC -> CI -> Widevine - Play : START - Result : Ready, Test, OK or NG - Printer Out (MAC Address Label)
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3.3. Widevine Key Inspection

- Confirm key input Data at the IN START MENU Mode.
3.5. Model name & serial number download

(1) Model name & Serial number D/L A Press Power on key of service remote control. (Baud rate : 115200 bps) A Connect RS232 Signal Cable to RS-232 Jack. A Write Serial number by use RS-232. A Must check the serial number at Instart menu. (2) Method & notice A. Serial number D/L is using of scan equipment. B. Setting of scan equipment operated by Manufacturing Technology Group. C. Serial number D/L must be conformed when it is produced in production line, because serial number D/L is mandatory by D-book 4.0. * Manual Download (Model Name and Serial Number) If the TV set is downloaded by OTA or service man, sometimes model name or serial number is initialized.(Not always) There is impossible to download by bar code scan, so It need Manual download. a. Press the instart key of ADJ remote control. b. Go to the menu 5.Model Number D/L like below photo. c. Input the Factory model name(ex 42LD450-ZA) or Serial number like photo.
3.4. LAN PORT INSPECTION(PING TEST)

Connect SET -> LAN port == PC -> LAN Port.
SET
PC
(1) Equipment setting 1) Play the LAN Port Test PROGRAM. 2) Input IP set up for an inspection to Test Program. *IP Number : 12.12.2.2 (2) LAN PORT inspection (PING TEST) 1) Play the LAN Port Test Program. 2) Connect each other LAN Port Jack. 3) Play Test (F9) button and confirm OK Message. 4) Remove LAN cable.
d. Check the model name Instart menu. -> Factory name displayed. (ex 32LV3700-ZA) e. Check the Diagnostics.(DTV country only) -> Buyer model displayed. (ex 32LV3700)
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3.7. CI+ Key checking method

Check whether the key was downloaded or not at In Start menu. (Refer to below).
4. Manual Adjustment
4.1. EDID(The Extended Display Identification Data)/DDC(Display Data Channel) download
(1) Overview It is a VESA regulation. A PC or a MNT will display an optimal resolution through information sharing without any necessity of user input. It is a realization of Plug and Play.
=> Check the Download to CI+ key value in LGset. 3.7.1. Check the method of CI+ Key value (1) Check the method on Instart menu. (2) Check the method of RS232C Command. 1) Into the main assembly mode (RS232 : aa 00 00) CMD 1 A CMD 2 A 0 Data 0 0 (2) Equipment - Adjustment remote control - Since embedded EDID data is used, EDID download JIG, HDMI cable and D-sub cable are not need. (3)Download method 1) Press ADJ key on the Adjustment remote control, then select 12.EDID D/L, by pressing Enter key, enter EDID D/L menu. 2) Select [Start] button by pressing Enter key, HDMI1/ HDMI2/ HDMI3/ RGB are Writing and display OK or NG. (4) EDID DATA A HDMI
0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x00 00 0x01 0x02 0F 0x03 90 0x04 45 0x05 40 0x06 3F 0x07 0x00 02 0x01 22 0x02 0x03 25 0x04 6E 0x05 2D 0x06 51 0x07 00 00 88 40 00 00 03 15 26 01 E3 A0 55 58 1B 00 F1 26 05 5A 00 2C 30 00 4E 15 03 00 A0 45 40 00 10 07 01 00 5A 00 70 00 1F 50 01 00 00 A0 36 00 50 40 00 70 1F FF FF 01 54 A9 A0 36 52 FF 03 A1 C0 5A 00 10 FF 80 08 B3 00 A0 00 FF 10 00 00 00 5A 0A FF 09 71 02 00 00 20 84 09 1D 9E 00 5A 00 00 13 57 80 01 00 00 A0 00 05 07 18 1D 1A 00 5A 00 14 67 71 00 02 00 00 00 1C 80 3A 1E 00 00 16 51 80 66 00 00 03 02 12 20 D0 18 21 1E 00 58 1A 71 50 00 00 2C 20 38 B0 00 2 00 78 40 3A 1E 00 20 1E 0A 81 80 66 00 20 6D EE C0 18 21 1E 20 91 81 71 50 00 20 A3 00 38 B0 00 20 54 81 2D 51 00 80 40 00 FD 01 20 1 21 4C 99 95 58 1B 00 26 00 2C 30 39
2) Check the key download for transmitted command. (RS232 : ci 00 10) CMD 1 C CMD 2 I 1 Data 0 0
3) Result value - Normally status for download : OKx - Abnormally status for download : NGx 3.7.2. Check the method of CI+ Key value (RS232) 1) Into the main assembly mode (RS232 : aa 00 00) CMD 1 A CMD 2 A 0 Data 0 0
2) Check the method of CI+ key by command. (RS232 : ci 00 20) CMD 1 C CMD 2 I 2 Data 0 0
3) Result value i 01 OK 1d1852d21c1ed5dcx CI+ key Value

0x01
RGB
FF 50 40 00 70 1E FF 01 54 A9 A0 36 53 FF 03 A1 C0 5A 00 10 FF 68 08 B3 00 A0 00 FF 10 00 00 00 5A 0A FF 09 71 02 00 00 20 00 78 4F 3A 1E 00 20 1E 0A 01 80 66 00 20 6D EE 01 18 21 1E 20 91 01 71 50 00 20 A3 01 38 B0 00 20 54 01 2D 51 00 01 40 00 FD 01 3 4C 99 95 58 1B 00 26 00 2C 30 3A
0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x00 00
3.8. WIFI MAC ADDRESS CHECK

(1) Using RS232 H-freq(kHz) Transmission [A][I][ ][Set ID][ ][20][Cr] V-freq.(Hz) [O][K][X] or [NG]
0x02 0F 0x03 90 0x04 45 0x05 40 0x06 3E 0x07
(2) Check the menu on in-start.
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Reference - HDMI1 ~ HDMI3 / RGB - In the data of EDID, bellows may be different by S/W or Input mode. Product ID
4.2.3. Equipment connection MAP

Co lo r Analyzer
Probe
RS -232C
Co m p ut er
RS -232C RS -232C
Model Name ALL
HEX 0001 0001
EDID Table 0100 0100
DDC Function Analog Digital
Pat t ern Generat o r

Signal Source * If TV internal pattern is used, not needed
Serial No. : Controlled on product line

MODEL all MODEL NAME(HEX) 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
4.2.4. Adj. Command (Protocol)

<Command Format>
LEN CMD VAL CS
Month, Year: Controlled on production line: ex) Monthly : 01 -> 01 Year : 2010 -> 14 Model Name(Hex): Checksum: Changeable by total EDID data.
INPUT HDMI1 HDMI2 HDMI3 RGB
1 2 3
- LEN: Number of Data Byte to be sent - CMD: Command - VAL: FOS Data value - CS: Checksum of sent data - A: Acknowledge Ex) [Send: JA_00_DD] / [Ack: A_00_okDDX]
A
RS-232C Command used during auto-adj.

Explanation Begin White Balance adj. Gain adj.(internal white pattern) Gain adj. completed Offset adj.(internal white pattern) Offset adj. completed End White Balance adj.(Internal pattern disappears) ID 00 00 00 00 00 00 DATA] 00 10 1f 20 2f ff
7F 7F 7F X
CB BB AB X
X X X 98
RS-232C COMMAND [CMD wb wb wb wb wb wb
Vendor Specific(HDMI)
INPUT HDMI1 HDMI2 HDMI3 RGB MODEL NAME(HEX) 78 03 0C 00 10 00 B8 2D 20 C0 0E 01 40 0A 3C 08 10 18 10 98 10 58 10 38 10 78 03 0C 00 20 00 B8 2D 20 C0 0E 01 40 0A 3C 08 10 18 10 98 10 58 10 38 10 78 03 0C 00 30 00 B8 2D 20 C0 0E 01 40 0A 3C 08 10 18 10 98 10 58 10 38 10 78 03 0C 00 40 00 B8 2D 20 C0 0E 01 40 0A 3C 08 10 18 10 98 10 58 10 38 10
4.2. White Balance Adjustment

4.2.1. Overview
(1) W/B adj. Objective & How-it-works (2) Objective: To reduce each Panels W/B deviation (3) How-it-works : When R/G/B gain in the OSD is at 192, it means the panel is at its Full Dynamic Range. In order to prevent saturation of Full Dynamic range and data, one of R/G/B is fixed at 192, and the other two is lowered to find the desired value. (4) Adj. condition : normal temperature 1) Surrounding Temperature : 25 C 5 C 2) Warm-up time: About 5 Min 3) Surrounding Humidity : 20 % ~ 80 %
Ex) wb 00 00 -> Begin white balance auto-adj. wb 00 10 -> Gain adj. ja 00 ff -> Adj. data jb 00 c0 ... ... wb 00 1f -> Gain adj. completed *(wb 00 20(Start), wb 00 2f(completed)) -> Off-set adj. wb 00 ff -> End white balance auto-adj.
A
Adj. Map
ITEM Command Cmd 1 Cmd 2 g h i j j j Data Range(Hex.) Default(Decimal) Min 00 00 00 Max C0 C0 C0
Cool
R-Gain G-Gain B-Gain R-Cut G-Cut B-Cut
4.2.2 Equipment
1) Color Analyzer: CA-210 (LED Module : CH 14) 2) Adjustment Computer(During auto adj., RS-232C protocol is needed) 3) Adjustment remote control 4) Video Signal Generator MSPG-925F 720p/204-Gray (Model:217, Pattern:49) -> Only when internal pattern is not available
A
Medium
R-Gain G-Gain B-Gain R-Cut G-Cut B-Cut
j j j
a b c
00 00 00
C0 C0 C0
Color Analyzer Matrix should be calibrated using CS-1000.

Warm
R-Gain G-Gain B-Gain R-Cut G-Cut
j j j
d e f
00 00 00
C0 C0 C0
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3 Command White Balance Adj. Map

Command (lower case ASCII) CMD1 CMD2 j k l 00 00 00 MIN 00 00 00 MAX C0 C0 C0 MIN 00 00 00 MAX C0 C0 C0 MIN 00 00 00 MAX C0 C0 C0 SetID R Gain(HEX) G Gain(HEX) B Gain(HEX)
4.2.6. Reference (White Balance Adj. coordinate and temperature)

A A
Cool Medium Warm
j j j
Luminance : 204 Gray Standard color coordinate and temperature using CS-1000 (over 26 inch) Color Coordination x y 0.273 0.293 0.329 13000 K 9300 K 6500 K 0.0000 0.0000 0.0000 0.269 0.285 0.313 Temp UV
Mode COOL
Infrared Sensor Adj. Map

Command (lower case ASCII) CMD1 CMD2 C D E MIN 00 00 00 MAX C0 C0 C0 MIN 00 00 00 MAX C0 C0 C0 MIN 00 00 00 MAX C0 C0 C0 R Gain(HEX) G Gain(HEX) B Gain(HEX)
MEDIUM WARM
Cool Medium Warm
1 1 1
Standard color coordinate and temperature using CA-210 (CH 14) Color Coordination x y 0.273 0.002 13000 K 0.293 0.002 0.329 0.002 9300 K 6500 K 0.0000 0.0000 0.0000 0.269 0.002 0.285 0.002 0.313 0.002 Temp UV
Mode COOL MEDIUM WARM
4.2.5. Adj. method

(1) Auto adj. method 1) Set TV in adj. mode using POWER ON key. 2) Zero calibrate probe then place it on the center of the Display. 3) Connect Cable (RS-232C) 4) Select mode in adj. Program and begin adjustment. 5) When adj. is completed(OK Sign), check adj. status pre mode. (Warm, Medium, Cool) 6) Remove probe and RS-232C cable to complete adj..
A
4.2.7. Edge LED White balance table

IOP & Edge LED module change color coordinate because of aging time. A Apply under the color coordinate table, for compensated aging time. - EDGE LED(LW47XX)
A
W/B Adj. must begin as start command wb 00 00 , and finish as end command wb 00 ff, and Adj. offset if need.
GP2
Aging Time (Min.) X
Cool Y 273 291 288 285 282 279 276 273 273 269
Medium X 285 296 294 292 290 289 287 286 285 Y 293 311 308 305 302 299 296 293 293 X
Warm Y 329 340 338 335 332 329 326 323 323 313 319 317 315 313 312 310 308 308
(2) Manual adj. method 1) Set TV in Adj. mode using POWER ON. 2) Zero Calibrate the probe of Color Analyzer, then place it on the center of LCD module within 10cm of the surface. 3) Press ADJ key -> EZ adjust using adjustment remote control -> 9.White-Balance then press the cursor to the right key (G).(When key(G) is pressed 216 Gray internal pattern will be displayed.) 4) One of R Gain / G Gain / B Gain should be fixed at 192, and the rest will be lowered to meet the desired value. 5) Adjustment is performed in COOL, MEDIUM, WARM 3 modes of color temperature.
A
1 2 3 4 5 6 7 8
0-2 3-5 6-9 10-15 20-35 36-49 50-79 Over 80
280 278 276 274 273 270 269 269
If internal pattern is not available, use RF input. In EZ Adj. menu 9.White Balance, you can select one of 2 Test -pattern: ON, OFF. Default is inner(ON). By selecting OFF, you can adjust using RF signal in 216 gray pattern. Adj. condition and cautionary items 1) Lighting condition in surrounding area Surrounding lighting should be lower 10 lux. Try to isolate adj. area into dark surrounding. 2) Probe location : Color Analyzer(CA-210) probe should be within 10 cm and perpendicular of the module surface.(80~100) 3) Aging time - After Aging Start, keep the Power ON status during 5 Minutes. - In case of LCD, Back-light on should be checked using no signal or Full-white pattern.
- 14 -
4.3. Wireless function check

Step 1) Connect set and Dongle of Wireless to Cable of HDMI & TTA 20Pin. Step 2) At OSD of SET, check the message like Fig.3. Step 3) Detach Cable of Wireless Dongle.
4.5. 3D function test

4.5.1. HDMI 3D
(Pattern Generator MSHG-600, MSPG-6100 [Support HDMI 1.4]) * HDMI mode No. 872, pattern No. 83) 1) Please input 3D test pattern like below
Connect
Fig . 1 < Do ng le>
Fig . 2 < Wireless Read y Set >
2) When 3D OSD appear automatically, then select green key.
Fig . 3 Connect the Dongle ( Do ng le Co nnec t io n Disp lay)
4.4. EYE-Q function check

Step 1) Turn on TV. Step 2) Press EYE key of Adjustment remote control. Step 3) Cover the Eye Q II sensor on the front of the using your hand and wait for 6 seconds. Step 4) Confirm that R/G/B value is lower than 10 of the Raw Data (Sensor data, Back light). If after 6 seconds, R/G/B value is not lower than 10, replace Eye Q II sensor. Step 5) Remove your hand from the Eye Q II sensor and wait for 6 seconds. Step 6) Confirm that ok pop up. If change is not seen, replace Eye Q II sensor. 3) Dont wear a 3D Glasses, Check the picture like below.
4.5.2. RF emitter inspection

(1) Start 3D pattern inspection
<IR Emitter inspection>
<IR Tester Lamp turned off(NG)>
<IR Tester Lamp turned on(OK)>
(2) If RF emitter signal is correctly received to RF receiver, the lamp of RF tester turn on.
- 15 -
4.6. Option selection per country

(1) Overview - Option selection is only done for models in Non-EU. - Applied model: LD12P Chassis applied EU model. (2) Method 1) Press ADJ key on the Adjustment Remote Control, then select Country Group Menu. 2) Depending on destination, select Country Group Code 04 or Country Group EU then on the lower Country option, select US, CA, MX. Selection is done using +, or GF key.
6. USB S/W download(option, service only)

1) Put the USB Stick to the USB socket. 2) Automatically detecting update file in USB Stick - If your downloaded program version in USB Stick is Low, it didnt work. But your downloaded version is High, USB data is automatically detecting. 3) Show the message Copying files from memory.
5. Tool Option selection

- Method : Press ADJ key on the Adjustment remote control, then select Tool option.
5.1. Ship-out mode check(In-stop)

After final inspection, press IN-STOP key of the Adjustment remote control and check that the unit goes to Stand-by mode. 4) Updating is starting.
5.2. GND and Internal Pressure check

5.2.1. Method
1) GND & Internal Pressure auto-check preparation - Check that Power Cord is fully inserted to the SET. (If loose, re-insert) 2) Perform GND & Internal Pressure auto-check - Unit fully inserted Power cord, Antenna cable and A/V arrive to the auto-check process. - Connect D-terminal to AV JACK TESTER. - Auto CONTROLLER(GWS103-4) ON - Perform GND TEST. - If NG, Buzzer will sound to inform the operator. - If OK, changeover to I/P check automatically. (Remove CORD, A/V form AV JACK BOX.) - Perform I/P test. - If NG, Buzzer will sound to inform the operator. - If OK, Good lamp will lit up and the stopper will allow the pallet to move on to next process.
5) Updating Completed, the TV will restart automatically. 6) If your TV is turned on, check your updated version and Tool option. (explain the Tool option, next stage) * If downloading version is more high than your TV have, TV can lost all channel data. In this case, you have to channel recover. if all channel data is cleared, you didnt have a DTV/ATV test on production line. * After downloading, have to adjust TOOL OPTION again. 1) Push IN-START key in service remote control. 2) Select Tool Option 1 and Push OK key. 3) Punch in the number. (Each model has their number.)
5.2.2. Checkpoint
TEST voltage - GND: 1.5 KV/min at 100 mA - SIGNAL: 3 KV/min at 100 mA TEST time: 1 second TEST POINT - GND TEST = POWER CORD GND & SIGNAL CABLE METAL GND - Internal Pressure TEST = POWER CORD GND & LIVE & NEUTRAL LEAKAGE CURRENT: At 0.5 mArms
- 16 -
Air/ Cable
ANALOG DEMOD
CI slot
P_TS P_TS DIF(+/ -) CVBS(M) CVBS TS_S/P H/P L/R Out USB USB1 51P SPI Flash(2Mb) SYSTEM EEPROM X 1 (1Mb)
NAND Flash(8Gb)
SYSTEM DDR3 X 16 X 2 (2Gb)
TUNER (T/C)
DIGITAL DEMOD (T/C)
DVBT/C Demod
DVB-S
TUNER (S2)
DIGITAL DEMOD (S2)
LNB
LVDS.
50Hz
URSA5
41P
Side
HDMI1 HDMI2 HDMI3
HDMI HUB IC
(HDCP
BLOCK DIAGRAM
- 17 HDMI S/W
EEPROM) A/V1 COMP SCART PC- RGB RGB,H/V L/R In SPDIF OUT Ethernet UART PC- AUDIO OPTIC LAN RS-232C RGB In/CVBS In Out CVBS I2C I2C COMP CVBS
SYSTEM DDR3 X 16 X 1 (1Gb)
BCM 35230
I2S Out
Audio AMP Audio AMP
Rear
Sub Micom (NEC)
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
710 400 521 LV2 LV1 540 800 530 910 700 200 340 511 310 120 320 330 510 A5 A10 300
Copyright LG Electronics. Inc. All rights reserved. Only for training and service purposes
AG1
AG2
- 18 -
A21
A2
900
NAND FLASH MEMORY 8Gbit

+3.3V_Normal IC102 TC58DVG3S0ETA00 NC_1 NC_1 2.7K NC_2 NC_3 NC_4 R107 NC_5 16Gbit R149 0 NAND_RBb NAND_REb NAND_CEb NAND_CEb2 R148 16Gbit 0 C102 4700pF C101 0.1uF NC_6 RY/BY RE CE NC_7 NC_8 VCC_1 VSS_1 NC_9 NC_10 NAND_CLE NAND_ALE NAND_WEb Write Protection +3.3V_Normal CLE ALE WE WP NC_11 R103 4.7K OPT NC_12 NC_13 FLASH_WP NC_14 NC_15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 NAND_8Gbit 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 NC_28 NC_27 NC_26 NC_25 I/O8 I/O7 I/O6 I/O5 NC_24 PSL NC_23 VCC_2 +3.3V_Normal VSS_2 NC_22 NC_21 NC_20 I/O4 I/O3 I/O2 I/O1 NC_19 NC_18 NC_17 NC_16 NAND_DATA[3] NAND_DATA[2] NAND_DATA[1] NAND_DATA[0] C104 10uF 10V C103 0.1uF R151 16Gbit 0 NAND_DATA[7] NAND_DATA[6] NAND_DATA[5] NAND_DATA[4] NAND_DATA[0-7] NC_5 RY/BY2 RY/BY1 RE CE1 CE2 NC_6 VCC_1 VSS_1 NC_7 NC_8 CLE ALE WE WP NC_9 NC_10 NC_11 NC_12 NC_13 NC_2 NC_3 NC_4
16Gbit
IC102-*1 TH58DVG4S0ETA20
Boot ROM Device Select - (FA4,FAD7,FAD2,FAD1)

+3.3V_Normal 0000: 0010: 0100: 0110: 1000: 1010: CI_ADDR[4] 0001: NAND_DATA[7] 0011: NAND_DATA[2] 0101: 0111: NAND_DATA[1] 1001: 1011: 1100: 1110: 1101, ST Micro M25P or compatible Serial Flash 8-bit 512Mbit 512B page SLC NAND Flash devices 8-bit 128, 256Mbit 512B page SLC NAND Flash devices 8-bit 1Gbit 2KB page SLC NAND Flash devices 8-bit 2Gbit, 4Gbit, 8Gbit 2KB page SLC NAND Flash devices 8-bit 16Gbit, 32Gbit 4KB page SLC NAND Flash devices (O) 8-bit 8/16/32Gbit 2KB page MLC NAND Flash devices 8-bit 16/32Gbit 4KB page MLC NAND Flash devices 8-bit 32Gbit 8KB page MLC NAND Flash devices 3B dual IO Serial Flash BB dual IO Serial Flash fast Serail Flash > 50Mhz OneNAND Flash (always 16-bit) Reserved 1111: Reserved
Strap Setting
+3.3V_Normal
R113 10K 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 DEV_NAND_16Gbit 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 NC_26 NC_25 NC_24 NC_23 I/O8 I/O7 I/O6 I/O5 NC_22 PSL NC_21 VCC_2 VSS_2 NC_20 NC_19 NC_18 I/O4 I/O3 I/O2 I/O1 NC_17 NC_16 NC_15 NC_14 R112 10K R111 10K OPT R114 10K OPT
R117 10K OPT
R122 10K
R127 10K OPT
R154 10K OPT
R157 10K OPT
R160 10K OPT
R164 10K OPT
R167 10K OPT
R170 10K
R175 10K OPT
R177 10K
R179 10K OPT
R181 10K OPT
R183 10K
R187 10K OPT
R192 10K OPT NAND_DATA[0] CI_ADDR[7] NAND_DATA[6] CI_ADDR[6] NAND_CLE NAND_DATA[4] CI_ADDR[9] CI_ADDR[11] CI_ADDR[12] CI_ADDR[13] CI_ADDR[8]
R118 10K
R123 10K OPT
R128 10K
NAND ECC (FA3, FA2, FALE)

+3.3V_Normal R155 10K R115 10K R119 10K OPT CI_ADDR[3] CI_ADDR[2] NAND_ALE R116 10K OPT R120 10K R158 10K R161 10K R165 10K R168 10K R171 10K OPT R176 10K R178 10K OPT R180 10K R182 10K R184 10K OPT R188 10K R193 10K
NAND_DATA[3] NAND_DATA[5]
000 = ECC disabled 001 = ECC 1-bit repair 010 = ECC 4-bit BCH (O) 011 = ECC 8-bit BCH, 27 byte spare 100 = ECC 12-bit BCH, 27 byte spare 101 = ECC 8-bit BCH, 16 byte spare 110, 111 = Reservedd
NAND_DATA[0]: 0: System is LITTLE endian (O) 1: System is BIG endian CI_ADDR[7]: 0: Disable EDID automatic Downloading from Flash (O) 1: Enable EDID automatic Downloading from Flash NAND_DATA[6] : 0: Disable OSC clock output on chip Pin (O) 1: Enable OSC clock output on chip pin. CI_ADDR[6]: 0: Host MIPS run at 500 MHz (O) 1: Host MIPS run at 250 MHz NAND_CLE: 0: Differential Oscillators TVM not bypassed (O) 1: Differential Oscillators TVM bypassed NAND_DATA[4]: 0: 27MHz TVM Crystal Frequency 1: 54MHz TVM Crystal Frequency (O)
- High : Normal Operation - Low : Write Protection
DUAL COMPONENT IC102 IC102-*1 1ST : EAN61000101 2ND : T-TH58DVG4S0ETA20
CI_ADDR[9],CI_ADDR[11],CI_ADDR[12],CI_ADDR[13] TVM Crystal oscillator bias/gain control 0000: 210uA 0001: 390uA 0010: 570uA 0011: 730uA 0100: 890uA (O) 0111: 1290uA 1000: 1416uA 1111: 2196uA 0101, 0110, 1001, 1010, 1011, 1100, 1101, 1110: Reserved CI_ADDR[8]: 0: RESETOUTb (in On/Off only) stay asserted until software releases them. 1: Fix amount of delay for de-assertion on RESETOUTb (in On/IOff only) at end of RESETb pulse (O) NAND_DATA[3]: 0: MIPS will boot from external flash (O) 1: MIPS will boot from ROM NAND_DATA[5]: 0: FLASH MODE (O) 1: BSC_SLAVE(BBS) MODE
+3.3V_Normal
NVRAM
+3.3V_Normal
BCM_NVM_256K IC103-*1 AT24C256C-SSHL-T

A0 VCC
IC101 LGE35230(BCM35230KFSBG)
RGB_DDC_SDA NON_BCM_CAP S B D
R196 10K
A1
WP
A2
SCL
GND
SDA
4.7K
4.7K OPT
R173
AF27 AF28 AG27 AG28 AE26 AF26 AH27 AG26 AF25 AE25
HDMI_RX0HDMI_RX0+ +3.3V_Normal HDMI_RX1HDMI_RX1+ HDMI_RX2HDMI_RX2+
A4 B4 A3 B3 A2 B2 HDMI0_D2N HDMI0_D2P HDMI0_D1N HDMI0_D1P HDMI0_D0N HDMI0_D0P
TXOUT0_L1N TXOUT0_L1P TXOUT0_L2N TXOUT0_L2P TXCLK_LN TXCLK_LP TXOUT0_L3N TXOUT0_L3P TXOUT0_L4N TXOUT0_L4P
TXB3P TXB3N TXBCLKP TXBCLKN TXB2P TXB2N TXB1P TXB1N TXB0P TXB0N RGB_DDC_SCL R198 10K AB4 S B D Y4 AA4 Y5 G AB2 AB5 FS_IN1 FS_IN2 AF3 U3 +3.3V_Normal U2 VGA_SDA VGA_SCL NFWPB FWE FRD FRDYB BCM_RX BCM_TX R135 R136 33 33 AA3 AA2 H3 H2 22 22 +3.3V_Normal R141 4.7K F25 W5 POWER_CTRL R142 R143 R144 5V_HDMI_4 R145 OPT AB6 R132 4.7K R139 SRST +3.3V_Normal +3.3V_Normal SOC_RESET Y3 G24 J6 W6 +3.3V_Normal C111 C112 0.01uF 0.1uF R140 560 1% BCM REFRENCE is 562ohm F7 E7 VDAC_VREG VDAC_RBIAS VDAC_1 VDAC_2 C6 D7 TMODE TESTEN R125 1K RESETB RESETOUTB AVS_VFB AVS_VSENSE AVS_RESETB AVS_NDRIVE_1 AVS_PDRIVE_1 AH7 AG7 AD7 AF7 AH8 0 Y6 AON_RESETOUTB TVM_BYPASS OPT OPT OPT 22 22 22 22 U5 U4 W3 W1 AON_GPIO_36 AON_GPIO_37 AON_HSYNC AON_VSYNC TRSTB TDI/GPIO TDO TMS/GPIO TCK/GPIO DINT/GPIO AD15 AF14 AH14 AD14 AG14 AC16 NMIB H4 H5 C107 33pF 50V DVB_S C108 33pF 50V DVB_S C109 33pF 50V C110 33pF 50V BSC_S_SCL BSC_S_SDA 3 SDA RDB/GPIO TDB/GPIO BSCDATAA BSCCLKA Y2 Y1 RDA TDA FA_0 FA_1 FA_2 FA_3 FA_4 FA_5 FA_6 FA_7 FA_8 FA_9 FA_10 FA_11 FA_12 FA_13 FA_14 FA_15 AF2 AE1 AC4 AD5 AD4 AE4 AE5 AD6 AH3 AF4 AH4 AG4 AF5 AG3 AH2 AH5 R146 10K NAND_CLE NAND_RBb CI_ADDR[2] CI_ADDR[3] CI_ADDR[4] CI_ADDR[5] CI_ADDR[6] CI_ADDR[7] CI_ADDR[8] CI_ADDR[9] CI_ADDR[10] CI_ADDR[11] CI_ADDR[12] CI_ADDR[13] CI_ADDR[14] AG2 AE3 AA5 FLASH_WP NAND_WEb NAND_REb /PCM_WAIT SPARE_ADC1 SPARE_ADC2 C119 0.1uF 16V SC_ID FP_IN0 FP_IN1 FALE FCEB_0 FCEB_1 FCEB_2 FCEB_3 AG1 AF1 AC5 AE6 AG5 NAND_ALE NAND_CEb NAND_CEb2 /CI_CE1 /CI_CE2 54MHz_XTAL_N +3.3V_Normal LNB_INT V5 IRRXDA C118 0.1uF 16V AG6 54MHz_XTAL_P AF6 TVM_XTALOUT NON_BCM_CAP TVM_XTALIN AB1 FAD_7 FAD_6 FAD_5 FAD_4 FAD_3 FAD_2 FAD_1 FAD_0 AB3 AC1 AC2 AC3 AD2 AD3 AE2
HDMI_CLK+
C5
AE28
HDMI0_CLKP
TXOUT0_L0P
TXB4N
BSS83
NAND_DATA[0-7]
R174
HDMI_CLK-
B5 HDMI0_CLKN TXOUT0_L0N
AE27
TXB4P
Q101
BCM_NVM_1M
IC103 M24M01-HRMN6TP
NC VCC
+3.3V_Normal
Write Protection
WP
NAND_DATA[7] NAND_DATA[6] NAND_DATA[5] NAND_DATA[4]
R169 0
E1
A8h
E2 3 6 SCL
- Low : Normal Operation - High : Write Protection R190 R191 33 33 SCL3_3.3V SDA3_3.3V
R172
NAND_DATA[3] NAND_DATA[2] NAND_DATA[1] NAND_DATA[0]
4.7K OPT
R101 4.7K
R105 4.7K
R104 R195 4.7K 4.7K
VSS
SDA
W2 CEC V4 W4 V3 V2 D13 E6 R106 3K HDMI0_ARC HDMI0_RESREF HDMI0_HTPLG_IN HDMI0_HTPLG_OUT HDMI_ARC DDC0_SCL DDC0_SDA TXOUT0_U0N TXOUT0_U0P TXOUT0_U1N TXOUT0_U1P TXOUT0_U2N TXOUT0_U2P TXCLK_UN TXCLK_UP TXOUT0_U3N TXOUT0_U3P TXOUT0_U4N TXOUT0_U4P AH26 AG25 AE24 AD24 AH25 AF24 AE23 AD23 AG24 AF23 AC22 AD22 TXA4P TXA4N TXA3P TXA3N TXACLKP TXACLKN TXA2P TXA2N TXA1P TXA1N TXA0P TXA0N
Q102 BSS83
54MHz X-TAL
C113 12pF R185 50V X-TAL_2 4 GND_2 1 54MHz X101 X-TAL_1 3 2 GND_1 R189 1M OPT 54MHz_XTAL_P 0 54MHz_XTAL_N
X-TAL_1 GND_1
X101-*2 54MHz 1 2 4
GND_2 X-TAL_2
CRYSTAL_BCM_KDS EAW58239604 DAISHINKU CORPORATION. X101-*1 54MHz 1 GND_1 2 3 4 X-TAL_2
X-TAL_1
GND_2
AG23 TXOUT1_L0N TXOUT1_L0P TXOUT1_L1N TXOUT1_L1P TXOUT1_L2N TXOUT1_L2P TXCLK1_LN TXCLK1_LP TXOUT1_L3N TXOUT1_L3P TXOUT1_L4N TXOUT1_L4P AH23 AE22 AE21 AF22 AH22 AG22 AF21 AG21 AF20 AD21 AC21
BBS CONNECT
TXD4P TXD4N TXD3P TXD3N TXDCLKP TXDCLKN TXD2P TXD2N TXD1P TXD1N TXD0P TXD0N 4 GND 2 SCL 1 VCC C106 4.7uF R109 1.5K R110 1.5K SCL2_3.3V SDA2_3.3V R199 R197 P101 TJC2508-4A SDA0_3.3V SCL0_3.3V +3.3V_Normal
R121 1.2K
R126 1.2K
R129 1.2K
R131 1.2K
CI_ADDR[2-14]
C114 12pF 50V
R186 0 CRYSTAL_BCM_Sunny EAW58812611 SUNNY ELECTRONICS CORPORATION
CRYSTAL_BCM_Lihom EAW60763703 LIHOM CO., LTD.
+3.3V_Normal
AG20 TXOUT1_U0N TXOUT1_U0P TXOUT1_U1N TXOUT1_U1P TXOUT1_U2N TXOUT1_U2P TXCLK1_UN TXCLK1_UP TXOUT1_U3N TXOUT1_U3P TXOUT1_U4N TXOUT1_U4P AH20 AD19 AE19 AF19 AH19 AE18 AD18 AG19 AF18 AG18 AF17
TXC4P TXC4N TXC3P TXC3N TXCCLKP TXCCLKN TXC2P TXC2N TXC1P TXC1N TXC0P TXC0N
DVB_S Option: apply EU Satellite model
PCM_5V_CTL 5V_HDMI_1 5V_HDMI_2
R147 1K
R150 1K
R153 1K
R156 1K
R159 1K
R162 1K
R166 1K
FOR HDMI STANDARD APPLY ONLY WHEN CONNECT TO PULL-UP GPIO
5V_HDMI_3
+3.3V_Normal
R130 OPT 2K
R163 1K
L/R_SYNC_DINT L/R_SYNC_DINT For L/R sync GPIO SRST
AC18 LT0VCAL_MONITOR GPIO_BL_ON BL_PWM/GPIO AH16 AG16
R194 2.7K R108 10K C105 2.2uF 10V A_DIM
R124 1K OPT
DTV/MNT_V_OUT
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BCM35230
MAIN & NAND FLASH
2010.09.18 1
POWER 2.5V
+2.5V_BCM35230 L202 BLM18PG121SN1D +0.9V_CORE NFM18PS105R0J C233 6.3V C221 0.1uF C223 0.01uF IN OUT GND NFM18PS105R0J C204 6.3V IN OUT GND +2.5V_BCM35230 EPHY_VDD25 C247 22uF +0.9V_CORE C249 10uF 10V C253 10uF 10V C256 0.1uF C258 0.1uF AADC_AVDD25
+2.5V_BCM35230 L205 BLM18PG121SN1D
ADAC_AVDD25
CORE 0.9V
+0.9V_CORE L209 BLM18PG121SN1D HDMI_AVDD +0.9V_CORE USB_AVDD +0.9V_CORE VAFE2_DVDD L214 BLM18PG121SN1D L219 BLM18PG121SN1D C292 22uF C296 4.7uF C299 0.1uF
+3.3V_Normal
BCM_FRC/URSA5 R251 1K
FRC2/URSA5 R250 1K
T2_TUNER R255 1K
S_TUNER R256 1K
C225 0.22uF 6.3V PHM R257 1K
C261 10uF 10V
C263 4.7uF
C267 0.1uF
C271 0.01uF
C274 22uF
C280 0.1uF
C284 22uF
C285 4.7uF
C288 0.1uF
FHD R252 1K
OLED R253 1K
R254 1K
+2.5V_BCM35230 +0.9V_CORE PLL_AUD_AVDD +0.9V_CORE L215 BLM18PG121SN1D C281 0.1uF VAFE3_DVDD L210 BLM18PG121SN1D
+0.9V_CORE
PLL_MAIN_AVDD
MODEL_OPT_0 MODEL_OPT_1 MODEL_OPT_2 MODEL_OPT_3 MODEL_OPT_4 C232 4.7uF 10V C234 0.1uF C236 0.1uF
NFM18PS105R0J C244 6.3V C238 IN 4.7uF 10V
+3.3V_Normal
L203 BLM18PG121SN1D C251 0.1uF 16V C252 4.7uF 10V C255 0.1uF C259 10uF 10V C260 4.7uF C262 10uF C266 4.7uF C270 0.1uF C272 0.01uF
L217 BLM18PG121SN1D C294 4.7uF C297 0.1uF
C277 4.7uF
OUT GND
C248 10uF 10V
C287 4.7uF
C290 0.1uF
+2.5V_BCM35230 MODEL_OPT_5 MODEL_OPT_6 NO_FRC/BCM_FRC R260 1K MODEL_OPT_7 NO_FRC/FRC2 R261 1K NO_T2_TUNER R265 1K NO_S_TUNNER R266 1K NO_PHM R267 1K C203 10uF 10V C205 10uF 10V C207 4.7uF 10V C209 4.7uF 10V C211 0.1uF C213 0.1uF C215 0.01uF C220 0.1uF C222 0.01uF +1.5V_DDR
VAFE2_VDD25 +0.9V_CORE PLL_VAFE_AVDD L211 BLM18PG121SN1D
+0.9V_CORE
PLL_MIPS_AVDD
L206 BLM18PG121SN1D
L218 BLM18PG121SN1D
HD R262 1K
LCD R263 1K
OPT R264 1K
C265 4.7uF
C269 0.1uF
C279 4.7uF
C282 0.1uF
C295 4.7uF
C298 0.1uF
+2.5V_BCM35230 L204 BLM18PG121SN1D C250 4.7uF 10V LG FRC2 1 0 external URSA5 1 1
VAFE3_VDD25
+2.5V_BCM35230
PLL_VAFE_AVDD25
L207 BLM18PG121SN1D C257 0.1uF C264 4.7uF C268 0.1uF
MODEL OPTION
NO_FRC MODEL_OPT_0 MODEL_OPT_1 0 0 BCM internal FRC 0 1
C254 4.7uF
POWER 3.3V
+3.3V_Normal USB_AVDD33 +3.3V_Normal L216 BLM18PG121SN1D C283 0.1uF C291 4.7uF C293 0.1uF HDMI_AVDD33 L212 BLM18PG121SN1D
HIGH MODEL_OPT_2 MODEL_OPT_3 MODEL_OPT_4 MODEL_OPT_5 MODEL_OPT_6 MODEL_OPT_7 DDR speed T2 Tuner S Tuner PHM FHD OLED 1333 Support Support Enable
LOW +0.9V_CORE HD LCD
+3.3V_Normal NON_BCM_CAP V12 K10 VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8 VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22 VDDC_23 VDDC_24 VDDC_25 VDDC_26 VDDC_27 VDDC_28 VDDC_29 VDDC_30 VDDC_31 VDDC_32 VDDC_33 VDDC_34 VDDC_35 VDDC_36 VDDC_37 VDDC_38 VDDC_39 VDDC_40 VDDC_41 VDDC_42 L10 POR_VDD VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 L22 AA28 V28 R28 M28 J28 K23 M22 VDDR1_1 VDDR1_2 VDDR1_3 VDDR1_4 VDDR1_5 VDDR1_6 VDDR1_7 VDDR1_8 VDDR1_9 VDDR1_10 VDDR1_11 VDDR1_12 R22 DDR_LDO_VDDO VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 G15 H22 G23 AB9 K7 AB15 L7 AB14 M7 VDDR3_1 VDDR3_2 VDDR3_3 VDDR3_4 VDDR3_5 VDDR3_6 VDDR3_7 VDDR3_8 VDDR3_9 VDDR3_10 VDDR3_11 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 AON_VDDC_1 AON_VDDC_2 AON_POR_VDD U7 AON_VDDR3 T7 T6 AON_VDDR10_1 AON_VDDR10_2 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 K11 K12 L12 M12 N12 P12 R12 T12 U12 W12 K13 L13 M13 N13 P13 R13 T13 U13 W16 K14 L14 M14 N14 P14 R14 T14 U14 K15 L15 M15 N15 P15 R15 T15 U15 K16 L16 M16 N16 P16 R16 T16 U16 K17 L17 M17 N17 P17 R17 T17 U17 W17 K18 K19 H7 G14 AB16 R7 M6 AB23 P7 W7 J7 N7 AB10 AC23 AC6 G19 AA22 J23 J22 K22 J25 N22 N23 M25 P22 R25 V22 W22 W23 V25 AA25 Place as close as possible to the pad C278 0.1uF C202 390pF 50V C206 390pF 50V C273 0.1uF AE7 TVM_OSC_AVDD C276 +3.3V_Normal U6 0.01uF OPT AUX_AVDD33 TVM_OSC_AVSS AC7 C210-*1 220pF 50V BCM_A0/B0 use only for A0/B0 chip C208 390pF 50V C210 390pF 50V BCM_C0 VAFE3_VDD25 D9 D8 E8 F9 E9 F8 VAFE3_DVDD VAFE3_AVDD25_2 VAFE3_AVDD25_3 VAFE3_VSS_1 VAFE3_DVDD25 POR_VDD25 VAFE3_VSS_2 VAFE3_VSS_3 VAFE3_VSS_4 VAFE3_VSS_5 PLL_AUD_AVDD PLL_MAIN_AVDD PLL_MIPS_AVDD PLL_MIPS_AVSS PLL_VAFE_AVDD PLL_VAFE_AVDD25 AD26 VAFE3_VSS_6 VAFE3_DVDD Place as close as possible to the pad C212 390pF 50V C214 390pF 50V VAFE2_DVDD VAFE2_VDD25 D18 E17 D16 D17 VAFE2_DVDD VAFE2_VSS_1 VAFE2_AVDD25_1 VAFE2_VSS_2 VAFE2_AVDD25_2 VAFE2_VSS_3 VAFE2_DVDD25 VAFE2_VSS_4 VAFE2_VSS_5 VAFE2_VSS_6 VAFE3_AVDD25_1 VAFE2_VSS_7 G13 G12 F12 G11 G10 F10 G20 E18 G18 G17 F18 G16 F16 D6 VDAC_AVDD33 VDAC_AVSS G9 VDAC_AVDD33 USB_AVDD USB_AVDD33 D14 E4 D3 USB_AVDD USB_AVDD33 USB_AVSS_1 USB_AVSS_2 SPDIF_IN_AVDD25 SPDIF_IN_AVSS F15 G7 G8 C275 0.1uF OPT +2.5V_BCM35230 AE20 AD20 AC20 AB20 LT0VDD25_1 LT0VDD25_2 LT0VDD25_3 LT0VDD25_4 LT0VSS_1 LT0VSS_2 LT0VSS_3 LT0VSS_4 LT0VSS_5 LT0VSS_6 LT0VSS_7 AB22 AB21 AB19 AC19 AB18 AB17 AC17 +2.5V_BCM35230 HDMI_AVDD HDMI_AVDD33 D5 D4 HDMI0_AVDD HDMI0_AVDD33 HDMI0_AVSS_1 HDMI0_AVSS_2 F6 G6 F24 E25 EPHY_BVDD25 EPHY_AVDD25 EPHY_AVSS F23 EPHY_VDD25 D25 D24 E24 ADACA_AVDD25 ADACC_AVDD25 ADACD_AVDD25 ADACA_AVSS ADACC_AVSS ADACD_AVSS G22 G21 F22 F19 ADAC_AVDD25 AADC_AVDD25 AADC_AVSS C286 4.7uF C289 0.1uF V7 M10 N10 P10 R10 T10 U10 V10 L213 BLM18PG121SN1D VDAC_AVDD33
1600 Not Support Not Support Disable
close to soc
Non_CHB F26 D26 R211 6.04K EPHY_TDP EPHY_TDN EPHY_RDP EPHY_RDN F27 F28 E27 E26 EPHY_TDP EPHY_TDN EPHY_RDP EPHY_RDN GPIO_0 F5 +3.3V_Normal E5 C201 100pF OPT R210 4.87K 1% SIDE_USB_DM SIDE_USB_DP C2 D1 E1 SIDE_USB_CTL1 R286 10K WIFI WIFI_DM WIFI_DP SIDE_USB_OCD2 SIDE_USB_CTL2 PCM_TS_DATA[0-7] PCM_TS_CLK PCM_TS_DATA[0] PCM_TS_DATA[1] PCM_TS_DATA[2] PCM_TS_DATA[3] PCM_TS_DATA[4] OPT R201 0 PCM_TS_DATA[5] PCM_TS_DATA[6] PCM_TS_DATA[7] PCM_TS_SYNC PCM_TS_VAL FE_TS_DATA[0-7] F/NIM_EU_CN R202 TU_TS_CLK 0 FE_TS_DATA[0] FE_TS_DATA[1] R203 FE_TS_DATA[2] R204 FE_TS_DATA[3] R205 FE_TS_DATA[4] R206 FE_TS_DATA[5] R207 FE_TS_DATA[6] R208 FE_TS_DATA[7] R209 CHBO_TS_CLK CHBO_TS_SERIAL CHBO_TS_SYNC CHBO_TS_VAL_ERR PCM_MDI[0-7] PCM_MCLKI PCM_MDI[0] PCM_MDI[1] PCM_MDI[2] PCM_MDI[3] PCM_MDI[4] PCM_MDI[5] PCM_MDI[6] PCM_MDI[7] PCM_MISTRT PCM_MIVAL_ERR 0 F/NIM_EU_CN F/NIM_EU_CN 0 0 F/NIM_EU_CN 0 0 0 0 F/NIM_EU_CN F/NIM_EU_CN F/NIM_EU_CN F/NIM_EU_CN TU_TS_SYNC TS_VAL_ERR M4 L5 M5 L6 N3 N1 N2 M3 M2 L4 N4 K6 J4 K5 J2 J3 K2 K1 K3 L1 L3 L2 TCLKD/GPIO TDATD_0/GPIO TDATD_1/GPIO TDATD_2/GPIO TDATD_3/GPIO TDATD_4/GPIO TDATD_5/GPIO TDATD_6/GPIO TDATD_7/GPIO TSTRTD/GPIO TVLDD/GPIO TCLKA/GPIO TDATA_0/GPIO TDATA_1/GPIO TDATA_2/GPIO TDATA_3/GPIO TDATA_4/GPIO TDATA_5/GPIO TDATA_6/GPIO TDATA_7/GPIO TSTRTA/GPIO TVLDA/GPIO PCI_AD05 PCI_AD06 PCI_AD07 PCI_AD08 PCI_AD09/GPIO PCI_AD10/GPIO PCI_AD11/GPIO PCI_AD12/GPIO PCI_AD13/GPIO PCI_AD14/GPIO PCI_AD15/GPIO PCI_AD16/GPIO PCI_AD17/GPIO PCI_AD18/GPIO PCI_AD19/GPIO P4 T2 R3 R2 P3 P2 P1 R6 N5 T4 P5 MPEG_CLK/GPIO MPEG_D_0/GPIO MPEG_D_1/GPIO MPEG_D_2/GPIO MPEG_D_3/GPIO MPEG_D_4/GPIO MPEG_D_5/GPIO MPEG_D_6/GPIO MPEG_D_7/GPIO MPEG_SYNC/GPIO MPEG_DATA_EN/GPIO PCI_DEVSELB/GPIO R4 U1 T3 /PCM_IRQA T1 T5 MCIF_RESET/GPIO MCIF_SCLK/GPIO MCIF_SCTL/GPIO MCIF_SDI/GPIO MCIF_SDO/GPIO PCI_FRAMEB/GPIO PCI_IRDYB/GPIO PCI_PAR/GPIO PCI_PERRB/GPIO PCI_REQ1B PCI_SERRB/GPIO PCI_STOPB/GPIO PCI_TRDYB/GPIO PCI_CBE00 PCI_CBE01/GPIO PCI_CBE02/GPIO PCI_CBE03 AG11 AD11 AE11 AD13 AE12 AC12 AC13 AH11 AF11 R235 R225 R226 R285 R227 R223 R284 R224 PCI_AD20/GPIO PCI_AD21/GPIO PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 AC14 AG12 AH10 AB7 R283 22 AB13 AC15 AB12 AB11 AE14 AG13 AH13 AF13 AE13 AD12 AF12 AG10 AF10 AE10 AD10 AE9 AE8 AC10 AC11 AC8 AB8 R221 R222 R220 R218 D2 B1 C1 C3 C4 USB_PWRFLT_2/GPIO USB_PWRON_2/GPIO USB_PORT2DN USB_PORT2DP GPIO_4 GPIO_5 GPIO_6 GPIO_7 GPIO_70 GPIO_71 GPIO_72 GPIO_73 GPIO_74 GPIO_75 GPIO_76 GPIO_77 GPIO_78 GPIO_79 USB_PWRFLT_1/GPIO USB_PWRON_1/GPIO J5 R5 V6 H6 AE15 AF15 AG15 AF16 AD16 AE16 AG17 AH17 AE17 AD17 R214 R215 R281 R282 R216 R280 22 USB_PORT1DN USB_PORT1DP PCI_VIO_0 PCI_VIO_1 PCI_VIO_2 W14 W15 W13 USB_MONCDR USB_RREF GPIO_1 GPIO_2 GPIO_3 +3.3V_Normal AGC_SDM_2 AGC_SDM_1 A15 C16 G28 G26 EPHY_VREF EPHY_RDAC NON_BCM_CAP VI_IFP0 VI_IFM0 VDDR_AGC B16 A16 C17 B17 D15
W10 V13 L11 IF_P +3.3V_Normal L201 BLM18PG121SN1D IF_N +3.3V_Normal C229 0.1uF M11 N11 P11 R11 T11 U11 V11 R233 1.2K R234 1.2K SDA1_3.3V SCL1_3.3V W11 V14 L18 M18 N18 P18 R18 T18 U18 V18 W18 V15 L19
C217 16V 0.1uF
100 R241
R212 C218 1K 100 0.1uF R242 16V
AADC_AVDD25 NON_BCM_CAP F20
closed to soc R213 2K C216 IF_AGC 0.01uF
3D_SYNC NON_NTP
C227 33pF 50V
C231 33pF NON_NTP 50V
R287 10K WIFI SIDE_USB_OCD1
M_REMOTE_RX MODEL_OPT_0 CI_DET M_RFModule_RESET EPHY_ACTIVITY EPHY_LINK 22 DTV_ATV_SELECT 22 RF_SWITCH_CTL_2 22 MODEL_OPT_1 22 MODEL_OPT_2 22 MODEL_OPT_3 +3.3V_Normal +1.5V_DDR R240 2.7K Place Cap Very close to R22 Ball 22 PWM_DIM L/DIM0_VS L220 C224 1uF 25V OPT C226 0.1uF 16V OPT MLG1005S22NJT
M19 N19 P19 R19 T19 U19 V19 W19 V16 V17
R228
INSTANT_MODE
R230 22 BCM_L/DIM
+3.3V_Normal 4.7K R232 URSA_RESET FRC2_RESET 4.7K R232-*1
SC_DET/COMP2_DET CHB_RESET TW9910_RESET AV2_CVBS_DET 22 RF_BOOSTER_CTL DSUB_DET PCM_RST 22 MODEL_OPT_4 DC_MREMOTE DD_MREMOTE 22 22 BCM_L/DIM BCM_L/DIM
R231-*1
FRC2_RESET R231 100 URSA_RESET
FRC_RESET Place Cap Very close to R22 Ball C242 0.1uF +3.3V_Normal
T22 T23 U22 Y22
PLL_AUD_AVDD Place as close as possible to the pad PLL_MAIN_AVDD G25 PLL_MIPS_AVDD K4 PLL_VAFE_AVDD AD25 D11 D12
PLL_VAFE_AVDD25 +0.9V_CORE
L/DIM0_MOSI L/DIM0_SCLK
COMP1_DET MODEL_OPT_5 +0.9V_CORE 22 22 22 100 0 OPT 22 22 22 3D_GPIO_0 MODEL_OPT_6 MODEL_OPT_7 ERROR_OUT RF_SWITCH_CTL 3D_GPIO_1 3D_GPIO_2 +3.3V_Normal
N6 P6
AA6 AA7 Y7
BCM35230 MAIN POWER 2 50
DSUB_R+ INCM_R
C320 C321 R311 36
0.1uF 0.1uF
0.1uF 0.1uF NON_BCM_CAP B6 A6 C7 A7 B7 C8 C13 A13 C9 A9 B9 B8 C11 A10 B10 C10 D10 F13 A12 VI_FB_1/GPIO VI_FS1 VI_SC_R1 VI_SC_G1 VI_SC_B1 VI_INCM_SC1 VI_Y1 VI_PR1 VI_PB1 VI_INCM_COMP1 Run Along DSUB_R Trace Run Along DSUB_G Trace Run Along DSUB_B Trace Run Along COMP_Y_IN,COMP_Pr_IN,COMP_Pb_IN Trace Run Along AV2_CVBS Trace Run Along TUNER_CVBS_IF_P Trace Run Along AV1_CVBS Trace Run Along COMP_Y_IN,COMP_Pr_IN,COMP_Pb_IN/SC R,G,B Trace HSYNC_IN VSYNC_IN VI_R VI_INCM_R VI_G VI_INCM_G VI_B VI_INCM_B DSUB_HSYNC DSUB_VSYNC
DSUB_G+ INCM_G
C327 C328 R317 36
DSUB_B+ INCM_B
C322 C323 R312 36
0.1uF 0.1uF
BCM35230_with_CAP_220pF
IC101-*1 LGE35230
COMP1_Y COMP1_Pr COMP1_Pb C329 C330 C331 C332 C333 C334 C335 C336 INCM_VID_COMP1 R310 0 SC_FB 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
VIDEO INCM
Near P801 Near P801 Near P801 Near JK1101 Near JK1104 Near TU2101/2 TU2201/2/3 Near JK1102 Near
JK1103 JK2501
B6 BCM_CAP A6 C7 A7 B7 INCM_R INCM_G INCM_B C9 INCM_VID_COMP1 INCM_VID_AV2 INCM_TUNER INCM_VID_AV1 INCM_VID_SC/COMP2 D10 A9 B9 B8 C11 A10 B10 C10 C8 C13 A13
VI_R VI_INCM_R VI_G VI_INCM_G VI_B VI_INCM_B HSYNC_IN VSYNC_IN VI_Y1 VI_PR1 VI_PB1 VI_INCM_COMP1 VI_SC_R1 VI_SC_G1 VI_SC_B1 VI_INCM_SC1 VI_FB_1/GPIO VI_FS1
SC_R/COMP2_Pr SC_G/COMP2_Y SC_B/COMP2_Pb
C12 B12 B11 E12 E14 E15
VI_SC_R2 VI_SC_G2 VI_SC_B2 VI_INCM_SC2 VI_FB_2/GPIO VI_FS2
INCM_VID_SC/COMP2 R318 0 SC_CVBS_IN AV2_CVBS_IN INCM_VID_AV2 C303 C304 0.1uF 0.1uF NON_EU R325 0 INCM_TUNER R306 75 1% OPT 0.1uF 0.1uF +2.5V_BCM35230 C325 C326 R316 36 0.1uF 0.1uF INCM_VID_SC
F17 E16 F14 E11 C18 B18 A18 C19 A19 B19 C20 B20 E19 R313 10K D19 E10 F11 R314 12K +2.5V_BCM35230
VI_L1 VI_C1_1 VI_INCM_LC1_1 VI_C1_2 VI_INCM_LC1_2 VI_CVBS1 VI_INCM_CVBS1 VI_CVBS2 VI_INCM_CVBS2 VI_CVBS3 VI_INCM_CVBS3 VI_CVBS4 VI_INCM_CVBS4 VI_SIF1_1 VI_INCM_SIF1_1 VI_SIF1_2 VI_INCM_SIF1_2
F13 A12 C12 B12 B11 E12 E14 E15 F17 E16 F14 E11 C18 B18 A18 C19 A19 B19
VI_SC_R2 VI_SC_G2 VI_SC_B2 VI_INCM_SC2 VI_FB_2/GPIO VI_FS2 VI_L1 VI_C1_1 VI_INCM_LC1_1 VI_C1_2 VI_INCM_LC1_2 VI_CVBS1 VI_INCM_CVBS1 VI_CVBS2 VI_INCM_CVBS2 VI_CVBS3 VI_INCM_CVBS3 VI_CVBS4 VI_INCM_CVBS4
R303 36 TU_CVBS EU R325-*1 10 AV1_CVBS_IN INCM_VID_AV1 C317 C318 R304 36
TU_SIF
C319 R305 240 OPT
0.1uF
R319 10K OPT INCM_SIF C324 R315 120 OPT 0.1uF R320 12K OPT
C20 B20 E19 D19 E10 F11
VI_SIF1_1 VI_INCM_SIF1_1 VI_SIF1_2 VI_INCM_SIF1_2
NON_BCM_CAP B15 C15 +3.3V_Normal C14 B14 R301 1.2K SCL3_3.3V SDA3_3.3V C301 33pF 50V C302 33pF 50V PC_L_IN PC_R_IN INCM_AUD_PC AV1_L_IN AV1_R_IN INCM_AUD_AV1 AV2_L_IN AV2_R_IN INCM_AUD_AV2 SC/COMP2_L_IN SC/COMP2_R_IN INCM_AUD_SC/COMP2 R302 1.2K G4 F4 G5 I2SSCK_IN/GPIO I2SWS_IN I2SSD_IN/GPIO I2SSCK_OUTC/GPIO I2SWS_OUTC/GPIO I2SSD_OUTC/GPIO C305 C306 C307 C308 C309 C310 C311 C312 C313 C314 C315 C316 1uF 10V 1uF 10V 1uF 10V 1uF 10V 1uF 10V 1uF 10V 1uF 10V 1uF 10V 1uF 10V 1uF 10V 1uF 10V 1uF 10V C25 B24 A24 E22 E23 D23 C24 C23 B23 E21 D21 D22 B22 C22 A22 F21 D20 E20 A21 C21 B21 AADC_LINE_L7 AADC_LINE_R7 AADC_INCM7 ADAC_DR_N ADAC_DR_P ADAC_DL_N ADAC_DL_P A26 B26 AADC_LINE_L6 AADC_LINE_R6 AADC_INCM6 ADAC_CR_N ADAC_CR_P B25 A25 AADC_LINE_L5 AADC_LINE_R5 AADC_INCM5 ADAC_CL_N ADAC_CL_P B27 B28 AADC_LINE_L4 AADC_LINE_R4 AADC_INCM4 ADAC_AR_N ADAC_AR_P C26 A27 ADAC_AL_N ADAC_AL_P D28 D27 AADC_LINE_L3 AADC_LINE_R3 AADC_INCM3 AUDMUTE_0/GPIO AUDMUTE_1 C28 C27 HP_LOUT_N HP_LOUT_P HP_ROUT_N HP_ROUT_P SCART1_Lout_N SCART1_Lout_P SCART1_Rout_N SCART1_Rout_P AADC_LINE_R2 AADC_INCM2 SPDIF_OUTA/GPIO AG8 E13 B13 SPDIF_OUT AADC_LINE_L1 AADC_LINE_R1 AADC_INCM1 I2SSCK_OUTD/GPIO I2SWS_OUTD/GPIO I2SSD_OUTD/GPIO AADC_LINE_L2 I2SSOSCK_OUTD/GPIO I2SSOSCK_OUTC/GPIO G2 G3 G1 H1 SC_RE1 SC_RE2 /RST_HUB S2_RESET SPDIF_IND_P SPDIF_IND_N M_REMOTE_TX SPDIF_INC_P SPDIF_INC_N I2SSCK_OUTA/GPIO I2SWS_OUTA/GPIO I2SSD_OUTA0/GPIO I2SSOSCK_OUTA/GPIO I2SSD_OUTA1/GPIO I2SSD_OUTA2/GPIO E2 F2 E3 F3 HP_DET AV1_CVBS_DET TU_RESET AF8 AF9 AG9 AC9 AD8 AD9 R326 R327 R328 R329 100 100 100 100 C337 22pF OPT C338 22pF OPT C339 22pF OPT C340 33pF OPT AUD_SCK AUD_LRCK AUD_LRCH AUD_MASTER_CLK
TU_RESET_SUB
AUDIO INCM
Near JK1102 Near
JK1103 JK2501 R321 R322 R323 R324 0 0 0 0 Route Between AV1_L_IN & AV1_R_IN Trace Route Between SC/COMP2_L_IN & SC/COMP2_R_IN Trace Route Between AV2_L_IN & AV2_R_IN Trace Route Between PC_L_IN & PC_R_IN Trace
PHONE JACK
INCM_AUD_AV1 INCM_AUD_SC/COMP2 INCM_AUD_AV2 INCM_AUD_PC
Near JK1104 Near JK801
Near TU2101/2 TU2201/2/3
Route Along With TUNER_SIF_IF_N
INCM_SIF
BCM35230
MAIN AUDIO/VIDEO
50
DUAL COMPONENT IC401,IC402 IC401-*1 IC402-*1 1ST : EAN61667501, 2ND : EAN61570701 1ST : T-K4B2G1646B_HCK0, 2ND : T-H5TQ2G63BFR-PBC
DDR STRAP
DDR_DQ[0] DDR_DQ[1] DDR_DQ[2] DDR_DQ[3] DDR_DQ[4] NFM18PS105R0J C410 6.3V C403 2.2uF C405 10uF C407 2.2uF IN OUT GND C417 470pF C421 2.2uF C423 10uF C425 10uF +1.5V_DDR NFM18PS105R0J C432 6.3V IN OUT GND +1.5V_DDR
R401 4.7K DDR_1333
R403 4.7K
R405 4.7K DDR_1333
R407 4.7K
R409 4.7K OPT
JEDEC Types : DDR_DQ[0:4] 00001 : DDR3-1333H (CasL=9) 10101 : DDR3-1600K (CasL=11) (O)
DDR_DQ[10] DDR_DQ[9] DDR_DQ[7] DDR_DQ[8] DDR_DQ[6] DDR_DQ[5] C455 1uF 6.3V +1.5V_DDR NFM18PS105R0J C402 6.3V IN OUT GND C453 1uF 6.3V C454 1uF 6.3V C412 1uF
+1.5V_DDR NFM18PS105R0J C433 6.3V IN OUT GND C426 1uF
+1.5V_DDR
R402 4.7K OPT
R432 4.7K OPT
R404 4.7K OPT
R406 4.7K OPT
R408 4.7K
R410 4.7K OPT
Bus Width : DDR_DQ[10] 0 - 16b 1 - 32b (O) Chip Width : DDR_DQ[8] 0 - 8b 1 - 16b (O) Chip Size : DDR_DQ[6:5] 00 - 4Gbit 01 - 2Gbit (O) 10 - 1Gbit 11 - 512Mbit
+1.5V_DDR +1.5V_DDR +1.5V_DDR
IC401 K4B2G1646C
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 NC_5 DDR_BAA0 DDR_AA7 DDR_AA8 DDR_AA9 DDR_AA10 DDR_AA11 DDR_AA12 DDR_AA13 DDR_AA14 DDR_BAA0 DDR_BAA1 DDR_BAA2 DDR_RASb DDR_CASb DDR_WEb DDR_QS0 DDR_CKE DDR01_CLK DDR01_CLKb DDR23_CLK DDR23_CLKb DDR_VREFA DDR_RESETb 240 1% DDR_DQ[0-7] DDR_QS0b DDR_QS1 DDR_QS1b DDR_DM[0] DDR_DM[1] DDR_DQ[0] DDR_DQ[1] DDR_DQ[2] DDR_DQ[3] DDR_DQ[4] DDR_DQ[5] DDR_DQ[6] DDR_DQ[8-15] DDR_DQSA_P_2 DDR_DQSA_N_2 K25 K26 DDR_DQSA_P_3 DDR_DQSA_N_3 DDR_DQ[8] DDR_DQ[14] DDR_DQ[13] DDR_DQ[12] DDR_DQ[9] DDR_DQ[10]
IC401-*2 NT5CB128M16BP-CG
DDR_1333_NANYA N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 NC_5 M2 N8 M3 J7 K7 K9 L2 K1 J3 K3 L3 T2 RESET CS ODT RAS CAS WE NC_1 NC_2 NC_3 F3 G3 C7 B7 E7 D3 E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 B1 B9 D1 D8 E2 E8 F9 G1 G9 D7 C3 C8 C2 A7 A2 B8 A3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 DML DMU DQSU DQSU VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 DQSL DQSL A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 E3 F7 F2 F8 H3 H8 G2 H7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 B1 B9 D1 D8 E2 E8 F9 G1 G9 D7 C3 C8 C2 A7 A2 B8 A3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 E7 D3 DML DMU NC_4 NC_7 CK CK CKE BA0 BA1 BA2 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 J1 J9 L1 L9 T7 F3 G3 C7 B7 DQSU DQSU VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 DQSL DQSL A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 E3 F7 F2 F8 H3 H8 G2 H7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 B1 B9 D1 D8 E2 E8 F9 G1 G9 D7 C3 C8 C2 A7 A2 B8 A3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 E7 D3 DML DMU C7 B7 DQSU DQSU VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 T2 RESET A1 A8 C1 C9 D2 E9 F1 H2 H9 L2 K1 J3 K3 L3 CS ODT RAS CAS WE NC_1 NC_2 NC_3 NC_4 NC_7 J7 K7 K9 CK CK CKE A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 NC_6 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 B2 D9 G7 K2 K8 N1 N9 R1 R9 M2 N8 M3 BA0 BA1 BA2 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 J1 J9 L1 L9 T7 F3 G3 DQSL DQSL A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 E3 F7 F2 F8 H3 H8 G2 H7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 B1 B9 D1 D8 E2 E8 F9 G1 G9 E7 D3 DML DMU T2 RESET A1 A8 C1 C9 D2 E9 F1 H2 H9 L2 K1 J3 K3 L3 CS ODT RAS CAS WE NC_1 NC_2 NC_3 NC_4 NC_7 J7 K7 K9 CK CK CKE M7 NC_5 ZQ L8 VREFDQ H1 VREFCA M8 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 NC_6 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 B2 D9 G7 K2 K8 N1 N9 R1 R9 M2 N8 M3 BA0 BA1 BA2 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 J1 J9 L1 L9 T7 F3 G3 C7 B7 DQSU DQSU VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 DQSL DQSL A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 T2 RESET A1 A8 C1 C9 D2 E9 F1 H2 H9 L2 K1 J3 K3 L3 CS ODT RAS CAS WE NC_1 NC_2 NC_3 NC_4 NC_7 J7 K7 K9 CK CK CKE M7 NC_5 ZQ L8 VREFDQ H1 VREFCA
R416 4.99K 1% N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 NC_5 DDR_BAA0 DDR_BAA1 DDR_BAA2 A1 M2 N8 M3 J7 K7 R418 56 1% R419 56 1% C419 1000pF DDR_CKE +1.5V_DDR R420 DDR_RASb DDR_CASb DDR_WEb J1 NC_1 J9 L1 L9 T7 DDR_AA14 DDR_QS2 DDR_QS2b A9 DDR_QS3 DDR_QS3b DDR_DM[2] DDR_DQ[16-23] DDR_DM[3] DDR_DQ[16] DDR_DQ[17] DDR_DQ[18] DDR_DQ[19] DDR_DQ[20] DDR_DQ[21] DDR_DQ[22] DDR_DQ[24-31] B1 DDR_DQ[23] DDR_DQ[24] DDR_DQ[30] DDR_DQ[29] DDR_DQ[28] DDR_DQ[25] DDR_DQ[26] DDR_DQ[31] DDR_DQ[27] F3 G3 C7 B7 E7 D3 E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 DML DMU DQSU DQSU DQSL DQSL NC_2 NC_3 NC_4 DDR_RESETb T2 10K K9 L2 K1 J3 K3 L3 CS ODT RAS CAS WE CK CK CKE BA0 BA1 BA2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9
IC402 K4B2G1646C
M8 VREFCA
R422 4.99K 1% DDR_RESETb
R429 82
R430 4.7K OPT
DDR_1333_SS A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 BA0 BA1 BA2 VDDQ_1 CK CK CKE VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 CS ODT RAS CAS WE VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 VDD_9 ZQ VREFDQ VREFCA
DDR_DQ[0-7] DDR_DQ[0] DDR_DQ[1] DDR_DQ[2] DDR_DQ[3] DDR_DQ[4] DDR_DQ[5] DDR_DQ[8-15] DDR_DQ[6] DDR_DQ[7] DDR_DQ[8] DDR_DQ[9] DDR_DQ[10] DDR_DQ[11] DDR_DQ[12] DDR_DQ[13] DDR_DQ[16-23] DDR_DQ[14] DDR_DQ[15] DDR_DQ[16] DDR_DQ[17] DDR_DQ[18] DDR_DQ[19] DDR_DQ[20] DDR_DQ[21] DDR_DQ[24-31] DDR_DQ[22] DDR_DQ[23] DDR_DQ[24] DDR_DQ[25] DDR_DQ[26] DDR_DQ[27] DDR_DQ[28] DDR_DQ[29] DDR_DQ[30] DDR_DQ[31] DDR_DM[0-3] DDR_DM[0] DDR_DM[1] DDR_DM[2] DDR_DM[3] T26 P25 J27 K24 DDR_DMA_0 DDR_DMA_1 DDR_DMA_2 DDR_DMA_3 DDR_VREFA DDR_QS0 DDR_QS0b DDR_QS1 DDR_QS1b DDR_QS2 DDR_QS2b DDR_QS3 DDR_QS3b T27 T28 P24 P23 K27 K28 DDR_DQSA_P_1 DDR_DQSA_N_1 DDR_DQSA_P_0 DDR_DQSA_N_0 DDR_ZQ DDR_RST_N W26 R411 AA23 DDR_CKA23_P DDR_CKA23_N U23 U26 R26 U27 R27 V27 P26 U25 P27 R24 N24 T25 M23 R23 N25 T24 N26 L26 H27 L27 J26 M27 G27 M26 H26 L23 H25 L24 J24 M24 H23 L25 H24 DDR_DQA_0 DDR_DQA_1 DDR_DQA_2 DDR_DQA_3 DDR_DQA_4 DDR_DQA_5 DDR_DQA_6 DDR_DQA_7 DDR_DQA_8 DDR_DQA_9 DDR_DQA_10 DDR_DQA_11 DDR_DQA_12 DDR_DQA_13 DDR_DQA_14 DDR_DQA_15 DDR_DQA_16 DDR_DQA_17 DDR_DQA_18 DDR_DQA_19 DDR_DQA_20 DDR_DQA_21 DDR_DQA_22 DDR_DQA_23 DDR_DQA_24 DDR_DQA_25 DDR_DQA_26 DDR_DQA_27 DDR_DQA_28 DDR_DQA_29 DDR_DQA_30 DDR_DQA_31 DDR_CKA01_P DDR_CKA01_N N28 N27 DDR_CKEA W27 W28 DDR_RASA_N DDR_CASA_N DDR_WEA_N U24 DDR_BAA_0 DDR_BAA_1 DDR_BAA_2 V24 W25 V26 DDR_ADA_7 DDR_ADA_8 DDR_ADA_9 DDR_ADA_10 DDR_ADA_11 DDR_ADA_12 DDR_ADA_13 DDR_ADA_14 Y27 AB28 W24 DDR_ADA_ALT_4 DDR_ADA_ALT_5 DDR_ADA_ALT_6 AB25 AD28 Y25 AA27 AC27 AA26 AA24 AD27 DDR_ADA_4 DDR_ADA_5 DDR_ADA_6 AB24 AC25 AC24 DDR_ADA_0 DDR_ADA_1 DDR_ADA_2 DDR_ADA_3 AB26 Y24 AC26 NON_BCM_CAP V23 AB27 Y23 Y26 DDR_AA0 DDR_AA1 DDR_AA2 DDR_AA3 DDR01_AA4 DDR01_AA5 DDR01_AA6 DDR23_AA4 DDR23_AA5 DDR23_AA6
DDR_AA0 DDR_AA1 DDR_AA2 DDR_AA3 DDR01_AA4 DDR01_AA5 DDR01_AA6 DDR_AA7 DDR_AA8 DDR_AA9 DDR_AA10 DDR_AA11 DDR_AA12 DDR_AA13
M8
C415 0.01uF
R417 4.99K 1%
DDR_AA0 DDR_AA1 DDR_AA2 DDR_AA3 DDR23_AA4 DDR23_AA5 DDR23_AA6
DDR_1333_SS
C435 0.01uF
R423 4.99K 1% R428 82 DDR_CKE C437 100pF +1.5V_DDR
C442 100pF
H1 C416 0.01uF L8 R415 1% B2 D9 G7 K2 K8 N1 N9 R1 R9 240
H1 VREFDQ C436 0.01uF L8 ZQ R421 1% B2 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 D9 G7 K2 K8 N1 N9 R1 R9 240
DDR_VREFA
DDR_VREFA
R431 4.7K OPT
+1.5V_DDR
DDR_AA7 DDR_AA8 DDR_AA9 DDR_AA10 DDR_AA11 DDR_AA12 DDR_AA13
DDR_AA13 DDR_AA14 DDR_AA2 DDR_AA11 DDR_AA3 DDR_AA7 DDR_AA9 DDR_AA8 DDR_AA0 DDR_AA1 DDR_BAA0 DDR_BAA2 DDR_BAA1 DDR_AA10 DDR_AA12 DDR_WEb
R424 R425 AR401
56 56 56 C404 C406 0.1uF 0.1uF OPT C438 1uF
A10/AP A11 A12/BC A13
AR402
56 C450 C408 0.1uF 0.1uF 1uF 0.1uF 0.1uF
M2 N8 M3 J7 K7 K9 L2 10K K1 J3 K3 L3 T2 RESET
DDR_BAA1 DDR_BAA2 DDR01_CLK DDR01_CLKb R412 56 1% R413 56 1% C401 1000pF DDR_CKE +1.5V_DDR R414 DDR_RASb DDR_CASb DDR_WEb DDR_RESETb
A1 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 J1 NC_1 J9 L1 L9 T7 DDR_AA14 NC_2 NC_3 NC_4 NC_6 A8 C1 C9 D2 E9 F1 H2 H9
AR403
56 C439
A8 C1 C9 D2 E9 F1 H2 H9
DDR23_CLK DDR23_CLKb
C409 AR404 56 C451
C411 DDR23_AA6 DDR23_AA4 DDR23_AA5 DDR01_AA6 DDR01_AA4 DDR01_AA5 DDR_CASb R426 R427 56 56 C441 AR406 56 C452 AR405 56 C440
0.1uF 1uF
RESET
0.1uF
F3 G3 C7 B7 E7 D3 E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 DML DMU DQSU DQSU DQSL DQSL
NC_6
A9 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12
N3 P7 P3 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 M7 NC_5 M2 N8 M3 J7 K7 CK CK CKE L2 K1 CS ODT RAS CAS WE T2 RESET NC_1 NC_2 NC_3 F3 G3 C7 B7 E7 D3 E3 DML DMU DQSU DQSU VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 D7 C3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 C8 C2 A7 A2 B8 A3 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 B1 B9 D1 D8 E2 E8 F9 G1 G9 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 DQSL DQSL A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 NC_4 NC_6 K9 BA0 BA1 BA2 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 J1 J9 L1 L9 T7 A1 A8 C1 C9 D2 E9 F1 H2 H9 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 B2 D9 G7 K2 K8 N1 N9 R1 R9 ZQ L8 VREFDQ H1 DDR_1600_SS VREFCA M8
DDR_RASb
1uF
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12
B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
IC401-*1 K4B2G1646C-HCK0
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 NC_5 M2 N8 M3 J7 K7 K9 L2 K1 J3 K3 L3 T2 RESET CS ODT RAS CAS WE NC_1 NC_2 NC_3 F3 G3 C7 B7 E7 D3 E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 B1 B9 D1 D8 E2 E8 F9 G1 G9 DML DMU DQSU DQSU VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 DQSL DQSL A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 NC_4 NC_6 CK CK CKE BA0 BA1 BA2 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 J1 J9 L1 L9 T7 A1 A8 C1 C9 D2 E9 F1 H2 H9 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 B2 D9 G7 K2 K8 N1 N9 R1 R9 ZQ L8 VREFDQ H1
IC402-*1 K4B2G1646C-HCK0
DDR_1600_SS VREFCA M8
DDR_DQ[7]
B1 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 B9 D1 D8 E2 E8 F9 G1 G9
N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9
B9 D1 D8 E2 E8 F9 G1 G9
IC402-*2 NT5CB128M16BP-CG
DDR_1333_NANYA M8 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3
IC401-*3 NT5CB128M16BP-DI
DDR_1600_NANYA M8 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 NC_6 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 B2 D9 G7 K2 K8 N1 N9 R1 R9 M2 N8 M3 M7 ZQ L8 VREFDQ H1 VREFCA N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3
DDR_DQ[15]
IC402-*3 NT5CB128M16BP-DI
DDR_1600_NANYA M8 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 NC_6 NC_5 BA0 BA1 BA2 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 J1 J9 L1 L9 T7 A1 A8 C1 C9 D2 E9 F1 H2 H9 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 B2 D9 G7 K2 K8 N1 N9 R1 R9 ZQ L8 VREFDQ H1 VREFCA
DDR_DQ[11]
J3 K3 L3
F7 F2 F8 H3 H8 G2 H7
BCM35230 MAIN DDR 4 50
DUAL COMPONENT
+12V
FROM LIPS & POWER B/D

+3.5V_ST RT1P141C-T112 Q502 R508 4.7K RL_ON R502 10K C B Q501 2SC3052 E 3 2 NORMAL_26~55 P502 FW20020-24S +24V 1
Q501,Q504, Q505,Q506 Q502 Q507 IC502,IC503
1ST : 0TRIY80001A
2ND : 0TR387500AA
L511 12V_PANEL MLB-201209-0120P-N2
PANEL_POWER
C550 0.01uF 50V C551 0.1uF 50V Q507 AO3407A S 5V_PANEL R558-*1 22K D PANEL_DISCHARGE_REG R575 1/8W 2K PANEL_DISCHARGE_REG R576 R558 R559 10K 1.8K 12V_PANEL12V_PANEL
TYP 1450mA
1ST : 0TRIH80004A, 2ND : EBK61012501, 3RD : 0TR102009AM 1ST : EBK60752501, 2ND : EBK61011501 1ST : EAN61151001, 2ND : EAN60670101
PANEL_VCC
4 6 8 10 12 14 16 18 20 22 24
24V GND GND 3.5V 3.5V GND GND/V-sync INV ON A.DIM P.DIM1 Err OUT POWER_16_GND C519 0.1uF 50V POWER_16_URSA_SCAN R574 0 R573 0 POWER_16_BCM_SCAN
1/8W 2K
PWR ON 1 24V 3 GND 5 7 9 11 13 15 17 19 21 23 GND 3.5V 3.5V
24V
L504 MLB-201209-0120P-N2
C552 10uF 25V
C560 OPT 1uF 25V
5V_PANEL R559-*1 2.7K
+3.5V_ST
L503 MLB-201209-0120P-N2
OS Module OPT
L_VS L/DIM0_VS INV_CTL_18 A_DIM_20 PWM_DIM_22 ERROR_OUT_24 A_DIM_20 INV_CTL_18 R533 0 POWER_20_A_DIM R531 0 POWER_20_PWM_DIM R538 0 +3.3V_Normal R523 4.7K ERROR_OUT_PULL_UP R529 0 POWER_20_ERROR_OUT ERROR_OUT +3.3V_Normal R546 1K A_DIM PWM_DIM R526 0 R527 0 POWER_24_PWM_DIM R540 0 NON_OPC/NON_IOP C R543 6.8K OPT E B R547 10K +3.5V_ST INV_CTL L517 BLM18PG121SN1D POWER_18_A_DIM A_DIM PANEL_CTL A_DIM E PWM_DIM R553 47K B C R532 100 POWER_18_INV_CTL OPT R554 10K
R555 22K
C563 0.1uF 50V 21:9_PANEL_DISCHARGE_REG 21:9_PANEL_DISCHARGE_REG
C508 0.1uF 16V
GND GND 12V 12V
C Q506 2SC3052 E
+12V L501 MLB-201209-0120P-N2 C506 0.1uF 50V
12V GND/P.DIM2
Q505 2SC3052
R557 22K
SLIM_32~55 25 SMAW200-H24S2 P501
R518 0
+3.5V_ST
#16/#20/#23 LD - GND OR USE LE(N.L.D.) - OPEN LE(L.D.) - USE
POWER_22_A_DIM R535 0 PWM_DIM_22 POWER_22_PWM_DIM
R551 10K
+1.5V_DDR
OPT
Max 800mA
Q504 2SC3052
IC508 AP7173-SPG-13 HF(DIODES)

[EP]
+1.5V_DDR
R552 10K OPT
POWER_24_GND
+12V
+3.5V_ST
R524
R517 100K
+3.5V_ST R522 10K OPT R520 100 POWER_DET
R541 0 POWER_24_ERROR_OUT
ERROR_OUT VCC R591 10K
PG
THERMAL
Power_DET
PD_+12V R512 2.7K 1% PD_+3.5V R515 0 5% VCC NON_PD_+3.5V R513 1.21K 1% C580 0.1uF 16V IC503 NCP803SN293 RESET
ERROR_OUT_24
POWER_24_INV_CTL 100 R537
IN
OUT
FB R595 4.3K 1% C593 560pF 50V
SS
R1
C594 22uF 10V C591 0.1uF 16V
1.5A
EN 4 5 GND R593 3.9K 1% R2 R592 1K 1%
POWER_ON/OFF1
3 1 GND
<OS MODULE PIN MAP> PIN No LGD INV_ON

V4:VBR-A V5:NC
CMO(09) A-DIM NC
AUO INV_ON
SHARP INV_ON
C590 10uF 10V
ESD C520 0.1uF 16V
18 20
Err_out Err_out A-DIM PWM_DIM PWM_DIM GND
+24V
NON_PD_+3.5V R516 100K not to RESET at 8kV ESD NON_PD_+3.5V IC502 NCP803SN293 VCC RESET R519 100 NON_PD_+3.5V
22 24
PWM_DIM PWM_DIM
Err_out LED:GND
Vout=0.8*(1+R1/R2)
PD_+20V R510-*4 5.6K 1%
PD_+18.5V R510-*3 4.7K 1%
PD_24V R510 8.2K 1%
INV_ON
3 1
PD_+20V R511-*4 1.3K 1%
PD_+18.5V R511-*3 1.21K 1%
PD_24V R511 1.5K 1%
C581 GND 0.1uF 16V NON_PD_+3.5V
15V-->3.6V 20V-->3.5V 24V-->3.48V 12V-->3.58V ST_3.5V-->3.5V
CHECK PWR/MODULE PIN MAP
+5V_Normal
Vout=0.8*(1+R1/R2)
MAX 1A
+3.3V_NORMAL
+12V
R542
MAX 2.8A
VIN
+12V
IC507 AOZ1073AIL-3
PGND LX_2 L516 3.6uH NR8040T3R6N
+0.9V_CORE_BCM35230
+12V L507 BLM18PG121SN1D L502 BLM18PG121SN1D
POWER_ON/OFF2_2 OPT C532 0.1uF 16V 10K +3.3V_Normal
EN
L514 BLM18PG121SN1D
Max 7350 mA
EN
6
VIN
2
DCDC_NEW
R1
R548 27K
COMP
5 EAN60660602 3 1
FB
COMP R564 12K
2200pF C557
L509 3.6uH
C546 10uF 16V
4A
IC505
AOZ1024DI
DCDC_OLD
3 7
R572 10K
AGND
PGND
1%
C503 10uF 16V
C505 10uF 16V
C528 10uF 16V
5 EAN60660601 1
R525 13K C530 3300pF 50V
1%
COMP
R549 4.7K
C537 OPT 50V
AGND
PGND
FB
LX
C534 22uF 10V
C535 22uF 10V
1%
Placed on SMD-TOP
R566 10K OPT C559 0.1uF 16V
R571 3.6K
AOZ1024DI(SORTING)
OPT C565 100pF 50V
R550 10K
Vout=0.8*(1+R1/R2)
1%
1/16W 1%
FB
IC505-*1
LX
Placed on SMD-TOP
AGND
3A
EN
POWER_ON/OFF2_1
1%
R570 51K
VIN
LX_1
R1
C568 22uF 10V
C570 22uF 10V
R2
POWER_ON/OFF2_2
Q503 AON7430
Switching freq: 500K
R2
4 G
R503 1K C504 100pF 50V

3 S_3
+5V_USB+WIFI
Vout=0.8*(1+R1/R2)
+0.9V_CORE L505 1uH C522 22uF 10V
MAX 1.9A
IC501 TPS40192DRCR
EP_GND
2 S_2

+12V
3K R575-*1 1/8W C571 22uF 16V OPT
1/8W
+5V_Normal
ENABLE
1 THERMAL 11
10
HDRV R577 C515 0.47uF 25V SW 4.7
S_1
0.9V_CORE_FB R504 2K C509 C510 0.01uF 50V 50V 220pF
FB
COMP
BOOT
OPT C523 22uF 10V
OPT C524 47uF 10V
+2.5V_BCM35230
C525 10uF 10V +3.5V_ST 1 THERMAL 120-ohm L506 POWER_ON/OFF2_1 OPT R528 10K PG 2 EN 3 R536 10K 8 GND 9 7 ADJ 6 VOUT 4 VCTRL EAN61387601
+2.5V_BCM35230
IC506 AOZ1073AIL-3
PGND LX_2 L515 3.6uH NR8040T3R6N 1% 2 7 R567 51K VIN LX_1
+5V_USB
Max 960 mA
[EP]
IC504 AP2132MP-2.5TRG1
L513 BLM18PG121SN1D
C516 4.7uF 10V
+3.3V_Normal TEST R507 10K OPT
VDD
LDRV
R578
4.7
S_3 3
R568 1.5K
S_2
C507 1000pF 50V R506 330
C513 0.1uF 16V
S_1
R545 56K R1 1%
FB
COMP R563 12K
2700pF C555
PGD
BP5
R544 18K R2 1%
Placed on SMD-TOP C545 10uF 16V
AGND
3A
EN
POWER_ON/OFF2_1 R565 10K OPT C558 0.1uF 16V 1%
R1
C567 22uF 10V
AON7200 Q508
C527 10uF +5V_Normal 6.3V
R505 6.8K R501 12K 1/16W 1%
C533 0.1uF OPT
VIN
OPT C564 100pF 50V
2A
5 NC C538 47uF 10V C539 10uF 6.3V R569 10K 1%
R1
0.9V_CORE_FB
R2
R2
Vout=0.591*(1+R1/R2) Switching
freq: 600K
C531 1uF OPT
Vout=0.8*(1+R1/R2)
Vout=0.6*(1+R1/R2) THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
BCM35230 POWER
58
3K R576-*1
NEC MICOM
GND FLMD0 47K 10K +3.5V_ST
OPT
R639
C602 50V 13pF
C603 50V 13pF
R641 MICOM_DOWNLOAD 0
15pF
15pF
For Debug
P601
12505WS-12A00
X601 10MHz
R637
X602 +3.5V_ST MICOM_RESET R615 22 NEC_ISP_Tx 32.768KHz
MICOM_RESET
WIRELESS_DET
+3.5V_ST
WIRELESS_PWR_EN
C606
C607
10Mhz Crystal
R642 4.7M OPT
+3.5V_ST
R617
22
NEC_ISP_Rx 47K OCD1A
P122/X2/EXCLK/OCD0B
OCD1B R621 22
+3.5V_ST
GND
R644
10
SW1 JTP-1127WEM 2 1 3 270K OPT
22
11
12 13
P124/XT2/EXCLKS
0.1uF
R645
FLMD0
P120/INTP0/EXLVI
P121/X1/OCD0A
R606
10K C604 0.1uF
C608 0.1uF 16V
C605
P123/XT1
R643
R607 R610
10K 10K
NEC_ISP_Rx NEC_ISP_Tx
+3.5V_ST
R647
20K 1/16W 1%
FLMD0
RESET
REGC
VDD
VSS
P40
R626 4.7K
R628 4.7K
48
47
46
45
44
43
42
41
40
39
38
P41
37
SCL2_3.3V SDA2_3.3V
R629 R630
22 22
P60/SCL0 P61/SDA0 P62/EXSCL0 P63 P33/TI51/TO51/INTP4 P75 P74
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 NEC_MICOM
36 35 34 33 32 31 30 29 28 27 26 25
P140/PCL/INTP6
RL_ON
P00/TI000
SCART_MUTE
EEPROM for Micom

+3.5V_ST
EEPROM_SCL
P01/TI010/TO00
1/16W 1%
R646 20K
R648
10K B
EDID_WP C Q601 2SC3052 E
P130 P20/ANI0 ANI1/P21 ANI2/P22 ANI3/P23

R649 OPT 0
EEPROM_SDA R631 HDMI_CEC POWER_ON/OFF2_1 22
IC602
uPD78F0514
MODEL1_OPT_3 MODEL1_OPT_2 POWER_ON/OFF1
IC601
M24C16-WMN6T
NC/E0 R601 47K 1 8 VCC AMP_MUTE MODEL1_OPT_0 R632 SOC_RESET NC/E1 2 7 WC INV_CTL NC/E2 3 6 SCL R619 EEPROM_SCL 22 VSS 4 5 SDA R616 EEPROM_SDA 22 S/T_SCL R627 4.7K OCD1B 22
P73/KR3 P72/KR2 P71/KR1 P70/KR0

MODEL1_OPT_1 R633 22 OPT
ANI4/P24
MICOM_DOWNLOAD
ANI5/P25
SIDE_HP_MUTE
ANI6/P26
KEY2
P32/INTP3/OCD1B
ANI7/P27
KEY1
P31/INTP2/OCD1A
P15/TOH0
P14/RXD6
P13/TXD6
P16/TOH1/INTP5
P12/SO10
P10/SCK10/TXD0
P17/TI50/TO50
P11/SL10/RXD0
P30/INTP1
+3.5V_ST
AVREF
AVSS
+3.5V_ST
MODEL OPTION
MICOM MODEL OPTION

+3.5V_ST
PIN NO. 8 11 30 31
HIGH 10YEAR_TOOL (10 SENSOR) I2C_LED TOUCH_KEY PDP/3D
LOW 11YEAR_TOOL (11 SENSOR) PWM_LED TACT_KEY LCD/OLED
MODEL_OPT_0 MODEL_OPT_1 MODEL_OPT_2
PDP/3D R611 10K
TOUCH_KEY R613 10K
I2C LED R622 10K
10YEAR_TOOL R624 10K
MODEL_OPT_3
LCD MODEL1_OPT_0 MODEL1_OPT_1 MODEL1_OPT_2 MODEL1_OPT_3 MODEL_OPT_3 0
PDP 1
OLED 0
3D 1 10K 22
AMP_RESET_N PANEL_CTL INSTANT_MODE
R604 R605 R602 R603
100 100 100 100 LCD/OLED R612 10K TACT_KEY R614 10K PWM_LED R623 10K 11YEAR_TOOL R625 10K
+3.5V_ST
R638
OPT
LOW MODEL_OPT_1 MODEL_OPT_2 0 0
LOW_SMALL 0 1
TBD 1 0
HIGH 1 1
R636 4.7K
R640
LED_B/LG_LOGO
LED_R/BUZZ
NEC_ISP_Tx
POWER_DET
IR
POWER_ON/OFF2_2
NEC_ISP_Rx
S/T_SDA
NEC_RXD
NEC_TXD
OCD1A
C609 1uF
PIN NAME
BCM35230 MICOM 6 50
DUAL COMPONENT Q1901 Q1902 IC1904

PCM_MDI[0-7]
1ST : 0TRIY80001A
2ND : 0TR387500AA
1ST : EBK60752501, 2ND : EBK61011501 1ST : 0ISTLPH062A, 2ND : EAN40055001
Close to BCM35230
PCM_MDI[0] PCM_MDI[1] R1909 R1910 AR1903 22 OPT 22 OPT 22 OPT CI_MDI[0] CI_MDI[1] CI_MDI[2] CI_MDI[3] CI_MDI[4] CI_MDI[5] R1915 R1916 22 OPT 22 OPT CI_MDI[6] CI_MDI[7]
CI_MDI[0-7]
BCM INT Demod
PCM_MDI[2] PCM_MDI[3] PCM_MDI[4] PCM_MDI[5] PCM_MDI[6] PCM_MDI[7]
+5V_CI_ON
FE_TS_DATA[0-7]
C1904 0.1uF CI
C1905 10uF 10V CI
R1932 10K CI
R1933 10K OPT
CI_DATA[0-7] P1901 10067972-000LF CI GND 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 G2 69 G1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 GND DAT3 DAT4 DAT5 DAT6 DAT6 /CARD_EN1 ADDR10 /O_EN ADDR11 ADDR10 ADDR8 ADDR13 ADDR14 /WR_EN /IRQA VCC VPP TS_IN_VAL TS_IN_CLK ADDR12 ADDR7 ADDR6 ADDR5 ADDR4 ADDR3 ADDR2 ADDR1 ADDR0 DAT0 DAT1 DAT2 /IO_BIT GND R1945 OPT 10K CI R1947 CI R1948 CI R1949 CI R1950 CI R1951 CI R1952 CI R1953 CI R1954 CI R1955 22 22 22 22 22 22 22 22 22 PCM_ADDR[12] PCM_ADDR[7] CI_ADDR[6] CI_ADDR[5] PCM_ADDR[4] PCM_ADDR[3] PCM_ADDR[2] CI_ADDR[1] CI_ADDR[0] PCM_ADDR[12] PCM_ADDR[7] CI_ADDR[6] CI_ADDR[5] PCM_ADDR[4] PCM_ADDR[3] PCM_ADDR[2] CI_ADDR[1] CI_ADDR[0] +5V_CI_ON R1944 0 OPT C1910 0.1uF CI CI R1967 C1913 0.1uF 16V 22 CI
FE_TS_DATA[0] FE_TS_DATA[1] FE_TS_DATA[2] FE_TS_DATA[3] FE_TS_DATA[4] FE_TS_DATA[5] FE_TS_DATA[6] FE_TS_DATA[7]
R1901 R1902 R1903 R1904 R1905 R1906 R1907 R1908
22 22 22 22 22 22 22 22
CI +5V_CI_ON CI CI CI_TS_DATA[4] CI CI CI CI CI CI_MDI[0-7] /PCM_IORD /PCM_IOWR R1976 R1974 22 CI 22 CI R1971 10K CI R1972 10K CI CI_TS_DATA[5] CI_TS_DATA[6] CI_TS_DATA[7] /CI_CD1 CI_TS_DATA[3] R1937
R1946 10K OPT CI_DATA[3] CI_DATA[4] CI_DATA[5] CI_DATA[6] CI_DATA[7] CI R1956 CI CI CI CI CI CI CI R1962 R1963 R1957 R1958 R1959 R1960 R1961 22 22 22 22 22 22 22 22 PCM_ADDR[11] PCM_ADDR[9] CI_ADDR[8] PCM_ADDR[13] CI_ADDR[14]
/PCM_CE1
62 /CI_DET1 CI TS_OUT3 TS_OUT4 TS_OUT5 TS_OUT6 TS_OUT7 CARD_EN2 VS1 IORD IOWR TS_IN_SYN
+5V_CI_ON
CI_ADDR[10]
CI_ADDR[10] PCM_ADDR[11] PCM_ADDR[9] CI_ADDR[8] PCM_ADDR[13] CI_ADDR[14]
R1973 10K CI /PCM_OE +5V_CI_ON
BCM INT Demod

PCM_MISTRT
Close to BCM35230
R1917 R1918 R1919 22 OPT 22 OPT 22 OPT CI_MISTRT CI_MIVAL_ERR CI_MCLKI R1977 10K OPT +5V_CI_ON
CI_MDI[0] CI_MDI[1] CI_MDI[2] CI_MDI[3] R1936 CI_MDI[4] CI_MDI[5] R1929 10K OPT PCM_RST /PCM_WAIT R1927 R1928 22 CI 22 CI R1930 10K OPT CI_MDI[6] CI_MDI[7] CI_TS_CLK 0 OPT
TS_IN0 TS_IN1 TS_IN2 TS_IN3 VCC VPP TS_IN4 TS_IN5 TS_IN6 TS_IN7 TS_OUT_CLK CI_RESET CI_WAIT R1934 10K OPT INPACK REG R1935 0 CI TS_OUT_VAL TS_OUT_SYN TS_OUT0 TS_OUT1 TS_OUT2 R1938 CI 62 /CI_DET2 GND
R1968 10K CI
PCM_MIVAL_ERR PCM_MCLKI
R1975 10K CI R1964
CI 22
/PCM_WE /PCM_IRQA
Close to Tuner
NIM_TS_SYNC NIM_VAL_ERR NIM_TS_CLK R1920 R1921 R1922 22 22 22 CI CI CI
CI TS INPUT
CI_TS_VAL CI_TS_SYNC CI_TS_DATA[0] CI_TS_DATA[1] PCM_TS_DATA[0-7] PCM_TS_DATA[0] PCM_TS_DATA[1] PCM_TS_DATA[2] PCM_TS_DATA[3] PCM_TS_DATA[4] PCM_TS_DATA[5] PCM_TS_DATA[6] PCM_TS_DATA[7] CI_TS_DATA[2] /CI_CD2
CI_DATA[0] CI_DATA[1] CI_DATA[2]
Close to CI Slot
AR1901 100 CI CI_TS_DATA[0] CI_TS_DATA[1] CI_TS_DATA[2] CI_TS_DATA[3] AR1902 100 CI CI_TS_DATA[4] CI_TS_DATA[5] CI_TS_DATA[6] CI_TS_DATA[7]
CI_TS_DATA[0-7]
CI_MIVAL_ERR CI_MCLKI CI_MISTRT
Close to CI Slot
PCM_TS_CLK PCM_TS_VAL PCM_TS_SYNC C1916 12pF 50V OPT R1923 R1924 R1925 220 CI 100 CI 100 CI CI_TS_CLK CI_TS_VAL CI_TS_SYNC
CI
/CI_EN1 CI_DATA[0-7]
VCC
20
CI
DIR
CI NAND_DATA[0] NAND_DATA[1] NAND_DATA[2] NAND_DATA[3] NAND_DATA[4] NAND_DATA[5] NAND_DATA[6] NAND_DATA[7] PCM_5V_CTL R1942 4.7K CI B R1940 10K OPT
R1943 22K
OE
19
A0
CI_DATA[0] CI_DATA[1] CI_DATA[2]
AR1904 100 CI
B0 18 3 A1 B1 17 4 A2
C1909 4.7uF 16V OPT
B2
16
A3
B3
15
A4
CI_DATA[3] CI_DATA[4] CI_DATA[5] CI_DATA[6] +5V_CI_ON +3.3V_CI CI

IC1901 CI 74LVC125APW
R1980 AR1905
100 CI
B4
R1987 2.2K CI C Q1901 2SC3052 CI E
100 CI
B5 B6
14
A5
13
A6
12
A7
CI_DATA[7] +3.3V_CI
B7
11
10
GND
R1970 22
NAND F/M Data
1OE
/CI_CE1
1A
14
VCC
C1901 0.1uFOPT 16V /CI_CE2

1A 1
IC1902 74AHC08PW
3,3V_CI POWER
14 VCC
NAND_REb /PCM_OE CI 9
1Y
13
4OE
/CI_CE1
1B
CI
OPT C1902 0.1uF 16V OPT NAND_RBb
+3.3V_CI
12
4A
NAND_WEb
4Y
/CI_CE2
1Y
13
4B
C1915 0.1uF 16V
IC1905 74LVC245A
VCC 20 1
CI
DIR
R1985 10K CI
+3.3V_Normal
+3.3V_CI
2OE
11
CI 45
/PCM_IOWR
/CI_EN1
2A
12
4A
2A
NAND_WEb CI 15 /PCM_WE
GND 2Y
10
3OE
/CI_EN1
6 9 3A 2B
11
4Y
/CI_EN1 CI_ADDR[1] PCM_ADDR[2]
R1986
22 CI
OE
19
A0
CI_ADDR[2]
A1
L1901 BLM18PG121SN1D CI CI C1907 0.1uF CI C1908 0.1uF
B0
18
CI_ADDR[3]
A2
NAND_REb
7 8 3Y
10
3B
B1
NAND_CLE
3A
PCM_ADDR[3]
B2
17
CI_ADDR[4]
A3
PCM_ADDR[4] CI 44 /PCM_IORD /PCM_CE1 CI 7

2Y 6 9
B3
16
CI_ADDR[7]
A4
PCM_ADDR[7]
B4
15
CI_ADDR[9]
A5
GND
3Y
PCM_ADDR[9] CI_ADDR[0] PCM_ADDR[11]

B6 B5
14
CI_ADDR[11]
A6
13
CI_ADDR[12]
A7
PCM_ADDR[12]
B7
12
CI_ADDR[13]
GND
PCM_ADDR[13]
11
10
CI DETECT
+3.3V_CI
R1926
22 CI
IC1903 74LVC245A
CI TS OUTPUT
OE L L H
DIR L H X
CI_DATA OUTPUT INPUT Z
NAND_DATA INPUT OUTPUT Z
CI POWER ENABLE CONTROL

+3.3V_CI +5V_Normal OPT 0.1uF C1903 16V R1931 22 CI NAND_REb NAND_DATA[0-7] OPT C1906 0.1uF 16V Q1902 AO3407A L1902 BLM18PG121SN1D CI C1912 0.1uF 16V CI +5V_CI_ON
CI C1914 0.1uF 16V
R1969 10K CI
+3.3V_CI R1939 R1941 10K 10K CI CI

IC1904 74LVC1G32GW
+3.3V_CI
CI CONTROL INTERFACE
1 CI
VCC
/CI_CD2 /CI_CD1
A 2
OPT
GND 3 4 Y
C1911 0.1uF 16V CI R1965
CI
R1966 10K
GND
CI_DET 47
BCM35230 CI
2010.11.11
19
58
DVB-S2 LNB Part Allegro

(Option:LNB)
D2301 LNB SMAB34
D2304 SMAB34 40V LNB
2A
40V C2307 0.01uF 50V LNB C2302 1uF 50V LNB C2324 68uF 35V LNB C2305 68uF 35V LNB
3A
+12V_LNB LNB L2301 33UH SP-7850_33 2.4A C2311 10uF 25V LNB DCDC_GND C2312 0.1uF 50V LNB
close to Boost pin(#1)
DCDC_GND and A_GND are connected

close to VIN pin(#25)
DCDC_GND D2302 US1M(suzhou) LNB_OUT 1000V LNB C2301 0.22uF 25V LNB C2303 0.1uF 50V D2303 SMAB34 40V LNB
DCDC_GND A_GND
DCDC_GND and A_GND are connected in pin#27 PCB_GND and A_GND are connected
Input trace widths should be sized to conduct at least 3A Ouput trace widths should be sized to conduct at least 2A
GNDLX [EP] NC_9 23
LNB
VIN
BFI
A_GND A_GND BOOST C2304 0.1uF LNB C2306 22000pF VCP TCAP NC_1 TDO EXTM TDI
28
27
26
25
24
22
BFO
A_GND
LX
1 2 3 4 5 6 7 10 11 12 13 14 8 9 THERMAL 29
21 20 19
NC_8 NC_7 BFC NC_6 NC_5 NC_4 NC_3 A_GND R2313 0 R2314 0
LNB
IC2301 A8290SETTR-T
LNB
18 17 16 15
A_GND LNB_TX
VREG
NC_2
GND
SDA
ADD
SCL
IRQ
+3.3V_Normal A_GND DCDC_GND A_GND
R2304 R2301 33 R2302 33 4.7K LNB LNB
Max 1.3A
+12V +12V_LNB
0.22uF
R2303 0
LNB
LNB
LNB
27pF
OPT
27pF
L2302 BLM18PG121SN1D
OPT
LNB
C2308
C2309
A_GND
C2310 SCL1_3.3V
SDA1_3.3V
LNB_INT
BCM35230 LNB
2010.11.02 23 57
NON CHB
TS Output CHBO_TS_SERIAL CHBO_TS_CLK CHBO_TS_VAL_ERR CHBO_TS_SYNC
CHB_RESET
BCM35230 NON CHB 28 50
LVDS
P3501 FI-RE51S-HFK-A
LOCAL DIMMING
[51Pin LVDS OUTPUT Connector] [41Pin LVDS OUTPUT Connector] [To LED DRIVER]
R3512 33 LGD_2D/3D_CTRL +3.3V_Normal +3.3V_Normal R3511 3.3K AUO_65_MIRROR R3501 3.3K LVDS_SEL_HIGH R3502 10K LVDS_SEL_LOW P3502 FI-RE41S-HFK-A 3 1 2 3 LVDS_TXA0N 4 5 6 7 8 9 10 LVDS_TXACLKN 11 12 13 LVDS_TXA3N 14 15 16 17 BIT_SEL 18 19 LVDS_TXB0N R3503 10K BIT_SEL_LOW 20 21 22 23 24 25 26 LVDS_TXBCLKN 27 28 29 LVDS_TXB3N 30 31 32 33 34 35 PANEL_VCC 36 37 L3501 MLB-201209-0120P-N2 38 39 40 41 C3501 10uF 25V OPT C3502 1000pF 50V C3503 0.1uF 50V 42 GND NC NC NC NC NC NC NC NC GND RC0N LVDS_TXC0N RC0P LVDS_TXC0P RC1N LVDS_TXC1N RC1P LVDS_TXC1P RC2N LVDS_TXC2N RC2P LVDS_TXC2P GND RCCLKN LVDS_TXCCLKN RCCLKP LVDS_TXCCLKP GND RC3N LVDS_TXC3N RC3P LVDS_TXC3P RC4N LVDS_TXC4N RC4P LVDS_TXC4P GND GND RD0N LVDS_TXD0N RD0P LVDS_TXD0P RD1N LVDS_TXD1N RD1P LVDS_TXD1P RD2N LVDS_TXD2N RD2P LVDS_TXD2P GND M1_MOSI RDCLKN LVDS_TXDCLKN RDCLKP LVDS_TXDCLKP GND RD3N LVDS_TXD3N RD3P LVDS_TXD3P RD4N LVDS_TXD4N RD4P LVDS_TXD4P GND GND M1_SCLK M2_MOSI M2_SCLK M3_MOSI M3_SCLK L/DIM0_MOSI L/DIM0_SCLK L/DIM0_VS 9 R3513 4.7K 7 6 R3504 0 SCL2_3.3V 4 R3514 33 AUO_2D/3D_CTRL 2D/3D_CTL 5 R3507 33 M0_MOSI R3506 33 M0_SCLK 2 1 R3510 10K 2D/3D_CTL LVDS_SEL P3503 12507WR-08L +3.3V_FRC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 GND
NC NC NC NC NC AUO_65_MIRROR LVDS_SEL NC NC L/DIM_ENABLE GND RA0N RA0P
R3509 10K OPT
PLACE SERIAL RESISTORS CLOSE TO URSA4
LVDS_TXA0P RA1N LVDS_TXA1N RA1P LVDS_TXA1P RA2N LVDS_TXA2N RA2P LVDS_TXA2P GND RACLKN RACLKP LVDS_TXACLKP GND RA3N RA3P LVDS_TXA3P RA4N LVDS_TXA4N RA4P LVDS_TXA4P GND BIT_SEL RB0N RB0P LVDS_TXB0P RB1N LVDS_TXB1N RB1P LVDS_TXB1P RB2N LVDS_TXB2N RB2P LVDS_TXB2P GND RBCLKN RBCLKP LVDS_TXBCLKP GND RB3N RB3P LVDS_TXB3P RB4N LVDS_TXB4N RB4P LVDS_TXB4P GND GND GND GND GND NC VLCD VLCD VLCD VLCD
LPB_42/47/55 R3505 0 SDA2_3.3V
LPB_42/47/55 8 R3508 33 L_VS
NON USED L/DIMMING (FOR EDGE_LED)
BCM35230
Interface block
2010. 10. 20 35 58
DUAL COMPONENT
5V_HDMI_1 OPT C3726 OPT 0.1uF VR3701 16V 10V 20 HOT_PLUG_DETECT 19 18 17 16 15 14 13 12 11 10 EAG62611201 9 8 7 6 5 4 3 2 1 VDD[+5V] DDC/CEC_GND SDA SCL RESERVED CEC R3736 OPT 0 OPT OPT R3737 VR3702 3.6K 10V GND OPT R3706 1K
HDMI_HPD_1
D3716 IC3702
1ST : T-BAT54_SUZHO, 2ND : 0DSON00138A 1ST : EAN60991801, 2ND : T-AZ1117BH_1.8, 3RD : EAN54428201
BODY_SHIELD
DDC_SDA_1 DDC_SCL_1
* HDMI CEC
ARC
HDMI_ARC
CEC_REMOTE TMDS_CLKCK-_HDMI1 TMDS_CLK_SHIELD TMDS_CLK+ CK+_HDMI1 TMDS_DATA0D0-_HDMI1 TMDS_DATA0_SHIELD TMDS_DATA0+ D0+_HDMI1 D1-_HDMI1 TMDS_DATA1_SHIELD TMDS_DATA1+ D1+_HDMI1 TMDS_DATA2D2-_HDMI1 TMDS_DATA2_SHIELD TMDS_DATA2+ D2+_HDMI1
C3701 0.1uF R3708 63.4
R3707 150
+3.5V_ST
+3.3V_Normal +3.3V_HDMI
R3717 27K
L3701 BLM18PG121SN1D G
D3716 BAT54_SUZHO
D B S Q3707 BSS83
TMDS_DATA1-
120K R3725
C3727 0.1uF 16V HDMI_CEC
C3725 10uF
C3728 10uF
CEC_REMOTE
RSD-105156-100 JK3703
HDMI1
+3.3V_HDMI
+5V_Normal 5V_HDMI_1 HDMI_HPD_2 A2 A1 5V_HDMI_2 BODY_SHIELD 20 HOT_PLUG_DETECT 19 VDD[+5V] 18 DDC/CEC_GND 17 SDA 16 SCL 15 RESERVED 14 CEC 13 TMDS_CLKEAG62611201 12 TMDS_CLK_SHIELD 11 TMDS_CLK+ 10 TMDS_DATA09 TMDS_DATA0_SHIELD 8 TMDS_DATA0+ D0+_HDMI2 7 TMDS_DATA16 TMDS_DATA1_SHIELD 5 TMDS_DATA1+ D1+_HDMI2 4 TMDS_DATA23 TMDS_DATA2_SHIELD 2 TMDS_DATA2+ 1 D2+_HDMI2 DDC_SCL_3 D2-_HDMI2 DDC_SDA_3 D1-_HDMI2 R3710 4.7K R3712 4.7K D3714 CK+_HDMI2 D0-_HDMI2 A2 A1 CEC_REMOTE CK-_HDMI2 R3704 OPT 0 OPT OPT R3701 VR3703 3.6K 10V GND DDC_SDA_2 DDC_SCL_2 R3709 4.7K R3711 4.7K OPT C3702 OPT 0.1uF VR3705 16V 10V OPT R3718 1K D3713 C
+5V_Normal 5V_HDMI_2
A2
A1
C3705 10uF
C3706 C3707 C3708 C3709 C3710 10uF 10uF 0.1uF 0.1uF 0.1uF
D3715 C
C3711 0.1uF HDMI_CLK-
HDMI S/W OUTPUT

HDMI_RX0HDMI_RX0+ HDMI_RX1HDMI_RX1+ HDMI_RX2HDMI_CLK+ HDMI_RX2+
R3713 4.7K
R3714 4.7K
DDC_SDA_1 DDC_SCL_1
DDC_SDA_2 DDC_SCL_2
+5V_Normal 5V_HDMI_3
[EP]GND
TPWR_CI2CA
VCC33_3
R0X2P
R0X2N
R0X1P
R0X1N
R0X0P
R0X0N
R0XCP
R0XCN
R3739 4.7K
R3740 OPT
33 SCL1_3.3V
TXCN
TXCP
TX0N
TX0P
TX1N
TX1P
TX2N
TX2P
R3741 OPT 33 SDA1_3.3V
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
R1XCN
CK-_HDMI1 CK+_HDMI1
55
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 THERMAL 73
54 53 52 51 50 49
CSCL CSDA INT CEC_D CEC_A R4PWR5V DSCL4 DSDA4 R3PWR5V CBUS_HPD3
0
R3742 R3743
33 SCL3_3.3V 33 SDA3_3.3V
R1XCP R1X0N R1X0P R1X1N R1X1P R1X2N R1X2P VCC33_1 RSVD_1 R2XCN
RSD-105156-100 JK3701
D0-_HDMI1
HDMI2
EDID Pull-up
D0+_HDMI1 D1-_HDMI1 D1+_HDMI1 D2-_HDMI1 D2+_HDMI1
+5V_Normal R3729 C3715 1uF 10V
IC3701 SII9287B
48 47 46 45 44 43 42
5V_HDMI_3 R3738 10 C3712
5V_HDMI_3 OPT C3703 OPT 0.1uF VR3706 16V 10V 20 HOT_PLUG_DETECT 19 VDD[+5V] 18 DDC/CEC_GND 17 SDA 16 SCL 15 RESERVED 14 CEC 13 TMDS_CLK12 TMDS_CLK_SHIELD EAG62611201 11 TMDS_CLK+ 10 TMDS_DATA09 TMDS_DATA0_SHIELD 8 TMDS_DATA0+ R3705 OPT 0 OPT OPT R3702 VR3704 3.6K 10V GND OPT R3719 1K
HDMI1
HDMI_HPD_3
HDMI_HPD_3
1/16W
DSCL3 DSDA3 R2PWR5V

DDC_SCL_3 DDC_SDA_3
CK-_HDMI2 CK+_HDMI2 D0-_HDMI2 DDC_SDA_3 DDC_SCL_3 D1+_HDMI2 D2-_HDMI2 D2+_HDMI2 D0+_HDMI2 D1-_HDMI2
1K R3727 1% 1/16W
1uF
BODY_SHIELD
R2XCP R2X0N R2X0P R2X1N R2X1P R2X2N R2X2P
5V_HDMI_2
R3733 10 C3716
MICOM_VCC33 37
CEC_REMOTE
R3XCN
R3XCP
R3X0N
R3X0P
R3X1N
R3X1P
R3X2N
R3X2P
DSDA0
DSCL0
DSDA1
VCC33_2
R0PWR5V
DSCL1
CBUS_HPD0
CK-_HDMI3
CBUS_HPD1
R1PWR5V
RSVD_2
5V_HDMI_1 R3726 10 C3713
CK+_HDMI3 D0-_HDMI3
1/16W
1K R3728
D0+_HDMI3 7 TMDS_DATA16 TMDS_DATA1_SHIELD 5 TMDS_DATA1+ D1+_HDMI3 4 TMDS_DATA23 TMDS_DATA2_SHIELD 2 TMDS_DATA2+ 1 D2+_HDMI3 DDC_SDA_1 DDC_SCL_1 HDMI_HPD_1 CK-_HDMI3 D0-_HDMI3 CK+_HDMI3 D1-_HDMI3 D0+_HDMI3 D1+_HDMI3 D2-_HDMI3 D1-_HDMI3
RSD-105156-100 JK3702
HDMI3 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
HDMI3
D2-_HDMI3
D2+_HDMI3
BCM35230 LV7 HDMI 37 50
1uF
R3744 100K
1%
1uF
HDMI2
C3714
DSDA2 39 SBVCC 38
DDC_SDA_2
1uF
DDC_SCL_2
1K R3734 1%
CBUS_HPD2 41 DSCL2 40
HDMI_HPD_2
Ethernet Block
+2.5V_BCM35230
L3901 MLB-201209-0120P-N2 JK3901 XRJV-01V-D12-180
EPHY_TDP D3906 ADLC 5S 03 015 5.5V
C3901 0.1uF 16V
EPHY_TDN
4 D3902 ADLC 5S 03 015 5.5V D3905 ADLC 5S 03 015 5.5V
EPHY_RDP
5 C3902 0.1uF 16V 6
EPHY_RDN D3901 ADLC 5S 03 015 5.5V +3.3V_Normal
D1
R3901
240
D2 D3903 ADLC 5S 03 015 5.5V
EPHY_LINK R3902 240
D3
D4 9 D3904 ADLC 5S 03 015 5.5V
EPHY_ACTIVITY
BCM35230 LV7 ETHERNET 39 50
COMP/AV JACK PACK
22 R4006 AV1_R_IN D4009 AMOTECH 5.6V R4018 470K C4013 560pF 50V 1/10W 5% C4022 560pF 50V
22 R4007 AV1_L_IN JK4001 PPJ238-01 6C 5C 4C 5B 4A 5A 6A 6H 5H 4H 5G 5F 7F 5E 7E 4D 5D 6D [RD1]E-LUG +3.3V_Normal [RD1]O-SPRING R4017 2.7K [RD1]CONTACT [WH1]O-SPRING D4007 [YL1]CONTACT [YL1]O-SPRING [YL1]E-LUG [RD2]E-LUG [RD2]O-SPRING_2 [RD2]CONTACT [WH2]O-SPRING [RD2]O-SPRING_1 BLM18PG121SN1D L4007 [RD2]E-LUG-S [BL2]O-SPRING [BL2]E-LUG-S [GN2]CONTACT [GN2]O-SPRING [GN2]E-LUG ZD4011 5.1V ZD4012 5.1V R4020 0 10 1% R4034 L4001 CM2012FR27KT COMP1_Pr R4026 75 C4001 27pF 50V C4002 27pF 50V D4011 5.6V R4025 470K C4016 560pF 50V C4021 560pF 50V 22 R4033 AV2_L_IN D4010 5.6V R4024 470K ZD4009 5.1V ZD4010 5.1V R4016 75 C4012 47pF 50V 5.6V 1% 10 R4030 AV1_CVBS_IN R4023 1K AV1_CVBS_DET D4008 AMOTECH 5.6V R4019 470K C4014 560pF 50V 1/10W 5% C4023 560pF 50V
BLM18PG121SN1D L4006 C4015 560pF 50V
22
R4032
AV2_R_IN
COMP_AUDIO_R_IN
C4020 560pF 50V
COMP_AUDIO_L_IN
R4021 0 ZD4013 5.1V ZD4014 5.1V R4027 75
10
1%
R4035
L4002 CM2012FR27KT COMP1_Pb C4003 27pF 50V C4004 27pF 50V
R4022 0 ZD4015 5.1V ZD4016 5.1V R4028 75
10
1%
R4036
L4003 CM2012FR10KT COMP1_Y C4005 47pF 50V FOR EMI C4006 47pF 50V
+3.3V_Normal
R4029 2.7K 1K D4012 5.6V R4031 COMP1_DET
CLOSE TO JUNCTION
BCM35230
LV7 EU COMP/AV
40
50
DUAL COMPONENT
D4101,D4102
1ST : EAH42720601
2ND : EAH60994401
USB
IC4101 AP2191DSG
+3.3V_Normal
+5V_USB R4101 4.7K OPT
L4101 MLB-201209-0120P-N2 120-ohm C4102 100uF 16V C4101 10uF 10V
NC
GND
OUT_2
IN_1
OUT_1
IN_2
FLG
EN
R4102 2.7K SIDE_USB_CTL1
C4103 0.1uF 16V
SIDE_USB_OCD1 3AU04S-305-ZC-(LG) P4101 1 USB DOWN STREAM 5 2
SIDE_USB_DM D4103 RCLAMP0502BA
SIDE_USB_DP OPT D4101 CDS3C05HDMI1 5.6V D4102 CDS3C05HDMI1 5.6V
BCM35230 LV7 EU USB 41 50
H/NIM & F/NIM & T/C/S2 Combo Tuner

Option Table Non_S: not use DVB-T/C/S2 combo Tuner(use H/NIM and F/NIM) F/NIM_T/C DVB-T/C/S2 (Eu,Aisa) S H/NIM SCART CN : use China F/NIM BOOSTER EU_BR_F/NIM RF_SW_CTL EU_F/NIM TC_F/NIM BOOSTER: use BOOSTER_CTL RF_SW_CTL: use RF_SWITCH_CTL TC_F/NIM: use EU_DVB-T/C F/NIM T2_CN_F/NIM_BR: use EU_DVB-T2, China F/NIM, BRZIL F/NIM EU_F/NIM: use EU_F/NIM * DVB-T/C/S2 combo Tuner: DVB-T/C is H/NIM, and DVB-S2 is F/NIM EU_BR_F/NIM: use EU_F/NIM and Brazil F/NIM BOOSTER R4419 0 BOOSTER Q4401 OPT C4401 0.1uF 16V E MMBT3906(NXP) R4421 B 2.2K BOOSTER Q4403 2SC3052 E C B BOOSTER R4425 10K BOOSTER L4406 BLM18PG121SN1D S: use DVB-T/C/S2 combo Tuner H/NIM: use H/NIM(H/NIM, DVB-T/C/S2 combo Tuner) F/NIM: use F/NIM(EU_T/C, EU_DVB-T2, China) H/NIM (EU) Non_S H/NIM SCART BOOSTER Non_S F/NIM SCART
ERROR & VALID PIN <EU, China>

R4445 0 T2
DUAL COMPONENT IC4401

IC4404 NL17SZ08DFT2G
+3.3V_TU
1ST : T-TJ3940S_XX, 2ND : T-AP2114H_2.5TRG1

TU_TS_VAL R4439 0 NONE_T2 IN_B 1 NONE_T2 5 VCC OPT C4463 0.1uF 16V R4446 0 TS_VAL_ERR NONE_T2
SCART: use Scart Jack
+5V_TU
TU_TS_ERR
IN_A
GND
OUT_Y
Tuner to CI Slot
TS_VAL_ERR R4427 10K BOOSTER RF_BOOSTER_CTL
R4413 0 NIM_VAL_ERR R4414 0 TU_TS_SYNC R4415 0 TU_TS_CLK NIM_TS_CLK NIM_TS_SYNC
TU4401 TDFR-G136D
HORIZONTAL_T 1 2 3 4 5 6 7 8 9 10
TU4401-*1 TDFR-G236D
HORIZONTAL_T2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 31 30 NC_1 BST_CNTL +B1[5V] NC_2[RF_AGC] NC_3 SCLT SDAT NC_4 SIF NC_5 VIDEO GND +B2[1.2V] +B3[3.3V] RESET +B4[2.5V] SCL SDA ERR SYNC VALID MCL D0 D1 D2 D3 D4 D5 D6 D7
TU4402 TDFQ-G001D
HORIZONTAL_S
+5V_TU
L4410 Non_S C4411 100pF 50V Non_S C4417 0.1uF 16V 1uH Non_S
C4425 0.01uF 50V BOOSTER
NC_1 BST_CNTL +B1[5V] NC_2[RF_AGC] NC_3 SCLT SDAT NC_4 SIF NC_5 VIDEO GND +B2[1.2V] +B3[3.3V] RESET +B4[2.5V] SCL SDA ERR SYNC VALID MCL D0 D1 D2 D3 D4 D5 D6 D7
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
close to TUNER NC_1

NC_2 NC_3
BOOSTER 0 R4407
close to TUNER
+3.3V_S2_TU
C4460 10uF 6.3V S L4411-*1 S 0 L4412-*1 S 0 0.1uF C4426 S S B Q4402 R4422 C 4.7K MMBT3906(NXP) S NONE_S R4428 0 R4431 1K OPT OPT 0 R4429 0 E R4433 220 R4434 220 +1.25V_TU (EU)
+5V_TU
R4424 470 E
S2_TU[3.3V] R4408 NC_4

C4431 0.1uF 16V OPT
C4415 100pF 50V S 0
C4419 0.1uF 16V S
R4426 82 TU_SIF S
+5V_TU
close to TUNER
L4411 Non_S Non_S 270nH 270nH C4458 C4459 20pF 20pF 50V 50V Non_S Non_S SCL0_3.3V SDA0_3.3V
Max 1.5A
close to TUNER
+1.8V_TU C4421 62pF 50V Non_S
L4412 C4422 62pF 50V Non_S
TU_SCL TU_SDA T_1.8V T_SIF NC_5 T_CVBS GND_1
TU_CVBS
C4407 100pF 50V S
C4414 0.1uF 16V S
close to TUNER
+1.25V_TU
+5V_TU
Q4404 R4432 MMBT3906(NXP) C R4435 200 R4436 200 B
+3.3V_TU
R4430 1K OPT
IC4403 AP2132MP-2.5TRG1
1 THERMAL 8
+1.25V_TU [EP] R4416 20K 1% GND R4417 11K 1% R4438 11K 1%
R2
11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 31 30
OPT C4454 10uF 16V
C4416 100pF 50V
OPT C4461 1000pF 50V
OPT C4455 4700pF 50V
R4412 OPT 10K
C4420 0.1uF 16V
OPT C4456 100uF 16V
2 EN 3 VIN 4 VCTRL
R4402 75 OPT
+3.3V_TU
POWER_ON/OFF2_1 ATV_OUT
R4411 10K
PG
7 ADJ 6 VOUT
R1
+3.3V_TU
R4420 100
R4423 100K TU_RESET C4427 0.1uF 16V B
OPT
TD_1.2V T_3.3 T_TU_RESET
C4457 10uF 16V
C4423 100pF 50V
C4424 0.1uF 16V
Q4405 MMBT3906(NXP) C
C4432 10uF 16V +5V_Normal
C4438 0.1uF OPT
2A
5 NC C4453 10uF
EAN61387601
+2.5V_TU
C4428
16V
OPTION:SCART
OPT C4434 1uF
NC_6 TD_SCL TD_SDA T/C/S2_ERROR T/C/S2_SYNC T/C/S2_VALID T/C/S2_MCL T/C/S2_D0 T/C/S2_D1

AR4401 C4402 18pF 50V R4404 22 SCL1_3.3V R4405 22 SDA1_3.3V 0.1uF 16V NONE_S close to Tuner C4404 18pFclose to Tuner 50V
Vout=0.6*(1+R1/R2)
+3.3V_S2_LNB +3.3V_TU
L4408 MLB-201209-0120P-N2
Max 217mA +3.3V_TU

IC4402 AZ1117BH-1.8TRE1 R4410 1 IN OUT S +1.8V_TU OPT C4443 0.1uF S C4447 10uF 10V +3.3V_S2_DE L4403 MLB-201209-0120P-N2 S ADJ/GND TU_TS_ERR S TU_TS_SYNC TU_TS_VAL TU_TS_CLK AR4402 NON_S 47 FE_TS_DATA[0-7] FE_TS_DATA[0] FE_TS_DATA[1] FE_TS_DATA[2] FE_TS_DATA[3] L4409 BLM18PG121SN1D S C4406 100pF 50V S AR4401-*1 33 S +5V_Normal L4401 MLB-201209-0120P-N2 C4435 22uF 16V 47 FE_TS_DATA[4] FE_TS_DATA[5] FE_TS_DATA[6] S2_RESET AR4402-*1 33 S C4436 10uF 10V S C4437 0.1uF 16V C4446 10uF +3.3V_S2_TU 10V C4450 0.1uF S S C4451 0.1uF S
SHIELD
S 1
T/C/S2_D2 T/C/S2_D3 T/C/S2_D4 T/C/S2_D5 T/C/S2_D6 T/C/S2_D7 S2_1.25V S2_RESET S2_3.3V S2_F22 R4401 51 S2_SCL
0 S S LNB_TX R4447 R4448 +3.3V_S2_DE C4405 100pF 50V S C4410 0.1uF 16V S C4418 10uF 10V S R4403 100 S R4406 2.2K S C4409 0.1uF S
NON_S
47
L4404 MLB-201209-0120P-N2 S C4448 10uF 10V
C4452 0.1uF S
+5V_TU
+3.3V_Normal +3.3V_TU
L4402 MLB-201209-0120P-N2 OPT C4464 22uF C4449 0.1uF 16V
+1.25V_TU
C4412 0.1uF 16V S C4462 10uF 10V S
SHIELD
32 33 34 35 36 37 38
AR4403 NON_S
C4433 0.1uF 16V
C4440 22uF 16V
C4441 0.1uF 16V
C4442 0.1uF 16V
C4444 22uF 16V
C4445 0.1uF 16V
+3.3V_S2_LNB
S2_SDA
0 S
47 R4418 Close to the tuner
FE_TS_DATA[7]
AR4403-*1 33 S
GND_2 S2_LNB
+3.3V_TU
IC4401 AP2114H-2.5TRG1 VIN VOUT
+2.5V_TU
IF_N IF_P IF_AGC
39
Close to Tuner #38 pin Surge protectioin
R4418-*1 33 S
SHIELD
TU_RESET_SUB RF_SWITCH_CTL_2 RF_SWITCH_CTL TW9910_RESET
C4403 1000pF 50V S C4408 33pF OPT C4413 33pF S R4449 S 2.2K D4401 3.0SMCJ20A(suzhougrande) 20V
LNB_OUT OPT
C4439 0.1uF 16V
GND
R4437 1 C4429 10uF 10V C4430 0.1uF 16V
BCM35230 LV7 EU TUNER 44 50
DUAL COMPONENT
Q4502,Q4503 Q4504,Q4506 Q4507,Q4508
1ST : 0TRIY80001A
2ND : 0TR387500AA
Q4501 Q4505 D4513
1ST : EBK61012701, 2ND : EBK58172301 1ST : 0TRIH80004A, 2ND : EBK61012501, 3RD : 0TR102009AM 1ST : T-BAT54_SUZHO, 2ND : 0DSON00138A
+3.3V_Normal +12V
+5V_Normal
Full Scart
D4511 5.6V
R4513 10K R4548 1K SC_DET/COMP2_DET E MMBT3906(NXP) Q4501 B C R4550 10 C4518 R4549 0 SC_CVBS_IN R4520 390 C Q4502 2SC3052 B R4526 47K SELECT C4523 47uF 16V 6 1 B1 ATV_OUT GND R4553 0 1/10W 5% DTV/MNT_V_OUT R4524 470 C4525 0.1uF 50V C4526 0.1uF 50V R4530 10K DTV_ATV_SELECT IC4502 NLASB3157DFT2G L4506
AV_DET 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 COM_GND SYNC_IN
D4504 5.5V
R4511 75 1%
C4507 47pF 50V
0.1uF CLOSE TO SOC R4521 390 Gain=1+Rf/Rg 75 1% R4512 Rf E
VCC
SYNC_OUT SYNC_GND2 SYNC_GND1 RGB_IO R_OUT RGB_GND R_GND D2B_OUT G_OUT D2B_IN G_GND ID B_OUT AUDIO_L_IN B_GND AUDIO_GND AUDIO_L_OUT AUDIO_R_IN AUDIO_R_OUT D4503 5.5V D4502 5.5V D4501 5.5V R4505 75 1% OPT D4506 30V C4539 100pF 50V D4505 5.5V
A Rg R4523 180 R4527 15K
B0
C4513 100uF 16V +3.3V_Normal R4545 10K R4508 75 1% L4508 CM2012FR27KT SC_R/COMP2_Pr C4533 27pF 50V L4509 CM2012FR27KT C4535 27pF 50V L4510 CM2012FR27KT C4537 27pF 50V C4536 27pF 50V SC_G/COMP2_Y C4534 27pF 50V R4534 10K C B Q4509 2SC3052 E
+3.3V_Normal R4547 10K
OPT C4531 180pF 50V Selece = High ==> A = B1 Selece = Low SC_FB ==> A = B0
OPT C4532 180pF 50V
R4533 75 1%
R4546 1K
C B Q4510 2SC3052 E
CLOSE TO SOC
R4506 75 1%
OPT SC_B/COMP2_Pb C4538 27pF 50V R4522 9.1K SC_ID OPT D4512 30V R4525 1K C4524 1uF 10V D4513 BAT54_SUZHO 30V REC_8
R4507 75 1%
FOR EMI
PSC008-01 JK4501
C4540 D4507 5.6V OPT 1uF R4552 22 SC/COMP2_L_IN
R4509 470K
C4505 560pF 50V
C4514 560pF 50V INCM_VID_SC
CLOSE TO SOC
CLOSE TO JACK TP4501
C4541 D4508 5.6V OPT
1uF
R4551
22
16V 0.1uF C4528 SC/COMP2_R_IN
R4532 36
R4510 470K
C4506 560pF 50V
CLOSE TO JUNCTION
C4515 560pF 50V
BLM18PG121SN1D L4504 D4509 5.6V OPT DTV/MNT_L_OUT C4516 1000pF 50V BLM18PG121SN1D L4505 DTV/MNT_R_OUT D4510 5.6V OPT C4517 1000pF 50V C4522 4700pF C4521 4700pF
AUD_OUT >> EU/CHINA_HOTEL_OPT

5.6K R4501
IC4501 LM324D
[SCART AUDIO MUTE]

1K DTV/MNT_L_OUT +12V BLM18PG121SN1D C4508 10uF C4511 16V 6800pF SCART1_Lout_N SCART1_Lout_P 5.6K R4502 VCC 4 11 VEE/GND +3.5V_ST 50V 33K 33pF R4516 C4519 IN1R4518 10K IN1+ R4515 OUT1 1 14 OUT4 2 13 IN4-
+12V
[SCART PIN 8]
L4501
12
IN4+ OPT R4535 4.7K
OPT R4538 10K B OPT R4541 12K C B OPT Q4507 E 2SC3052
C OPT Q4508 2SC3052 E
IN2+ C4501 0.1uF 50V SCART1_Rout_P SCART1_Rout_N 5.6K 5.6K R4503 R4504 R4514 1K DTV/MNT_R_OUT C4510 10uF 16V C4512 6800pF 50V 33K R4517 IN2R4519 10K OUT2 C4520 33pF
10
IN3+
DTV/MNT_L_OUT Q4503 2SC3052 R4528 2K RT1P141C-T112 Q4505 SCART_MUTE DTV/MNT_R_OUT Q4504 2SC3052 3 2 R4529 2K 1 SC_RE2 OPT R4537 1K B C OPT Q4506 2SC3052 E R4531 10K SC_RE1 OPT R4536 1K
IN3-
REC_8
OUT3
CLOSE TO soc
BCM35230 LV7 EU SCART 45 50
DUAL COMPONENT Q4601 1ST : 0TRIY80001A 2ND : 0TR387500AA
+3.3V_Normal
AMP_RESET_N C4615 1000pF 50V
22000pF
C4616
L4602 BLM18PG121SN1D AUD_MASTER_CLK +24V +24V_AMP
50V
+24V_AMP OPT R4607 3.3
OUT1A_2
OUT1A_1
PVDD1_3
PVDD1_2
PVDD1_1
VDD_IO
GND_IO
/RESET
CLK_I
[EP]
L4601 MLB-201209-0120P-N2
0.1uF 16V
BST1A
C4614
C4640 10uF 10V
PGND1A
C4618 0.1uF 50V
C4620 0.1uF 50V
C4622 10uF 35V
OPT C4624 0.01uF 50V SPK_L+ D4601 1N4148W 100V OPT R4608 12 C4629 390pF 50V R4615 12 L4605 10.0uH L4606 10.0uH C4634 0.47uF 50V C4637 0.1uF 50V R4613 12 R4617 4.7K SPK_L-
AD
C4601 0.1uF 50V
C4602 0.1uF 50V C4603 100pF 50V C4604 1000pF 50V R4605 3.3K
48
47
46
45
44
43
42
41
40
39
38
37
OPT C4606 10uF 10V
C4608 0.1uF 16V
OPT C4610 10uF 10V
C4612 0.1uF 16V
C4636 0.1uF 50V
R4616 4.7K
SPEAKER_L
AGND_PLL AVDD_PLL DVDD_PLL LF DGND_PLL

OPT C4611 10uF 10V
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 THERMAL 49
36 35 34 33 32 31 30 29 28 27 26 25
OUT1B_2 OUT1B_1 PGND1B BST1B VDR1 VCC_5 GND_2 VDR2 BST2A PGND2A OUT2A_2 OUT2A_1
C4626 22000pF 50V C4625 22000pF 50V
D4602 1N4148W 100V OPT
C4630 390pF 50V R4609 12
WAFER-ANGLE
GND_1
C4613 0.1uF 16V
IC4601 NTP-7400L
SPK_L+
DGND DVDD SDATA
SPK_L-
SPK_R+ C4627 1uF 25V C4628 1uF 25V C4633 1uF 25V
AUD_LRCH
SPK_R-
1 P4601
WCK
AUD_LRCK
BCK
AUD_SCK SDA3_3.3V SCL3_3.3V +3.5V_ST R4603 R4604 100 100 C4607 33pF 50V C4609 33pF 50V
SDA
SPK_R+
MONITOR0
MONITOR1
MONITOR2
OUT2B_1
OUT2B_2
PVDD2_1
PVDD2_2
PVDD2_3
SCL
/FAULT
PGND2B
BST2B
+24V_AMP
R4602 10K R4606 C R4601 AMP_MUTE 10K E B Q4601 2SC3052 100 C4605 1000pF 50V
D4603 1N4148W 100V OPT
R4610 12 C4631 390pF 50V
R4614 12
L4603 10.0uH L4604 10.0uH C4635 0.47uF 50V
C4638 0.1uF 50V
R4618 4.7K
C4619 0.1uF 50V
C4621 0.1uF 50V
C4623 10uF 35V D4604 1N4148W 100V OPT C4632 390pF 50V R4611 12 R4612 12
SPEAKER_R
C4639 0.1uF 50V R4619 4.7K
C4617 22000pF 50V
SPK_R-
BCM35230 LV7 EU AMP 46 50
DUAL COMPONENT D4703,D4704 D4705,D4706 1ST : EAH42720601, 2ND : EAH60994401
+3.5V_ST
IR & KEY
EEPROM_SCL R4701 10K 1% R4710 100 KEY1 +3.5V_ST R4711 100 KEY2 +3.5V_ST C4701 0.1uF C4703 0.1uF D4701 5.6V AMOTECH +3.5V_ST +3.5V_ST 5 R4717 3.3K OPT OPT C4702 0.1uF 16V L4701 BLM18PG121SN1D 6 OPT C4704 0.1uF 16V 6 5 EEPROM_SDA D4702 5.6V AMOTECH R4706 100 D4707 CDS3C05HDMI1 5.6V R4702 10K 1% R4705 100 D4706 CDS3C05HDMI1 5.6V P4701 12507WR-15L P4702 12507WR-12L
IR_15PIN 1
IR_12PIN 1
R4712 47K COMMERCIAL IR Q4701 2SC3052 COMMERCIAL C B E COMMERCIAL
R4714 47K R4713 COMMERCIAL 10K R4716 47K
C Q4702 2SC3052 COMMERCIAL
B COMMERCIAL E
C4705 1000pF 50V
R4707 LED_B/LG_LOGO
1.5K
8 R4709 0 C4708 100pF 50V D4705 5.6V AMOTECH
+3.3V_Normal
10
10
L4702 BLM18PG121SN1D
COMMERCIAL
+3.5V_ST OPT C4709 0.1uF OPT 16V C4710 0.1uF 16V R4708 LED_R/BUZZ 1.5K
11
11
R4715 22 IR_OUT COMMERCIAL
R4719 47K COMMERCIAL
+3.5V_ST
12
12 13
Q4703 2SC3052 COMMERCIAL_EU
C B E
R4721 47K R4720 COMMERCIAL 10K R4722 47K B Q4704 E 2SC3052 COMMERCIAL COMMERCIAL
13 S/T_SCL R4703 100
14
COMMERCIAL_EU
D4703 CDS3C05HDMI1 5.6V S/T_SDA R4704 100
15 16
OPT R4718 0
D4704 CDS3C05HDMI1 5.6V
BCM35230 LV7 EU IR 47 50
5V_HDMI_4 AV2_CVBS_IN SIDE_USB_CTL2 SIDE_USB_OCD2 M_REMOTE_TX M_REMOTE_RX DD_MREMOTE M_RFModule_RESET WIRELESS_DET WIRELESS_PWR_EN 3D_GPIO_2 3D_GPIO_1 3D_GPIO_0 /RST_HUB DC_MREMOTE L_VS 3D_SYNC
WIFI_DP WIFI_DM AV2_CVBS_DET
BCM35230 LV7 EU 48 50
VDDC10 +1.26V_FRC L5205 CIC21J501NE C5201 0.1uF C5210 22uF 10V C5211 22uF 10V C5243 0.22uF 6.3V C5225 0.1uF C5228 0.1uF VDDC10
+1.5V_FRC_DDR +1.5V_FRC_DDR
[SPI FLASH(2Mbit)]
C5213 0.1uF C5244 0.22uF 6.3V C5231 0.1uF C5232 0.1uF C5234 0.1uF C5247 1uF 6.3V R5244 R5246 10K CS TXA0P TXA0N TXA1P TXA1N TXA2P TXA2N TXA3P TXA3N TXA4P TXA4N SPI_CS R5245 SPI_DO 33 13pF DO 1 8 VCC
+3.3V_FRC
IC5202 W25X20BVSNIG
PLACE TERMINATION RESISTORS CLOSE TO URSA5

TXBCLKP TXBCLKN TXACLKP +1.26V_FRC L5201 CIC21J501NE C5202 0.1uF C5246 22uF 10V C5206 0.1uF DVDD_DDR_1V TXACLKN TXB2P TXB0P TXB0N TXB1P TXB1N TXB2N TXB3P TXB3N TXB4P TXB4N
4.7K
HOLD
R5252 3.3K
R5224 100 R5225
R5230 100 R5231 100 R5232 100 R5233 100 R5234 100 R5235 100 0 1M R5237 13pF
WP
CLK SPI_SCLK DIO SPI_DI
GND
C5241
DVDD_DDR_1V
R5226 100 R5227 100 VDD33 R5228 VDDC10 100 R5229 100
+3.3V_FRC
VDD33 L5202 CIC21J501NE
VDD33 (VDDP) AVDD_LVDS_3.3V +1.5V_FRC_DDR
X5201 24MHz
C5242
Place Close to Bead
100
URSA5_FLASH_WINBOND_2M GPIO[1] 3D_SYNC GPIO[8]
AVDD_PLL
AVDD33
C5203 0.1uF
C5207 0.1uF
C5214 0.1uF
C5219 0.1uF
0.1uF C5240
C5245 0.22uF 6.3V
L_VS
IC5202-*1 MX25L2006EM1I-12G, HF
CS VCC
33
R5236
R5238
R5239
R5240 R5241
R5242
+3.3V_FRC
AVDD33 L5206 CIC21J501NE
AVDD33
0 0
SO/SIO1
HOL
WP
SCL
F10
G10
F11
F12
G11
G12
K10
L10
M10
N10
N11
P10
P11
R13
T13
U15
R14
T14
U14
U13
R12
E11
R10
T11
R11
C5233 0.1uF
C5236 0.1uF
C5238 0.1uF
C5239 0.1uF
U11
F4
F5
D4
D5
E4
E5
M5
L4
L5
K9
M4
N4
N5
M9
N9
R2
R3
R4
R5
T4
U4
U3
T3
T2
U2
T1
R1
R6
R7
R8
R9
T8
U8
U7
T7
T6
U6
U5
T5
J1
J2
P9
K2
K1
P8
N2
M1
N1
N3
M3
L1
M2
L2
K3
L3
GND
SI/S
VSYNC_LIKE
M_S_PIF_CS
M_S_PIF_FC
S_M_PIF_CS
S_M_PIF_FC
SOFT_RST_L
AVDD_MPLL3.3V
AVDD_LPLL3.3V
M_S_PIF_CLK
M_S_PIF_DA0
M_S_PIF_DA1
S_M_PIF_CLK
S_M_PIF_DA0
AVDDL_MOD1.26V
DVDD_DDR_1.26V
GPIO4/(LTD_DE)
GPIO7(3D_FLAG)
S_M_PIF_DA1
SOFT_RST_R
RXB0P
RXB0N
RXB1P
RXB1N
RXB2P
RXB2N
RXB3P
RXB3N
RXB4P
RXB4N
RXA0P
RXA0N
RXA1P
RXA1N
RXA2P
RXA2N
RXA3P
RXA3N
RXA4P
RXA4N
XTALO
XTALI
GPIO1
AVDD_1
AVDD_2
VD33_1
VD33_2
VD33_3
GPIO8
OP_SYNC_L
GPIO2/(S_PIF_CLK)
GPIO10/(S_PIF_FC)
GPIO0/(UART_RX/S_PIF_DA0)
GPIO9/(UART_TX/S_PIF_DA1)
GPIO11/(S_PIF_CS)
AVDD_DDR_C_1
AVDD_DDR_C_2
AVDD_DDR_D_1
AVDD_DDR_D_2
AVDD_DDR_D_3
AVDD_DDR_D_4
AVDD_PLL3.3V
DVDD_HF1.26V
VDDC_1.26V_1
VDDC_1.26V_2
VDDC_1.26V_3
VDDC_1.26V_4
VDDC_1.26V_5
VDDC_1.26V_6
VDDC_1.26V_7
AVDD_LVDS3.3V_1
AVDD_LVDS3.3V_2
AVDD_LVDS3.3V_3
AVDD_LVDS3.3V_4
GPIO3/(LTD_DA1)
GPIO5/(LTD_CLK)
GPIO6/(LTD_DA0)
OP_SYNC_R
RXBCLKP
RXBCLKN
RXACLKP
RXACLKN
URSA5_FLASH_MACRONIX_2M
FRC_A[0-13] +3.3V_FRC AVDD_PLL L5203 CIC21J501NE C5204 0.1uF C5208 0.1uF C5215 10uF 6.3V C5217 0.1uF AVDD_PLL FRC_A[0] FRC_A[1] FRC_A[2] FRC_A[3] FRC_A[4] FRC_A[5] FRC_A[6] FRC_A[7] FRC_A[8] +3.3V_FRC AVDD_LVDS_3.3V L5204 CIC21J501NE C5205 0.1uF C5209 0.1uF C5216 0.1uF C5220 0.1uF C5223 0.1uF C5227 0.1uF AVDD_LVDS_3.3V FRC_A[9] FRC_A[10] FRC_A[11] FRC_A[12] FRC_A[13] P14 G15 N14 L15 H15 L14 G14 N12 G13 N13 H14 F15 H13 P13 M12 H12 L13 F16 F17 J13 K12 L12 K13 K14 M14 DDR3_A0/DDR2_NC DDR3_A1/DDR2_A8 DDR3_A2/DDR2_NC DDR3_A3/DDR2_A10 DDR3_A4/DDR2_A2 DDR3_A5/DDR2_A3 DDR3_A6/DDR2_A4 DDR3_A7/DDR2_A5 DDR3_A8/DDR2_A6 DDR3_A9/DDR2_A9
C8 C9 B8 A8 A7 B7 C6 C7 B6 A6 A5 B5 C4 LVDS_TXA0P LVDS_TXA0N LVDS_TXA1P LVDS_TXA1N LVDS_TXA2P LVDS_TXA2N LVDS_TXACLKP LVDS_TXACLKN LVDS_TXA3P LVDS_TXA3N LVDS_TXA4P LVDS_TXA4N LVDS_TXB0P LVDS_TXB0N LVDS_TXB1P LVDS_TXB1N LVDS_TXB2P LVDS_TXB2N LVDS_TXBCLKP LVDS_TXBCLKN LVDS_TXB3P LVDS_TXB3N LVDS_TXB4P LVDS_TXB4N C16 TXC0P/SOE TXC0N/POL TXC1P/GSP_R B17 B16 A16 A15 B15 C14 C15 B14 A14 A13 B13 C12 TXD0P/LLV3N TXD0N/LLV3P C13 B12 A12 A11 B11 C10 C11 B10 A10 A9 B9 LVDS_TXD0P LVDS_TXD0N LVDS_TXD1P LVDS_TXD1N LVDS_TXD2P LVDS_TXD2N LVDS_TXDCLKP LVDS_TXDCLKN LVDS_TXD3P LVDS_TXD3N LVDS_TXD4P LVDS_TXD4N LVDS_TXC0P LVDS_TXC0N LVDS_TXC1P LVDS_TXC1N LVDS_TXC2P LVDS_TXC2N LVDS_TXCCLKP LVDS_TXCCLKN LVDS_TXC3P LVDS_TXC3N LVDS_TXC4P LVDS_TXC4N
TXA0P/GCLK6/BLUE[7] TXA0N/GCLK5/BLUE[6]
TXA1P/OPT_N/LK3/BLUE[9] TXA1N/FLK/BLUE[8] TXA2P/GREEN[1] TXA2N/OPT_P/LK2/GREEN[0] TXACLKP/RLV0N/GREEN[3] TXACLKN/RLV0P/GREEN[2] TXA3P/RLV1N/GREEN[5] TXA3N/RLV1P/GREEN[4] TXA4P/RLV2N/GREEN[7] TXA4N/RLV2P/GREEN[6] TXB0P/RLV3N/GREEN[9] TXB0N/RLV3P/GREEN[8] TXB1P/RLVCLKN/RED[1] TXB1N/RLVCLKP/RED[0]
DDR3_A10/DDR2_RASZ DDR3_A11/DDR2_A11 DDR3_A12/DDR2_A0 DDR3_A13/DDR2_A12 DDR3_BA0/DDR2_BA2 DDR3_BA1/DDR2_CASZ DDR3_BA2/DDR2_A1 DDR3_MCLK/DDR2_MCLK DDR3_MCLKZ/DDR2_MCLKZ DDR3_CKE/DDR2_ODT DDR3_ODT/DDR2_CKE DDR3_RASZDDR2_WEZ DDR3_CASZ/DDR2_BA1 DDR3_WEZ/DDR2_BA0 DDR3_RESET/DDR2_A7
C5 B4 A4 A3 B3 C2 C3 B2 A2 C1 B1
FRC_BA0 FRC_BA1 FRC_BA2 FRC_MCLK FRC_MCLKB FRC_CKE FRC_ODT FRC_RASB FRC_CASB FRC_WEB FRC_DDR3_RESETB FRC_DQSL FRC_DQSU FRC_DQSLB FRC_DQSUB FRC_DML FRC_DQL[0-7] FRC_DMU FRC_DQL[0] GPIO[1] R5204 OPT10K R5208 OPT10K 10K 10K OPT FRC_DQL[1] FRC_DQL[2] FRC_DQL[3] R5216 R5212 FRC_DQL[4] FRC_DQL[5] FRC_DQL[6] FRC_DQL[7] FRC_DQU[0] FRC_DQU[1] FRC_DQU[2]
NON 21:9 Cinema

IC5201 LGE7303C
TXB2P/RLV4P/RED[3]/EPI_A3P TXB2N/RLV4N/RED[2]/EPI_A3N TXBCLKP/RLV5N/RED[5]/EPI_A2P TXBCLKN/RLV5P/RED[4]/EPI_A2N TXB3P/RLV6N/RED[7]/EPI_A1P TXB3N/RLV6P/RED[6]/EPI_A1N/ TXB4P/RLV7N/RED[9]/EPI_A0P TXB4N/RLV7P/RED[8]/EPI_A0N
GPIO1 : HI => B8/94, LOW => B4/98 CHIP_CONF : {GPIO8, PWM1, PWM0} CHIP_CONF = 3d5 : boot from interal SRAM CHIP_CONF = 3d6 : boot from EEPROM CHIP_CONF = 3d7 : boot from SPI Flash URSA5 CONFIGURATION
+3.3V_FRC
N16 M17 M16 M15 J15 R16 R17 H17 R15 J17 T17 H16 T15 G16 K15 N15 K17 P17 L17 P16 K16 P15 F14 T16 DDR3_NC/DDR2_A13 DDR3_NC/DDR2_DQL4 DDR3_DQU0/DDR2_DQU7 DDR3_DQU1/DDR2_DQML DDR3_DQU2/DDR2_DQU2 DDR3_DQU3/DDR2_DQU6 DDR3_DQU4/DDR2_NC DDR3_DQU5/DDR2_DQU1 DDR3_DQU6/DDR2_DQU0 DDR3_DQU7/DDR2_DQMU DDR3_DQL0/DDR2_DQU3 DDR3_DQL1/DDR2_DQL0 DDR3_DQL2/DDR2_DQL6 DDR3_DQL3/DDR2_DQL7 DDR3_DQL4/DDR2_DQL3 DDR3_DQL5/DDR2_DQL2 DDR3_DQL6/DDR2_DQL1 DDR3_DQL7/DDR2_DQL5 DDR3_DQML/DDR2_DQU5 DDR3_DQMU/DDR2_DQU4 DDR3_DQSBL/DDR2_DQSBL DDR3_DQSBU/DDR2_DQSBU
P14 G15 N14 L15 H15 L14 G14 N12 G13 N13 H14 F15 H13 P13 M12 H12 L13 F16 F17 J13 K12 L12 K13 K14 M14 DDR3_RESET/DDR2_A7 N16 M17 M16 M15 J15 R16 R17 H17 R15 J17 T17 H16 T15 G16 K15 N15 K17 P17 L17 P16 K16 P15 F14 T16 DDR3_NC/DDR2_A13 DDR3_NC/DDR2_DQL4 PWM0/SCAN_BLK1 D14 PWM1/SCAN_BLK2 I2CM_SCL I2CM_SDA I2CS_SCL I2CS_SDA TESTPIN_1 TESTPIN_2 TESTPIN_3 TESTPIN_4 TESTPIN_5 TESTPIN_6 TESTPIN_7 M0_SCLK M0_MOSI M1_SCLK M1_MOSI M2_SCLK M2_MOSI M3_SCLK M3_MOSI VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 SPI_CK SPI_CZ SPI_DI TESTPIN_8 HW_RESET LPLL_FBCLK LPLL_OUTCLK LPLL_REFIN SPI_DO G3 E17 H3 U12 T12 DDR3_DQU0/DDR2_DQU7 DDR3_DQU1/DDR2_DQML DDR3_DQU2/DDR2_DQU2 DDR3_DQU3/DDR2_DQU6 DDR3_DQU4/DDR2_NC DDR3_DQU5/DDR2_DQU1 DDR3_DQU6/DDR2_DQU0 DDR3_DQU7/DDR2_DQMU MOD_GPIO0/VDD_ODD/HSYNC MOD_GPIO1/VDD_EVEN/VSYNC MOD_GPIO2/PWM13/GCLK4/LCK MOD_GPIO3/PWM14/GCLK2/LDE D10 D11 D12 D13 DDR3_DQL0/DDR2_DQU3 DDR3_DQL1/DDR2_DQL0 DDR3_DQL2/DDR2_DQL6 DDR3_DQL3/DDR2_DQL7 DDR3_DQL4/DDR2_DQL3 DDR3_DQL5/DDR2_DQL2 DDR3_DQL6/DDR2_DQL1 DDR3_DQL7/DDR2_DQL5 TXD0P/LLV3N TXD0N/LLV3P TXD1P/LLVCLKN TXD1N/LLVCLKP TXD2P/LLV4N/EPI_B3P TXD2N/LLV4P/EPI_B3N TXDCLKP/LLV5N/BLUE[1]/EPI_B2P TXDCLKN/LLV5P/BLUE[0]/EPI_B2N TXD3P/LLV6N/BLUE[3] TXD3N/LLV6P/BLUE[2]/EPI_B1N TXD4P/LLV7N/BLUE[5]/EPI_B0P TXD4N/LLV7P/BLUE[4]/EPI_B0N DDR3_DQML/DDR2_DQU5 DDR3_DQMU/DDR2_DQU4 DDR3_DQSBL/DDR2_DQSBL DDR3_DQSBU/DDR2_DQSBU DDR3_DQSL/DDR2_DQSL DDR3_DQSU/DDR2_DQSU DDR3_ODT/DDR2_CKE DDR3_RASZDDR2_WEZ DDR3_CASZ/DDR2_BA1 DDR3_WEZ/DDR2_BA0 DDR3_MCLK/DDR2_MCLK DDR3_MCLKZ/DDR2_MCLKZ DDR3_CKE/DDR2_ODT DDR3_BA0/DDR2_BA2 DDR3_BA1/DDR2_CASZ DDR3_BA2/DDR2_A1 DDR3_A0/DDR2_NC DDR3_A1/DDR2_A8 DDR3_A2/DDR2_NC DDR3_A3/DDR2_A10 DDR3_A4/DDR2_A2 DDR3_A5/DDR2_A3 DDR3_A6/DDR2_A4 DDR3_A7/DDR2_A5 DDR3_A8/DDR2_A6 DDR3_A9/DDR2_A9 DDR3_A10/DDR2_RASZ DDR3_A11/DDR2_A11 DDR3_A12/DDR2_A0 DDR3_A13/DDR2_A12 TXB0P/RLV3N/GREEN[9] TXB0N/RLV3P/GREEN[8] TXB1P/RLVCLKN/RED[1] TXB1N/RLVCLKP/RED[0] TXB2P/RLV4P/RED[3]/EPI_A3P
TXC1N/GSP/VST DDR3_DQSL/DDR2_DQSL DDR3_DQSU/DDR2_DQSU

F10 G10 F11 F12 G11 G12 K10 L10 M10 N10 N11 P10 P11 R13 T13 U15 R14 T14 U14 U13 R12 E11 R10 T11 R11 U11 F4 F5 D4 D5 E4 E5 M5 L4 L5 K9 M4 N4 N5 M9 N9 R2 R3 R4 R5 T4 U4 U3 T3 T2 U2 T1 R1 R6 R7 R8 R9 T8 U8 U7 T7 T6 U6 U5 T5 J1 J2 P9 K2 K1 P8 N2 M1 N1 N3 M3 L1 M2 L2 K3 L3
10K
R5211 10K OPT R5215 10K
TXC2P/GOE/GCLK1 TXC2N/GSC/GCLK3 TXCCLKP/LLV0N

OP_SYNC_R
10K R5203
R5207
AVDD_1
AVDD_2
VD33_1
VD33_2
VD33_3
RXB0P
RXB0N
RXB1P
RXB1N
RXB2P
RXB2N
RXB3P
RXB3N
RXB4P
RXB4N
RXA0P
RXA0N
RXA1P
RXA1N
RXA2P
RXA2N
RXA3P
RXA3N
RXA4P
RXA4N
XTALO
XTALI
GPIO1
RXBCLKP
RXBCLKN
RXACLKP
RXACLKN
GPIO8
VSYNC_LIKE
M_S_PIF_CS
M_S_PIF_FC
S_M_PIF_CS
S_M_PIF_FC
SOFT_RST_L
SOFT_RST_R
AVDD_DDR_C_1
AVDD_DDR_C_2
AVDD_DDR_D_1
AVDD_DDR_D_2
AVDD_DDR_D_3
AVDD_DDR_D_4
AVDD_PLL3.3V
DVDD_HF1.26V
VDDC_1.26V_1
VDDC_1.26V_2
VDDC_1.26V_3
VDDC_1.26V_4
VDDC_1.26V_5
VDDC_1.26V_6
VDDC_1.26V_7
M_S_PIF_CLK
M_S_PIF_DA0
M_S_PIF_DA1
S_M_PIF_CLK
S_M_PIF_DA0
AVDD_LVDS3.3V_1
AVDD_LVDS3.3V_2
AVDD_LVDS3.3V_3
AVDD_LVDS3.3V_4
GPIO3/(LTD_DA1)
GPIO5/(LTD_CLK)
GPIO6/(LTD_DA0)
AVDDL_MOD1.26V
DVDD_DDR_1.26V
GPIO4/(LTD_DE)
GPIO2/(S_PIF_CLK)
GPIO7(3D_FLAG)
AVDD_MPLL3.3V
AVDD_LPLL3.3V
GPIO10/(S_PIF_FC)
GPIO0/(UART_RX/S_PIF_DA0)
GPIO9/(UART_TX/S_PIF_DA1)
GPIO11/(S_PIF_CS)
S_M_PIF_DA1
OP_SYNC_L
TXCCLKN/LLV0P TXC3P/LLV1N
C8 C9 B8 A8 A7 B7 C6 C7 B6 A6 A5 B5 C4 C5 B4 A4 A3 B3 C2 C3 B2 A2 C1 B1 C16
PWM0 PWM1 GPIO[8]
TXA0P/GCLK6/BLUE[7] TXA0N/GCLK5/BLUE[6]
TXC3N/LLV1P TXC4P/LLV2N TXC4N/LLV2P
TXA1P/OPT_N/LK3/BLUE[9] TXA1N/FLK/BLUE[8] TXA2P/GREEN[1] TXA2N/OPT_P/LK2/GREEN[0] TXACLKP/RLV0N/GREEN[3] TXACLKN/RLV0P/GREEN[2] TXA3P/RLV1N/GREEN[5] TXA3N/RLV1P/GREEN[4] TXA4P/RLV2N/GREEN[7] TXA4N/RLV2P/GREEN[6]
TXD1P/LLVCLKN TXD1N/LLVCLKP TXD2P/LLV4N/EPI_B3P TXD2N/LLV4P/EPI_B3N TXDCLKP/LLV5N/BLUE[1]/EPI_B2P TXDCLKN/LLV5P/BLUE[0]/EPI_B2N TXD3P/LLV6N/BLUE[3] TXD3N/LLV6P/BLUE[2]/EPI_B1N TXD4P/LLV7N/BLUE[5]/EPI_B0P TXD4N/LLV7P/BLUE[4]/EPI_B0N
21:9 Cinema
IC5201-*1 LGE7303D
TXB2N/RLV4N/RED[2]/EPI_A3N TXBCLKP/RLV5N/RED[5]/EPI_A2P TXBCLKN/RLV5P/RED[4]/EPI_A2N TXB3P/RLV6N/RED[7]/EPI_A1P TXB3N/RLV6P/RED[6]/EPI_A1N/ TXB4P/RLV7N/RED[9]/EPI_A0P TXB4N/RLV7P/RED[8]/EPI_A0N TXC0P/SOE TXC0N/POL TXC1P/GSP_R TXC1N/GSP/VST TXC2P/GOE/GCLK1 TXC2N/GSC/GCLK3 TXCCLKP/LLV0N TXCCLKN/LLV0P TXC3P/LLV1N TXC3N/LLV1P TXC4P/LLV2N TXC4N/LLV2P
B17 B16 A16 A15 B15 C14 C15 B14 A14 A13 B13 C12 C13 B12 A12 A11 B11 C10 C11 B10 A10 A9 B9
URSA5 H/W OPTION
FRC_DQU[3] +3.3V_FRC L/DIM_EDGE_32/37 R5205 10K OPT R5209 10K LVDS_EXT_URSA5 R5213 10K OPT R5217 10K FRC_DQU[4] FRC_DQU[5] FRC_DQU[6] FRC_DQU[7] FRC_DQU[0-7] +3.3V_FRC
D10 MOD_GPIO0/VDD_ODD/HSYNC MOD_GPIO1/VDD_EVEN/VSYNC MOD_GPIO2/PWM13/GCLK4/LCK MOD_GPIO3/PWM14/GCLK2/LDE D11 D12 D13
URSA_MODEL_OPT_0 URSA_MODEL_OPT_1 URSA_MODEL_OPT_2 2D/3D_CTL R5253 3D-SG 33 3D_SYNC_RF PWM0 PWM1
U12 PWM0/SCAN_BLK1 PWM1/SCAN_BLK2 G3 LPLL_FBCLK LPLL_OUTCLK LPLL_REFIN TESTPIN_1 TESTPIN_2 TESTPIN_3 TESTPIN_4 TESTPIN_5 TESTPIN_6 TESTPIN_7 TESTPIN_8 HW_RESET M0_SCLK M0_MOSI M1_SCLK M1_MOSI M2_SCLK M2_MOSI M3_SCLK M3_MOSI E17 H3 T12
R5250 R5251
33 33
URSA_MODEL_OPT_0 URSA_MODEL_OPT_1 URSA_MODEL_OPT_2 2D/3D_CTL
R5220 R5221
4.7K OPT D14 4.7K OPT 33 R5222 R5223 D15 P1 P2 33 I2CM_SCL I2CM_SDA
D15 P1 P2
L/DIM_EDGE_42/47/55 R5206 10K
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
E10
E16
G17
H10
H11
J10
J11
J12
J14
J16
K11
L11
L16
M11
M13
N17
P12
U16
NC
C17
D16
D17
E15
E14
E13
E12
F13
U10
10K LVDS_S7M-PLUS R5214 10K
R5218 OPT 10K
SCL2_+3.3V_URSA
I2CS_SCL I2CS_SDA VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28
MODEL OPTION
PIN NAME MODEL_OPT_0 MODEL_OPT_1 MODEL_OPT_2 MODEL_OPT_3 PIN NO. D10 D11 D12 D13 HIGH L/DIM_10BLOCK RESERVED LVDS_EXT_URSA5 RESERVED
SDA2_+3.3V_URSA
R5210 OPT
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
T10
D6
D7
D8
D9
E6
E7
E8
E9
F3
F6
F7
F8
F9
G1
G2
G4
G5
G6
G7
G8
G9
H1
H2
H4
H5
H6
H7
H8
H9
J4
J5
J6
J7
J8
J9
K4
K5
K6
K7
K8
L6
L7
L8
M6
M7
M8
N6
N7
N8
P3
P4
P5
P6
P7
L9
J3
D1
D2
D3
E1
E2
E3
F1
F2
T9
U9
VSS_70
VSS_71
VSS_72
SPI_CK
SPI_CZ
SPI_DI T10
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
LOW L/DIM_16BLOCK D6 RESERVED LVDS_S7M_PLUS RESERVED
E10
E16
G17
H10
H11
J10
J11
J12
J14
J16
K11
L11
L16
M11
M13
N17
P12
U16
C17
D16
D17
E15
E14
E13
E12
F13
T9 33 U10 33 U9
D7
D8
D9
E6
E7
E8
E9
F3
F6
F7
F8
F9
G1
G2
G4
G5
G6
G7
G8
G9
H1
H2
H4
H5
H6
H7
H8
H9
J4
J5
J6
J7
J8
J9
K4
K5
K6
K7
K8
L6
L7
L8
M6
M7
M8
N6
N7
N8
P3
P4
P5
P6
P7
L9
J3
D1
D2
D3
E1
E2
E3
F1
F2
33
SPI_DO
NC
R5247
R5248
R5249
NON USED BCM35230 LVDS CHC/D

TXC0N TXC0P TXC1N TXC1P
Debugging for URSA5

P5201 12507WR-04L URSA5_DEBUG 1 SW5201 JS2235S R5219 10K OPT SDA2_3.3V R5259 0 URSA5_MP SDA2_+3.3V_URSA R5261 0 OPT SDA2_+3.3V_DB FRC_RESET URSA5_UO2_RESET R5256 10K OPT E R5254 4.7K B R5262 2.2K URSA5_UO2_RESET C Q5201 2SC3052 URSA5_UO2_RESET R5255 22K URSA5_UO2_RESET URSA5_UO2_RESET C5212 4.7uF 16V URSA5_UO2_RESET G +3.3V_FRC M0_SCLK M0_MOSI M1_SCLK M1_MOSI M2_SCLK M2_MOSI M3_SCLK M3_MOSI Q5202 AO3407A S D
SPI_SCLK
SPI_CS
SPI_DI
SPI_DO
TXC2N TXC2P TXCCLKN TXCCLKP TXC3N TXC3P TXC4N TXC4P TXD0N TXD0P TXD1N TXD1P TXD2N TXD2P TXDCLKN TXDCLKP TXD3N TXD3P TXD4N TXD4P
2 URSA5_DEBUG R5201 22 URSA5_DEBUG R5202 22 SCL2_3.3V SCL2_+3.3V_DB SCL2_+3.3V_URSA SDA2_+3.3V_DB SCL2_+3.3V_DB 5 R5260 0 OPT R5258 0 URSA5_MP 1 6
2 URSA5_DEBUG 3
R5243
33
URSA5_UO3_RESET
MStar URSA5 FRC block
2010. 08.18 52 55
+1.5V_FRC_DDR
Close to DDR Pin

R5301 1K 1% MVREFCA R5302 1K 1% +1.5V_FRC_DDR +1.5V_FRC_DDR
DDR3 1.5V De-Cap
Place near Memory
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
C5306
C5307
C5308
C5309
C5310
C5311
C5312
C5313
C5314
0.1uF
C5303 0.1uF 16V +1.5V_FRC_DDR
C5304 22uF 10V
C5305
0.1uF
C5301 0.1uF
Place Close to DDR Pin

R5303 1K 1% MVREFDQ R5304 1K 1% C5302 0.1uF
Place the serail damping resistors in the middle of DRAM pattern
FRC_DMU
R5311
22
DDR3_DMU FRC_DQL[4] FRC_DQL[6] FRC_DQL[2] FRC_DQL[0] DDR3_DQSLB
AR5306 DDR3_DQL[4] DDR3_DQL[6] DDR3_DQL[2] DDR3_DQL[0] 22
NON 21:9 Cinema(1600MHz)

FRC_DQSL
R5312
22
DDR3_DQSL
IC5301 H5TQ1G63DFR-PBC IC5301-*1 H5TQ1G63DFR-RDC

21:9 Cinema(1866MHz) N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 NC_5 M2 N8 M3 J7 K7 K9 L2 K1 J3 K3 L3 T2 RESET CS ODT RAS CAS WE NC_1 NC_2 NC_3 F3 G3 C7 B7 E7 D3 E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 B1 B9 D1 D8 E2 E8 F9 G1 G9 DML DMU DQSU DQSU VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 DQSL DQSL A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 B1 B9 D1 D8 E2 E8 F9 G1 G9 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 NC_4 NC_7 CK CK CKE BA0 BA1 BA2 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 J1 J9 L1 L9 T7 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 D7 C3 C8 C2 A7 A2 B8 A3 DDR3_DQU[0] DDR3_DQU[1] DDR3_DQU[2] DDR3_DQU[3] DDR3_DQU[4] DDR3_DQU[5] DDR3_DQU[6] DDR3_DQU[7] DML DMU E3 F7 F2 F8 H3 H8 G2 H7 DQSU DQSU E7 D3 A1 A8 C1 C9 D2 E9 F1 H2 H9 +1.5V_FRC_DDR A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC NC_6 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 B2 D9 G7 K2 K8 N1 N9 R1 R9 A1 A8 C1 C9 D2 E9 F1 H2 H9 J1 J9 L1 L9 T7 NC_1 NC_2 NC_3 NC_4 NC_6 DQSL DQSL C7 B7 F3 G3 DDR3_DQSL DDR3_DQSLB DDR3_DQSU DDR3_DQSUB DDR3_DML DDR3_DMU DDR3_DQL[0] DDR3_DQL[1] DDR3_DQL[2] DDR3_DQL[3] DDR3_DQL[4] DDR3_DQL[5] DDR3_DQL[6] DDR3_DQL[7] RESET VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 CS ODT RAS CAS WE T2 CK CK CKE ZQ L8 VREFDQ R5305 H1 240 1% B2 D9 G7 K2 K8 N1 N9 R1 R9 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 BA0 BA1 BA2 J7 K7 K9 L2 K1 J3 K3 L3 DDR3_ODT DDR3_RASB DDR3_CASB DDR3_WEB R5308 DDR3_RESETB 0 A15 M2 N8 M3 DDR3_BA0 DDR3_BA1 DDR3_BA2 R5307 L8 ZQ VREFCA M8 MVREFDQ H1 VREFDQ M8 VREFCA A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 M7 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 DDR3_A[0] DDR3_A[1] DDR3_A[2] DDR3_A[3] DDR3_A[4] DDR3_A[5] DDR3_A[6] DDR3_A[7] DDR3_A[8] DDR3_A[9] DDR3_A[10] DDR3_A[11] DDR3_A[12] DDR3_A[13]
DDR3_A[0-13]
FRC_DQSLB
R5313
22
MVREFCA
FRC_DQSU
R5314
22
DDR3_DQSU FRC_DQU[5] FRC_DQU[3] FRC_DQU[7] FRC_DQU[1] DDR3_DML
AR5307 DDR3_DQU[5] DDR3_DQU[3] DDR3_DQU[7] DDR3_DQU[1] 22
FRC_DQSUB
R5315
22
DDR3_DQSUB
FRC_DML
R5316
22
FRC_ODT
R5317
22
DDR3_ODT FRC_DQU[4] FRC_DQU[6] FRC_DQU[2] FRC_DQU[0] DDR3_CKE
AR5308 DDR3_DQU[4] DDR3_DQU[6] DDR3_DQU[2] DDR3_DQU[0] 22
FRC_RASB
R5318
22
DDR3_RASB
FRC_CKE
R5319
22
Place Close to DDR Pin

R5309 56 DDR3_MCK R5310 56 DDR3_MCK 150 OPT C5315 0.01uF 25V DDR3_MCKB FRC_DDR3_RESETB R5322 22 DDR3_RESETB FRC_MCLKB FRC_MCLK R5320 22 DDR3_MCK FRC_DQL[3] R5321 22 DDR3_MCKB FRC_DQL[1] FRC_DQL[5] FRC_DQL[7] 22 AR5309 DDR3_DQL[3] DDR3_DQL[1] DDR3_DQL[5] DDR3_DQL[7]
AR5301 DDR3_MCKB DDR3_CKE FRC_A[10] FRC_BA1 FRC_A[12] FRC_A[4] +1.5V_FRC_DDR 22 DDR3_A[10] DDR3_BA1 DDR3_A[12] DDR3_A[4]
AR5302 FRC_A[6] FRC_A[8] FRC_A[1] FRC_A[11] 22 DDR3_A[6] DDR3_A[8] DDR3_A[1] DDR3_A[11]
AR5303 FRC_A[0] FRC_A[2] FRC_A[13] DDR3_DQL[0-7] FRC_A[9] 22 DDR3_A[0] DDR3_A[2] DDR3_A[13] DDR3_A[9]
AR5304 FRC_A[7] FRC_A[5] FRC_A[3] 22 DDR3_A[7] DDR3_A[5] DDR3_A[3]
AR5305 FRC_BA2 FRC_BA0 FRC_WEB FRC_CASB 22 DDR3_BA2 DDR3_BA0 DDR3_WEB DDR3_CASB
DDR3_DQU[0-7]
MStar URSA5 DDR3 4Mbit
2010. 08.18 53 55
CORE +1.26V_FRC
+12V +3.3V_FRC
TYPICAL 980mA
+3.3V_FRC
+1.5V_FRC
[EP] 1 THERMAL 8 OUT 9 7 FB 6 SS 4 EN EAN41406705 5 GND
TYPICAL 350mA
+1.5V_FRC_DDR
IC5401 AOZ1072AI
L5402 CIC21J501NE PGND 1 8 LX_2
L5403 3.6uH NR8040T3R6N
R5405 10K R5409 OPT 10K
+1.26V_FRC POWER_ON/OFF2_2
IC5403 AP7173-SPG-13 HF(DIODES)
R1
R5414 4.3K 1%
VIN C5406 0.1uF AGND C5402 10uF 25V C5404 10uF 25V
LX_1 C5407 1uF 10V R5404 20K OPT
IN R5406 3.3K 1% 2
2A
EN
R1
R5407 3.9K 1% C5412 22uF 10V C5414 22uF 10V R5413 10K
PG 3 VCC
R5415 3.9K 1%
FB
COMP R5402 20K C5408 3300pF
Placed on SMD-TOP
C5410 100pF 50V OPT
R2
C5419 560pF 50V R5416 1K 1% C5420 10uF 16V C5421 10uF 16V
C5416 10uF 16V R5408 12K 1%
C5417 0.1uF 16V
R2
C5418 1uF 10V
Vout=(1+R1/R2)*0.8
Vout=0.6*(1+R1/R2) +1.5V of DDR&URSA5 uses same power line
+3.3V_FRC
+12V
TYPICAL 300mA
L5401 CIC21J501NE +3.3V_FRC
IC5402 AOZ1072AI-3
PGND LX_2
L5404 3.6uH NR8040T3R6N
VIN C5405 0.1uF
LX_1 R5403 10K
R5410 27K 1% POWER_ON/OFF2_2 R5411 4.3K 1%
AGND
2A
EN
R1
C5401 10uF 25V
C5403 10uF 25V
C5413 22uF 10V
C5415 22uF 10V
FB
4 EAN60922902
COMP R5401 20K C5409 2200pF
C5411 100pF 50V OPT
R5412 10K 1%
R2
Vout=0.8*(1+R1/R2)
MStar URSA5
URSA5 Power Block
2010. 08.18 54 55
M1-*3 MDS62110206 GASKET_6.5T MDS62110204 GASKET_5.5T GASKET_4.5T M2 MDS62110208 GASKET_4.5T M3 MDS62110208 GASKET_4.5T M4 MDS62110208 GASKET_4.5T M5 MDS62110208 GASKET_4.5T M6 MDS62110208 GASKET_4.5T M7 MDS62110208 GASKET_4.5T M8 MDS62110208 GASKET_4.5T M9 MDS62110208 GASKET_4.5T M10 M10-*1 MDS62110210 GASKET_5.0T M11-*1 MDS62110210 GASKET_5.0T M12-*1 MDS62110210 GASKET_5.0T MDS62110208 GASKET_4.5T M11 MDS62110208 GASKET_4.5T M12 MDS62110208 GASKET_4.5T M2-*2 MDS62110204 GASKET_5.5T M3-*2 MDS62110204 GASKET_5.5T M4-*2 MDS62110204 GASKET_5.5T M5-*2 MDS62110204 GASKET_5.5T M6-*2 MDS62110204 GASKET_5.5T M7-*1 M7-*2 MDS62110204 GASKET_5.5T M8-*1 M8-*2 MDS62110204 GASKET_5.5T M9-*1 MDS62110210 GASKET_5.0T M9-*2 MDS62110204 GASKET_5.5T M10-*3 MDS62110206 GASKET_6.5T M11-*3 MDS62110206 GASKET_6.5T M11-*2 MDS62110204 GASKET_5.5T M12-*3 MDS62110206 GASKET_6.5T M12-*2 MDS62110204 GASKET_5.5T MDS62110204 GASKET_5.5T M10-*2 MDS62110210 GASKET_5.0T MDS62110210 GASKET_5.0T MDS62110210 GASKET_5.0T M6-*1 MDS62110210 GASKET_5.0T M5-*1 MDS62110210 GASKET_5.0T M4-*1 MDS62110210 GASKET_5.0T M3-*1 MDS62110210 GASKET_5.0T M2-*1 MDS62110210 GASKET_5.0T M2-*3 MDS62110206 GASKET_6.5T M3-*3 MDS62110206 GASKET_6.5T M4-*3 MDS62110206 GASKET_6.5T M5-*3 MDS62110206 GASKET_6.5T M6-*3 MDS62110206 GASKET_6.5T M7-*3 MDS62110206 GASKET_6.5T M8-*3 MDS62110206 GASKET_6.5T M9-*3 MDS62110206 GASKET_6.5T
M1-*2
M1-*1
M1
SMD GASKET 4.5T

MDS62110208
SMD GASKET 6.5T
SMD GASKET 5.0T
SMD GASKET
SMD GASKET 5.5T
GASKET3.5T_HEATSINK MDS62110213 M20 M1-*6 MDS62110214 GASKET_9.5T M2-*6 GASKET3.5T_HEATSINK MDS62110213 M21 MDS62110214 GASKET_9.5T M3-*6 MDS62110214 GASKET_9.5T M4-*6 MDS62110214 GASKET_9.5T M5-*6 MDS62110214 GASKET_9.5T M6-*6 MDS62110214 GASKET_9.5T M7-*6 MDS62110214 GASKET_9.5T M8-*6 MDS62110214 GASKET_9.5T M9-*6 MDS62110214 GASKET_9.5T M10-*6 MDS62110214 GASKET_9.5T M11-*6 MDS62110214 GASKET_9.5T M12-*6 MDS62110214 GASKET_9.5T M7-*5 MDS62110209 GASKET_8.5T M8-*5 MDS62110209 GASKET_8.5T M9-*5 MDS62110209 GASKET_8.5T M10-*4 M10-*5 MDS62110209 GASKET_8.5T M11-*5 MDS62110209 GASKET_8.5T M12-*4 M12-*5 MDS62110205 GASKET_7.5T MDS62110205 GASKET_7.5T M11-*4 MDS62110205 GASKET_7.5T M1-*5 MDS62110209 GASKET_8.5T M2-*5 MDS62110209 GASKET_8.5T M3-*5 MDS62110209 GASKET_8.5T M4-*5 MDS62110209 GASKET_8.5T M5-*5 MDS62110209 GASKET_8.5T M6-*5 MDS62110209 GASKET_8.5T M1-*4 MDS62110205 GASKET_7.5T M2-*4 MDS62110205 GASKET_7.5T M3-*4 MDS62110205 GASKET_7.5T M4-*4 MDS62110205 GASKET_7.5T M5-*4 MDS62110205 GASKET_7.5T M6-*4 MDS62110205 GASKET_7.5T M7-*4 MDS62110205 GASKET_7.5T M8-*4 MDS62110205 GASKET_7.5T M9-*4 MDS62110205 GASKET_7.5T GASKET3.5T_HEATSINK MDS62110213 M22 GASKET3.5T_HEATSINK MDS62110213 M23
SMD GASKET 8.5T
SMD GASKET 9.5T
SMD GASKET 7.5T
BCM35230 2010. 09. 18 56 56

SMD GASKET
MDS62110209 GASKET_8.5T
RGB/ PC AUDIO/ SPDIF/ EARPHONE/ RS232C

DUAL COMPONENT
RGB PC
+5V_Normal D3810 KDS184 A2 C A1 +3.3V_Normal +5V_Normal

IC3801 74F08D
D3804,D3805,D3806 D3807,D3808,D3813 D3814
1ST : EAH39491601, 2ND : EAH33945901 1ST : 0DD184009AA, 2ND : 0DSIH00028A 1ST : 0TRIY80001A, 2ND : 0TR387500AA
D3810
JK3803 KJA-PH-0-0177 GND 5 4 3 1
Q3801
R3809
IC3802
D0A
14
VCC
A0
AT24C02BN-SH-T
2.7K
VCC
R3810 2.7K
R3813 10K R3858 1K HP_DET EDID_WP
R3816 2.7K
HP_LOUT
L DETECT R
R3856 DSUB_VSYNC R3857 DSUB_HSYNC
22
D0B 2 13 D3B
1 8 A1 WP
22 R3850 0 OPT R3851 0 OPT
Q0
12
D3A
A2
SCL
22 22 C3812 18pF 50V C3813 18pF 50V
HP_ROUT
R3812 R3811
D1A
11
Q3
GND 4 5 SDA
RGB_DDC_SCL RGB_DDC_SDA
D1B
10
D2B
R3852 0 OPT 0
Q1
D2A R3853
EARPHON JACK
OPT
GND 7 8 Q2
OPT R3802 10K
D3804 30V
C3810 22pF 50V
+3.3V_Normal
EARPHONE AMP
OPT R3801 10K D3805 30V Closed to JACK C3811 22pF 50V D3809 5.6V OPT D3811 5.6V OPT L3806 BLM15BD121SN1
L3803 BLM18PG121SN1D LPF READEY (For H/P Noise Improvement) C3824 10uF 10V C3826 0.1uF 16V R3862 0
L3804 BG2012B080TF HP_LOUT C3829 0.22uF 10V +3.3V_Normal
DSUB_B+ 5.6V D3808-*1 ESD_CERADIODE R3807 75 C3807 47pF 50V
ESD_COMMON D3808 30V
Close to the IC
C3823 1uF 10V EN
OUTL
SGND
VDD
L3807 BLM15BD121SN1 HP_LOUT_N DSUB_G+ 5.6V D3806-*1 ESD_CERADIODE R3806 75 C3808 47pF 50V ESD_COMMON D3806 30V +3.3V_Normal HP_LOUT_P R3814 10K DSUB_DET 1K L3808 BLM15BD121SN1 DSUB_R+ 5.6V D3807-*1 ESD_CERADIODE R3808 75 C3809 47pF 50V ESD_COMMON D3807 30V R3815 HP_ROUT_N
C3818 1uF 10V C3819 1uF 10V C3820 1uF 10V HP_ROUT_P C3821 1uF 10V
16 INL1
15
14
13 12 HPVDD
C3827 2.2uF 10V
R3825 100K OPT
R3826 4.7K C
OPT R3827 0 R3828 1K SIDE_HP_MUTE
INL+
2 IC3804 TPA6132A2 3
11
CPP C3828 2.2uF 10V Q3801 2SC3052
INR+
10
PGND
INR-
4 5
EAN60724701 6 G0 G1 7 HPVSS 8
CPN
R3817 4.7K
ESD_COMMON
OUTR
D3812 5.6V
D3812-*1 5.6V ESD_CERADIODE
R3819 4.7K
R3818 OPT
R3820 OPT
R3863 0 C3825 2.2uF 10V
L3805 BG2012B080TF HP_ROUT C3830 0.22uF 10V
GREEN_GND
DDC_CLOCK
DDC_DATA
BLUE_GND
SYNC_GND
RED_GND
SPG09-DB-010
DDC_GND
H_SYNC
V_SYNC
GND_2
GREEN
GND_1
BLUE
RED
NC
P3801
10
16
SHILED
11
12
13
14
15
RS232C
9 0 IR_OUT IR_OUT R3860 100 +3.5V_ST R3859 100
JP3808 JP3809
10 5
R3829 4 8 3 7
PC AUDIO
JK3801 PEJ027-04 3 6A 7A 4 5 7B 6B E_SPRING T_TERMINAL1 B_TERMINAL1 R_SPRING T_SPRING B_TERMINAL2 T_TERMINAL2 ESD_COMMON D3802 AMOTECH 5.6V R3854 22 PC_R_IN R3804 470K C3803 560pF 50V R3855 22 PC_L_IN D3801 AMOTECH 5.6V R3803 470K C3802 560pF 50V C3805 560pF 50V 0.1uF C3817 V6 C3806 560pF 50V 0.1uF C3814 C1+ 1
ESD_COMMON D3814 IC3803 MAX3232CDR 30V VCC +3.5V_ST 0.1uF C3815 V+ 2 15 GND D3813-*1 ESD_CERADIODE 5.6V SPG09-DB-009 D3814-*1 ESD_CERADIODE 5.6V P3802 ESD_COMMON D3813 6 30V
16
C1-
14
DOUT1
R3830 4.7K OPT
R3831 4.7K OPT R3821 0 BCM_RX R3822 0 NEC_RXD
0.1uF
C3816
C2+
13
RIN1
C2-
ESD_COMMON
12
ROUT1
11
DIN1
DOUT2
10
DIN2
R3823 0 BCM_TX R3824 0 NEC_TXD
RIN2
8 EAN41348201
ROUT2
+3.3V_Normal
R3805 2.7K R3861 0 SPDIF_OUT D3803 30V OPT C3804 0.1uF 16V
VINPUT
VCC
FIX_POLE
JST1223-001 JK3802
SPDIF OUT
GND
Fiber Optic
HIGH : SELECT X1, Y1, SELECT MAIN TX/RX LOW : SELECT X0, Y0, SELECT MICOM TX/RX
BCM35230 LV7 COMM JACK 99 99

LG LCD 32lw470s Chassis Ld12p

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LG LCD 32lw470s Chassis Ld12p

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Internal Use Only

North/Latin America Europe/Africa Asia/Oceania http://aic.lgservice.com http://eic.lgservice.com http://biz.lgservice.com

LED LCD TV SERVICE MANUAL

P/NO : MFL67002344 (1107-REV00)

LGE Internal Use Only

Leakage Current Hot Check circuit

Before returning the receiver to the customer,

Leakage Current Cold Check(Antenna Cold Check)

To Instruments exposed METALLIC PARTS

Good Earth Ground such as WATER PIPE, CONDUIT etc.

LGE Internal Use Only

2. Requirement for Test

4. Model General Specification

LGE Internal Use Only

No. Item 3 Receiving system

Specification Analog : Upper Heterodyne Digital : COFDM , QAM

- Symbolrate : 4.0Msymbols/s to 7.2Msymbols/s - Modulation : 16QAM, 64-QAM, 128-QAM and 256-QAM

LGE Internal Use Only

5. Component Video Input (Y, CB/PB, CR/PR)

6. RGB Input (PC)

LGE Internal Use Only

LGE Internal Use Only

(2) HDMI Input (1.3)

(4) USB Input

LGE Internal Use Only

(5) RGB-PC Input

(7) 3D Input mode

Top & Bottom

Single Frame Sequential

LGE Internal Use Only

3.2. LAN Inspection

LGE Internal Use Only

3.3. Widevine Key Inspection

3.5. Model name & serial number download

3.4. LAN PORT INSPECTION(PING TEST)

LGE Internal Use Only

3.7. CI+ Key checking method

3) Result value i 01 OK 1d1852d21c1ed5dcx CI+ key Value

3.8. WIFI MAC ADDRESS CHECK

0x02 0F 0x03 90 0x04 45 0x05 40 0x06 3E 0x07

(2) Check the menu on in-start.

LGE Internal Use Only

4.2.3. Equipment connection MAP

Model Name ALL

HEX 0001 0001

EDID Table 0100 0100

DDC Function Analog Digital

Pat t ern Generat o r

Serial No. : Controlled on product line

4.2.4. Adj. Command (Protocol)

RS-232C Command used during auto-adj.

RS-232C COMMAND [CMD wb wb wb wb wb wb

4.2. White Balance Adjustment

R-Gain G-Gain B-Gain R-Cut G-Cut B-Cut

R-Gain G-Gain B-Gain R-Cut G-Cut B-Cut

Color Analyzer Matrix should be calibrated using CS-1000.

R-Gain G-Gain B-Gain R-Cut G-Cut

LGE Internal Use Only

3 Command White Balance Adj. Map

4.2.6. Reference (White Balance Adj. coordinate and temperature)

Cool Medium Warm

Infrared Sensor Adj. Map