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Multiple choice questions

1.The number of digits in octal system is a.8 b.7 c.10 d. none 2..The number of digits in Hexadecimal system is a.15 b.17 c.16 d. 8 3.The number of bits in a nibble is a.16 b.5 c.4 d.8 4.The digit F in Hexadecimal system is equivalent to ------ in decimal system a.16 b.15 c.17 d. 8 5.Which of the following binary numbers is equivalent to decimal 10 a.1000 b.1100 c.1010 d.1001 6.The number FF in Hexadecimal system is equivalent to ------ in decimal system a.256 b.255 c.240 d.239 7.IC s are a. analog c. both analog and digital b. digital d. mostly analog

8.The rate of change of digital signals between High and Low Level is a. very fast b. fast c. slow d. very slow 9. Digital circuits mostly use a. Diodes b. Bipolar transistors c. Diode and Bipolar transistors d. Bipolar transistors and FETs 10.Logic pulser a. generates short duration pulses b. generate long duration pulses c. generates long and short duration d. none of above

11.What is the output state of an OR gate if the inputs are 0 and 1? a.0 b.1 c.3 d.2 12.What is the output state of an AND gate if the inputs are 0 and 1? a.0 b.1 c.3 d.2 13.A NOT gate has... a. Two inputs and one output b. One input and one output c. One input and two outputs d. none of above 14.An OR gate has... a. Two inputs and one output b. One input and one output c. One input and two outputs d. none of above 15.The output of a logic gate can be one of two _____? a. Inputs b. Gates c.States d. none 16.Logic states can only be ___ or 0. a. 3 b. 2 c.1 d.0 17.The output of a ____ gate is only 1 when all of its inputs are 1 a. NOR b. XOR c. AND d. NOT 18.A NAND gate is equivalent to an AND gate plus a .... gate put together. a. NOR b. NOT c. XOR d. none 19.Half adder circuit is ______? a. Half of an AND gate b. A circuit to add two bits together c. Half of a NAND gate d. none of above

20. Numbers are stored and transmitted inside a computer in a. binary form b. ASCII code form c. decimal form d. alphanumeric form 21.The decimal number 127 may be represented by a. 1111 1111B b. 1000 0000B c. EEH d. 0111 1111 22.. A byte corresponds to a. 4 bits c. 16 bits 23.A gigabyte represents a.1 billion bytes c. 230 bytes 24. A megabyte represents a. 1 million bytes c. 220 bytes 25.. A Kb corresponds to a. 1024 bits c.210 bytes b. 8 bits d. 32 bits b. 1000 kilobytes d. 1024 bytes b. 1000 kilobytes d. 1024 bytes b. 1000 bytes d. 210 bits

26.A parity bit is a. used to indicate uppercase letters b. used to detect errors c. is the first bit in a byte d. is the last bit in a byte 27. Which of these devices are two state. a. lamp b. punched card c. magnetic tape d. all the above The output impedance of of a logic pulser is a. low b. high c. may be low or high d. none of above 28.The number of LED display indicators in logic probe are a.1 b.2 c.1 or 2 d.4

29.In hexadecimal number system,A is equal to decimal number a.10 b.11 c.17 d.18 30.Hexadecimal number F is equal to octal number a.15 b.16 c.17 d.18 31.Hexadecimal number E is equal to binary number a.1110 b.1101 c.1001 d.1111 32.Binary number 1101 is equal to octal number a.15 b.16 c.17 d.14 33.Octal number 12 is equal to decimal number a.8 b.11 c.9 d. none 34.Decimal number 10 is equal to binary number a.1110 b.1000 c.1001 d.1010 35.Binary number 110011011001 is equal to decimal number a.3289 b.2289 c.1289 d.289 36.1111+11111= a.101111 c.111111 b.101110 d.011111

37.Binary multiplication 1*0= a.1 b.0 c.10 d.11 38.110012 -100012= a.10000 c.00100

b.01000 d.00001

39.10112*1012= a.55 c.35 40.1110112*100012= a.111101101 c.111110 41.4 bits is equal to a. 1 nibble c. 2 byte

b.45 d.25

b.111101100 d.1100110 b.1 byte d. none of above

42. which is non-volatile memory a. RAM b. ROM c. both d. none 43. The contents of these chips are lost when the computer is switched off? a. ROM chips b. RAM chips c. DRAM chips d. none of above 44.What are responsible for storing permanent data and instructions.? a. RAM chips b. ROM chips c. DRAM chips d. none of above 45. Which parts of the computer perform arithmetic calculations? a. ALU b. Registers c. Logic bus d. none of above 46.How many bits of information can each memory cell in a computer chip hold? a. 0 bits b. 1 bit c. 8 bits d. 2 bits 47.What type of computer chips are said to be volatile? a. RAM chips b. ROM chips c. DRAM d. none of above 48.Which generation of computer uses more than one microprocessor? a. Second generation b. Fifth generation c.Third generation d .none of above

49.Which generation of computer developed using integrated circuits? a. Second generation b. Fifth generation c. Third generation d. none of above 50.Which generation of computer was developed from microchips? a. Second generation b. Third generation c. Fourth generation d. none of above 51.RAM can be expanded to a a. increase word size b. increase word number c. increase word size or increase word number d. none of above 52. Which memory is available in all technologies a. PROM b. EEPROM c. ROM d. EPROM 53. Which memory does not require programming equipment a. PROM b. EEPROM c. ROM d. EPROM 54. In CCD a. small charge is deposited for logical 1 b. small charge is deposited for logical 0 or 1 c. small charge is deposited for logical 0 and large charge for logical 1 d. none of above 55. The internal structure of PLA is similar to a. RAM b. ROM c. both RAM or ROM d. neither RAM nor RAM 56.An output of combinational ckt depends on a. present inputs b. previous inputs c. both present and previous d .none of above 57.Which are combinational gates a. NAND & NOR c. X-OR & X-NOR b. NOT & AND d. none of above

58.. As access time is decreased, the cost of memory a. remains the same b. increases c. decreases d. may increase or decrease 59. Which is correct: a. A.A=0 c. A+A=A' 60.A counter is a a. Sequential ckt c. both combinational and sequential ckt 61.The parity bit is a. always 1 c.1 or 0 b. A+1=A d. A'.A'=0 b. Combinational ckt d. none of above

b. always 0 d.none of above

62.In 2 out of 5 code,decimal number 8 is a.11000 b.10100 c.1100 d.1010 63.In number of information bits is 11,the number of parity Bits in hamming code is a.5 b.4 c.3 d.2 64.For a 4096*8 EPROM ,the number of address lines is a.14 b.12 c.10 d.8 65. 23.6 10=.2 a.11111.10011 c.00111.101 66.BCD number 0110011=.10 a.66 c.68

b.10111.10011 d.10111.1

b.67 d.69

67.The total number of input states for 4 input or gate is a.20 b.16 c.12 d.8

68.In a 4 input OR gate,the total number of High outputs for the 16 input states are a.16 b.15 c. 13. d. none of above 69.In a 4 input AND gate,the total number of High outputs for the 16 input states are a.16 b.8 c.4 d.1 70.a buffer is a. always non-inverting c. inverting or non-inverting b.always inverting d.none of above

71.An AND gate has two inputs A and B and ine inhibits input S.Output is 1 if a.A=1,B=1,S=1 b. A=1,B=1,S=0 c. A=1,B=0,S=1 d. A=1,B=0,S=0 72. An AND gate has two inputs A and B and ine inhibits input S.Out of total 8 input states,Output is 1 in a. 1 states b. 2 states c. 3 states d. 4 states 73.In a 3 input NOR gate,the number of states in which output is 1 equals a. 1 b. 2 c. 3 d. 4 74.Which of these are universal gates a. only NOR c. both NOR and NAND b. only NAND d. NOT,AND,OR

75. In a 3 input NAND gate,the number of gates in which output in 1equals a.8 b.7 c.6 c.5 76. A XOR gate has inputs A and B and output Y.Then the output equation is a.Y=A+B b.Y=AB+AB c.AB+ AB d.AB+AB 77.A 14 pin NOT gate IC has..NOT gates a.8 b.6 c.5 d.4 78.A 14 pin AND gate IC has..AND gates a.8 b.6 c.4 d.2

79.The first contribution to logic was made by a. George Boole b. Copernicus c. Aristotle d. Shannon 80.Boolean Alzebra obeys a. commutative law c. distributive law 81. A+(B.C)= a. A.B+C c. A 82.A.0= a. 1 c. 0 83.A+A.B= a. B c. A 84.Demorgans first theorem is a. A.A=0 c. (A+B)=A.B 85. Demorgans second theorem is a. A.A=0 c. (A+B)=A.B 86. Which of the following is true a. SOP is a two level logic c. both SOP and POS are two level logic d. Hybrid function is two level logic 87.The problem of logic race occurs in a. SOP functions c. POS functions b. associative law d. commutative, associative, distributive law b. A.B+A.C d.(A+B).(A+C) b. A d. A or 1 b. A.B d. A or B b. A=A d. (AB)=A+B b. A=A d. (AB)=A+B b. POS is a two level logic

b. Hybrod functions d. SOP and POS functions

88. In which function is each term known as min term a. SOP b. POS c. Hybrid d. both SOP and POS

89. In which function is each term known as max term a. SOP b. POS c. Hybrid d. both SOP and Hybrid 90. In the expression A+BC, the total number of min terms will be a.2 b. 3 c.4 d. 5 91.The min term designation for ABCD is a.m0 c. m14 92. The function Y=AC+BD+EF is a. POS c. Hybrid 93. The expression Y=M(0,1,3,4) is a. POS c. Hybrid 94. AB+AB= a. B c.1 b. m10 d. m15 b. SOP d. none of above b. SOP d. none of above b. A d. 0

95. In a four variable Karnaugh map eight adjacent cells give a a. Two variable term b. single variable term c. Three variable term d. four variable term 96.A karnaugh map with 4 variables has a. 2 cells c. 8 cells b. 4 cells d.16 cells

97.In a karnaugh map for an expression having dont care terms the dont cares can be treated as a. 0 b. 1 c. 1 or 0 d. none of above 98. The term VLSI generally refers to a digital IC having a. more than 1000 gates b. more than 100 gates c. more than 1000 but less than 9999 gates d. more than 100 but less than 999 gates

99.Typical size of an IC is about a.1*1 c. 0.1*0.1 100.A digital clock uses..chip a. SSI c. VLSI

b. 2*2 d. 0.0001*0.0001 b. LSI d. MSI

101. Digital technologies being used now-a-days are a. DTL and EMOS b. TTL, ECL, CMOS and RTL c. TTL, ECL and CMOS d. TTL, ECL, CMOS and DTL 102. A TTL circuit with totem pole output has a. high output impedance b. low output impedance c. very high output impedance d. any of above 103. TTL uses a. multi emitter transistors c. multi base transistors b. multi collector transistors d. multi emitter or collector transistors

104. Advanced schottky is a part of a. ECL family b. CMOS family c. TTL family d. none of above 105. For wired AND connection we should use a. TTL gates with active pull up b. TTL gates with open collector c. TTL gates without active pull up and with open collector d. any of above 106. Time delay of a TTL family is about a. 180ns c. 18ns 107. As compared to TTL, ECL has a. lower power dissipation c. higher propagation delay b. 50ns d. 3 ns b. lower propagation delay d. higher noise margin

108. As compared to TTL, CMOS logic has a. higher speed of operation b. higher power dissipation c. smaller physical size d. all of above

109. 74HCT00 series is a.NAND IC c. inverting IC 110.CD 4010 is a a. inverting buffer c. NOR IC

b. interface between TTL and CMOS d. NOR IC b. non inverting hex buffer d. NAND IC

111. Current requirement of a piezo buffer is about a. 100mA b. 20mA c. 4 mA d. 0.4 mA 112. TSL inverter has a. one input c. one or two inputs b. two inputs d. three inputs

113. Parallel adder is a. sequential circuits b. combinational circuits c. either sequential or combinational circuits d. none of above 114. The inputs to a 3 bit binary adder are 1112 and 1102. The output will be a.101 b.1101 c.1111 d.1110 115. A half adder can be used only for adding a. 1s b. 2s c. 4s d. 8s 116. A 3 bit binary adder should be a. 3 full adders c. 1 full adder and 2 half adder b. 2 full adders and 1 half adder d. 3 half adders

117. when two 4 bit parallel adders are cascaded we get a. 4 bit parallel adder b. 8 bit parallel adder c. 16 bit parallel adder d. none of above 118. The widely used binary multiplication method is a. repeated addition b. add and shift c. shift and add d. any of above

119.When microprocessor processes both positive and negative numbers, the representation used is a. 1s complement b. 2s complement c. signed binary d. any of above 120. Decimal -90 =.in 8 bit 2s complement a.1000 1000 b.1010 0110 c.1100 1100 d.0101 0101 121. In 2s complement addition, the carry generated in the last stage is a. added to LSB b. neglected c. added to bit next to MSB d. added to the bit next to LSB 122. The number of inputs and outputs in a full adder are a. 2 and 1 b. 2 and 2 c. 3 and 3 d. 3 and 2 123.In a 7 segment display the segments a,c,d,f,g are lit. The decimal number displayed will be a. 9 b. 5 c. 4 d. 2 124. In a 7 segment display the segments b and c are lit up. The decimal number displayed will be a. 9 b. 7 c. 3 d. 1 125 .A device which converts BCD to seven segments is called a. encoder b. decoder c. multiplexer d. none of these 126. Which device use the nematic fluid a. LED c. VF display b. LCD d. none of these

127. Which of these is the most recent device a. LED b. LCD c. VF display d. a and c 128. VF glows with . Colour when activated a. red b. orange c. bluish green d. none of these

129. Which display device resembles vacuum tube a. LED b. LCD c. VF d. none of these 130.Which device changes parallel data to serial data a. decoder b. multiplexer c. demultiplexer d. flip flop 131.A 1 of 4 multiplexer requires data select line a. 1 b. 2 c. 3 d. 4 132. It is desired to route data from many registers to one register. The device needed is a. decoder b. multiplexer c. demultiplexer d. counter 133.Which device has one input and many outputs a. flip flop b. multiplexer c. demultiplexer d. counter 134.Two 16:1 and one 2:1 multiplexers can be connected to form a a. 16:1 multiplexer b. 32:1 multiplexer c. 64:1 multiplexer d. 8:1 multiplexer 135. A flip flop is a a. combinational circuit c. arithmetic element b. memory element d. memory or arithmetic

136. I n a D latch a. data bit D is fed to S input and D to R input b. data bit D is fed to R input and D to S input c. data bit D is fed to both R and S inputs d. data bit D is not fed to any input 137. I n a D latch a. a high D sets the latch and low D resets it b. a low D sets the latch and high D resets it c. race can occur d. none of above

138.In a positive edge triggered JK flip flop a. High J and High K produce inactive state b. Low J and High K produce inactive state c. High J and Low K produce inactive state d. Low J and Low K produce inactive state 139.In a positive edge triggered D flip flop a. D input is called direct set b.Preset is called direct reset c. present and clear are called direct set and reset respectively d. D input overrides other inputs 140. In a positive edge triggered JK flip flop J=1,K=0 and clock pulse is rising.Q will a. be 0 b. be 1 c. show no change d. toggle 141. For edge triggering in flip flops manufacturers use a. RC circuit b. direct coupled design c. either RC circuit or direct coupled design d. none of these 142. In a JK flip flop toggle means a. set Q=1 and Q=0 c. change the output to the opposite state d. no change in input 143. A mod 4 counter will count a. from 0 to 4 c. from any number n to n+4 b. set Q=0 and Q=1

b. from 0 to 3 d. none of above

144.A counter has N flip flops. The total number of states are a. N b. 2N N c. 2 d. 4N 145.A counter has modulus of 10. The number of flip flops are a. 10 b. 5 c. 4 d. 3 146.In a ripple counter a. whenever a flip flop sets to 1,the next higher FF toggles b. whenever a flip flop sets to 0,the next higher FF remains unchanged c. whenever a flip flop sets to 1,the next higher FF faces race condition d. whenever a flip flop sets to 0,the next higher FF faces race condition

147.A counter has 4 flip flops.It divides the input frequency by a.4 b. 2 c. 8 d. 16 148. A decade counter skips a. binary states 1000 to 1111 c. binary states 1010 to 1111 b. binary states 0000 to 0011 d. binary states 1111 and higher

149.The number of flip flops needed for Mod 7 counter are a. 7 b. 5 c. 3 d. 1 150.A presettable counter with 4 flip flops start counting from a. 0000 b. 1000 c. any number from 0000 to 1111 d. any number from 0000 to 1000 151.A 4 bit down counter can count from a. 0000 to 1111 c. 000 to 111 b. 1111 to 0000 d. 111 to 000

152. A 3 bit up-down counter can count from a. 000 to 111 b. 111 to 000 c. 000 to 111 and also from 111 to 000 d. none of above 153.IC counters are a. synchronous only c. both synchronous and asynchronous b. asynchronous only d. none of above

154. Shifting digits from left to right and vice versa is needed in a. storing numbers b. arithmetic operations c. counting d. storing and counting 155. The basic storage element in a digital system is a. flip flop b. counter c. multiplexer d. encoder 156. The simplest register is a. buffer register c. controlled buffer register b. shift register d. bidirectional register

157. The basic shift register operations are a. serial in serial out b. serial in parallel out c. parallel in serial out d. all of above 158. A universal shift register can shift a. from right to left c. both from right to left and left to right d. none of above b. from left to right

159. In a shift register, shifting a bit by one bit means a. division by 2 b. multiplication by 2 c. subtraction by 2 d. any of above 160. An 8 bit binary number is to be entered into an 8 bit serial shift register. The number of clock pulses required is a. 1 b. 2 c. 4 d. 8

Q. Power diode is generally made from a) Silicon b) Germanium c) Both d) None of these Q. When the both junction of NPN diode is reverse biased, then the diode is in which mode a) Active b) Cutoff c) Saturation d) inverted Q. Which transistor mode gives the inverted output a) Common Emitter b) Common Base c) Common Collector d) None of these Q. Which coupling gives the higher gain in case of amplifier a) Capacitor coupling b) Impedance coupling c) Transformercoupling Q. Which distortion is least objectionable in audio amplification a) Phase b) Frequency c) Harmonic d) Intermediation Q. A narrow band amplifier has a band pass nearlyof central frequency a) 33.3% b) 10% c) 50% Q. Phase shift oscillator consists a) RL b) RC c) RLC Q. Multivibrater Produces a) Sine wave b) Square wave c) Smooth wave d) sawtooth Q. Convert the 101101 Binary number into octal no a) 65 b) 55 c) 51

d) 45 Ans: 55 Q. 10 in BCD a) 10100 b) 1100 c) 010111 d) None of these Ans: None of these Q. Which PNP device has a terminal for synchronizing purpose a) SCS b) Triac c) Diac d) SUS Q. Addition of indium in semiconductor crystal makes a) PNP b) NPN Q. Free electron exists in which band a) 1 b) 2 c) 3 d) Conduction band Q. Ripple factor of half wave rectifier a) 1.21 b) 0.48 c) 0.5 Q. Transistor that can be used in enhancement mode a) NPN b) UJT c) JFET d) MOSFET Q. Following contributes to harmonic distortion in Amplifier a) +Ve feedback b) Ve feedback c) Defective active device Q. High cutoff frequency a) CB b) CC c) CE Q. Which is used as data selector? a) Encoder

b) Decoder c) modulator d) Demodulator Q. Read write capable memory a) RAM b) ROM c) Both d) None of these Q.the radix or base of hexadecimal number system is ----------a) 8 b) 16 c) 5 d) none of these Ans: 16 Q.the no of 1s in the binary representation of the expression 162*9+162*7+16*5+3 are a) 10 b) 23 c) 6 d) 4 Q. the no of latches in F/F are ------a) 1 b) 2 c) 3 d) 4 Q.how many flip-flops are required to construct Mod -12 counter a) 5 b) 4 c) 12 d) none Ans: 4 Q. which logic gate has the output is compliment of its input ---------a) OR b) AND c) NOT d) X-OR Ans: NOT Q.no.of 2-input multiplexers needed to construct a 210 input multiplexer. a) 12 b) 31 c) 20 d) 16

Q.By adding inverters to the inputs and output of a AND gate we can obtain a) OR b) AND c) NOT d) X-OR Ans: X-OR Q.how many NAND gates are needed to realize OR gate -------------a) 1 b) 2 c) 3 d) 4 Ans: 3 Q.which is the first integrated logic family --------------a) RTL b) DTL c) TTL d) none of these Q. Which logic gate has output high if and only if all inputs are low ---------? a) NOR b) NAND c) X-NOR d) AND Ans: NAND Q.According to Boolean algebra 1+A+B+C = a) A b) A+B+C c) 1 d) none of these Ans: 1 Q. If a=0x6db7 and b=0x2ae9 then what is the value of ab-------------a) binary number for 1001.1101? b) decimal number for 19? c) excess-3 code for 29? Q.what is the value of A'+1 ? a) A b) A' c) 1 d) none of these Ans: 1

Q.2 in 4 bit number one bit indicates sign of the number then the locations are from a) -8 to 8 b) -7 to 7 c) -16 to 16 d) None Q.Avalanche photo diode is used when compared to PIN diode bcz a)larger band width b)high sensitivity C)------d)-------Q.some non zero DC voltage is to RC low pass circuit then the DC voltage in the output contains a) Same as in input b) Higher than input c) Zero d) Slightly increases Q.if the output of the gate is always high then the gates applied to this logic are 0,0 a) NAND and EX-NOR b) NAND and NOR c) AND and X-NOR d) OR and XOR Ans:a Q.Thermal Run away is not possible in FET bcz the flow of a)minority careers b)Transconductance c)_____ d)none Ans : minority careers Q.which of the following is/are true about 1's and 2's compements: i)In 1's complement form. 0 has two representations ii)in 1's complement, the magnitude of lowest number is equal to the magnitude of highest number iii)In 2's complement, 0 has two representations a) i only b) i and ii c) iii only d) all of these Q.In the hybrid parameter model of a transistor reverse transfer voltage ratio and forward transfer current ratio are respectively given by: a) h11 and h21 b) h12 and h11 c) h21 and h11 d) None of these

Q.The largest negative no can be represented with 8 bits in 2's compliment representation? a)-256 b)-255 c)-127 d)-128 Ans: -128 Q. How many NAND gates required to implement AB+CD+EF a) 1 b) 2 c) 3 d) 4 Ans: 4 Q. Transparent latch is seen in which type of flip flop a) SR FF b) D FF c) JK FF d) D FF Ans: D FF Q. Odd parity generator uses which logic? a) Digital b) Analog c) Sequential d) none Q. Which type of ADC is fastest? a) SARC b) Counter type c) Intigrated type d) Flash ANS: Flash/Parallel Q. Which one of the following is fastest read/writable memory? a) PROM b) EEPROM c) Flash d) none Ans: Flash 8. In array programming which one is used a) SISD b) PISD c) MISD d) None

Q.Which one of the following has high I/p impedance a) CC b) CB c) CE d) None Q. The maximum time allowed time for each flip flop for a mod 10 synchronous counter if each flip flop delay is 25ns. a) 25 ns b) 50 ns c) 100 ns d) none Q. The resolution for a DAC is given by 0.4% then no. of bits of DAC is a) 8- bits b) 16- bits c) 32- bits d) none Ans: 8- bits 41) The chip capacity is 256 bits, then the no.of chips required to build 1024 B memory Is a) 32 b) 16 c) 15 d) 4 Q. Which of the following are correct? 1)A flip-flop is used to store 1-bit of information 2)Race around condition occurs in JK flip flop when both the inputs are 1 3)Master slave flip flop is used to store 2 bits of information 4)A transparent latch consists of a D- flip flop a) 1,2,3 b) 1,3,4 c) 1,2,4 d) 2,3,4 Ans: 1,2,4 Q. output resistance of ideal OP AMP is a) 0 b) 1 c) infinite d) very high ANS: 0 Q. CMRR of an OP AMP is given as 80db and Ad is 20000.Value of Acm will be a) 4 b) 8

c) 2 d) 1 Ans: 2 Q.Si,Ge lie in ........block of periodic table a) III b) V c) IV A d) IV B Ans: IV A Q.to obtain 10 mV resolution on 5 V range how many bit DAC is to be used a) 4 b) 8 c) 16 d) 32 Q.% resolution of a 10 bit ADC a) 1.588% b) 0.392% c) 0.0978% d) 0.0244% Ans: 0.0978% Q.Efficiency of half wave rectifier a) 45% b) 50% c) 86% d) 100% Ans: 45% 1. A 1 msec pulse can be converted into a 10 msec pulse by using (a) an stable multivibrator (1) a monostable multivibrator (c) a bistable multivibrator (d) flip-flop

2. The fastest mode of data transfer from CPU to memory in a microprocessor is (a) memory mapped I/O (b) I/O mapped I/O (c) Interrupt driven I/O (d) DMA

3. Flat top sampling of baseband signals leads to (a) aliasing (b) aperture effect (c) under-sampling (d) impossible reconstruction.

4. How many steps are there in the output of10-bit D/A converter? (a) 1023 (b) 1024 (c) 10 (d) 100

5. Which one of the following can be used to change data from spatial code to temporal code? (a) Shift registers (b) Counters (c) A/D converters (d) Combinational Circuits

6.For a six bit ladder D/A converter which has digital input of 101001, the analog value is (assume 0 = 0 Vand 1 = + 10 V) (a) 0.423 (b) 0.522 (c) 0.641 (d) 0.923

7.Which one of the following is a D to A conversion technique? (a) Successive approximation (b) Weighted resistor technique (c) Dual slope technique (d) Single slope technique 8.If the memory chip size is 256 x l bits, then the number of chips required to make up 1K (1024) bytes of memory is (a)32 (b)24 (c)12 (d)8

9.Which of the following statements are correct? 1. A flip-flop is used to store 1-bit of information

2. Race-around condition occurs in a J-K flip-flop when both the inputs are 1. 3. Master-slave configuration is used in flip-flops to store 2-bits of information. 4. A transparent latch consists of a D-type flip-flop.

10, The greatest negative number which can be store in a computer that has 8-bit word length and uses 2s complement arithmetic is (a) -256 (b)-255 (c) 128 (d) 127

11. A retriggerable monoshot is one which (a) can be triggered only once (b) has two quasi-stable states (c) cannot be triggered until full pulse has been outputted. (d) is capable of being triggered while the output is being generated.

12. A carry look ahead adder is frequently used for addition because, it (a) is faster (b) is more accurate (c) uses fewer gates (d) costs less

13. When signed numbers are used in binary arithmetic, then which one of the following notations would have unique representation for zero? (a) Sign-magnitude (b) ls complement (c) 2s complement (d) 9s complement

14. The number of switching function of 3variables is (a)8 (b)64 (c) 128 (d) 256

15. The gate whose output is LOW if and only if all the inputs are HIGH, is ()NAND

(b)NOR (c) OR (d) AND

16. In computer terminology 1 M Byte memory means (a) 1000000 bytes (b) 1000024 bytes (c) 1024000 bytes (d) 1048576 bytes

17. A unit pulse input is given to a single-pole stable digital filter. Its output response will be? (a) constant pulses (b) exponentially decaying pulses (c) impulse (d) exponentially rising pulses

18. The number of flip flops required in a decade counter is (a) 2 (b) 3 (c) 4 (d) 10

19. A square wave with a period of 10 micro sec drive a flip flop. The period of.the output signal.will be (a)100 micro sec (b)20 micro sec (c) 10 micro sec (d) 5 micro sec

20.A digital Voltmeter has 4 and 1/3 digits display .The 1 volt range can read upto (a)1.0000 (b) 1.1111 (c)1.9999 (d) 19999

21. Ultraviolet radiations are used in IC fabrication process for? (a) diffusion (b) masking

(c) isolation (d) metallization

22. In PCM system if the quantization levels are increased from 2 to 8, the relative bandwidth requirement will (a) remain same (b) be doubled (c) be tripled (d )be four times

23. The 7-bit Hamming code (even parity check) 001 for a BCD digit is known to have a single error. Therefore, encoded BCD digit is (a) 9 (b) 5 (c) 3 (d) 0

24. If NxN = (7601 ) where N is a positive integer, then the value of N is (a)(241)base 5 (b)(143) base 6 (c)(165)base 7 (d)(39)base 16

25. The input-output equation of a system is given by y(n)=x(n) square where y(n) and x(n) represent output , input sequences respectively. The system is (a) linear and causal (b) linear and noncausal (c) nonlinear and causal (d) nonlinear and noncausal.

26. The number of comparators required to build a 5-bit Analog to Digital Converter (ADC)is (a) 5 (b) 11 (c)21 (d)31

27. A 555 timer can be used as (a) an astable multivibrator only (b) a monostable multivibrator only (c) a frequency divider only (d) an astable multivibrator or a monostable muttivibrator or a frequency divider

28. A synchronous sequential circuit is to be designed which will produce an output 1 when previous two and present input represent an even number, with present input being least significant bit. The minimum number of states of the machine will be (a)2 (b)3 (c) 4 (d)5

29. The specification for a standard 74 series TFL gate reads propagation delay as 35 ns and power dissipation as I mW. This circuit is (a) high speed TTL (b) low power TTL (c) standard Schottky TTL (D) low power Schottky TTL

Directions : The following question consists of two statements, one labelled as the Assertion (A) and the other as Reason (R) . You are to examine these two statements carefully and select the answer to this question using the code given below. Assertion (A) The modernization process has challenged the hold caste system in India. Reason (R) Mobility as a phenomenon of change in caste system does not challenge the basic structure of caste. Code: (a) Both A and R are individually true and R is the correct explanation of A (b) Both A and R are individually true, but R is not the correct explanation of A (c) A is true, but R is. false (d) A is false, but R is true

Assertion (A):A programmable Read only-Memory can be used as a synchronous counter Reason (R) : Each memory location of a programmable Read- Only-Memory is programmable and can be read synchronously.

30. Assertion (A): Master slave f flip flop is commonly employed in high speed synchronous circuitry. Reason (R) It uses two JK flip flops in cascade.

31. Assertion (A) : A demultiplexer cannot be used as a decoder. Reason (R): A demultiplexer selects one of many outputs whereas a decoder selects an output corresponding to the coded input.

32. Assertion (A) : In analog computation only summing amplifiers and integrators Reason (R) : The differentiators using operational amplifiers cannot be designed.

33.Assertion (A) : Self-biasing is generally used for a CE amplifier Reason (R) : The design of self-biasing circuit is very easy as compared to other

34. Assertion (A) : 2s complement arithmetic is preferred in digital computers Reason (R) : To obtain the 2s complement of a number, the hardware required is simple.

35. Assertion (A): XOR gate is not a universal gate. Reason (R) : It is not possible to realize any Boolean function using XOR gates only.

36.Assertion (A) : ECL gate has the highest speed of operation Reason (R) : The transistors in ECL gate operate in the active region. 37. Assertion (A) : The basic operation of a micro-processor consists of fetching and execution of instructions one by one Reason (R) The instruction set of a microprocessor is stored inside the ALU . 38. Assertion (A) In a heterodyne digital counter, the input signal is heterodyned to a lower frequency Reason (R) The gating and counting circuits of a digital counter cannot handle GHz signals.

39. Assertion (A) Dual-slope A/D converter is the most preferred A/D conversion approach in digital multimeters. Reason (R) Dual-slope A/D converter,provides high accuracy in A/D conversion while at the same time suppressing the hum effect on the input signal.

40. Assertion (A) A digital multiplexer can also be used to implement combinational logic function Reason (R) In a combinational circuit, the current output depends on the previous outputs also.

41. Assertion (A) The sampled data system with its characteristic equation Z2- 4z + 4 = 0 is unstable Reason (R) : Sampled data systems with positive roots of the characteristic equation are unstable.

42. Assertion (A) Fast events can be captured and displayed by a real-time spectrum analyzer. Reason (R) All components of a signal are presented simultaneously in the frequency domain. In swept type spectrum analyzer, frequencies are supplied one at a time at a particular rate.

43. Assertion (A) Among RAM and ROM, ROM is used as firmware memory Reason (R) ROM can be accessed for alteration.

Question: What does AM mean?

1) Angelo marconi 2) Anno median 3) Amplitude modulation 4) Amperes Electronics Quiz, Technology Quiz

Question: What frequency range is the High Frequency band?

1) 100 kHz 2) 1 GHz 3) 30 to 300 MHz

4) 3 to 30 MHz Electronics Quiz, Technology Quiz

Question: What does AM mean?

1) Angelo marconi 2) Anno median 3) Amplitude modulation 4) Amperes Electronics Quiz, Technology Quiz

Question: What frequency range is the High Frequency band?

1) 100 kHz 2) 1 GHz 3) 30 to 300 MHz 4) 3 to 30 MHz Electronics Quiz, Technology Quiz

Question: What does EPROM stand for?

1) Electric Programmable Read Only Memory 2) Erasable Programmable Read Only Memory 3) Evaluable Philotic Random Optic Memory 4) Every Person Requires One Mind

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Question: What does VVVF stand for? 1) Variant Voltage Vile Frequency 2) Variable Velocity Variable Fun 3) Very Very Vicious Frequency 4) Variable Voltage Variable Frequency

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Question: The sampling rate, (how many samples per second are stored) for a CD is...? 1) 48.4 kHz 2) 22,050 Hz 3) 44.1 kHz 4) 48 kHz

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Question: Compact discs, (according to the original CD specifications) hold how many minutes of music? 1) 74 mins 2) 56 mins 3) 60 mins 4) 90 mins Computers Quiz, Electronics Quiz, Technology Quiz

Question: Sometimes computers and cash registers in a foodmart are connected to a UPS system. What does UPS mean? 1) United Parcel Service 2) Uniform Product Support 3) Under Paneling Storage 4) Uninterruptable Power Supply

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Question: What does AC and DC stand for in the electrical field? 1) Alternating Current and Direct Current 2) A Rock Band from Australia 3) Average Current and Discharged Capacitor 4) Atlantic City and District of Columbia Electronics Quiz, Technology Quiz Question: Which consists of two plates separated by a dielectric and can store a charge? 1) Inductor 2) Capacitor 3) Transistor 4) Relay Electronics Quiz, Technology Quiz

Question: Made from a variety of materials, such as carbon, which inhibits the flow of current...? 1) Choke 2) Inductor 3) Resistor 4) Capacitor Electronics Quiz, Technology Quiz

Question: The FFT, a mathematical process, is used extensively in digital signal processing (DSP). For what word does the second "F" in FFT stand?

1) Fast

2) Fourier 3) Ford 4) Footed

Electronics Quiz, Techmology Quiz Question: Which is a type of Electrically-Erasable Programmable Read-Only Memory?

1) Flash 2) Flange 3) Fury 4) FRAM Electronics Quiz, Technology Quiz

Question: A given signal's second harmonic is twice the given signal's __________ frequency...?

1) Fourier 2) Foundation 3) Fundamental 4) Field Electronics Quiz, Technology Quiz

Question: Voltage is sometimes referred to as EMF, or Electromotive...?

1) Field 2) Factor

3) Flash 4) Force Electronics Quiz, Technology Quiz

Question: "FET" is a type of transistor, Its full name is ________ Effect Transistor...?

1) Field 2) Factor 3) Flash 4) Force

Electronics Quiz, Technology Quiz Question: When measuring the characteristics of a small-signal amplifier, say for a radio receiver, one might be concerned with its "Noise..."?

1) Fundamental 2) Fall 3) Force 4) Figure

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