A low voltage highly linear CMOS down conversion mixer

frequency mixer
by :

1.Sameer Tiwari
2.Molly Sharma 3.Nitish Bhatia 4. Anil kumar

RF

Receiver Introduction Frequency Mixer Mixer design consideration Mixer Topologies Problem & Solution Simulation Tools Expected results Applications

Antenna
BPF1 LNA BPF2 Mixer BPF3 IF Amp

Demodulator

RF front end

LO

If

x(t ) A cos 1t y (t ) B cos 2t

x(t) y(t)

x(t)y(t)

Then the output is

AB AB A cos 1t B cos 2t cos(1 2 )t cos(1 2 )t 2 2

down convert
up convert

 Conversion

gain or loss Intercept point Port isolations Noise figure High order spurious response rejection Image noise suppression Operating frequency range

 Discrete implementations: Single-diode mixers IC implementations: Gilbert mixer

VLO

VLO

L
VRF
ID
VD

RL

VIF

VIF

Gilbert Mixer
RL
VOUT

RL

VLO

M2

M3
I DC I RF

VLO

M2

M3
I DC I RF

VLO

VRF

VRF

PROBLEM : In conventional method of improving linearity and power consumption there is a need for additional circuits which increase active area and power consumption.

SOLUTION : Adding a resistor and a PMOS transistor operating in weak inversion into RF stage.

 Advanced

Design System (ADS)

Other Support Study Tool :

Multisim

Pspice

 Technology :implemented in a 0.18 um CMOS

technology

RF frequency: 2.4 GHz LO frequency: 2.3 GHz Supply voltage: 1V

Conversion gain is 7.8 dB and LO signal power 10dBm IIP3- 21 dBm Third order harmonic at 300 MHz is 76dBm below fundamental harmonic at 100MHz

Radios Cellular Handsets GPS Receivers Wireless LAN Wireless Data Transmission Satellite communications Super hetrodyne Receiver

A low voltage highly linear CMOS down conversion mixer by M.Amiri , A. Abrishamifar (2011)
www.eecg.toronto.edu/~kphang/papers/.../kawok_mixer

IEEE Papers.